| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* Copyright (c) 2018 Chelsio Communications, Inc. */ |
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| 3 | |
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| 4 | #ifndef __CHCR_IPSEC_H__ |
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| 5 | #define __CHCR_IPSEC_H__ |
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| 6 | |
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| 7 | #include "t4_hw.h" |
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| 8 | #include "cxgb4.h" |
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| 9 | #include "t4_msg.h" |
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| 10 | #include "cxgb4_uld.h" |
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| 11 | |
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| 12 | #include "chcr_core.h" |
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| 13 | #include "chcr_algo.h" |
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| 14 | #include "chcr_crypto.h" |
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| 15 | |
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| 16 | #define CHIPSEC_DRV_MODULE_NAME "ch_ipsec" |
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| 17 | #define CHIPSEC_DRV_VERSION "1.0.0.0-ko" |
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| 18 | #define CHIPSEC_DRV_DESC "Chelsio T6 Crypto Ipsec offload Driver" |
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| 19 | |
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| 20 | struct ipsec_uld_ctx { |
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| 21 | struct list_head entry; |
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| 22 | struct cxgb4_lld_info lldi; |
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| 23 | }; |
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| 24 | |
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| 25 | struct chcr_ipsec_req { |
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| 26 | struct ulp_txpkt ulptx; |
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| 27 | struct ulptx_idata sc_imm; |
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| 28 | struct cpl_tx_sec_pdu sec_cpl; |
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| 29 | struct _key_ctx key_ctx; |
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| 30 | }; |
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| 31 | |
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| 32 | struct chcr_ipsec_wr { |
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| 33 | struct fw_ulptx_wr wreq; |
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| 34 | struct chcr_ipsec_req req; |
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| 35 | }; |
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| 36 | |
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| 37 | #define ESN_IV_INSERT_OFFSET 12 |
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| 38 | struct chcr_ipsec_aadiv { |
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| 39 | __be32 spi; |
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| 40 | u8 seq_no[8]; |
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| 41 | u8 iv[8]; |
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| 42 | }; |
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| 43 | |
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| 44 | struct ipsec_sa_entry { |
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| 45 | int hmac_ctrl; |
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| 46 | u16 esn; |
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| 47 | u16 resv; |
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| 48 | unsigned int enckey_len; |
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| 49 | unsigned int kctx_len; |
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| 50 | unsigned int authsize; |
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| 51 | __be32 key_ctx_hdr; |
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| 52 | char salt[MAX_SALT]; |
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| 53 | char key[2 * AES_MAX_KEY_SIZE]; |
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| 54 | }; |
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| 55 | |
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| 56 | #endif /* __CHCR_IPSEC_H__ */ |
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| 57 | |
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| 58 | |
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