1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* Huawei HiNIC PCI Express Linux driver |
3 | * Copyright(c) 2017 Huawei Technologies Co., Ltd |
4 | */ |
5 | |
6 | #ifndef __HINIC_DEVLINK_H__ |
7 | #define __HINIC_DEVLINK_H__ |
8 | |
9 | #include <net/devlink.h> |
10 | #include "hinic_dev.h" |
11 | |
12 | #define MAX_FW_TYPE_NUM 30 |
13 | #define HINIC_MAGIC_NUM 0x18221100 |
14 | #define UPDATEFW_IMAGE_HEAD_SIZE 1024 |
15 | #define FW_UPDATE_COLD 0 |
16 | #define FW_UPDATE_HOT 1 |
17 | |
18 | #define UP_TYPE_A 0x0 |
19 | #define UP_TYPE_B 0x1 |
20 | |
21 | #define MAX_FW_FRAGMENT_LEN 1536 |
22 | #define HINIC_FW_DISMATCH_ERROR 10 |
23 | |
24 | enum hinic_fw_type { |
25 | UP_FW_UPDATE_UP_TEXT_A = 0x0, |
26 | UP_FW_UPDATE_UP_DATA_A, |
27 | UP_FW_UPDATE_UP_TEXT_B, |
28 | UP_FW_UPDATE_UP_DATA_B, |
29 | UP_FW_UPDATE_UP_DICT, |
30 | |
31 | UP_FW_UPDATE_HLINK_ONE = 0x5, |
32 | UP_FW_UPDATE_HLINK_TWO, |
33 | UP_FW_UPDATE_HLINK_THR, |
34 | UP_FW_UPDATE_PHY, |
35 | UP_FW_UPDATE_TILE_TEXT, |
36 | |
37 | UP_FW_UPDATE_TILE_DATA = 0xa, |
38 | UP_FW_UPDATE_TILE_DICT, |
39 | UP_FW_UPDATE_PPE_STATE, |
40 | UP_FW_UPDATE_PPE_BRANCH, |
41 | UP_FW_UPDATE_PPE_EXTACT, |
42 | |
43 | UP_FW_UPDATE_CLP_LEGACY = 0xf, |
44 | UP_FW_UPDATE_PXE_LEGACY, |
45 | UP_FW_UPDATE_ISCSI_LEGACY, |
46 | UP_FW_UPDATE_CLP_EFI, |
47 | UP_FW_UPDATE_PXE_EFI, |
48 | |
49 | UP_FW_UPDATE_ISCSI_EFI = 0x14, |
50 | UP_FW_UPDATE_CFG, |
51 | UP_FW_UPDATE_BOOT, |
52 | UP_FW_UPDATE_VPD, |
53 | FILE_TYPE_TOTAL_NUM |
54 | }; |
55 | |
56 | #define _IMAGE_UP_ALL_IN ((1 << UP_FW_UPDATE_UP_TEXT_A) | \ |
57 | (1 << UP_FW_UPDATE_UP_DATA_A) | \ |
58 | (1 << UP_FW_UPDATE_UP_TEXT_B) | \ |
59 | (1 << UP_FW_UPDATE_UP_DATA_B) | \ |
60 | (1 << UP_FW_UPDATE_UP_DICT) | \ |
61 | (1 << UP_FW_UPDATE_BOOT) | \ |
62 | (1 << UP_FW_UPDATE_HLINK_ONE) | \ |
63 | (1 << UP_FW_UPDATE_HLINK_TWO) | \ |
64 | (1 << UP_FW_UPDATE_HLINK_THR)) |
65 | |
66 | #define _IMAGE_UCODE_ALL_IN ((1 << UP_FW_UPDATE_TILE_TEXT) | \ |
67 | (1 << UP_FW_UPDATE_TILE_DICT) | \ |
68 | (1 << UP_FW_UPDATE_PPE_STATE) | \ |
69 | (1 << UP_FW_UPDATE_PPE_BRANCH) | \ |
70 | (1 << UP_FW_UPDATE_PPE_EXTACT)) |
71 | |
72 | #define _IMAGE_COLD_SUB_MODULES_MUST_IN (_IMAGE_UP_ALL_IN | _IMAGE_UCODE_ALL_IN) |
73 | #define _IMAGE_HOT_SUB_MODULES_MUST_IN (_IMAGE_UP_ALL_IN | _IMAGE_UCODE_ALL_IN) |
74 | #define _IMAGE_CFG_SUB_MODULES_MUST_IN BIT(UP_FW_UPDATE_CFG) |
75 | #define UP_FW_UPDATE_UP_TEXT 0x0 |
76 | #define UP_FW_UPDATE_UP_DATA 0x1 |
77 | #define UP_FW_UPDATE_VPD_B 0x15 |
78 | |
79 | struct fw_section_info_st { |
80 | u32 fw_section_len; |
81 | u32 fw_section_offset; |
82 | u32 fw_section_version; |
83 | u32 fw_section_type; |
84 | u32 fw_section_crc; |
85 | }; |
86 | |
87 | struct fw_image_st { |
88 | u32 fw_version; |
89 | u32 fw_len; |
90 | u32 fw_magic; |
91 | struct { |
92 | u32 fw_section_cnt:16; |
93 | u32 resd:16; |
94 | } fw_info; |
95 | struct fw_section_info_st fw_section_info[MAX_FW_TYPE_NUM]; |
96 | u32 device_id; |
97 | u32 res[101]; |
98 | void *bin_data; |
99 | }; |
100 | |
101 | struct host_image_st { |
102 | struct fw_section_info_st image_section_info[MAX_FW_TYPE_NUM]; |
103 | struct { |
104 | u32 up_total_len; |
105 | u32 fw_version; |
106 | } image_info; |
107 | u32 section_type_num; |
108 | u32 device_id; |
109 | }; |
110 | |
111 | struct devlink *hinic_devlink_alloc(struct device *dev); |
112 | void hinic_devlink_free(struct devlink *devlink); |
113 | void hinic_devlink_register(struct hinic_devlink_priv *priv); |
114 | void hinic_devlink_unregister(struct hinic_devlink_priv *priv); |
115 | |
116 | int hinic_health_reporters_create(struct hinic_devlink_priv *priv); |
117 | void hinic_health_reporters_destroy(struct hinic_devlink_priv *priv); |
118 | |
119 | #endif /* __HINIC_DEVLINK_H__ */ |
120 | |