1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (c) 2019, Intel Corporation. */
3
4#ifndef _ICE_FLEX_TYPE_H_
5#define _ICE_FLEX_TYPE_H_
6#include "ice_ddp.h"
7
8/* Packet Type (PTYPE) values */
9#define ICE_PTYPE_MAC_PAY 1
10#define ICE_PTYPE_IPV4_PAY 23
11#define ICE_PTYPE_IPV4_UDP_PAY 24
12#define ICE_PTYPE_IPV4_TCP_PAY 26
13#define ICE_PTYPE_IPV4_SCTP_PAY 27
14#define ICE_PTYPE_IPV6_PAY 89
15#define ICE_PTYPE_IPV6_UDP_PAY 90
16#define ICE_PTYPE_IPV6_TCP_PAY 92
17#define ICE_PTYPE_IPV6_SCTP_PAY 93
18#define ICE_MAC_IPV4_ESP 160
19#define ICE_MAC_IPV6_ESP 161
20#define ICE_MAC_IPV4_AH 162
21#define ICE_MAC_IPV6_AH 163
22#define ICE_MAC_IPV4_NAT_T_ESP 164
23#define ICE_MAC_IPV6_NAT_T_ESP 165
24#define ICE_MAC_IPV4_GTPU 329
25#define ICE_MAC_IPV6_GTPU 330
26#define ICE_MAC_IPV4_GTPU_IPV4_FRAG 331
27#define ICE_MAC_IPV4_GTPU_IPV4_PAY 332
28#define ICE_MAC_IPV4_GTPU_IPV4_UDP_PAY 333
29#define ICE_MAC_IPV4_GTPU_IPV4_TCP 334
30#define ICE_MAC_IPV4_GTPU_IPV4_ICMP 335
31#define ICE_MAC_IPV6_GTPU_IPV4_FRAG 336
32#define ICE_MAC_IPV6_GTPU_IPV4_PAY 337
33#define ICE_MAC_IPV6_GTPU_IPV4_UDP_PAY 338
34#define ICE_MAC_IPV6_GTPU_IPV4_TCP 339
35#define ICE_MAC_IPV6_GTPU_IPV4_ICMP 340
36#define ICE_MAC_IPV4_GTPU_IPV6_FRAG 341
37#define ICE_MAC_IPV4_GTPU_IPV6_PAY 342
38#define ICE_MAC_IPV4_GTPU_IPV6_UDP_PAY 343
39#define ICE_MAC_IPV4_GTPU_IPV6_TCP 344
40#define ICE_MAC_IPV4_GTPU_IPV6_ICMPV6 345
41#define ICE_MAC_IPV6_GTPU_IPV6_FRAG 346
42#define ICE_MAC_IPV6_GTPU_IPV6_PAY 347
43#define ICE_MAC_IPV6_GTPU_IPV6_UDP_PAY 348
44#define ICE_MAC_IPV6_GTPU_IPV6_TCP 349
45#define ICE_MAC_IPV6_GTPU_IPV6_ICMPV6 350
46#define ICE_MAC_IPV4_PFCP_SESSION 352
47#define ICE_MAC_IPV6_PFCP_SESSION 354
48#define ICE_MAC_IPV4_L2TPV3 360
49#define ICE_MAC_IPV6_L2TPV3 361
50
51/* Attributes that can modify PTYPE definitions.
52 *
53 * These values will represent special attributes for PTYPEs, which will
54 * resolve into metadata packet flags definitions that can be used in the TCAM
55 * for identifying a PTYPE with specific characteristics.
56 */
57enum ice_ptype_attrib_type {
58 /* GTP PTYPEs */
59 ICE_PTYPE_ATTR_GTP_PDU_EH,
60 ICE_PTYPE_ATTR_GTP_SESSION,
61 ICE_PTYPE_ATTR_GTP_DOWNLINK,
62 ICE_PTYPE_ATTR_GTP_UPLINK,
63};
64
65struct ice_ptype_attrib_info {
66 u16 flags;
67 u16 mask;
68};
69
70/* TCAM flag definitions */
71#define ICE_GTP_PDU BIT(14)
72#define ICE_GTP_PDU_LINK BIT(13)
73
74/* GTP attributes */
75#define ICE_GTP_PDU_FLAG_MASK (ICE_GTP_PDU)
76#define ICE_GTP_PDU_EH ICE_GTP_PDU
77
78#define ICE_GTP_FLAGS_MASK (ICE_GTP_PDU | ICE_GTP_PDU_LINK)
79#define ICE_GTP_SESSION 0
80#define ICE_GTP_DOWNLINK ICE_GTP_PDU
81#define ICE_GTP_UPLINK (ICE_GTP_PDU | ICE_GTP_PDU_LINK)
82
83struct ice_ptype_attributes {
84 u16 ptype;
85 enum ice_ptype_attrib_type attrib;
86};
87
88/* Tunnel enabling */
89
90enum ice_tunnel_type {
91 TNL_VXLAN = 0,
92 TNL_GENEVE,
93 TNL_GRETAP,
94 TNL_GTPC,
95 TNL_GTPU,
96 __TNL_TYPE_CNT,
97 TNL_LAST = 0xFF,
98 TNL_ALL = 0xFF,
99};
100
101struct ice_tunnel_type_scan {
102 enum ice_tunnel_type type;
103 const char *label_prefix;
104};
105
106struct ice_tunnel_entry {
107 enum ice_tunnel_type type;
108 u16 boost_addr;
109 u16 port;
110 struct ice_boost_tcam_entry *boost_entry;
111 u8 valid;
112};
113
114#define ICE_TUNNEL_MAX_ENTRIES 16
115
116struct ice_tunnel_table {
117 struct ice_tunnel_entry tbl[ICE_TUNNEL_MAX_ENTRIES];
118 u16 count;
119 u16 valid_count[__TNL_TYPE_CNT];
120};
121
122struct ice_dvm_entry {
123 u16 boost_addr;
124 u16 enable;
125 struct ice_boost_tcam_entry *boost_entry;
126};
127
128#define ICE_DVM_MAX_ENTRIES 48
129
130struct ice_dvm_table {
131 struct ice_dvm_entry tbl[ICE_DVM_MAX_ENTRIES];
132 u16 count;
133};
134
135struct ice_pkg_es {
136 __le16 count;
137 __le16 offset;
138 struct ice_fv_word es[];
139};
140
141struct ice_es {
142 u32 sid;
143 u16 count;
144 u16 fvw;
145 u16 *ref_count;
146 u32 *mask_ena;
147 struct list_head prof_map;
148 struct ice_fv_word *t;
149 u8 *symm; /* symmetric setting per profile (RSS blk)*/
150 struct mutex prof_map_lock; /* protect access to profiles list */
151 u8 *written;
152 u8 reverse; /* set to true to reverse FV order */
153};
154
155/* PTYPE Group management */
156
157/* Note: XLT1 table takes 13-bit as input, and results in an 8-bit packet type
158 * group (PTG) ID as output.
159 *
160 * Note: PTG 0 is the default packet type group and it is assumed that all PTYPE
161 * are a part of this group until moved to a new PTG.
162 */
163#define ICE_DEFAULT_PTG 0
164
165struct ice_ptg_entry {
166 struct ice_ptg_ptype *first_ptype;
167 u8 in_use;
168};
169
170struct ice_ptg_ptype {
171 struct ice_ptg_ptype *next_ptype;
172 u8 ptg;
173};
174
175#define ICE_MAX_TCAM_PER_PROFILE 32
176#define ICE_MAX_PTG_PER_PROFILE 32
177
178struct ice_prof_map {
179 struct list_head list;
180 u64 profile_cookie;
181 u64 context;
182 u8 prof_id;
183 u8 ptg_cnt;
184 u8 ptg[ICE_MAX_PTG_PER_PROFILE];
185 struct ice_ptype_attrib_info attr[ICE_MAX_PTG_PER_PROFILE];
186};
187
188#define ICE_INVALID_TCAM 0xFFFF
189
190struct ice_tcam_inf {
191 u16 tcam_idx;
192 struct ice_ptype_attrib_info attr;
193 u8 ptg;
194 u8 prof_id;
195 u8 in_use;
196};
197
198struct ice_vsig_prof {
199 struct list_head list;
200 u64 profile_cookie;
201 u8 prof_id;
202 u8 tcam_count;
203 struct ice_tcam_inf tcam[ICE_MAX_TCAM_PER_PROFILE];
204};
205
206struct ice_vsig_entry {
207 struct list_head prop_lst;
208 struct ice_vsig_vsi *first_vsi;
209 u8 in_use;
210};
211
212struct ice_vsig_vsi {
213 struct ice_vsig_vsi *next_vsi;
214 u32 prop_mask;
215 u16 changed;
216 u16 vsig;
217};
218
219#define ICE_XLT1_CNT 1024
220#define ICE_MAX_PTGS 256
221
222/* XLT1 Table */
223struct ice_xlt1 {
224 struct ice_ptg_entry *ptg_tbl;
225 struct ice_ptg_ptype *ptypes;
226 u8 *t;
227 u32 sid;
228 u16 count;
229};
230
231#define ICE_XLT2_CNT 768
232#define ICE_MAX_VSIGS 768
233
234/* VSIG bit layout:
235 * [0:12]: incremental VSIG index 1 to ICE_MAX_VSIGS
236 * [13:15]: PF number of device
237 */
238#define ICE_VSIG_IDX_M (0x1FFF)
239#define ICE_PF_NUM_S 13
240#define ICE_PF_NUM_M (0x07 << ICE_PF_NUM_S)
241#define ICE_VSIG_VALUE(vsig, pf_id) \
242 ((u16)((((u16)(vsig)) & ICE_VSIG_IDX_M) | \
243 (((u16)(pf_id) << ICE_PF_NUM_S) & ICE_PF_NUM_M)))
244#define ICE_DEFAULT_VSIG 0
245
246/* XLT2 Table */
247struct ice_xlt2 {
248 struct ice_vsig_entry *vsig_tbl;
249 struct ice_vsig_vsi *vsis;
250 u16 *t;
251 u32 sid;
252 u16 count;
253};
254
255/* Profile ID Management */
256struct ice_prof_id_key {
257 __le16 flags;
258 u8 xlt1;
259 __le16 xlt2_cdid;
260} __packed;
261
262/* Keys are made up of two values, each one-half the size of the key.
263 * For TCAM, the entire key is 80 bits wide (or 2, 40-bit wide values)
264 */
265#define ICE_TCAM_KEY_VAL_SZ 5
266#define ICE_TCAM_KEY_SZ (2 * ICE_TCAM_KEY_VAL_SZ)
267
268struct ice_prof_tcam_entry {
269 __le16 addr;
270 u8 key[ICE_TCAM_KEY_SZ];
271 u8 prof_id;
272} __packed;
273
274struct ice_prof_id_section {
275 __le16 count;
276 struct ice_prof_tcam_entry entry[];
277};
278
279struct ice_prof_tcam {
280 u32 sid;
281 u16 count;
282 u16 max_prof_id;
283 struct ice_prof_tcam_entry *t;
284 u8 cdid_bits; /* # CDID bits to use in key, 0, 2, 4, or 8 */
285};
286
287struct ice_prof_redir {
288 u8 *t;
289 u32 sid;
290 u16 count;
291};
292
293struct ice_mask {
294 u16 mask; /* 16-bit mask */
295 u16 idx; /* index */
296 u16 ref; /* reference count */
297 u8 in_use; /* non-zero if used */
298};
299
300struct ice_masks {
301 struct mutex lock; /* lock to protect this structure */
302 u16 first; /* first mask owned by the PF */
303 u16 count; /* number of masks owned by the PF */
304#define ICE_PROF_MASK_COUNT 32
305 struct ice_mask masks[ICE_PROF_MASK_COUNT];
306};
307
308struct ice_prof_id {
309 unsigned long *id;
310 int count;
311};
312
313/* Tables per block */
314struct ice_blk_info {
315 struct ice_xlt1 xlt1;
316 struct ice_xlt2 xlt2;
317 struct ice_prof_id prof_id;
318 struct ice_prof_tcam prof;
319 struct ice_prof_redir prof_redir;
320 struct ice_es es;
321 struct ice_masks masks;
322 u8 overwrite; /* set to true to allow overwrite of table entries */
323 u8 is_list_init;
324};
325
326enum ice_chg_type {
327 ICE_TCAM_NONE = 0,
328 ICE_PTG_ES_ADD,
329 ICE_TCAM_ADD,
330 ICE_VSIG_ADD,
331 ICE_VSIG_REM,
332 ICE_VSI_MOVE,
333};
334
335struct ice_chs_chg {
336 struct list_head list_entry;
337 enum ice_chg_type type;
338
339 u8 add_ptg;
340 u8 add_vsig;
341 u8 add_tcam_idx;
342 u8 add_prof;
343 u16 ptype;
344 u8 ptg;
345 u8 prof_id;
346 u16 vsi;
347 u16 vsig;
348 u16 orig_vsig;
349 u16 tcam_idx;
350 struct ice_ptype_attrib_info attr;
351};
352
353#define ICE_FLOW_PTYPE_MAX ICE_XLT1_CNT
354
355enum ice_prof_type {
356 ICE_PROF_NON_TUN = 0x1,
357 ICE_PROF_TUN_UDP = 0x2,
358 ICE_PROF_TUN_GRE = 0x4,
359 ICE_PROF_TUN_GTPU = 0x8,
360 ICE_PROF_TUN_GTPC = 0x10,
361 ICE_PROF_TUN_ALL = 0x1E,
362 ICE_PROF_ALL = 0xFF,
363};
364
365/* Number of bits/bytes contained in meta init entry. Note, this should be a
366 * multiple of 32 bits.
367 */
368#define ICE_META_INIT_BITS 192
369#define ICE_META_INIT_DW_CNT (ICE_META_INIT_BITS / (sizeof(__le32) * \
370 BITS_PER_BYTE))
371
372/* The meta init Flag field starts at this bit */
373#define ICE_META_FLAGS_ST 123
374
375/* The entry and bit to check for Double VLAN Mode (DVM) support */
376#define ICE_META_VLAN_MODE_ENTRY 0
377#define ICE_META_FLAG_VLAN_MODE 60
378#define ICE_META_VLAN_MODE_BIT (ICE_META_FLAGS_ST + \
379 ICE_META_FLAG_VLAN_MODE)
380
381struct ice_meta_init_entry {
382 __le32 bm[ICE_META_INIT_DW_CNT];
383};
384
385struct ice_meta_init_section {
386 __le16 count;
387 __le16 offset;
388 struct ice_meta_init_entry entry;
389};
390#endif /* _ICE_FLEX_TYPE_H_ */
391

source code of linux/drivers/net/ethernet/intel/ice/ice_flex_type.h