1/* SPDX-License-Identifier: GPL-2.0 */
2/* Marvell Octeon EP (EndPoint) Ethernet Driver
3 *
4 * Copyright (C) 2020 Marvell.
5 *
6 */
7
8#ifndef _OCTEP_PFVF_MBOX_H_
9#define _OCTEP_PFVF_MBOX_H_
10
11/* VF flags */
12#define OCTEON_PFVF_FLAG_MAC_SET_BY_PF BIT_ULL(0) /* PF has set VF MAC address */
13#define OCTEON_SDP_16K_HW_FRS 16380UL
14#define OCTEON_SDP_64K_HW_FRS 65531UL
15
16/* When a new command is implemented,PF Mbox version should be bumped.
17 */
18enum octep_pfvf_mbox_version {
19 OCTEP_PFVF_MBOX_VERSION_V0,
20 OCTEP_PFVF_MBOX_VERSION_V1,
21 OCTEP_PFVF_MBOX_VERSION_V2,
22};
23
24#define OCTEP_PFVF_MBOX_VERSION_CURRENT OCTEP_PFVF_MBOX_VERSION_V2
25
26enum octep_pfvf_mbox_opcode {
27 OCTEP_PFVF_MBOX_CMD_VERSION,
28 OCTEP_PFVF_MBOX_CMD_SET_MTU,
29 OCTEP_PFVF_MBOX_CMD_SET_MAC_ADDR,
30 OCTEP_PFVF_MBOX_CMD_GET_MAC_ADDR,
31 OCTEP_PFVF_MBOX_CMD_GET_LINK_INFO,
32 OCTEP_PFVF_MBOX_CMD_GET_STATS,
33 OCTEP_PFVF_MBOX_CMD_SET_RX_STATE,
34 OCTEP_PFVF_MBOX_CMD_SET_LINK_STATUS,
35 OCTEP_PFVF_MBOX_CMD_GET_LINK_STATUS,
36 OCTEP_PFVF_MBOX_CMD_GET_MTU,
37 OCTEP_PFVF_MBOX_CMD_DEV_REMOVE,
38 OCTEP_PFVF_MBOX_CMD_GET_FW_INFO,
39 OCTEP_PFVF_MBOX_CMD_SET_OFFLOADS,
40 OCTEP_PFVF_MBOX_NOTIF_LINK_STATUS,
41 OCTEP_PFVF_MBOX_CMD_MAX,
42};
43
44enum octep_pfvf_mbox_word_type {
45 OCTEP_PFVF_MBOX_TYPE_CMD,
46 OCTEP_PFVF_MBOX_TYPE_RSP_ACK,
47 OCTEP_PFVF_MBOX_TYPE_RSP_NACK,
48};
49
50enum octep_pfvf_mbox_cmd_status {
51 OCTEP_PFVF_MBOX_CMD_STATUS_NOT_SETUP = 1,
52 OCTEP_PFVF_MBOX_CMD_STATUS_TIMEDOUT = 2,
53 OCTEP_PFVF_MBOX_CMD_STATUS_NACK = 3,
54 OCTEP_PFVF_MBOX_CMD_STATUS_BUSY = 4
55};
56
57enum octep_pfvf_mbox_state {
58 OCTEP_PFVF_MBOX_STATE_IDLE = 0,
59 OCTEP_PFVF_MBOX_STATE_BUSY = 1,
60};
61
62enum octep_pfvf_link_status {
63 OCTEP_PFVF_LINK_STATUS_DOWN,
64 OCTEP_PFVF_LINK_STATUS_UP,
65};
66
67enum octep_pfvf_link_speed {
68 OCTEP_PFVF_LINK_SPEED_NONE,
69 OCTEP_PFVF_LINK_SPEED_1000,
70 OCTEP_PFVF_LINK_SPEED_10000,
71 OCTEP_PFVF_LINK_SPEED_25000,
72 OCTEP_PFVF_LINK_SPEED_40000,
73 OCTEP_PFVF_LINK_SPEED_50000,
74 OCTEP_PFVF_LINK_SPEED_100000,
75 OCTEP_PFVF_LINK_SPEED_LAST,
76};
77
78enum octep_pfvf_link_duplex {
79 OCTEP_PFVF_LINK_HALF_DUPLEX,
80 OCTEP_PFVF_LINK_FULL_DUPLEX,
81};
82
83enum octep_pfvf_link_autoneg {
84 OCTEP_PFVF_LINK_AUTONEG,
85 OCTEP_PFVF_LINK_FIXED,
86};
87
88#define OCTEP_PFVF_MBOX_TIMEOUT_MS 500
89#define OCTEP_PFVF_MBOX_MAX_RETRIES 2
90#define OCTEP_PFVF_MBOX_MAX_DATA_SIZE 6
91#define OCTEP_PFVF_MBOX_MORE_FRAG_FLAG 1
92#define OCTEP_PFVF_MBOX_WRITE_WAIT_TIME msecs_to_jiffies(1)
93
94union octep_pfvf_mbox_word {
95 u64 u64;
96 struct {
97 u64 opcode:8;
98 u64 type:2;
99 u64 rsvd:6;
100 u64 data:48;
101 } s;
102 struct {
103 u64 opcode:8;
104 u64 type:2;
105 u64 frag:1;
106 u64 rsvd:5;
107 u8 data[6];
108 } s_data;
109 struct {
110 u64 opcode:8;
111 u64 type:2;
112 u64 rsvd:6;
113 u64 version:48;
114 } s_version;
115 struct {
116 u64 opcode:8;
117 u64 type:2;
118 u64 rsvd:6;
119 u8 mac_addr[6];
120 } s_set_mac;
121 struct {
122 u64 opcode:8;
123 u64 type:2;
124 u64 rsvd:6;
125 u64 mtu:48;
126 } s_set_mtu;
127 struct {
128 u64 opcode:8;
129 u64 type:2;
130 u64 rsvd:6;
131 u64 mtu:48;
132 } s_get_mtu;
133 struct {
134 u64 opcode:8;
135 u64 type:2;
136 u64 state:1;
137 u64 rsvd:53;
138 } s_link_state;
139 struct {
140 u64 opcode:8;
141 u64 type:2;
142 u64 status:1;
143 u64 rsvd:53;
144 } s_link_status;
145 struct {
146 u64 opcode:8;
147 u64 type:2;
148 u64 pkind:8;
149 u64 fsz:8;
150 u64 rx_ol_flags:16;
151 u64 tx_ol_flags:16;
152 u64 rsvd:6;
153 } s_fw_info;
154 struct {
155 u64 opcode:8;
156 u64 type:2;
157 u64 rsvd:22;
158 u64 rx_ol_flags:16;
159 u64 tx_ol_flags:16;
160 } s_offloads;
161} __packed;
162
163void octep_pfvf_mbox_work(struct work_struct *work);
164int octep_setup_pfvf_mbox(struct octep_device *oct);
165void octep_delete_pfvf_mbox(struct octep_device *oct);
166void octep_pfvf_notify(struct octep_device *oct, struct octep_ctrl_mbox_msg *msg);
167#endif
168

source code of linux/drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.h