1/* SPDX-License-Identifier: GPL-2.0 */
2/* Marvell RVU Admin Function driver
3 *
4 * Copyright (C) 2018 Marvell.
5 *
6 */
7
8#ifndef NPC_H
9#define NPC_H
10
11#define NPC_KEX_CHAN_MASK 0xFFFULL
12
13#define SET_KEX_LD(intf, lid, ltype, ld, cfg) \
14 rvu_write64(rvu, blkaddr, \
15 NPC_AF_INTFX_LIDX_LTX_LDX_CFG(intf, lid, ltype, ld), cfg)
16
17#define SET_KEX_LDFLAGS(intf, ld, flags, cfg) \
18 rvu_write64(rvu, blkaddr, \
19 NPC_AF_INTFX_LDATAX_FLAGSX_CFG(intf, ld, flags), cfg)
20
21enum NPC_LID_E {
22 NPC_LID_LA = 0,
23 NPC_LID_LB,
24 NPC_LID_LC,
25 NPC_LID_LD,
26 NPC_LID_LE,
27 NPC_LID_LF,
28 NPC_LID_LG,
29 NPC_LID_LH,
30};
31
32#define NPC_LT_NA 0
33
34enum npc_kpu_la_ltype {
35 NPC_LT_LA_8023 = 1,
36 NPC_LT_LA_ETHER,
37 NPC_LT_LA_IH_NIX_ETHER,
38 NPC_LT_LA_HIGIG2_ETHER = 7,
39 NPC_LT_LA_IH_NIX_HIGIG2_ETHER,
40 NPC_LT_LA_CUSTOM_L2_90B_ETHER,
41 NPC_LT_LA_CPT_HDR,
42 NPC_LT_LA_CUSTOM_L2_24B_ETHER,
43 NPC_LT_LA_CUSTOM_PRE_L2_ETHER,
44 NPC_LT_LA_CUSTOM0 = 0xE,
45 NPC_LT_LA_CUSTOM1 = 0xF,
46};
47
48enum npc_kpu_lb_ltype {
49 NPC_LT_LB_ETAG = 1,
50 NPC_LT_LB_CTAG,
51 NPC_LT_LB_STAG_QINQ,
52 NPC_LT_LB_BTAG,
53 NPC_LT_LB_PPPOE,
54 NPC_LT_LB_DSA,
55 NPC_LT_LB_DSA_VLAN,
56 NPC_LT_LB_EDSA,
57 NPC_LT_LB_EDSA_VLAN,
58 NPC_LT_LB_EXDSA,
59 NPC_LT_LB_EXDSA_VLAN,
60 NPC_LT_LB_FDSA,
61 NPC_LT_LB_VLAN_EXDSA,
62 NPC_LT_LB_CUSTOM0 = 0xE,
63 NPC_LT_LB_CUSTOM1 = 0xF,
64};
65
66enum npc_kpu_lc_ltype {
67 NPC_LT_LC_IP = 1,
68 NPC_LT_LC_IP_OPT,
69 NPC_LT_LC_IP6,
70 NPC_LT_LC_IP6_EXT,
71 NPC_LT_LC_ARP,
72 NPC_LT_LC_RARP,
73 NPC_LT_LC_MPLS,
74 NPC_LT_LC_NSH,
75 NPC_LT_LC_PTP,
76 NPC_LT_LC_FCOE,
77 NPC_LT_LC_NGIO,
78 NPC_LT_LC_CUSTOM0 = 0xE,
79 NPC_LT_LC_CUSTOM1 = 0xF,
80};
81
82/* Don't modify Ltypes upto SCTP, otherwise it will
83 * effect flow tag calculation and thus RSS.
84 */
85enum npc_kpu_ld_ltype {
86 NPC_LT_LD_TCP = 1,
87 NPC_LT_LD_UDP,
88 NPC_LT_LD_SCTP = 4,
89 NPC_LT_LD_ICMP6,
90 NPC_LT_LD_CUSTOM0,
91 NPC_LT_LD_CUSTOM1,
92 NPC_LT_LD_IGMP = 8,
93 NPC_LT_LD_AH,
94 NPC_LT_LD_GRE,
95 NPC_LT_LD_NVGRE,
96 NPC_LT_LD_NSH,
97 NPC_LT_LD_TU_MPLS_IN_NSH,
98 NPC_LT_LD_TU_MPLS_IN_IP,
99 NPC_LT_LD_ICMP,
100};
101
102enum npc_kpu_le_ltype {
103 NPC_LT_LE_VXLAN = 1,
104 NPC_LT_LE_GENEVE,
105 NPC_LT_LE_ESP,
106 NPC_LT_LE_GTPU = 4,
107 NPC_LT_LE_VXLANGPE,
108 NPC_LT_LE_GTPC,
109 NPC_LT_LE_NSH,
110 NPC_LT_LE_TU_MPLS_IN_GRE,
111 NPC_LT_LE_TU_NSH_IN_GRE,
112 NPC_LT_LE_TU_MPLS_IN_UDP,
113 NPC_LT_LE_CUSTOM0 = 0xE,
114 NPC_LT_LE_CUSTOM1 = 0xF,
115};
116
117enum npc_kpu_lf_ltype {
118 NPC_LT_LF_TU_ETHER = 1,
119 NPC_LT_LF_TU_PPP,
120 NPC_LT_LF_TU_MPLS_IN_VXLANGPE,
121 NPC_LT_LF_TU_NSH_IN_VXLANGPE,
122 NPC_LT_LF_TU_MPLS_IN_NSH,
123 NPC_LT_LF_TU_3RD_NSH,
124 NPC_LT_LF_CUSTOM0 = 0xE,
125 NPC_LT_LF_CUSTOM1 = 0xF,
126};
127
128enum npc_kpu_lg_ltype {
129 NPC_LT_LG_TU_IP = 1,
130 NPC_LT_LG_TU_IP6,
131 NPC_LT_LG_TU_ARP,
132 NPC_LT_LG_TU_ETHER_IN_NSH,
133 NPC_LT_LG_CUSTOM0 = 0xE,
134 NPC_LT_LG_CUSTOM1 = 0xF,
135};
136
137/* Don't modify Ltypes upto SCTP, otherwise it will
138 * effect flow tag calculation and thus RSS.
139 */
140enum npc_kpu_lh_ltype {
141 NPC_LT_LH_TU_TCP = 1,
142 NPC_LT_LH_TU_UDP,
143 NPC_LT_LH_TU_SCTP = 4,
144 NPC_LT_LH_TU_ICMP6,
145 NPC_LT_LH_CUSTOM0,
146 NPC_LT_LH_CUSTOM1,
147 NPC_LT_LH_TU_IGMP = 8,
148 NPC_LT_LH_TU_ESP,
149 NPC_LT_LH_TU_AH,
150 NPC_LT_LH_TU_ICMP = 0xF,
151};
152
153/* NPC port kind defines how the incoming or outgoing packets
154 * are processed. NPC accepts packets from up to 64 pkinds.
155 * Software assigns pkind for each incoming port such as CGX
156 * Ethernet interfaces, LBK interfaces, etc.
157 */
158#define NPC_UNRESERVED_PKIND_COUNT NPC_RX_CPT_HDR_PTP_PKIND
159
160enum npc_pkind_type {
161 NPC_RX_LBK_PKIND = 0ULL,
162 NPC_RX_CPT_HDR_PTP_PKIND = 54ULL,
163 NPC_RX_CUSTOM_PRE_L2_PKIND = 55ULL,
164 NPC_RX_VLAN_EXDSA_PKIND = 56ULL,
165 NPC_RX_CHLEN24B_PKIND = 57ULL,
166 NPC_RX_CPT_HDR_PKIND,
167 NPC_RX_CHLEN90B_PKIND,
168 NPC_TX_HIGIG_PKIND,
169 NPC_RX_HIGIG_PKIND,
170 NPC_RX_EDSA_PKIND,
171 NPC_TX_DEF_PKIND, /* NIX-TX PKIND */
172};
173
174enum npc_interface_type {
175 NPC_INTF_MODE_DEF,
176};
177
178/* list of known and supported fields in packet header and
179 * fields present in key structure.
180 */
181enum key_fields {
182 NPC_DMAC,
183 NPC_SMAC,
184 NPC_ETYPE,
185 NPC_VLAN_ETYPE_CTAG, /* 0x8100 */
186 NPC_VLAN_ETYPE_STAG, /* 0x88A8 */
187 NPC_OUTER_VID,
188 NPC_INNER_VID,
189 NPC_TOS,
190 NPC_IPFRAG_IPV4,
191 NPC_SIP_IPV4,
192 NPC_DIP_IPV4,
193 NPC_IPFRAG_IPV6,
194 NPC_SIP_IPV6,
195 NPC_DIP_IPV6,
196 NPC_IPPROTO_TCP,
197 NPC_IPPROTO_UDP,
198 NPC_IPPROTO_SCTP,
199 NPC_IPPROTO_AH,
200 NPC_IPPROTO_ESP,
201 NPC_IPPROTO_ICMP,
202 NPC_IPPROTO_ICMP6,
203 NPC_SPORT_TCP,
204 NPC_DPORT_TCP,
205 NPC_SPORT_UDP,
206 NPC_DPORT_UDP,
207 NPC_SPORT_SCTP,
208 NPC_DPORT_SCTP,
209 NPC_IPSEC_SPI,
210 NPC_MPLS1_LBTCBOS,
211 NPC_MPLS1_TTL,
212 NPC_MPLS2_LBTCBOS,
213 NPC_MPLS2_TTL,
214 NPC_MPLS3_LBTCBOS,
215 NPC_MPLS3_TTL,
216 NPC_MPLS4_LBTCBOS,
217 NPC_MPLS4_TTL,
218 NPC_TYPE_ICMP,
219 NPC_CODE_ICMP,
220 NPC_TCP_FLAGS,
221 NPC_HEADER_FIELDS_MAX,
222 NPC_CHAN = NPC_HEADER_FIELDS_MAX, /* Valid when Rx */
223 NPC_PF_FUNC, /* Valid when Tx */
224 NPC_ERRLEV,
225 NPC_ERRCODE,
226 NPC_LXMB,
227 NPC_EXACT_RESULT,
228 NPC_LA,
229 NPC_LB,
230 NPC_LC,
231 NPC_LD,
232 NPC_LE,
233 NPC_LF,
234 NPC_LG,
235 NPC_LH,
236 /* Ethertype for untagged frame */
237 NPC_ETYPE_ETHER,
238 /* Ethertype for single tagged frame */
239 NPC_ETYPE_TAG1,
240 /* Ethertype for double tagged frame */
241 NPC_ETYPE_TAG2,
242 /* outer vlan tci for single tagged frame */
243 NPC_VLAN_TAG1,
244 /* outer vlan tci for double tagged frame */
245 NPC_VLAN_TAG2,
246 /* inner vlan tci for double tagged frame */
247 NPC_VLAN_TAG3,
248 /* other header fields programmed to extract but not of our interest */
249 NPC_UNKNOWN,
250 NPC_KEY_FIELDS_MAX,
251};
252
253struct npc_kpu_profile_cam {
254 u8 state;
255 u8 state_mask;
256 u16 dp0;
257 u16 dp0_mask;
258 u16 dp1;
259 u16 dp1_mask;
260 u16 dp2;
261 u16 dp2_mask;
262} __packed;
263
264struct npc_kpu_profile_action {
265 u8 errlev;
266 u8 errcode;
267 u8 dp0_offset;
268 u8 dp1_offset;
269 u8 dp2_offset;
270 u8 bypass_count;
271 u8 parse_done;
272 u8 next_state;
273 u8 ptr_advance;
274 u8 cap_ena;
275 u8 lid;
276 u8 ltype;
277 u8 flags;
278 u8 offset;
279 u8 mask;
280 u8 right;
281 u8 shift;
282} __packed;
283
284struct npc_kpu_profile {
285 int cam_entries;
286 int action_entries;
287 struct npc_kpu_profile_cam *cam;
288 struct npc_kpu_profile_action *action;
289};
290
291/* NPC KPU register formats */
292struct npc_kpu_cam {
293#if defined(__BIG_ENDIAN_BITFIELD)
294 u64 rsvd_63_56 : 8;
295 u64 state : 8;
296 u64 dp2_data : 16;
297 u64 dp1_data : 16;
298 u64 dp0_data : 16;
299#else
300 u64 dp0_data : 16;
301 u64 dp1_data : 16;
302 u64 dp2_data : 16;
303 u64 state : 8;
304 u64 rsvd_63_56 : 8;
305#endif
306};
307
308struct npc_kpu_action0 {
309#if defined(__BIG_ENDIAN_BITFIELD)
310 u64 rsvd_63_57 : 7;
311 u64 byp_count : 3;
312 u64 capture_ena : 1;
313 u64 parse_done : 1;
314 u64 next_state : 8;
315 u64 rsvd_43 : 1;
316 u64 capture_lid : 3;
317 u64 capture_ltype : 4;
318 u64 capture_flags : 8;
319 u64 ptr_advance : 8;
320 u64 var_len_offset : 8;
321 u64 var_len_mask : 8;
322 u64 var_len_right : 1;
323 u64 var_len_shift : 3;
324#else
325 u64 var_len_shift : 3;
326 u64 var_len_right : 1;
327 u64 var_len_mask : 8;
328 u64 var_len_offset : 8;
329 u64 ptr_advance : 8;
330 u64 capture_flags : 8;
331 u64 capture_ltype : 4;
332 u64 capture_lid : 3;
333 u64 rsvd_43 : 1;
334 u64 next_state : 8;
335 u64 parse_done : 1;
336 u64 capture_ena : 1;
337 u64 byp_count : 3;
338 u64 rsvd_63_57 : 7;
339#endif
340};
341
342struct npc_kpu_action1 {
343#if defined(__BIG_ENDIAN_BITFIELD)
344 u64 rsvd_63_36 : 28;
345 u64 errlev : 4;
346 u64 errcode : 8;
347 u64 dp2_offset : 8;
348 u64 dp1_offset : 8;
349 u64 dp0_offset : 8;
350#else
351 u64 dp0_offset : 8;
352 u64 dp1_offset : 8;
353 u64 dp2_offset : 8;
354 u64 errcode : 8;
355 u64 errlev : 4;
356 u64 rsvd_63_36 : 28;
357#endif
358};
359
360struct npc_kpu_pkind_cpi_def {
361#if defined(__BIG_ENDIAN_BITFIELD)
362 u64 ena : 1;
363 u64 rsvd_62_59 : 4;
364 u64 lid : 3;
365 u64 ltype_match : 4;
366 u64 ltype_mask : 4;
367 u64 flags_match : 8;
368 u64 flags_mask : 8;
369 u64 add_offset : 8;
370 u64 add_mask : 8;
371 u64 rsvd_15 : 1;
372 u64 add_shift : 3;
373 u64 rsvd_11_10 : 2;
374 u64 cpi_base : 10;
375#else
376 u64 cpi_base : 10;
377 u64 rsvd_11_10 : 2;
378 u64 add_shift : 3;
379 u64 rsvd_15 : 1;
380 u64 add_mask : 8;
381 u64 add_offset : 8;
382 u64 flags_mask : 8;
383 u64 flags_match : 8;
384 u64 ltype_mask : 4;
385 u64 ltype_match : 4;
386 u64 lid : 3;
387 u64 rsvd_62_59 : 4;
388 u64 ena : 1;
389#endif
390};
391
392struct nix_rx_action {
393#if defined(__BIG_ENDIAN_BITFIELD)
394 u64 rsvd_63_61 :3;
395 u64 flow_key_alg :5;
396 u64 match_id :16;
397 u64 index :20;
398 u64 pf_func :16;
399 u64 op :4;
400#else
401 u64 op :4;
402 u64 pf_func :16;
403 u64 index :20;
404 u64 match_id :16;
405 u64 flow_key_alg :5;
406 u64 rsvd_63_61 :3;
407#endif
408};
409
410/* NPC_AF_INTFX_KEX_CFG field masks */
411#define NPC_EXACT_NIBBLE_START 40
412#define NPC_EXACT_NIBBLE_END 43
413#define NPC_EXACT_NIBBLE GENMASK_ULL(43, 40)
414
415/* NPC_EXACT_KEX_S nibble definitions for each field */
416#define NPC_EXACT_NIBBLE_HIT BIT_ULL(40)
417#define NPC_EXACT_NIBBLE_OPC BIT_ULL(40)
418#define NPC_EXACT_NIBBLE_WAY BIT_ULL(40)
419#define NPC_EXACT_NIBBLE_INDEX GENMASK_ULL(43, 41)
420
421#define NPC_EXACT_RESULT_HIT BIT_ULL(0)
422#define NPC_EXACT_RESULT_OPC GENMASK_ULL(2, 1)
423#define NPC_EXACT_RESULT_WAY GENMASK_ULL(4, 3)
424#define NPC_EXACT_RESULT_IDX GENMASK_ULL(15, 5)
425
426/* NPC_AF_INTFX_KEX_CFG field masks */
427#define NPC_PARSE_NIBBLE GENMASK_ULL(30, 0)
428
429/* NPC_PARSE_KEX_S nibble definitions for each field */
430#define NPC_PARSE_NIBBLE_CHAN GENMASK_ULL(2, 0)
431#define NPC_PARSE_NIBBLE_ERRLEV BIT_ULL(3)
432#define NPC_PARSE_NIBBLE_ERRCODE GENMASK_ULL(5, 4)
433#define NPC_PARSE_NIBBLE_L2L3_BCAST BIT_ULL(6)
434#define NPC_PARSE_NIBBLE_LA_FLAGS GENMASK_ULL(8, 7)
435#define NPC_PARSE_NIBBLE_LA_LTYPE BIT_ULL(9)
436#define NPC_PARSE_NIBBLE_LB_FLAGS GENMASK_ULL(11, 10)
437#define NPC_PARSE_NIBBLE_LB_LTYPE BIT_ULL(12)
438#define NPC_PARSE_NIBBLE_LC_FLAGS GENMASK_ULL(14, 13)
439#define NPC_PARSE_NIBBLE_LC_LTYPE BIT_ULL(15)
440#define NPC_PARSE_NIBBLE_LD_FLAGS GENMASK_ULL(17, 16)
441#define NPC_PARSE_NIBBLE_LD_LTYPE BIT_ULL(18)
442#define NPC_PARSE_NIBBLE_LE_FLAGS GENMASK_ULL(20, 19)
443#define NPC_PARSE_NIBBLE_LE_LTYPE BIT_ULL(21)
444#define NPC_PARSE_NIBBLE_LF_FLAGS GENMASK_ULL(23, 22)
445#define NPC_PARSE_NIBBLE_LF_LTYPE BIT_ULL(24)
446#define NPC_PARSE_NIBBLE_LG_FLAGS GENMASK_ULL(26, 25)
447#define NPC_PARSE_NIBBLE_LG_LTYPE BIT_ULL(27)
448#define NPC_PARSE_NIBBLE_LH_FLAGS GENMASK_ULL(29, 28)
449#define NPC_PARSE_NIBBLE_LH_LTYPE BIT_ULL(30)
450
451struct nix_tx_action {
452#if defined(__BIG_ENDIAN_BITFIELD)
453 u64 rsvd_63_48 :16;
454 u64 match_id :16;
455 u64 index :20;
456 u64 rsvd_11_8 :8;
457 u64 op :4;
458#else
459 u64 op :4;
460 u64 rsvd_11_8 :8;
461 u64 index :20;
462 u64 match_id :16;
463 u64 rsvd_63_48 :16;
464#endif
465};
466
467/* NIX Receive Vtag Action Structure */
468#define RX_VTAG0_VALID_BIT BIT_ULL(15)
469#define RX_VTAG0_TYPE_MASK GENMASK_ULL(14, 12)
470#define RX_VTAG0_LID_MASK GENMASK_ULL(10, 8)
471#define RX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0)
472#define RX_VTAG1_VALID_BIT BIT_ULL(47)
473#define RX_VTAG1_TYPE_MASK GENMASK_ULL(46, 44)
474#define RX_VTAG1_LID_MASK GENMASK_ULL(42, 40)
475#define RX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32)
476
477/* NIX Transmit Vtag Action Structure */
478#define TX_VTAG0_DEF_MASK GENMASK_ULL(25, 16)
479#define TX_VTAG0_OP_MASK GENMASK_ULL(13, 12)
480#define TX_VTAG0_LID_MASK GENMASK_ULL(10, 8)
481#define TX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0)
482#define TX_VTAG1_DEF_MASK GENMASK_ULL(57, 48)
483#define TX_VTAG1_OP_MASK GENMASK_ULL(45, 44)
484#define TX_VTAG1_LID_MASK GENMASK_ULL(42, 40)
485#define TX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32)
486
487/* NPC MCAM reserved entry index per nixlf */
488#define NIXLF_UCAST_ENTRY 0
489#define NIXLF_BCAST_ENTRY 1
490#define NIXLF_ALLMULTI_ENTRY 2
491#define NIXLF_PROMISC_ENTRY 3
492
493struct npc_coalesced_kpu_prfl {
494#define NPC_SIGN 0x00666f727063706e
495#define NPC_PRFL_NAME "npc_prfls_array"
496#define NPC_NAME_LEN 32
497 __le64 signature; /* "npcprof\0" (8 bytes/ASCII characters) */
498 u8 name[NPC_NAME_LEN]; /* KPU Profile name */
499 u64 version; /* KPU firmware/profile version */
500 u8 num_prfl; /* No of NPC profiles. */
501 u16 prfl_sz[];
502};
503
504struct npc_mcam_kex {
505 /* MKEX Profle Header */
506 u64 mkex_sign; /* "mcam-kex-profile" (8 bytes/ASCII characters) */
507 u8 name[MKEX_NAME_LEN]; /* MKEX Profile name */
508 u64 cpu_model; /* Format as profiled by CPU hardware */
509 u64 kpu_version; /* KPU firmware/profile version */
510 u64 reserved; /* Reserved for extension */
511
512 /* MKEX Profle Data */
513 u64 keyx_cfg[NPC_MAX_INTF]; /* NPC_AF_INTF(0..1)_KEX_CFG */
514 /* NPC_AF_KEX_LDATA(0..1)_FLAGS_CFG */
515 u64 kex_ld_flags[NPC_MAX_LD];
516 /* NPC_AF_INTF(0..1)_LID(0..7)_LT(0..15)_LD(0..1)_CFG */
517 u64 intf_lid_lt_ld[NPC_MAX_INTF][NPC_MAX_LID][NPC_MAX_LT][NPC_MAX_LD];
518 /* NPC_AF_INTF(0..1)_LDATA(0..1)_FLAGS(0..15)_CFG */
519 u64 intf_ld_flags[NPC_MAX_INTF][NPC_MAX_LD][NPC_MAX_LFL];
520} __packed;
521
522struct npc_kpu_fwdata {
523 int entries;
524 /* What follows is:
525 * struct npc_kpu_profile_cam[entries];
526 * struct npc_kpu_profile_action[entries];
527 */
528 u8 data[];
529} __packed;
530
531struct npc_lt_def {
532 u8 ltype_mask;
533 u8 ltype_match;
534 u8 lid;
535} __packed;
536
537struct npc_lt_def_ipsec {
538 u8 ltype_mask;
539 u8 ltype_match;
540 u8 lid;
541 u8 spi_offset;
542 u8 spi_nz;
543} __packed;
544
545struct npc_lt_def_apad {
546 u8 ltype_mask;
547 u8 ltype_match;
548 u8 lid;
549 u8 valid;
550} __packed;
551
552struct npc_lt_def_color {
553 u8 ltype_mask;
554 u8 ltype_match;
555 u8 lid;
556 u8 noffset;
557 u8 offset;
558} __packed;
559
560struct npc_lt_def_et {
561 u8 ltype_mask;
562 u8 ltype_match;
563 u8 lid;
564 u8 valid;
565 u8 offset;
566} __packed;
567
568struct npc_lt_def_cfg {
569 struct npc_lt_def rx_ol2;
570 struct npc_lt_def rx_oip4;
571 struct npc_lt_def rx_iip4;
572 struct npc_lt_def rx_oip6;
573 struct npc_lt_def rx_iip6;
574 struct npc_lt_def rx_otcp;
575 struct npc_lt_def rx_itcp;
576 struct npc_lt_def rx_oudp;
577 struct npc_lt_def rx_iudp;
578 struct npc_lt_def rx_osctp;
579 struct npc_lt_def rx_isctp;
580 struct npc_lt_def_ipsec rx_ipsec[2];
581 struct npc_lt_def pck_ol2;
582 struct npc_lt_def pck_oip4;
583 struct npc_lt_def pck_oip6;
584 struct npc_lt_def pck_iip4;
585 struct npc_lt_def_apad rx_apad0;
586 struct npc_lt_def_apad rx_apad1;
587 struct npc_lt_def_color ovlan;
588 struct npc_lt_def_color ivlan;
589 struct npc_lt_def_color rx_gen0_color;
590 struct npc_lt_def_color rx_gen1_color;
591 struct npc_lt_def_et rx_et[2];
592} __packed;
593
594/* Loadable KPU profile firmware data */
595struct npc_kpu_profile_fwdata {
596#define KPU_SIGN 0x00666f727075706b
597#define KPU_NAME_LEN 32
598/** Maximum number of custom KPU entries supported by the built-in profile. */
599#define KPU_MAX_CST_ENT 6
600 /* KPU Profle Header */
601 __le64 signature; /* "kpuprof\0" (8 bytes/ASCII characters) */
602 u8 name[KPU_NAME_LEN]; /* KPU Profile name */
603 __le64 version; /* KPU profile version */
604 u8 kpus;
605 u8 reserved[7];
606
607 /* Default MKEX profile to be used with this KPU profile. May be
608 * overridden with mkex_profile module parameter. Format is same as for
609 * the MKEX profile to streamline processing.
610 */
611 struct npc_mcam_kex mkex;
612 /* LTYPE values for specific HW offloaded protocols. */
613 struct npc_lt_def_cfg lt_def;
614 /* Dynamically sized data:
615 * Custom KPU CAM and ACTION configuration entries.
616 * struct npc_kpu_fwdata kpu[kpus];
617 */
618 u8 data[];
619} __packed;
620
621struct rvu_npc_mcam_rule {
622 struct flow_msg packet;
623 struct flow_msg mask;
624 u8 intf;
625 union {
626 struct nix_tx_action tx_action;
627 struct nix_rx_action rx_action;
628 };
629 u64 vtag_action;
630 struct list_head list;
631 u64 features;
632 u16 owner;
633 u16 entry;
634 u16 cntr;
635 bool has_cntr;
636 u8 default_rule;
637 bool enable;
638 bool vfvlan_cfg;
639 u16 chan;
640 u16 chan_mask;
641 u8 lxmb;
642};
643
644#endif /* NPC_H */
645

source code of linux/drivers/net/ethernet/marvell/octeontx2/af/npc.h