1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* Marvell RVU Ethernet driver |
3 | * |
4 | * Copyright (C) 2020 Marvell. |
5 | * |
6 | */ |
7 | |
8 | #ifndef OTX2_STRUCT_H |
9 | #define OTX2_STRUCT_H |
10 | |
11 | /* NIX WQE/CQE size 128 byte or 512 byte */ |
12 | enum nix_cqesz_e { |
13 | NIX_XQESZ_W64 = 0x0, |
14 | NIX_XQESZ_W16 = 0x1, |
15 | }; |
16 | |
17 | enum nix_sqes_e { |
18 | NIX_SQESZ_W16 = 0x0, |
19 | NIX_SQESZ_W8 = 0x1, |
20 | }; |
21 | |
22 | enum nix_send_ldtype { |
23 | NIX_SEND_LDTYPE_LDD = 0x0, |
24 | NIX_SEND_LDTYPE_LDT = 0x1, |
25 | NIX_SEND_LDTYPE_LDWB = 0x2, |
26 | }; |
27 | |
28 | /* CSUM offload */ |
29 | enum nix_sendl3type { |
30 | NIX_SENDL3TYPE_NONE = 0x0, |
31 | NIX_SENDL3TYPE_IP4 = 0x2, |
32 | NIX_SENDL3TYPE_IP4_CKSUM = 0x3, |
33 | NIX_SENDL3TYPE_IP6 = 0x4, |
34 | }; |
35 | |
36 | enum nix_sendl4type { |
37 | NIX_SENDL4TYPE_NONE, |
38 | NIX_SENDL4TYPE_TCP_CKSUM, |
39 | NIX_SENDL4TYPE_SCTP_CKSUM, |
40 | NIX_SENDL4TYPE_UDP_CKSUM, |
41 | }; |
42 | |
43 | /* NIX wqe/cqe types */ |
44 | enum nix_xqe_type { |
45 | NIX_XQE_TYPE_INVALID = 0x0, |
46 | NIX_XQE_TYPE_RX = 0x1, |
47 | NIX_XQE_TYPE_RX_IPSECS = 0x2, |
48 | NIX_XQE_TYPE_RX_IPSECH = 0x3, |
49 | NIX_XQE_TYPE_RX_IPSECD = 0x4, |
50 | NIX_XQE_TYPE_SEND = 0x8, |
51 | }; |
52 | |
53 | /* NIX CQE/SQE subdescriptor types */ |
54 | enum nix_subdc { |
55 | NIX_SUBDC_NOP = 0x0, |
56 | NIX_SUBDC_EXT = 0x1, |
57 | NIX_SUBDC_CRC = 0x2, |
58 | NIX_SUBDC_IMM = 0x3, |
59 | NIX_SUBDC_SG = 0x4, |
60 | NIX_SUBDC_MEM = 0x5, |
61 | NIX_SUBDC_JUMP = 0x6, |
62 | NIX_SUBDC_WORK = 0x7, |
63 | NIX_SUBDC_SOD = 0xf, |
64 | }; |
65 | |
66 | /* Algorithm for nix_sqe_mem_s header (value of the `alg` field) */ |
67 | enum nix_sendmemalg { |
68 | NIX_SENDMEMALG_E_SET = 0x0, |
69 | NIX_SENDMEMALG_E_SETTSTMP = 0x1, |
70 | NIX_SENDMEMALG_E_SETRSLT = 0x2, |
71 | NIX_SENDMEMALG_E_ADD = 0x8, |
72 | NIX_SENDMEMALG_E_SUB = 0x9, |
73 | NIX_SENDMEMALG_E_ADDLEN = 0xa, |
74 | NIX_SENDMEMALG_E_SUBLEN = 0xb, |
75 | NIX_SENDMEMALG_E_ADDMBUF = 0xc, |
76 | NIX_SENDMEMALG_E_SUBMBUF = 0xd, |
77 | NIX_SENDMEMALG_E_ENUM_LAST = 0xe, |
78 | }; |
79 | |
80 | /* NIX CQE header structure */ |
81 | struct nix_cqe_hdr_s { |
82 | u64 flow_tag : 32; |
83 | u64 q : 20; |
84 | u64 reserved_52_57 : 6; |
85 | u64 node : 2; |
86 | u64 cqe_type : 4; |
87 | }; |
88 | |
89 | /* NIX CQE RX parse structure */ |
90 | struct nix_rx_parse_s { |
91 | u64 chan : 12; |
92 | u64 desc_sizem1 : 5; |
93 | u64 rsvd_17 : 1; |
94 | u64 express : 1; |
95 | u64 wqwd : 1; |
96 | u64 errlev : 4; |
97 | u64 errcode : 8; |
98 | u64 latype : 4; |
99 | u64 lbtype : 4; |
100 | u64 lctype : 4; |
101 | u64 ldtype : 4; |
102 | u64 letype : 4; |
103 | u64 lftype : 4; |
104 | u64 lgtype : 4; |
105 | u64 lhtype : 4; |
106 | u64 pkt_lenm1 : 16; /* W1 */ |
107 | u64 l2m : 1; |
108 | u64 l2b : 1; |
109 | u64 l3m : 1; |
110 | u64 l3b : 1; |
111 | u64 vtag0_valid : 1; |
112 | u64 vtag0_gone : 1; |
113 | u64 vtag1_valid : 1; |
114 | u64 vtag1_gone : 1; |
115 | u64 pkind : 6; |
116 | u64 rsvd_95_94 : 2; |
117 | u64 vtag0_tci : 16; |
118 | u64 vtag1_tci : 16; |
119 | u64 laflags : 8; /* W2 */ |
120 | u64 lbflags : 8; |
121 | u64 lcflags : 8; |
122 | u64 ldflags : 8; |
123 | u64 leflags : 8; |
124 | u64 lfflags : 8; |
125 | u64 lgflags : 8; |
126 | u64 lhflags : 8; |
127 | u64 eoh_ptr : 8; /* W3 */ |
128 | u64 wqe_aura : 20; |
129 | u64 pb_aura : 20; |
130 | u64 match_id : 16; |
131 | u64 laptr : 8; /* W4 */ |
132 | u64 lbptr : 8; |
133 | u64 lcptr : 8; |
134 | u64 ldptr : 8; |
135 | u64 leptr : 8; |
136 | u64 lfptr : 8; |
137 | u64 lgptr : 8; |
138 | u64 lhptr : 8; |
139 | u64 vtag0_ptr : 8; /* W5 */ |
140 | u64 vtag1_ptr : 8; |
141 | u64 flow_key_alg : 5; |
142 | u64 rsvd_359_341 : 19; |
143 | u64 color : 2; |
144 | u64 rsvd_383_362 : 22; |
145 | u64 rsvd_447_384; /* W6 */ |
146 | }; |
147 | |
148 | /* NIX CQE RX scatter/gather subdescriptor structure */ |
149 | struct nix_rx_sg_s { |
150 | u64 seg_size : 16; /* W0 */ |
151 | u64 seg2_size : 16; |
152 | u64 seg3_size : 16; |
153 | u64 segs : 2; |
154 | u64 rsvd_59_50 : 10; |
155 | u64 subdc : 4; |
156 | u64 seg_addr; |
157 | u64 seg2_addr; |
158 | u64 seg3_addr; |
159 | }; |
160 | |
161 | struct nix_send_comp_s { |
162 | u64 status : 8; |
163 | u64 sqe_id : 16; |
164 | u64 rsvd_24_63 : 40; |
165 | }; |
166 | |
167 | struct nix_cqe_rx_s { |
168 | struct nix_cqe_hdr_s hdr; |
169 | struct nix_rx_parse_s parse; |
170 | struct nix_rx_sg_s sg; |
171 | }; |
172 | |
173 | struct nix_cqe_tx_s { |
174 | struct nix_cqe_hdr_s hdr; |
175 | struct nix_send_comp_s comp; |
176 | }; |
177 | |
178 | /* NIX SQE header structure */ |
179 | struct nix_sqe_hdr_s { |
180 | u64 total : 18; /* W0 */ |
181 | u64 reserved_18 : 1; |
182 | u64 df : 1; |
183 | u64 aura : 20; |
184 | u64 sizem1 : 3; |
185 | u64 pnc : 1; |
186 | u64 sq : 20; |
187 | u64 ol3ptr : 8; /* W1 */ |
188 | u64 ol4ptr : 8; |
189 | u64 il3ptr : 8; |
190 | u64 il4ptr : 8; |
191 | u64 ol3type : 4; |
192 | u64 ol4type : 4; |
193 | u64 il3type : 4; |
194 | u64 il4type : 4; |
195 | u64 sqe_id : 16; |
196 | |
197 | }; |
198 | |
199 | /* NIX send extended header subdescriptor structure */ |
200 | struct nix_sqe_ext_s { |
201 | u64 lso_mps : 14; /* W0 */ |
202 | u64 lso : 1; |
203 | u64 tstmp : 1; |
204 | u64 lso_sb : 8; |
205 | u64 lso_format : 5; |
206 | u64 rsvd_31_29 : 3; |
207 | u64 shp_chg : 9; |
208 | u64 shp_dis : 1; |
209 | u64 shp_ra : 2; |
210 | u64 markptr : 8; |
211 | u64 markform : 7; |
212 | u64 mark_en : 1; |
213 | u64 subdc : 4; |
214 | u64 vlan0_ins_ptr : 8; /* W1 */ |
215 | u64 vlan0_ins_tci : 16; |
216 | u64 vlan1_ins_ptr : 8; |
217 | u64 vlan1_ins_tci : 16; |
218 | u64 vlan0_ins_ena : 1; |
219 | u64 vlan1_ins_ena : 1; |
220 | u64 init_color : 2; |
221 | u64 rsvd_127_116 : 12; |
222 | }; |
223 | |
224 | struct nix_sqe_sg_s { |
225 | u64 seg1_size : 16; |
226 | u64 seg2_size : 16; |
227 | u64 seg3_size : 16; |
228 | u64 segs : 2; |
229 | u64 rsvd_54_50 : 5; |
230 | u64 i1 : 1; |
231 | u64 i2 : 1; |
232 | u64 i3 : 1; |
233 | u64 ld_type : 2; |
234 | u64 subdc : 4; |
235 | }; |
236 | |
237 | /* NIX send memory subdescriptor structure */ |
238 | struct nix_sqe_mem_s { |
239 | u64 start_offset : 8; |
240 | u64 rsvd_11_8 : 4; |
241 | u64 rsvd_12 : 1; |
242 | u64 udp_csum_crt : 1; |
243 | u64 update64 : 1; |
244 | u64 rsvd_15_16 : 1; |
245 | u64 base_ns : 32; |
246 | u64 step_type : 1; |
247 | u64 rsvd_51_49 : 3; |
248 | u64 per_lso_seg : 1; |
249 | u64 wmem : 1; |
250 | u64 dsz : 2; |
251 | u64 alg : 4; |
252 | u64 subdc : 4; |
253 | u64 addr; /* W1 */ |
254 | }; |
255 | |
256 | enum nix_cqerrint_e { |
257 | NIX_CQERRINT_DOOR_ERR = 0, |
258 | NIX_CQERRINT_WR_FULL = 1, |
259 | NIX_CQERRINT_CQE_FAULT = 2, |
260 | }; |
261 | |
262 | #define NIX_CQERRINT_BITS (BIT_ULL(NIX_CQERRINT_DOOR_ERR) | \ |
263 | BIT_ULL(NIX_CQERRINT_CQE_FAULT)) |
264 | |
265 | enum nix_rqint_e { |
266 | NIX_RQINT_DROP = 0, |
267 | NIX_RQINT_RED = 1, |
268 | }; |
269 | |
270 | #define NIX_RQINT_BITS (BIT_ULL(NIX_RQINT_DROP) | BIT_ULL(NIX_RQINT_RED)) |
271 | |
272 | enum nix_sqint_e { |
273 | NIX_SQINT_LMT_ERR = 0, |
274 | NIX_SQINT_MNQ_ERR = 1, |
275 | NIX_SQINT_SEND_ERR = 2, |
276 | NIX_SQINT_SQB_ALLOC_FAIL = 3, |
277 | }; |
278 | |
279 | #define NIX_SQINT_BITS (BIT_ULL(NIX_SQINT_LMT_ERR) | \ |
280 | BIT_ULL(NIX_SQINT_MNQ_ERR) | \ |
281 | BIT_ULL(NIX_SQINT_SEND_ERR) | \ |
282 | BIT_ULL(NIX_SQINT_SQB_ALLOC_FAIL)) |
283 | |
284 | enum nix_sqoperr_e { |
285 | NIX_SQOPERR_OOR = 0, |
286 | NIX_SQOPERR_CTX_FAULT = 1, |
287 | NIX_SQOPERR_CTX_POISON = 2, |
288 | NIX_SQOPERR_DISABLED = 3, |
289 | NIX_SQOPERR_SIZE_ERR = 4, |
290 | NIX_SQOPERR_OFLOW = 5, |
291 | NIX_SQOPERR_SQB_NULL = 6, |
292 | NIX_SQOPERR_SQB_FAULT = 7, |
293 | NIX_SQOPERR_SQE_SZ_ZERO = 8, |
294 | NIX_SQOPERR_MAX, |
295 | }; |
296 | |
297 | enum nix_mnqerr_e { |
298 | NIX_MNQERR_SQ_CTX_FAULT = 0, |
299 | NIX_MNQERR_SQ_CTX_POISON = 1, |
300 | NIX_MNQERR_SQB_FAULT = 2, |
301 | NIX_MNQERR_SQB_POISON = 3, |
302 | NIX_MNQERR_TOTAL_ERR = 4, |
303 | NIX_MNQERR_LSO_ERR = 5, |
304 | NIX_MNQERR_CQ_QUERY_ERR = 6, |
305 | NIX_MNQERR_MAX_SQE_SIZE_ERR = 7, |
306 | NIX_MNQERR_MAXLEN_ERR = 8, |
307 | NIX_MNQERR_SQE_SIZEM1_ZERO = 9, |
308 | NIX_MNQERR_MAX, |
309 | }; |
310 | |
311 | enum nix_snd_status_e { |
312 | NIX_SND_STATUS_GOOD = 0x0, |
313 | NIX_SND_STATUS_SQ_CTX_FAULT = 0x1, |
314 | NIX_SND_STATUS_SQ_CTX_POISON = 0x2, |
315 | NIX_SND_STATUS_SQB_FAULT = 0x3, |
316 | NIX_SND_STATUS_SQB_POISON = 0x4, |
317 | NIX_SND_STATUS_HDR_ERR = 0x5, |
318 | NIX_SND_STATUS_EXT_ERR = 0x6, |
319 | NIX_SND_STATUS_JUMP_FAULT = 0x7, |
320 | NIX_SND_STATUS_JUMP_POISON = 0x8, |
321 | NIX_SND_STATUS_CRC_ERR = 0x10, |
322 | NIX_SND_STATUS_IMM_ERR = 0x11, |
323 | NIX_SND_STATUS_SG_ERR = 0x12, |
324 | NIX_SND_STATUS_MEM_ERR = 0x13, |
325 | NIX_SND_STATUS_INVALID_SUBDC = 0x14, |
326 | NIX_SND_STATUS_SUBDC_ORDER_ERR = 0x15, |
327 | NIX_SND_STATUS_DATA_FAULT = 0x16, |
328 | NIX_SND_STATUS_DATA_POISON = 0x17, |
329 | NIX_SND_STATUS_NPC_DROP_ACTION = 0x20, |
330 | NIX_SND_STATUS_LOCK_VIOL = 0x21, |
331 | NIX_SND_STATUS_NPC_UCAST_CHAN_ERR = 0x22, |
332 | NIX_SND_STATUS_NPC_MCAST_CHAN_ERR = 0x23, |
333 | NIX_SND_STATUS_NPC_MCAST_ABORT = 0x24, |
334 | NIX_SND_STATUS_NPC_VTAG_PTR_ERR = 0x25, |
335 | NIX_SND_STATUS_NPC_VTAG_SIZE_ERR = 0x26, |
336 | NIX_SND_STATUS_SEND_MEM_FAULT = 0x27, |
337 | NIX_SND_STATUS_SEND_STATS_ERR = 0x28, |
338 | NIX_SND_STATUS_MAX, |
339 | }; |
340 | |
341 | #endif /* OTX2_STRUCT_H */ |
342 | |