| 1 | // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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| 2 | /* Copyright (C) 2019 Netronome Systems, Inc. */ |
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| 3 | |
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| 4 | #include <linux/dma-mapping.h> |
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| 5 | #include <linux/kernel.h> |
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| 6 | #include <linux/sizes.h> |
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| 7 | |
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| 8 | #include "nfp_dev.h" |
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| 9 | |
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| 10 | const struct nfp_dev_info nfp_dev_info[NFP_DEV_CNT] = { |
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| 11 | [NFP_DEV_NFP3800] = { |
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| 12 | .dma_mask = DMA_BIT_MASK(48), |
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| 13 | .qc_idx_mask = GENMASK(8, 0), |
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| 14 | .qc_addr_offset = 0x400000, |
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| 15 | .min_qc_size = 512, |
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| 16 | .max_qc_size = SZ_64K, |
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| 17 | |
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| 18 | .chip_names = "NFP3800" , |
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| 19 | .pcie_cfg_expbar_offset = 0x0a00, |
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| 20 | .pcie_expl_offset = 0xd000, |
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| 21 | .qc_area_sz = 0x100000, |
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| 22 | }, |
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| 23 | [NFP_DEV_NFP3800_VF] = { |
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| 24 | .dma_mask = DMA_BIT_MASK(48), |
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| 25 | .qc_idx_mask = GENMASK(8, 0), |
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| 26 | .qc_addr_offset = 0, |
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| 27 | .min_qc_size = 512, |
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| 28 | .max_qc_size = SZ_64K, |
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| 29 | }, |
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| 30 | [NFP_DEV_NFP6000] = { |
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| 31 | .dma_mask = DMA_BIT_MASK(40), |
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| 32 | .qc_idx_mask = GENMASK(7, 0), |
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| 33 | .qc_addr_offset = 0x80000, |
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| 34 | .min_qc_size = 256, |
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| 35 | .max_qc_size = SZ_256K, |
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| 36 | |
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| 37 | .chip_names = "NFP4000/NFP5000/NFP6000" , |
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| 38 | .pcie_cfg_expbar_offset = 0x0400, |
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| 39 | .pcie_expl_offset = 0x1000, |
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| 40 | .qc_area_sz = 0x80000, |
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| 41 | }, |
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| 42 | [NFP_DEV_NFP6000_VF] = { |
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| 43 | .dma_mask = DMA_BIT_MASK(40), |
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| 44 | .qc_idx_mask = GENMASK(7, 0), |
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| 45 | .qc_addr_offset = 0, |
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| 46 | .min_qc_size = 256, |
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| 47 | .max_qc_size = SZ_256K, |
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| 48 | }, |
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| 49 | }; |
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| 50 | |
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