1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. |
3 | */ |
4 | |
5 | /* EMAC DMA HW engine uses three rings: |
6 | * Tx: |
7 | * TPD: Transmit Packet Descriptor ring. |
8 | * Rx: |
9 | * RFD: Receive Free Descriptor ring. |
10 | * Ring of descriptors with empty buffers to be filled by Rx HW. |
11 | * RRD: Receive Return Descriptor ring. |
12 | * Ring of descriptors with buffers filled with received data. |
13 | */ |
14 | |
15 | #ifndef _EMAC_HW_H_ |
16 | #define _EMAC_HW_H_ |
17 | |
18 | /* EMAC_CSR register offsets */ |
19 | #define EMAC_EMAC_WRAPPER_CSR1 0x000000 |
20 | #define EMAC_EMAC_WRAPPER_CSR2 0x000004 |
21 | #define EMAC_EMAC_WRAPPER_TX_TS_LO 0x000104 |
22 | #define EMAC_EMAC_WRAPPER_TX_TS_HI 0x000108 |
23 | #define EMAC_EMAC_WRAPPER_TX_TS_INX 0x00010c |
24 | |
25 | /* DMA Order Settings */ |
26 | enum emac_dma_order { |
27 | emac_dma_ord_in = 1, |
28 | emac_dma_ord_enh = 2, |
29 | emac_dma_ord_out = 4 |
30 | }; |
31 | |
32 | enum emac_dma_req_block { |
33 | emac_dma_req_128 = 0, |
34 | emac_dma_req_256 = 1, |
35 | emac_dma_req_512 = 2, |
36 | emac_dma_req_1024 = 3, |
37 | emac_dma_req_2048 = 4, |
38 | emac_dma_req_4096 = 5 |
39 | }; |
40 | |
41 | /* Returns the value of bits idx...idx+n_bits */ |
42 | #define BITS_GET(val, lo, hi) ((le32_to_cpu(val) & GENMASK((hi), (lo))) >> lo) |
43 | #define BITS_SET(val, lo, hi, new_val) \ |
44 | val = cpu_to_le32((le32_to_cpu(val) & (~GENMASK((hi), (lo)))) | \ |
45 | (((new_val) << (lo)) & GENMASK((hi), (lo)))) |
46 | |
47 | /* RRD (Receive Return Descriptor) */ |
48 | struct emac_rrd { |
49 | u32 word[6]; |
50 | |
51 | /* number of RFD */ |
52 | #define RRD_NOR(rrd) BITS_GET((rrd)->word[0], 16, 19) |
53 | /* start consumer index of rfd-ring */ |
54 | #define RRD_SI(rrd) BITS_GET((rrd)->word[0], 20, 31) |
55 | /* vlan-tag (CVID, CFI and PRI) */ |
56 | #define RRD_CVALN_TAG(rrd) BITS_GET((rrd)->word[2], 0, 15) |
57 | /* length of the packet */ |
58 | #define RRD_PKT_SIZE(rrd) BITS_GET((rrd)->word[3], 0, 13) |
59 | /* L4(TCP/UDP) checksum failed */ |
60 | #define RRD_L4F(rrd) BITS_GET((rrd)->word[3], 14, 14) |
61 | /* vlan tagged */ |
62 | #define RRD_CVTAG(rrd) BITS_GET((rrd)->word[3], 16, 16) |
63 | /* When set, indicates that the descriptor is updated by the IP core. |
64 | * When cleared, indicates that the descriptor is invalid. |
65 | */ |
66 | #define RRD_UPDT(rrd) BITS_GET((rrd)->word[3], 31, 31) |
67 | #define RRD_UPDT_SET(rrd, val) BITS_SET((rrd)->word[3], 31, 31, val) |
68 | /* timestamp low */ |
69 | #define RRD_TS_LOW(rrd) BITS_GET((rrd)->word[4], 0, 29) |
70 | /* timestamp high */ |
71 | #define RRD_TS_HI(rrd) le32_to_cpu((rrd)->word[5]) |
72 | }; |
73 | |
74 | /* TPD (Transmit Packet Descriptor) */ |
75 | struct emac_tpd { |
76 | u32 word[4]; |
77 | |
78 | /* Number of bytes of the transmit packet. (include 4-byte CRC) */ |
79 | #define TPD_BUF_LEN_SET(tpd, val) BITS_SET((tpd)->word[0], 0, 15, val) |
80 | /* Custom Checksum Offload: When set, ask IP core to offload custom checksum */ |
81 | #define TPD_CSX_SET(tpd, val) BITS_SET((tpd)->word[1], 8, 8, val) |
82 | /* TCP Large Send Offload: When set, ask IP core to do offload TCP Large Send */ |
83 | #define TPD_LSO(tpd) BITS_GET((tpd)->word[1], 12, 12) |
84 | #define TPD_LSO_SET(tpd, val) BITS_SET((tpd)->word[1], 12, 12, val) |
85 | /* Large Send Offload Version: When set, indicates this is an LSOv2 |
86 | * (for both IPv4 and IPv6). When cleared, indicates this is an LSOv1 |
87 | * (only for IPv4). |
88 | */ |
89 | #define TPD_LSOV_SET(tpd, val) BITS_SET((tpd)->word[1], 13, 13, val) |
90 | /* IPv4 packet: When set, indicates this is an IPv4 packet, this bit is only |
91 | * for LSOV2 format. |
92 | */ |
93 | #define TPD_IPV4_SET(tpd, val) BITS_SET((tpd)->word[1], 16, 16, val) |
94 | /* 0: Ethernet frame (DA+SA+TYPE+DATA+CRC) |
95 | * 1: IEEE 802.3 frame (DA+SA+LEN+DSAP+SSAP+CTL+ORG+TYPE+DATA+CRC) |
96 | */ |
97 | #define TPD_TYP_SET(tpd, val) BITS_SET((tpd)->word[1], 17, 17, val) |
98 | /* Low-32bit Buffer Address */ |
99 | #define TPD_BUFFER_ADDR_L_SET(tpd, val) ((tpd)->word[2] = cpu_to_le32(val)) |
100 | /* CVLAN Tag to be inserted if INS_VLAN_TAG is set, CVLAN TPID based on global |
101 | * register configuration. |
102 | */ |
103 | #define TPD_CVLAN_TAG_SET(tpd, val) BITS_SET((tpd)->word[3], 0, 15, val) |
104 | /* Insert CVlan Tag: When set, ask MAC to insert CVLAN TAG to outgoing packet |
105 | */ |
106 | #define TPD_INSTC_SET(tpd, val) BITS_SET((tpd)->word[3], 17, 17, val) |
107 | /* High-14bit Buffer Address, So, the 64b-bit address is |
108 | * {DESC_CTRL_11_TX_DATA_HIADDR[17:0],(register) BUFFER_ADDR_H, BUFFER_ADDR_L} |
109 | * Extend TPD_BUFFER_ADDR_H to [31, 18], because we never enable timestamping. |
110 | */ |
111 | #define TPD_BUFFER_ADDR_H_SET(tpd, val) BITS_SET((tpd)->word[3], 18, 31, val) |
112 | /* Format D. Word offset from the 1st byte of this packet to start to calculate |
113 | * the custom checksum. |
114 | */ |
115 | #define TPD_PAYLOAD_OFFSET_SET(tpd, val) BITS_SET((tpd)->word[1], 0, 7, val) |
116 | /* Format D. Word offset from the 1st byte of this packet to fill the custom |
117 | * checksum to |
118 | */ |
119 | #define TPD_CXSUM_OFFSET_SET(tpd, val) BITS_SET((tpd)->word[1], 18, 25, val) |
120 | |
121 | /* Format C. TCP Header offset from the 1st byte of this packet. (byte unit) */ |
122 | #define TPD_TCPHDR_OFFSET_SET(tpd, val) BITS_SET((tpd)->word[1], 0, 7, val) |
123 | /* Format C. MSS (Maximum Segment Size) got from the protocol layer. (byte unit) |
124 | */ |
125 | #define TPD_MSS_SET(tpd, val) BITS_SET((tpd)->word[1], 18, 30, val) |
126 | /* packet length in ext tpd */ |
127 | #define TPD_PKT_LEN_SET(tpd, val) ((tpd)->word[2] = cpu_to_le32(val)) |
128 | }; |
129 | |
130 | /* emac_ring_header represents a single, contiguous block of DMA space |
131 | * mapped for the three descriptor rings (tpd, rfd, rrd) |
132 | */ |
133 | struct { |
134 | void *; /* virtual address */ |
135 | dma_addr_t ; /* dma address */ |
136 | size_t ; /* length in bytes */ |
137 | size_t ; |
138 | }; |
139 | |
140 | /* emac_buffer is wrapper around a pointer to a socket buffer |
141 | * so a DMA handle can be stored along with the skb |
142 | */ |
143 | struct emac_buffer { |
144 | struct sk_buff *skb; /* socket buffer */ |
145 | u16 length; /* rx buffer length */ |
146 | dma_addr_t dma_addr; /* dma address */ |
147 | }; |
148 | |
149 | /* receive free descriptor (rfd) ring */ |
150 | struct emac_rfd_ring { |
151 | struct emac_buffer *rfbuff; |
152 | u32 *v_addr; /* virtual address */ |
153 | dma_addr_t dma_addr; /* dma address */ |
154 | size_t size; /* length in bytes */ |
155 | unsigned int count; /* number of desc in the ring */ |
156 | unsigned int produce_idx; |
157 | unsigned int process_idx; |
158 | unsigned int consume_idx; /* unused */ |
159 | }; |
160 | |
161 | /* Receive Return Desciptor (RRD) ring */ |
162 | struct emac_rrd_ring { |
163 | u32 *v_addr; /* virtual address */ |
164 | dma_addr_t dma_addr; /* physical address */ |
165 | size_t size; /* length in bytes */ |
166 | unsigned int count; /* number of desc in the ring */ |
167 | unsigned int produce_idx; /* unused */ |
168 | unsigned int consume_idx; |
169 | }; |
170 | |
171 | /* Rx queue */ |
172 | struct emac_rx_queue { |
173 | struct net_device *netdev; /* netdev ring belongs to */ |
174 | struct emac_rrd_ring rrd; |
175 | struct emac_rfd_ring rfd; |
176 | struct napi_struct napi; |
177 | struct emac_irq *irq; |
178 | |
179 | u32 intr; |
180 | u32 produce_mask; |
181 | u32 process_mask; |
182 | u32 consume_mask; |
183 | |
184 | u16 produce_reg; |
185 | u16 process_reg; |
186 | u16 consume_reg; |
187 | |
188 | u8 produce_shift; |
189 | u8 process_shft; |
190 | u8 consume_shift; |
191 | }; |
192 | |
193 | /* Transimit Packet Descriptor (tpd) ring */ |
194 | struct emac_tpd_ring { |
195 | struct emac_buffer *tpbuff; |
196 | u32 *v_addr; /* virtual address */ |
197 | dma_addr_t dma_addr; /* dma address */ |
198 | |
199 | size_t size; /* length in bytes */ |
200 | unsigned int count; /* number of desc in the ring */ |
201 | unsigned int produce_idx; |
202 | unsigned int consume_idx; |
203 | unsigned int last_produce_idx; |
204 | }; |
205 | |
206 | /* Tx queue */ |
207 | struct emac_tx_queue { |
208 | struct emac_tpd_ring tpd; |
209 | |
210 | u32 produce_mask; |
211 | u32 consume_mask; |
212 | |
213 | u16 max_packets; /* max packets per interrupt */ |
214 | u16 produce_reg; |
215 | u16 consume_reg; |
216 | |
217 | u8 produce_shift; |
218 | u8 consume_shift; |
219 | }; |
220 | |
221 | struct emac_adapter; |
222 | |
223 | int emac_mac_up(struct emac_adapter *adpt); |
224 | void emac_mac_down(struct emac_adapter *adpt); |
225 | void emac_mac_reset(struct emac_adapter *adpt); |
226 | void emac_mac_stop(struct emac_adapter *adpt); |
227 | void emac_mac_mode_config(struct emac_adapter *adpt); |
228 | void emac_mac_rx_process(struct emac_adapter *adpt, struct emac_rx_queue *rx_q, |
229 | int *num_pkts, int max_pkts); |
230 | netdev_tx_t emac_mac_tx_buf_send(struct emac_adapter *adpt, |
231 | struct emac_tx_queue *tx_q, |
232 | struct sk_buff *skb); |
233 | void emac_mac_tx_process(struct emac_adapter *adpt, struct emac_tx_queue *tx_q); |
234 | void emac_mac_rx_tx_ring_init_all(struct platform_device *pdev, |
235 | struct emac_adapter *adpt); |
236 | int emac_mac_rx_tx_rings_alloc_all(struct emac_adapter *adpt); |
237 | void emac_mac_rx_tx_rings_free_all(struct emac_adapter *adpt); |
238 | void emac_mac_multicast_addr_clear(struct emac_adapter *adpt); |
239 | void emac_mac_multicast_addr_set(struct emac_adapter *adpt, u8 *addr); |
240 | |
241 | #endif /*_EMAC_HW_H_*/ |
242 | |