1/* [xirc2ps_cs.c wk 03.11.99] (1.40 1999/11/18 00:06:03)
2 * Xircom CreditCard Ethernet Adapter IIps driver
3 * Xircom Realport 10/100 (RE-100) driver
4 *
5 * This driver supports various Xircom CreditCard Ethernet adapters
6 * including the CE2, CE IIps, RE-10, CEM28, CEM33, CE33, CEM56,
7 * CE3-100, CE3B, RE-100, REM10BT, and REM56G-100.
8 *
9 * 2000-09-24 <psheer@icon.co.za> The Xircom CE3B-100 may not
10 * autodetect the media properly. In this case use the
11 * if_port=1 (for 10BaseT) or if_port=4 (for 100BaseT) options
12 * to force the media type.
13 *
14 * Written originally by Werner Koch based on David Hinds' skeleton of the
15 * PCMCIA driver.
16 *
17 * Copyright (c) 1997,1998 Werner Koch (dd9jn)
18 *
19 * This driver is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
23 *
24 * It is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, see <http://www.gnu.org/licenses/>.
31 *
32 *
33 * ALTERNATIVELY, this driver may be distributed under the terms of
34 * the following license, in which case the provisions of this license
35 * are required INSTEAD OF the GNU General Public License. (This clause
36 * is necessary due to a potential bad interaction between the GPL and
37 * the restrictions contained in a BSD-style copyright.)
38 *
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
41 * are met:
42 * 1. Redistributions of source code must retain the above copyright
43 * notice, and the entire permission notice in its entirety,
44 * including the disclaimer of warranties.
45 * 2. Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in the
47 * documentation and/or other materials provided with the distribution.
48 * 3. The name of the author may not be used to endorse or promote
49 * products derived from this software without specific prior
50 * written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
53 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
55 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
56 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
57 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
58 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
60 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
62 * OF THE POSSIBILITY OF SUCH DAMAGE.
63 */
64
65#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
66
67#include <linux/module.h>
68#include <linux/kernel.h>
69#include <linux/init.h>
70#include <linux/ptrace.h>
71#include <linux/slab.h>
72#include <linux/string.h>
73#include <linux/timer.h>
74#include <linux/interrupt.h>
75#include <linux/in.h>
76#include <linux/delay.h>
77#include <linux/ethtool.h>
78#include <linux/netdevice.h>
79#include <linux/etherdevice.h>
80#include <linux/skbuff.h>
81#include <linux/if_arp.h>
82#include <linux/ioport.h>
83#include <linux/bitops.h>
84#include <linux/mii.h>
85
86#include <pcmcia/cistpl.h>
87#include <pcmcia/cisreg.h>
88#include <pcmcia/ciscode.h>
89
90#include <asm/io.h>
91#include <linux/uaccess.h>
92
93#ifndef MANFID_COMPAQ
94 #define MANFID_COMPAQ 0x0138
95 #define MANFID_COMPAQ2 0x0183 /* is this correct? */
96#endif
97
98#include <pcmcia/ds.h>
99
100/* Time in jiffies before concluding Tx hung */
101#define TX_TIMEOUT ((400*HZ)/1000)
102
103/****************
104 * Some constants used to access the hardware
105 */
106
107/* Register offsets and value constans */
108#define XIRCREG_CR 0 /* Command register (wr) */
109enum xirc_cr {
110 TransmitPacket = 0x01,
111 SoftReset = 0x02,
112 EnableIntr = 0x04,
113 ForceIntr = 0x08,
114 ClearTxFIFO = 0x10,
115 ClearRxOvrun = 0x20,
116 RestartTx = 0x40
117};
118#define XIRCREG_ESR 0 /* Ethernet status register (rd) */
119enum xirc_esr {
120 FullPktRcvd = 0x01, /* full packet in receive buffer */
121 PktRejected = 0x04, /* a packet has been rejected */
122 TxPktPend = 0x08, /* TX Packet Pending */
123 IncorPolarity = 0x10,
124 MediaSelect = 0x20 /* set if TP, clear if AUI */
125};
126#define XIRCREG_PR 1 /* Page Register select */
127#define XIRCREG_EDP 4 /* Ethernet Data Port Register */
128#define XIRCREG_ISR 6 /* Ethernet Interrupt Status Register */
129enum xirc_isr {
130 TxBufOvr = 0x01, /* TX Buffer Overflow */
131 PktTxed = 0x02, /* Packet Transmitted */
132 MACIntr = 0x04, /* MAC Interrupt occurred */
133 TxResGrant = 0x08, /* Tx Reservation Granted */
134 RxFullPkt = 0x20, /* Rx Full Packet */
135 RxPktRej = 0x40, /* Rx Packet Rejected */
136 ForcedIntr= 0x80 /* Forced Interrupt */
137};
138#define XIRCREG1_IMR0 12 /* Ethernet Interrupt Mask Register (on page 1)*/
139#define XIRCREG1_IMR1 13
140#define XIRCREG0_TSO 8 /* Transmit Space Open Register (on page 0)*/
141#define XIRCREG0_TRS 10 /* Transmit reservation Size Register (page 0)*/
142#define XIRCREG0_DO 12 /* Data Offset Register (page 0) (wr) */
143#define XIRCREG0_RSR 12 /* Receive Status Register (page 0) (rd) */
144enum xirc_rsr {
145 PhyPkt = 0x01, /* set:physical packet, clear: multicast packet */
146 BrdcstPkt = 0x02, /* set if it is a broadcast packet */
147 PktTooLong = 0x04, /* set if packet length > 1518 */
148 AlignErr = 0x10, /* incorrect CRC and last octet not complete */
149 CRCErr = 0x20, /* incorrect CRC and last octet is complete */
150 PktRxOk = 0x80 /* received ok */
151};
152#define XIRCREG0_PTR 13 /* packets transmitted register (rd) */
153#define XIRCREG0_RBC 14 /* receive byte count regsister (rd) */
154#define XIRCREG1_ECR 14 /* ethernet configurationn register */
155enum xirc_ecr {
156 FullDuplex = 0x04, /* enable full duplex mode */
157 LongTPMode = 0x08, /* adjust for longer lengths of TP cable */
158 DisablePolCor = 0x10,/* disable auto polarity correction */
159 DisableLinkPulse = 0x20, /* disable link pulse generation */
160 DisableAutoTx = 0x40, /* disable auto-transmit */
161};
162#define XIRCREG2_RBS 8 /* receive buffer start register */
163#define XIRCREG2_LED 10 /* LED Configuration register */
164/* values for the leds: Bits 2-0 for led 1
165 * 0 disabled Bits 5-3 for led 2
166 * 1 collision
167 * 2 noncollision
168 * 3 link_detected
169 * 4 incor_polarity
170 * 5 jabber
171 * 6 auto_assertion
172 * 7 rx_tx_activity
173 */
174#define XIRCREG2_MSR 12 /* Mohawk specific register */
175
176#define XIRCREG4_GPR0 8 /* General Purpose Register 0 */
177#define XIRCREG4_GPR1 9 /* General Purpose Register 1 */
178#define XIRCREG2_GPR2 13 /* General Purpose Register 2 (page2!)*/
179#define XIRCREG4_BOV 10 /* Bonding Version Register */
180#define XIRCREG4_LMA 12 /* Local Memory Address Register */
181#define XIRCREG4_LMD 14 /* Local Memory Data Port */
182/* MAC register can only by accessed with 8 bit operations */
183#define XIRCREG40_CMD0 8 /* Command Register (wr) */
184enum xirc_cmd { /* Commands */
185 Transmit = 0x01,
186 EnableRecv = 0x04,
187 DisableRecv = 0x08,
188 Abort = 0x10,
189 Online = 0x20,
190 IntrAck = 0x40,
191 Offline = 0x80
192};
193#define XIRCREG5_RHSA0 10 /* Rx Host Start Address */
194#define XIRCREG40_RXST0 9 /* Receive Status Register */
195#define XIRCREG40_TXST0 11 /* Transmit Status Register 0 */
196#define XIRCREG40_TXST1 12 /* Transmit Status Register 10 */
197#define XIRCREG40_RMASK0 13 /* Receive Mask Register */
198#define XIRCREG40_TMASK0 14 /* Transmit Mask Register 0 */
199#define XIRCREG40_TMASK1 15 /* Transmit Mask Register 0 */
200#define XIRCREG42_SWC0 8 /* Software Configuration 0 */
201#define XIRCREG42_SWC1 9 /* Software Configuration 1 */
202#define XIRCREG42_BOC 10 /* Back-Off Configuration */
203#define XIRCREG44_TDR0 8 /* Time Domain Reflectometry 0 */
204#define XIRCREG44_TDR1 9 /* Time Domain Reflectometry 1 */
205#define XIRCREG44_RXBC_LO 10 /* Rx Byte Count 0 (rd) */
206#define XIRCREG44_RXBC_HI 11 /* Rx Byte Count 1 (rd) */
207#define XIRCREG45_REV 15 /* Revision Register (rd) */
208#define XIRCREG50_IA 8 /* Individual Address (8-13) */
209
210static const char *if_names[] = { "Auto", "10BaseT", "10Base2", "AUI", "100BaseT" };
211
212/* card types */
213#define XIR_UNKNOWN 0 /* unknown: not supported */
214#define XIR_CE 1 /* (prodid 1) different hardware: not supported */
215#define XIR_CE2 2 /* (prodid 2) */
216#define XIR_CE3 3 /* (prodid 3) */
217#define XIR_CEM 4 /* (prodid 1) different hardware: not supported */
218#define XIR_CEM2 5 /* (prodid 2) */
219#define XIR_CEM3 6 /* (prodid 3) */
220#define XIR_CEM33 7 /* (prodid 4) */
221#define XIR_CEM56M 8 /* (prodid 5) */
222#define XIR_CEM56 9 /* (prodid 6) */
223#define XIR_CM28 10 /* (prodid 3) modem only: not supported here */
224#define XIR_CM33 11 /* (prodid 4) modem only: not supported here */
225#define XIR_CM56 12 /* (prodid 5) modem only: not supported here */
226#define XIR_CG 13 /* (prodid 1) GSM modem only: not supported */
227#define XIR_CBE 14 /* (prodid 1) cardbus ethernet: not supported */
228/*====================================================================*/
229
230/* Module parameters */
231
232MODULE_DESCRIPTION("Xircom PCMCIA ethernet driver");
233MODULE_LICENSE("Dual MPL/GPL");
234
235#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
236
237INT_MODULE_PARM(if_port, 0);
238INT_MODULE_PARM(full_duplex, 0);
239INT_MODULE_PARM(do_sound, 1);
240INT_MODULE_PARM(lockup_hack, 0); /* anti lockup hack */
241
242/*====================================================================*/
243
244/* We do not process more than these number of bytes during one
245 * interrupt. (Of course we receive complete packets, so this is not
246 * an exact value).
247 * Something between 2000..22000; first value gives best interrupt latency,
248 * the second enables the usage of the complete on-chip buffer. We use the
249 * high value as the initial value.
250 */
251static unsigned maxrx_bytes = 22000;
252
253/* MII management prototypes */
254static void mii_idle(unsigned int ioaddr);
255static void mii_putbit(unsigned int ioaddr, unsigned data);
256static int mii_getbit(unsigned int ioaddr);
257static void mii_wbits(unsigned int ioaddr, unsigned data, int len);
258static unsigned mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg);
259static void mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg,
260 unsigned data, int len);
261
262static int has_ce2_string(struct pcmcia_device * link);
263static int xirc2ps_config(struct pcmcia_device * link);
264static void xirc2ps_release(struct pcmcia_device * link);
265static void xirc2ps_detach(struct pcmcia_device *p_dev);
266
267static irqreturn_t xirc2ps_interrupt(int irq, void *dev_id);
268
269struct local_info {
270 struct net_device *dev;
271 struct pcmcia_device *p_dev;
272
273 int card_type;
274 int probe_port;
275 int silicon; /* silicon revision. 0=old CE2, 1=Scipper, 4=Mohawk */
276 int mohawk; /* a CE3 type card */
277 int dingo; /* a CEM56 type card */
278 int new_mii; /* has full 10baseT/100baseT MII */
279 int modem; /* is a multi function card (i.e with a modem) */
280 void __iomem *dingo_ccr; /* only used for CEM56 cards */
281 unsigned last_ptr_value; /* last packets transmitted value */
282 const char *manf_str;
283 struct work_struct tx_timeout_task;
284};
285
286/****************
287 * Some more prototypes
288 */
289static netdev_tx_t do_start_xmit(struct sk_buff *skb,
290 struct net_device *dev);
291static void xirc_tx_timeout(struct net_device *dev, unsigned int txqueue);
292static void xirc2ps_tx_timeout_task(struct work_struct *work);
293static void set_addresses(struct net_device *dev);
294static void set_multicast_list(struct net_device *dev);
295static int set_card_type(struct pcmcia_device *link);
296static int do_config(struct net_device *dev, struct ifmap *map);
297static int do_open(struct net_device *dev);
298static int do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
299static const struct ethtool_ops netdev_ethtool_ops;
300static void hardreset(struct net_device *dev);
301static void do_reset(struct net_device *dev, int full);
302static int init_mii(struct net_device *dev);
303static void do_powerdown(struct net_device *dev);
304static int do_stop(struct net_device *dev);
305
306/*=============== Helper functions =========================*/
307#define SelectPage(pgnr) outb((pgnr), ioaddr + XIRCREG_PR)
308#define GetByte(reg) ((unsigned)inb(ioaddr + (reg)))
309#define GetWord(reg) ((unsigned)inw(ioaddr + (reg)))
310#define PutByte(reg,value) outb((value), ioaddr+(reg))
311#define PutWord(reg,value) outw((value), ioaddr+(reg))
312
313/*====== Functions used for debugging =================================*/
314#if 0 /* reading regs may change system status */
315static void
316PrintRegisters(struct net_device *dev)
317{
318 unsigned int ioaddr = dev->base_addr;
319
320 if (pc_debug > 1) {
321 int i, page;
322
323 printk(KERN_DEBUG pr_fmt("Register common: "));
324 for (i = 0; i < 8; i++)
325 pr_cont(" %2.2x", GetByte(i));
326 pr_cont("\n");
327 for (page = 0; page <= 8; page++) {
328 printk(KERN_DEBUG pr_fmt("Register page %2x: "), page);
329 SelectPage(page);
330 for (i = 8; i < 16; i++)
331 pr_cont(" %2.2x", GetByte(i));
332 pr_cont("\n");
333 }
334 for (page=0x40 ; page <= 0x5f; page++) {
335 if (page == 0x43 || (page >= 0x46 && page <= 0x4f) ||
336 (page >= 0x51 && page <=0x5e))
337 continue;
338 printk(KERN_DEBUG pr_fmt("Register page %2x: "), page);
339 SelectPage(page);
340 for (i = 8; i < 16; i++)
341 pr_cont(" %2.2x", GetByte(i));
342 pr_cont("\n");
343 }
344 }
345}
346#endif /* 0 */
347
348/*============== MII Management functions ===============*/
349
350/****************
351 * Turn around for read
352 */
353static void
354mii_idle(unsigned int ioaddr)
355{
356 PutByte(XIRCREG2_GPR2, 0x04|0); /* drive MDCK low */
357 udelay(1);
358 PutByte(XIRCREG2_GPR2, 0x04|1); /* and drive MDCK high */
359 udelay(1);
360}
361
362/****************
363 * Write a bit to MDI/O
364 */
365static void
366mii_putbit(unsigned int ioaddr, unsigned data)
367{
368 #if 1
369 if (data) {
370 PutByte(XIRCREG2_GPR2, 0x0c|2|0); /* set MDIO */
371 udelay(1);
372 PutByte(XIRCREG2_GPR2, 0x0c|2|1); /* and drive MDCK high */
373 udelay(1);
374 } else {
375 PutByte(XIRCREG2_GPR2, 0x0c|0|0); /* clear MDIO */
376 udelay(1);
377 PutByte(XIRCREG2_GPR2, 0x0c|0|1); /* and drive MDCK high */
378 udelay(1);
379 }
380 #else
381 if (data) {
382 PutWord(XIRCREG2_GPR2-1, 0x0e0e);
383 udelay(1);
384 PutWord(XIRCREG2_GPR2-1, 0x0f0f);
385 udelay(1);
386 } else {
387 PutWord(XIRCREG2_GPR2-1, 0x0c0c);
388 udelay(1);
389 PutWord(XIRCREG2_GPR2-1, 0x0d0d);
390 udelay(1);
391 }
392 #endif
393}
394
395/****************
396 * Get a bit from MDI/O
397 */
398static int
399mii_getbit(unsigned int ioaddr)
400{
401 unsigned d;
402
403 PutByte(XIRCREG2_GPR2, 4|0); /* drive MDCK low */
404 udelay(1);
405 d = GetByte(XIRCREG2_GPR2); /* read MDIO */
406 PutByte(XIRCREG2_GPR2, 4|1); /* drive MDCK high again */
407 udelay(1);
408 return d & 0x20; /* read MDIO */
409}
410
411static void
412mii_wbits(unsigned int ioaddr, unsigned data, int len)
413{
414 unsigned m = 1 << (len-1);
415 for (; m; m >>= 1)
416 mii_putbit(ioaddr, data: data & m);
417}
418
419static unsigned
420mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg)
421{
422 int i;
423 unsigned data=0, m;
424
425 SelectPage(2);
426 for (i=0; i < 32; i++) /* 32 bit preamble */
427 mii_putbit(ioaddr, data: 1);
428 mii_wbits(ioaddr, data: 0x06, len: 4); /* Start and opcode for read */
429 mii_wbits(ioaddr, data: phyaddr, len: 5); /* PHY address to be accessed */
430 mii_wbits(ioaddr, data: phyreg, len: 5); /* PHY register to read */
431 mii_idle(ioaddr); /* turn around */
432 mii_getbit(ioaddr);
433
434 for (m = 1<<15; m; m >>= 1)
435 if (mii_getbit(ioaddr))
436 data |= m;
437 mii_idle(ioaddr);
438 return data;
439}
440
441static void
442mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg, unsigned data,
443 int len)
444{
445 int i;
446
447 SelectPage(2);
448 for (i=0; i < 32; i++) /* 32 bit preamble */
449 mii_putbit(ioaddr, data: 1);
450 mii_wbits(ioaddr, data: 0x05, len: 4); /* Start and opcode for write */
451 mii_wbits(ioaddr, data: phyaddr, len: 5); /* PHY address to be accessed */
452 mii_wbits(ioaddr, data: phyreg, len: 5); /* PHY Register to write */
453 mii_putbit(ioaddr, data: 1); /* turn around */
454 mii_putbit(ioaddr, data: 0);
455 mii_wbits(ioaddr, data, len); /* And write the data */
456 mii_idle(ioaddr);
457}
458
459/*============= Main bulk of functions =========================*/
460
461static const struct net_device_ops netdev_ops = {
462 .ndo_open = do_open,
463 .ndo_stop = do_stop,
464 .ndo_start_xmit = do_start_xmit,
465 .ndo_tx_timeout = xirc_tx_timeout,
466 .ndo_set_config = do_config,
467 .ndo_eth_ioctl = do_ioctl,
468 .ndo_set_rx_mode = set_multicast_list,
469 .ndo_set_mac_address = eth_mac_addr,
470 .ndo_validate_addr = eth_validate_addr,
471};
472
473static int
474xirc2ps_probe(struct pcmcia_device *link)
475{
476 struct net_device *dev;
477 struct local_info *local;
478
479 dev_dbg(&link->dev, "attach()\n");
480
481 /* Allocate the device structure */
482 dev = alloc_etherdev(sizeof(struct local_info));
483 if (!dev)
484 return -ENOMEM;
485 local = netdev_priv(dev);
486 local->dev = dev;
487 local->p_dev = link;
488 link->priv = dev;
489
490 /* General socket configuration */
491 link->config_index = 1;
492
493 /* Fill in card specific entries */
494 dev->netdev_ops = &netdev_ops;
495 dev->ethtool_ops = &netdev_ethtool_ops;
496 dev->watchdog_timeo = TX_TIMEOUT;
497 INIT_WORK(&local->tx_timeout_task, xirc2ps_tx_timeout_task);
498
499 return xirc2ps_config(link);
500} /* xirc2ps_attach */
501
502static void
503xirc2ps_detach(struct pcmcia_device *link)
504{
505 struct net_device *dev = link->priv;
506 struct local_info *local = netdev_priv(dev);
507
508 netif_carrier_off(dev);
509 netif_tx_disable(dev);
510 cancel_work_sync(work: &local->tx_timeout_task);
511
512 dev_dbg(&link->dev, "detach\n");
513
514 unregister_netdev(dev);
515
516 xirc2ps_release(link);
517
518 free_netdev(dev);
519} /* xirc2ps_detach */
520
521/****************
522 * Detect the type of the card. s is the buffer with the data of tuple 0x20
523 * Returns: 0 := not supported
524 * mediaid=11 and prodid=47
525 * Media-Id bits:
526 * Ethernet 0x01
527 * Tokenring 0x02
528 * Arcnet 0x04
529 * Wireless 0x08
530 * Modem 0x10
531 * GSM only 0x20
532 * Prod-Id bits:
533 * Pocket 0x10
534 * External 0x20
535 * Creditcard 0x40
536 * Cardbus 0x80
537 *
538 */
539static int
540set_card_type(struct pcmcia_device *link)
541{
542 struct net_device *dev = link->priv;
543 struct local_info *local = netdev_priv(dev);
544 u8 *buf;
545 unsigned int cisrev, mediaid, prodid;
546 size_t len;
547
548 len = pcmcia_get_tuple(p_dev: link, CISTPL_MANFID, buf: &buf);
549 if (len < 5) {
550 dev_err(&link->dev, "invalid CIS -- sorry\n");
551 return 0;
552 }
553
554 cisrev = buf[2];
555 mediaid = buf[3];
556 prodid = buf[4];
557
558 dev_dbg(&link->dev, "cisrev=%02x mediaid=%02x prodid=%02x\n",
559 cisrev, mediaid, prodid);
560
561 local->mohawk = 0;
562 local->dingo = 0;
563 local->modem = 0;
564 local->card_type = XIR_UNKNOWN;
565 if (!(prodid & 0x40)) {
566 pr_notice("Oops: Not a creditcard\n");
567 return 0;
568 }
569 if (!(mediaid & 0x01)) {
570 pr_notice("Not an Ethernet card\n");
571 return 0;
572 }
573 if (mediaid & 0x10) {
574 local->modem = 1;
575 switch(prodid & 15) {
576 case 1: local->card_type = XIR_CEM ; break;
577 case 2: local->card_type = XIR_CEM2 ; break;
578 case 3: local->card_type = XIR_CEM3 ; break;
579 case 4: local->card_type = XIR_CEM33 ; break;
580 case 5: local->card_type = XIR_CEM56M;
581 local->mohawk = 1;
582 break;
583 case 6:
584 case 7: /* 7 is the RealPort 10/56 */
585 local->card_type = XIR_CEM56 ;
586 local->mohawk = 1;
587 local->dingo = 1;
588 break;
589 }
590 } else {
591 switch(prodid & 15) {
592 case 1: local->card_type = has_ce2_string(link)? XIR_CE2 : XIR_CE ;
593 break;
594 case 2: local->card_type = XIR_CE2; break;
595 case 3: local->card_type = XIR_CE3;
596 local->mohawk = 1;
597 break;
598 }
599 }
600 if (local->card_type == XIR_CE || local->card_type == XIR_CEM) {
601 pr_notice("Sorry, this is an old CE card\n");
602 return 0;
603 }
604 if (local->card_type == XIR_UNKNOWN)
605 pr_notice("unknown card (mediaid=%02x prodid=%02x)\n", mediaid, prodid);
606
607 return 1;
608}
609
610/****************
611 * There are some CE2 cards out which claim to be a CE card.
612 * This function looks for a "CE2" in the 3rd version field.
613 * Returns: true if this is a CE2
614 */
615static int
616has_ce2_string(struct pcmcia_device * p_dev)
617{
618 if (p_dev->prod_id[2] && strstr(p_dev->prod_id[2], "CE2"))
619 return 1;
620 return 0;
621}
622
623static int
624xirc2ps_config_modem(struct pcmcia_device *p_dev, void *priv_data)
625{
626 unsigned int ioaddr;
627
628 if ((p_dev->resource[0]->start & 0xf) == 8)
629 return -ENODEV;
630
631 p_dev->resource[0]->end = 16;
632 p_dev->resource[1]->end = 8;
633 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
634 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_16;
635 p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
636 p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
637 p_dev->io_lines = 10;
638
639 p_dev->resource[1]->start = p_dev->resource[0]->start;
640 for (ioaddr = 0x300; ioaddr < 0x400; ioaddr += 0x10) {
641 p_dev->resource[0]->start = ioaddr;
642 if (!pcmcia_request_io(p_dev))
643 return 0;
644 }
645 return -ENODEV;
646}
647
648static int
649xirc2ps_config_check(struct pcmcia_device *p_dev, void *priv_data)
650{
651 int *pass = priv_data;
652 resource_size_t tmp = p_dev->resource[1]->start;
653
654 tmp += (*pass ? (p_dev->config_index & 0x20 ? -24 : 8)
655 : (p_dev->config_index & 0x20 ? 8 : -24));
656
657 if ((p_dev->resource[0]->start & 0xf) == 8)
658 return -ENODEV;
659
660 p_dev->resource[0]->end = 18;
661 p_dev->resource[1]->end = 8;
662 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
663 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_16;
664 p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
665 p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
666 p_dev->io_lines = 10;
667
668 p_dev->resource[1]->start = p_dev->resource[0]->start;
669 p_dev->resource[0]->start = tmp;
670 return pcmcia_request_io(p_dev);
671}
672
673
674static int pcmcia_get_mac_ce(struct pcmcia_device *p_dev,
675 tuple_t *tuple,
676 void *priv)
677{
678 struct net_device *dev = priv;
679
680 if (tuple->TupleDataLen != 13)
681 return -EINVAL;
682 if ((tuple->TupleData[0] != 2) || (tuple->TupleData[1] != 1) ||
683 (tuple->TupleData[2] != 6))
684 return -EINVAL;
685 /* another try (James Lehmer's CE2 version 4.1)*/
686 dev_addr_mod(dev, offset: 2, addr: &tuple->TupleData[2], len: 4);
687 return 0;
688};
689
690
691static int
692xirc2ps_config(struct pcmcia_device * link)
693{
694 struct net_device *dev = link->priv;
695 struct local_info *local = netdev_priv(dev);
696 unsigned int ioaddr;
697 int err;
698 u8 *buf;
699 size_t len;
700
701 local->dingo_ccr = NULL;
702
703 dev_dbg(&link->dev, "config\n");
704
705 /* Is this a valid card */
706 if (link->has_manf_id == 0) {
707 pr_notice("manfid not found in CIS\n");
708 goto failure;
709 }
710
711 switch (link->manf_id) {
712 case MANFID_XIRCOM:
713 local->manf_str = "Xircom";
714 break;
715 case MANFID_ACCTON:
716 local->manf_str = "Accton";
717 break;
718 case MANFID_COMPAQ:
719 case MANFID_COMPAQ2:
720 local->manf_str = "Compaq";
721 break;
722 case MANFID_INTEL:
723 local->manf_str = "Intel";
724 break;
725 case MANFID_TOSHIBA:
726 local->manf_str = "Toshiba";
727 break;
728 default:
729 pr_notice("Unknown Card Manufacturer ID: 0x%04x\n",
730 (unsigned)link->manf_id);
731 goto failure;
732 }
733 dev_dbg(&link->dev, "found %s card\n", local->manf_str);
734
735 if (!set_card_type(link)) {
736 pr_notice("this card is not supported\n");
737 goto failure;
738 }
739
740 /* get the ethernet address from the CIS */
741 err = pcmcia_get_mac_from_cis(p_dev: link, dev);
742
743 /* not found: try to get the node-id from tuple 0x89 */
744 if (err) {
745 len = pcmcia_get_tuple(p_dev: link, code: 0x89, buf: &buf);
746 /* data layout looks like tuple 0x22 */
747 if (buf && len == 8) {
748 if (*buf == CISTPL_FUNCE_LAN_NODE_ID)
749 dev_addr_mod(dev, offset: 2, addr: &buf[2], len: 4);
750 else
751 err = -1;
752 }
753 kfree(objp: buf);
754 }
755
756 if (err)
757 err = pcmcia_loop_tuple(p_dev: link, CISTPL_FUNCE, loop_tuple: pcmcia_get_mac_ce, priv_data: dev);
758
759 if (err) {
760 pr_notice("node-id not found in CIS\n");
761 goto failure;
762 }
763
764 if (local->modem) {
765 int pass;
766 link->config_flags |= CONF_AUTO_SET_IO;
767
768 if (local->dingo) {
769 /* Take the Modem IO port from the CIS and scan for a free
770 * Ethernet port */
771 if (!pcmcia_loop_config(p_dev: link, conf_check: xirc2ps_config_modem, NULL))
772 goto port_found;
773 } else {
774 /* We do 2 passes here: The first one uses the regular mapping and
775 * the second tries again, thereby considering that the 32 ports are
776 * mirrored every 32 bytes. Actually we use a mirrored port for
777 * the Mako if (on the first pass) the COR bit 5 is set.
778 */
779 for (pass=0; pass < 2; pass++)
780 if (!pcmcia_loop_config(p_dev: link, conf_check: xirc2ps_config_check,
781 priv_data: &pass))
782 goto port_found;
783 /* if special option:
784 * try to configure as Ethernet only.
785 * .... */
786 }
787 pr_notice("no ports available\n");
788 } else {
789 link->io_lines = 10;
790 link->resource[0]->end = 16;
791 link->resource[0]->flags |= IO_DATA_PATH_WIDTH_16;
792 for (ioaddr = 0x300; ioaddr < 0x400; ioaddr += 0x10) {
793 link->resource[0]->start = ioaddr;
794 if (!(err = pcmcia_request_io(p_dev: link)))
795 goto port_found;
796 }
797 link->resource[0]->start = 0; /* let CS decide */
798 if ((err = pcmcia_request_io(p_dev: link)))
799 goto config_error;
800 }
801 port_found:
802
803 /****************
804 * Now allocate an interrupt line. Note that this does not
805 * actually assign a handler to the interrupt.
806 */
807 if ((err=pcmcia_request_irq(p_dev: link, handler: xirc2ps_interrupt)))
808 goto config_error;
809
810 link->config_flags |= CONF_ENABLE_IRQ;
811 if (do_sound)
812 link->config_flags |= CONF_ENABLE_SPKR;
813
814 if ((err = pcmcia_enable_device(p_dev: link)))
815 goto config_error;
816
817 if (local->dingo) {
818 /* Reset the modem's BAR to the correct value
819 * This is necessary because in the RequestConfiguration call,
820 * the base address of the ethernet port (BasePort1) is written
821 * to the BAR registers of the modem.
822 */
823 err = pcmcia_write_config_byte(p_dev: link, CISREG_IOBASE_0, val: (u8)
824 link->resource[1]->start & 0xff);
825 if (err)
826 goto config_error;
827
828 err = pcmcia_write_config_byte(p_dev: link, CISREG_IOBASE_1,
829 val: (link->resource[1]->start >> 8) & 0xff);
830 if (err)
831 goto config_error;
832
833 /* There is no config entry for the Ethernet part which
834 * is at 0x0800. So we allocate a window into the attribute
835 * memory and write direct to the CIS registers
836 */
837 link->resource[2]->flags = WIN_DATA_WIDTH_8 | WIN_MEMORY_TYPE_AM |
838 WIN_ENABLE;
839 link->resource[2]->start = link->resource[2]->end = 0;
840 if ((err = pcmcia_request_window(p_dev: link, res: link->resource[2], speed: 0)))
841 goto config_error;
842
843 local->dingo_ccr = ioremap(offset: link->resource[2]->start, size: 0x1000) + 0x0800;
844 if ((err = pcmcia_map_mem_page(p_dev: link, res: link->resource[2], offset: 0)))
845 goto config_error;
846
847 /* Setup the CCRs; there are no infos in the CIS about the Ethernet
848 * part.
849 */
850 writeb(val: 0x47, addr: local->dingo_ccr + CISREG_COR);
851 ioaddr = link->resource[0]->start;
852 writeb(val: ioaddr & 0xff , addr: local->dingo_ccr + CISREG_IOBASE_0);
853 writeb(val: (ioaddr >> 8)&0xff , addr: local->dingo_ccr + CISREG_IOBASE_1);
854
855 #if 0
856 {
857 u_char tmp;
858 pr_info("ECOR:");
859 for (i=0; i < 7; i++) {
860 tmp = readb(local->dingo_ccr + i*2);
861 pr_cont(" %02x", tmp);
862 }
863 pr_cont("\n");
864 pr_info("DCOR:");
865 for (i=0; i < 4; i++) {
866 tmp = readb(local->dingo_ccr + 0x20 + i*2);
867 pr_cont(" %02x", tmp);
868 }
869 pr_cont("\n");
870 pr_info("SCOR:");
871 for (i=0; i < 10; i++) {
872 tmp = readb(local->dingo_ccr + 0x40 + i*2);
873 pr_cont(" %02x", tmp);
874 }
875 pr_cont("\n");
876 }
877 #endif
878
879 writeb(val: 0x01, addr: local->dingo_ccr + 0x20);
880 writeb(val: 0x0c, addr: local->dingo_ccr + 0x22);
881 writeb(val: 0x00, addr: local->dingo_ccr + 0x24);
882 writeb(val: 0x00, addr: local->dingo_ccr + 0x26);
883 writeb(val: 0x00, addr: local->dingo_ccr + 0x28);
884 }
885
886 /* The if_port symbol can be set when the module is loaded */
887 local->probe_port=0;
888 if (!if_port) {
889 local->probe_port = dev->if_port = 1;
890 } else if ((if_port >= 1 && if_port <= 2) ||
891 (local->mohawk && if_port==4))
892 dev->if_port = if_port;
893 else
894 pr_notice("invalid if_port requested\n");
895
896 /* we can now register the device with the net subsystem */
897 dev->irq = link->irq;
898 dev->base_addr = link->resource[0]->start;
899
900 if (local->dingo)
901 do_reset(dev, full: 1); /* a kludge to make the cem56 work */
902
903 SET_NETDEV_DEV(dev, &link->dev);
904
905 if ((err=register_netdev(dev))) {
906 pr_notice("register_netdev() failed\n");
907 goto config_error;
908 }
909
910 /* give some infos about the hardware */
911 netdev_info(dev, format: "%s: port %#3lx, irq %d, hwaddr %pM\n",
912 local->manf_str, (u_long)dev->base_addr, (int)dev->irq,
913 dev->dev_addr);
914
915 return 0;
916
917 config_error:
918 xirc2ps_release(link);
919 return -ENODEV;
920
921 failure:
922 return -ENODEV;
923} /* xirc2ps_config */
924
925static void
926xirc2ps_release(struct pcmcia_device *link)
927{
928 dev_dbg(&link->dev, "release\n");
929
930 if (link->resource[2]->end) {
931 struct net_device *dev = link->priv;
932 struct local_info *local = netdev_priv(dev);
933 if (local->dingo)
934 iounmap(addr: local->dingo_ccr - 0x0800);
935 }
936 pcmcia_disable_device(p_dev: link);
937} /* xirc2ps_release */
938
939/*====================================================================*/
940
941
942static int xirc2ps_suspend(struct pcmcia_device *link)
943{
944 struct net_device *dev = link->priv;
945
946 if (link->open) {
947 netif_device_detach(dev);
948 do_powerdown(dev);
949 }
950
951 return 0;
952}
953
954static int xirc2ps_resume(struct pcmcia_device *link)
955{
956 struct net_device *dev = link->priv;
957
958 if (link->open) {
959 do_reset(dev,full: 1);
960 netif_device_attach(dev);
961 }
962
963 return 0;
964}
965
966
967/*====================================================================*/
968
969/****************
970 * This is the Interrupt service route.
971 */
972static irqreturn_t
973xirc2ps_interrupt(int irq, void *dev_id)
974{
975 struct net_device *dev = (struct net_device *)dev_id;
976 struct local_info *lp = netdev_priv(dev);
977 unsigned int ioaddr;
978 u_char saved_page;
979 unsigned bytes_rcvd;
980 unsigned int_status, eth_status, rx_status, tx_status;
981 unsigned rsr, pktlen;
982 ulong start_ticks = jiffies; /* fixme: jiffies rollover every 497 days
983 * is this something to worry about?
984 * -- on a laptop?
985 */
986
987 if (!netif_device_present(dev))
988 return IRQ_HANDLED;
989
990 ioaddr = dev->base_addr;
991 if (lp->mohawk) { /* must disable the interrupt */
992 PutByte(XIRCREG_CR, 0);
993 }
994
995 pr_debug("%s: interrupt %d at %#x.\n", dev->name, irq, ioaddr);
996
997 saved_page = GetByte(XIRCREG_PR);
998 /* Read the ISR to see whats the cause for the interrupt.
999 * This also clears the interrupt flags on CE2 cards
1000 */
1001 int_status = GetByte(XIRCREG_ISR);
1002 bytes_rcvd = 0;
1003 loop_entry:
1004 if (int_status == 0xff) { /* card may be ejected */
1005 pr_debug("%s: interrupt %d for dead card\n", dev->name, irq);
1006 goto leave;
1007 }
1008 eth_status = GetByte(XIRCREG_ESR);
1009
1010 SelectPage(0x40);
1011 rx_status = GetByte(XIRCREG40_RXST0);
1012 PutByte(XIRCREG40_RXST0, (~rx_status & 0xff));
1013 tx_status = GetByte(XIRCREG40_TXST0);
1014 tx_status |= GetByte(XIRCREG40_TXST1) << 8;
1015 PutByte(XIRCREG40_TXST0, 0);
1016 PutByte(XIRCREG40_TXST1, 0);
1017
1018 pr_debug("%s: ISR=%#2.2x ESR=%#2.2x RSR=%#2.2x TSR=%#4.4x\n",
1019 dev->name, int_status, eth_status, rx_status, tx_status);
1020
1021 /***** receive section ******/
1022 SelectPage(0);
1023 while (eth_status & FullPktRcvd) {
1024 rsr = GetByte(XIRCREG0_RSR);
1025 if (bytes_rcvd > maxrx_bytes && (rsr & PktRxOk)) {
1026 /* too many bytes received during this int, drop the rest of the
1027 * packets */
1028 dev->stats.rx_dropped++;
1029 pr_debug("%s: RX drop, too much done\n", dev->name);
1030 } else if (rsr & PktRxOk) {
1031 struct sk_buff *skb;
1032
1033 pktlen = GetWord(XIRCREG0_RBC);
1034 bytes_rcvd += pktlen;
1035
1036 pr_debug("rsr=%#02x packet_length=%u\n", rsr, pktlen);
1037
1038 /* 1 extra so we can use insw */
1039 skb = netdev_alloc_skb(dev, length: pktlen + 3);
1040 if (!skb) {
1041 dev->stats.rx_dropped++;
1042 } else { /* okay get the packet */
1043 skb_reserve(skb, len: 2);
1044 if (lp->silicon == 0 ) { /* work around a hardware bug */
1045 unsigned rhsa; /* receive start address */
1046
1047 SelectPage(5);
1048 rhsa = GetWord(XIRCREG5_RHSA0);
1049 SelectPage(0);
1050 rhsa += 3; /* skip control infos */
1051 if (rhsa >= 0x8000)
1052 rhsa = 0;
1053 if (rhsa + pktlen > 0x8000) {
1054 unsigned i;
1055 u_char *buf = skb_put(skb, len: pktlen);
1056 for (i=0; i < pktlen ; i++, rhsa++) {
1057 buf[i] = GetByte(XIRCREG_EDP);
1058 if (rhsa == 0x8000) {
1059 rhsa = 0;
1060 i--;
1061 }
1062 }
1063 } else {
1064 insw(port: ioaddr+XIRCREG_EDP,
1065 addr: skb_put(skb, len: pktlen), count: (pktlen+1)>>1);
1066 }
1067 }
1068 #if 0
1069 else if (lp->mohawk) {
1070 /* To use this 32 bit access we should use
1071 * a manual optimized loop
1072 * Also the words are swapped, we can get more
1073 * performance by using 32 bit access and swapping
1074 * the words in a register. Will need this for cardbus
1075 *
1076 * Note: don't forget to change the ALLOC_SKB to .. +3
1077 */
1078 unsigned i;
1079 u_long *p = skb_put(skb, pktlen);
1080 register u_long a;
1081 unsigned int edpreg = ioaddr+XIRCREG_EDP-2;
1082 for (i=0; i < len ; i += 4, p++) {
1083 a = inl(edpreg);
1084 __asm__("rorl $16,%0\n\t"
1085 :"=q" (a)
1086 : "0" (a));
1087 *p = a;
1088 }
1089 }
1090 #endif
1091 else {
1092 insw(port: ioaddr+XIRCREG_EDP, addr: skb_put(skb, len: pktlen),
1093 count: (pktlen+1)>>1);
1094 }
1095 skb->protocol = eth_type_trans(skb, dev);
1096 netif_rx(skb);
1097 dev->stats.rx_packets++;
1098 dev->stats.rx_bytes += pktlen;
1099 if (!(rsr & PhyPkt))
1100 dev->stats.multicast++;
1101 }
1102 } else { /* bad packet */
1103 pr_debug("rsr=%#02x\n", rsr);
1104 }
1105 if (rsr & PktTooLong) {
1106 dev->stats.rx_frame_errors++;
1107 pr_debug("%s: Packet too long\n", dev->name);
1108 }
1109 if (rsr & CRCErr) {
1110 dev->stats.rx_crc_errors++;
1111 pr_debug("%s: CRC error\n", dev->name);
1112 }
1113 if (rsr & AlignErr) {
1114 dev->stats.rx_fifo_errors++; /* okay ? */
1115 pr_debug("%s: Alignment error\n", dev->name);
1116 }
1117
1118 /* clear the received/dropped/error packet */
1119 PutWord(XIRCREG0_DO, 0x8000); /* issue cmd: skip_rx_packet */
1120
1121 /* get the new ethernet status */
1122 eth_status = GetByte(XIRCREG_ESR);
1123 }
1124 if (rx_status & 0x10) { /* Receive overrun */
1125 dev->stats.rx_over_errors++;
1126 PutByte(XIRCREG_CR, ClearRxOvrun);
1127 pr_debug("receive overrun cleared\n");
1128 }
1129
1130 /***** transmit section ******/
1131 if (int_status & PktTxed) {
1132 unsigned n, nn;
1133
1134 n = lp->last_ptr_value;
1135 nn = GetByte(XIRCREG0_PTR);
1136 lp->last_ptr_value = nn;
1137 if (nn < n) /* rollover */
1138 dev->stats.tx_packets += 256 - n;
1139 else if (n == nn) { /* happens sometimes - don't know why */
1140 pr_debug("PTR not changed?\n");
1141 } else
1142 dev->stats.tx_packets += lp->last_ptr_value - n;
1143 netif_wake_queue(dev);
1144 }
1145 if (tx_status & 0x0002) { /* Excessive collisions */
1146 pr_debug("tx restarted due to excessive collisions\n");
1147 PutByte(XIRCREG_CR, RestartTx); /* restart transmitter process */
1148 }
1149 if (tx_status & 0x0040)
1150 dev->stats.tx_aborted_errors++;
1151
1152 /* recalculate our work chunk so that we limit the duration of this
1153 * ISR to about 1/10 of a second.
1154 * Calculate only if we received a reasonable amount of bytes.
1155 */
1156 if (bytes_rcvd > 1000) {
1157 u_long duration = jiffies - start_ticks;
1158
1159 if (duration >= HZ/10) { /* if more than about 1/10 second */
1160 maxrx_bytes = (bytes_rcvd * (HZ/10)) / duration;
1161 if (maxrx_bytes < 2000)
1162 maxrx_bytes = 2000;
1163 else if (maxrx_bytes > 22000)
1164 maxrx_bytes = 22000;
1165 pr_debug("set maxrx=%u (rcvd=%u ticks=%lu)\n",
1166 maxrx_bytes, bytes_rcvd, duration);
1167 } else if (!duration && maxrx_bytes < 22000) {
1168 /* now much faster */
1169 maxrx_bytes += 2000;
1170 if (maxrx_bytes > 22000)
1171 maxrx_bytes = 22000;
1172 pr_debug("set maxrx=%u\n", maxrx_bytes);
1173 }
1174 }
1175
1176 leave:
1177 if (lockup_hack) {
1178 if (int_status != 0xff && (int_status = GetByte(XIRCREG_ISR)) != 0)
1179 goto loop_entry;
1180 }
1181 SelectPage(saved_page);
1182 PutByte(XIRCREG_CR, EnableIntr); /* re-enable interrupts */
1183 /* Instead of dropping packets during a receive, we could
1184 * force an interrupt with this command:
1185 * PutByte(XIRCREG_CR, EnableIntr|ForceIntr);
1186 */
1187 return IRQ_HANDLED;
1188} /* xirc2ps_interrupt */
1189
1190/*====================================================================*/
1191
1192static void
1193xirc2ps_tx_timeout_task(struct work_struct *work)
1194{
1195 struct local_info *local =
1196 container_of(work, struct local_info, tx_timeout_task);
1197 struct net_device *dev = local->dev;
1198 /* reset the card */
1199 do_reset(dev,full: 1);
1200 netif_trans_update(dev); /* prevent tx timeout */
1201 netif_wake_queue(dev);
1202}
1203
1204static void
1205xirc_tx_timeout(struct net_device *dev, unsigned int txqueue)
1206{
1207 struct local_info *lp = netdev_priv(dev);
1208 dev->stats.tx_errors++;
1209 netdev_notice(dev, format: "transmit timed out\n");
1210 schedule_work(work: &lp->tx_timeout_task);
1211}
1212
1213static netdev_tx_t
1214do_start_xmit(struct sk_buff *skb, struct net_device *dev)
1215{
1216 struct local_info *lp = netdev_priv(dev);
1217 unsigned int ioaddr = dev->base_addr;
1218 int okay;
1219 unsigned freespace;
1220 unsigned pktlen = skb->len;
1221
1222 pr_debug("do_start_xmit(skb=%p, dev=%p) len=%u\n",
1223 skb, dev, pktlen);
1224
1225
1226 /* adjust the packet length to min. required
1227 * and hope that the buffer is large enough
1228 * to provide some random data.
1229 * fixme: For Mohawk we can change this by sending
1230 * a larger packetlen than we actually have; the chip will
1231 * pad this in his buffer with random bytes
1232 */
1233 if (pktlen < ETH_ZLEN)
1234 {
1235 if (skb_padto(skb, ETH_ZLEN))
1236 return NETDEV_TX_OK;
1237 pktlen = ETH_ZLEN;
1238 }
1239
1240 netif_stop_queue(dev);
1241 SelectPage(0);
1242 PutWord(XIRCREG0_TRS, (u_short)pktlen+2);
1243 freespace = GetWord(XIRCREG0_TSO);
1244 okay = freespace & 0x8000;
1245 freespace &= 0x7fff;
1246 /* TRS doesn't work - (indeed it is eliminated with sil-rev 1) */
1247 okay = pktlen +2 < freespace;
1248 pr_debug("%s: avail. tx space=%u%s\n",
1249 dev->name, freespace, okay ? " (okay)":" (not enough)");
1250 if (!okay) { /* not enough space */
1251 return NETDEV_TX_BUSY; /* upper layer may decide to requeue this packet */
1252 }
1253 /* send the packet */
1254 PutWord(XIRCREG_EDP, (u_short)pktlen);
1255 outsw(port: ioaddr+XIRCREG_EDP, addr: skb->data, count: pktlen>>1);
1256 if (pktlen & 1)
1257 PutByte(XIRCREG_EDP, skb->data[pktlen-1]);
1258
1259 if (lp->mohawk)
1260 PutByte(XIRCREG_CR, TransmitPacket|EnableIntr);
1261
1262 dev_kfree_skb (skb);
1263 dev->stats.tx_bytes += pktlen;
1264 netif_start_queue(dev);
1265 return NETDEV_TX_OK;
1266}
1267
1268struct set_address_info {
1269 int reg_nr;
1270 int page_nr;
1271 int mohawk;
1272 unsigned int ioaddr;
1273};
1274
1275static void set_address(struct set_address_info *sa_info, const char *addr)
1276{
1277 unsigned int ioaddr = sa_info->ioaddr;
1278 int i;
1279
1280 for (i = 0; i < 6; i++) {
1281 if (sa_info->reg_nr > 15) {
1282 sa_info->reg_nr = 8;
1283 sa_info->page_nr++;
1284 SelectPage(sa_info->page_nr);
1285 }
1286 if (sa_info->mohawk)
1287 PutByte(sa_info->reg_nr++, addr[5 - i]);
1288 else
1289 PutByte(sa_info->reg_nr++, addr[i]);
1290 }
1291}
1292
1293/****************
1294 * Set all addresses: This first one is the individual address,
1295 * the next 9 addresses are taken from the multicast list and
1296 * the rest is filled with the individual address.
1297 */
1298static void set_addresses(struct net_device *dev)
1299{
1300 unsigned int ioaddr = dev->base_addr;
1301 struct local_info *lp = netdev_priv(dev);
1302 struct netdev_hw_addr *ha;
1303 struct set_address_info sa_info;
1304 int i;
1305
1306 /*
1307 * Setup the info structure so that by first set_address call it will do
1308 * SelectPage with the right page number. Hence these ones here.
1309 */
1310 sa_info.reg_nr = 15 + 1;
1311 sa_info.page_nr = 0x50 - 1;
1312 sa_info.mohawk = lp->mohawk;
1313 sa_info.ioaddr = ioaddr;
1314
1315 set_address(sa_info: &sa_info, addr: dev->dev_addr);
1316 i = 0;
1317 netdev_for_each_mc_addr(ha, dev) {
1318 if (i++ == 9)
1319 break;
1320 set_address(sa_info: &sa_info, addr: ha->addr);
1321 }
1322 while (i++ < 9)
1323 set_address(sa_info: &sa_info, addr: dev->dev_addr);
1324 SelectPage(0);
1325}
1326
1327/****************
1328 * Set or clear the multicast filter for this adaptor.
1329 * We can filter up to 9 addresses, if more are requested we set
1330 * multicast promiscuous mode.
1331 */
1332
1333static void
1334set_multicast_list(struct net_device *dev)
1335{
1336 unsigned int ioaddr = dev->base_addr;
1337 unsigned value;
1338
1339 SelectPage(0x42);
1340 value = GetByte(XIRCREG42_SWC1) & 0xC0;
1341
1342 if (dev->flags & IFF_PROMISC) { /* snoop */
1343 PutByte(XIRCREG42_SWC1, value | 0x06); /* set MPE and PME */
1344 } else if (netdev_mc_count(dev) > 9 || (dev->flags & IFF_ALLMULTI)) {
1345 PutByte(XIRCREG42_SWC1, value | 0x02); /* set MPE */
1346 } else if (!netdev_mc_empty(dev)) {
1347 /* the chip can filter 9 addresses perfectly */
1348 PutByte(XIRCREG42_SWC1, value | 0x01);
1349 SelectPage(0x40);
1350 PutByte(XIRCREG40_CMD0, Offline);
1351 set_addresses(dev);
1352 SelectPage(0x40);
1353 PutByte(XIRCREG40_CMD0, EnableRecv | Online);
1354 } else { /* standard usage */
1355 PutByte(XIRCREG42_SWC1, value | 0x00);
1356 }
1357 SelectPage(0);
1358}
1359
1360static int
1361do_config(struct net_device *dev, struct ifmap *map)
1362{
1363 struct local_info *local = netdev_priv(dev);
1364
1365 pr_debug("do_config(%p)\n", dev);
1366 if (map->port != 255 && map->port != dev->if_port) {
1367 if (map->port > 4)
1368 return -EINVAL;
1369 if (!map->port) {
1370 local->probe_port = 1;
1371 dev->if_port = 1;
1372 } else {
1373 local->probe_port = 0;
1374 dev->if_port = map->port;
1375 }
1376 netdev_info(dev, format: "switching to %s port\n", if_names[dev->if_port]);
1377 do_reset(dev,full: 1); /* not the fine way :-) */
1378 }
1379 return 0;
1380}
1381
1382/****************
1383 * Open the driver
1384 */
1385static int
1386do_open(struct net_device *dev)
1387{
1388 struct local_info *lp = netdev_priv(dev);
1389 struct pcmcia_device *link = lp->p_dev;
1390
1391 dev_dbg(&link->dev, "do_open(%p)\n", dev);
1392
1393 /* Check that the PCMCIA card is still here. */
1394 /* Physical device present signature. */
1395 if (!pcmcia_dev_present(p_dev: link))
1396 return -ENODEV;
1397
1398 /* okay */
1399 link->open++;
1400
1401 netif_start_queue(dev);
1402 do_reset(dev,full: 1);
1403
1404 return 0;
1405}
1406
1407static void netdev_get_drvinfo(struct net_device *dev,
1408 struct ethtool_drvinfo *info)
1409{
1410 strscpy(p: info->driver, q: "xirc2ps_cs", size: sizeof(info->driver));
1411 snprintf(buf: info->bus_info, size: sizeof(info->bus_info), fmt: "PCMCIA 0x%lx",
1412 dev->base_addr);
1413}
1414
1415static const struct ethtool_ops netdev_ethtool_ops = {
1416 .get_drvinfo = netdev_get_drvinfo,
1417};
1418
1419static int
1420do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1421{
1422 struct local_info *local = netdev_priv(dev);
1423 unsigned int ioaddr = dev->base_addr;
1424 struct mii_ioctl_data *data = if_mii(rq);
1425
1426 pr_debug("%s: ioctl(%-.6s, %#04x) %04x %04x %04x %04x\n",
1427 dev->name, rq->ifr_ifrn.ifrn_name, cmd,
1428 data->phy_id, data->reg_num, data->val_in, data->val_out);
1429
1430 if (!local->mohawk)
1431 return -EOPNOTSUPP;
1432
1433 switch(cmd) {
1434 case SIOCGMIIPHY: /* Get the address of the PHY in use. */
1435 data->phy_id = 0; /* we have only this address */
1436 fallthrough;
1437 case SIOCGMIIREG: /* Read the specified MII register. */
1438 data->val_out = mii_rd(ioaddr, phyaddr: data->phy_id & 0x1f,
1439 phyreg: data->reg_num & 0x1f);
1440 break;
1441 case SIOCSMIIREG: /* Write the specified MII register */
1442 mii_wr(ioaddr, phyaddr: data->phy_id & 0x1f, phyreg: data->reg_num & 0x1f, data: data->val_in,
1443 len: 16);
1444 break;
1445 default:
1446 return -EOPNOTSUPP;
1447 }
1448 return 0;
1449}
1450
1451static void
1452hardreset(struct net_device *dev)
1453{
1454 struct local_info *local = netdev_priv(dev);
1455 unsigned int ioaddr = dev->base_addr;
1456
1457 SelectPage(4);
1458 udelay(1);
1459 PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */
1460 msleep(msecs: 40); /* wait 40 msec */
1461 if (local->mohawk)
1462 PutByte(XIRCREG4_GPR1, 1); /* set bit 0: power up */
1463 else
1464 PutByte(XIRCREG4_GPR1, 1 | 4); /* set bit 0: power up, bit 2: AIC */
1465 msleep(msecs: 20); /* wait 20 msec */
1466}
1467
1468static void
1469do_reset(struct net_device *dev, int full)
1470{
1471 struct local_info *local = netdev_priv(dev);
1472 unsigned int ioaddr = dev->base_addr;
1473 unsigned value;
1474
1475 pr_debug("%s: do_reset(%p,%d)\n", dev->name, dev, full);
1476
1477 hardreset(dev);
1478 PutByte(XIRCREG_CR, SoftReset); /* set */
1479 msleep(msecs: 20); /* wait 20 msec */
1480 PutByte(XIRCREG_CR, 0); /* clear */
1481 msleep(msecs: 40); /* wait 40 msec */
1482 if (local->mohawk) {
1483 SelectPage(4);
1484 /* set pin GP1 and GP2 to output (0x0c)
1485 * set GP1 to low to power up the ML6692 (0x00)
1486 * set GP2 to high to power up the 10Mhz chip (0x02)
1487 */
1488 PutByte(XIRCREG4_GPR0, 0x0e);
1489 }
1490
1491 /* give the circuits some time to power up */
1492 msleep(msecs: 500); /* about 500ms */
1493
1494 local->last_ptr_value = 0;
1495 local->silicon = local->mohawk ? (GetByte(XIRCREG4_BOV) & 0x70) >> 4
1496 : (GetByte(XIRCREG4_BOV) & 0x30) >> 4;
1497
1498 if (local->probe_port) {
1499 if (!local->mohawk) {
1500 SelectPage(4);
1501 PutByte(XIRCREG4_GPR0, 4);
1502 local->probe_port = 0;
1503 }
1504 } else if (dev->if_port == 2) { /* enable 10Base2 */
1505 SelectPage(0x42);
1506 PutByte(XIRCREG42_SWC1, 0xC0);
1507 } else { /* enable 10BaseT */
1508 SelectPage(0x42);
1509 PutByte(XIRCREG42_SWC1, 0x80);
1510 }
1511 msleep(msecs: 40); /* wait 40 msec to let it complete */
1512
1513 #if 0
1514 {
1515 SelectPage(0);
1516 value = GetByte(XIRCREG_ESR); /* read the ESR */
1517 pr_debug("%s: ESR is: %#02x\n", dev->name, value);
1518 }
1519 #endif
1520
1521 /* setup the ECR */
1522 SelectPage(1);
1523 PutByte(XIRCREG1_IMR0, 0xff); /* allow all ints */
1524 PutByte(XIRCREG1_IMR1, 1 ); /* and Set TxUnderrunDetect */
1525 value = GetByte(XIRCREG1_ECR);
1526 #if 0
1527 if (local->mohawk)
1528 value |= DisableLinkPulse;
1529 PutByte(XIRCREG1_ECR, value);
1530 #endif
1531 pr_debug("%s: ECR is: %#02x\n", dev->name, value);
1532
1533 SelectPage(0x42);
1534 PutByte(XIRCREG42_SWC0, 0x20); /* disable source insertion */
1535
1536 if (local->silicon != 1) {
1537 /* set the local memory dividing line.
1538 * The comments in the sample code say that this is only
1539 * settable with the scipper version 2 which is revision 0.
1540 * Always for CE3 cards
1541 */
1542 SelectPage(2);
1543 PutWord(XIRCREG2_RBS, 0x2000);
1544 }
1545
1546 if (full)
1547 set_addresses(dev);
1548
1549 /* Hardware workaround:
1550 * The receive byte pointer after reset is off by 1 so we need
1551 * to move the offset pointer back to 0.
1552 */
1553 SelectPage(0);
1554 PutWord(XIRCREG0_DO, 0x2000); /* change offset command, off=0 */
1555
1556 /* setup MAC IMRs and clear status registers */
1557 SelectPage(0x40); /* Bit 7 ... bit 0 */
1558 PutByte(XIRCREG40_RMASK0, 0xff); /* ROK, RAB, rsv, RO, CRC, AE, PTL, MP */
1559 PutByte(XIRCREG40_TMASK0, 0xff); /* TOK, TAB, SQE, LL, TU, JAB, EXC, CRS */
1560 PutByte(XIRCREG40_TMASK1, 0xb0); /* rsv, rsv, PTD, EXT, rsv,rsv,rsv, rsv*/
1561 PutByte(XIRCREG40_RXST0, 0x00); /* ROK, RAB, REN, RO, CRC, AE, PTL, MP */
1562 PutByte(XIRCREG40_TXST0, 0x00); /* TOK, TAB, SQE, LL, TU, JAB, EXC, CRS */
1563 PutByte(XIRCREG40_TXST1, 0x00); /* TEN, rsv, PTD, EXT, retry_counter:4 */
1564
1565 if (full && local->mohawk && init_mii(dev)) {
1566 if (dev->if_port == 4 || local->dingo || local->new_mii) {
1567 netdev_info(dev, format: "MII selected\n");
1568 SelectPage(2);
1569 PutByte(XIRCREG2_MSR, GetByte(XIRCREG2_MSR) | 0x08);
1570 msleep(msecs: 20);
1571 } else {
1572 netdev_info(dev, format: "MII detected; using 10mbs\n");
1573 SelectPage(0x42);
1574 if (dev->if_port == 2) /* enable 10Base2 */
1575 PutByte(XIRCREG42_SWC1, 0xC0);
1576 else /* enable 10BaseT */
1577 PutByte(XIRCREG42_SWC1, 0x80);
1578 msleep(msecs: 40); /* wait 40 msec to let it complete */
1579 }
1580 if (full_duplex)
1581 PutByte(XIRCREG1_ECR, GetByte(XIRCREG1_ECR | FullDuplex));
1582 } else { /* No MII */
1583 SelectPage(0);
1584 value = GetByte(XIRCREG_ESR); /* read the ESR */
1585 dev->if_port = (value & MediaSelect) ? 1 : 2;
1586 }
1587
1588 /* configure the LEDs */
1589 SelectPage(2);
1590 if (dev->if_port == 1 || dev->if_port == 4) /* TP: Link and Activity */
1591 PutByte(XIRCREG2_LED, 0x3b);
1592 else /* Coax: Not-Collision and Activity */
1593 PutByte(XIRCREG2_LED, 0x3a);
1594
1595 if (local->dingo)
1596 PutByte(0x0b, 0x04); /* 100 Mbit LED */
1597
1598 /* enable receiver and put the mac online */
1599 if (full) {
1600 set_multicast_list(dev);
1601 SelectPage(0x40);
1602 PutByte(XIRCREG40_CMD0, EnableRecv | Online);
1603 }
1604
1605 /* setup Ethernet IMR and enable interrupts */
1606 SelectPage(1);
1607 PutByte(XIRCREG1_IMR0, 0xff);
1608 udelay(1);
1609 SelectPage(0);
1610 PutByte(XIRCREG_CR, EnableIntr);
1611 if (local->modem && !local->dingo) { /* do some magic */
1612 if (!(GetByte(0x10) & 0x01))
1613 PutByte(0x10, 0x11); /* unmask master-int bit */
1614 }
1615
1616 if (full)
1617 netdev_info(dev, format: "media %s, silicon revision %d\n",
1618 if_names[dev->if_port], local->silicon);
1619 /* We should switch back to page 0 to avoid a bug in revision 0
1620 * where regs with offset below 8 can't be read after an access
1621 * to the MAC registers */
1622 SelectPage(0);
1623}
1624
1625/****************
1626 * Initialize the Media-Independent-Interface
1627 * Returns: True if we have a good MII
1628 */
1629static int
1630init_mii(struct net_device *dev)
1631{
1632 struct local_info *local = netdev_priv(dev);
1633 unsigned int ioaddr = dev->base_addr;
1634 unsigned control, status, linkpartner;
1635 int i;
1636
1637 if (if_port == 4 || if_port == 1) { /* force 100BaseT or 10BaseT */
1638 dev->if_port = if_port;
1639 local->probe_port = 0;
1640 return 1;
1641 }
1642
1643 status = mii_rd(ioaddr, phyaddr: 0, phyreg: 1);
1644 if ((status & 0xff00) != 0x7800)
1645 return 0; /* No MII */
1646
1647 local->new_mii = (mii_rd(ioaddr, phyaddr: 0, phyreg: 2) != 0xffff);
1648
1649 if (local->probe_port)
1650 control = 0x1000; /* auto neg */
1651 else if (dev->if_port == 4)
1652 control = 0x2000; /* no auto neg, 100mbs mode */
1653 else
1654 control = 0x0000; /* no auto neg, 10mbs mode */
1655 mii_wr(ioaddr, phyaddr: 0, phyreg: 0, data: control, len: 16);
1656 udelay(100);
1657 control = mii_rd(ioaddr, phyaddr: 0, phyreg: 0);
1658
1659 if (control & 0x0400) {
1660 netdev_notice(dev, format: "can't take PHY out of isolation mode\n");
1661 local->probe_port = 0;
1662 return 0;
1663 }
1664
1665 if (local->probe_port) {
1666 /* according to the DP83840A specs the auto negotiation process
1667 * may take up to 3.5 sec, so we use this also for our ML6692
1668 * Fixme: Better to use a timer here!
1669 */
1670 for (i=0; i < 35; i++) {
1671 msleep(msecs: 100); /* wait 100 msec */
1672 status = mii_rd(ioaddr, phyaddr: 0, phyreg: 1);
1673 if ((status & 0x0020) && (status & 0x0004))
1674 break;
1675 }
1676
1677 if (!(status & 0x0020)) {
1678 netdev_info(dev, format: "autonegotiation failed; using 10mbs\n");
1679 if (!local->new_mii) {
1680 control = 0x0000;
1681 mii_wr(ioaddr, phyaddr: 0, phyreg: 0, data: control, len: 16);
1682 udelay(100);
1683 SelectPage(0);
1684 dev->if_port = (GetByte(XIRCREG_ESR) & MediaSelect) ? 1 : 2;
1685 }
1686 } else {
1687 linkpartner = mii_rd(ioaddr, phyaddr: 0, phyreg: 5);
1688 netdev_info(dev, format: "MII link partner: %04x\n", linkpartner);
1689 if (linkpartner & 0x0080) {
1690 dev->if_port = 4;
1691 } else
1692 dev->if_port = 1;
1693 }
1694 }
1695
1696 return 1;
1697}
1698
1699static void
1700do_powerdown(struct net_device *dev)
1701{
1702
1703 unsigned int ioaddr = dev->base_addr;
1704
1705 pr_debug("do_powerdown(%p)\n", dev);
1706
1707 SelectPage(4);
1708 PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */
1709 SelectPage(0);
1710}
1711
1712static int
1713do_stop(struct net_device *dev)
1714{
1715 unsigned int ioaddr = dev->base_addr;
1716 struct local_info *lp = netdev_priv(dev);
1717 struct pcmcia_device *link = lp->p_dev;
1718
1719 dev_dbg(&link->dev, "do_stop(%p)\n", dev);
1720
1721 if (!link)
1722 return -ENODEV;
1723
1724 netif_stop_queue(dev);
1725
1726 SelectPage(0);
1727 PutByte(XIRCREG_CR, 0); /* disable interrupts */
1728 SelectPage(0x01);
1729 PutByte(XIRCREG1_IMR0, 0x00); /* forbid all ints */
1730 SelectPage(4);
1731 PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */
1732 SelectPage(0);
1733
1734 link->open--;
1735 return 0;
1736}
1737
1738static const struct pcmcia_device_id xirc2ps_ids[] = {
1739 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0089, 0x110a),
1740 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0138, 0x110a),
1741 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM28", 0x2e3ee845, 0x0ea978ea),
1742 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM33", 0x2e3ee845, 0x80609023),
1743 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM56", 0x2e3ee845, 0xa650c32a),
1744 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "REM10", 0x2e3ee845, 0x76df1d29),
1745 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "XEM5600", 0x2e3ee845, 0xf1403719),
1746 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Xircom", "CreditCard Ethernet+Modem II", 0x2e3ee845, 0xeca401bf),
1747 PCMCIA_DEVICE_MANF_CARD(0x01bf, 0x010a),
1748 PCMCIA_DEVICE_PROD_ID13("Toshiba Information Systems", "TPCENET", 0x1b3b94fe, 0xf381c1a2),
1749 PCMCIA_DEVICE_PROD_ID13("Xircom", "CE3-10/100", 0x2e3ee845, 0x0ec0ac37),
1750 PCMCIA_DEVICE_PROD_ID13("Xircom", "PS-CE2-10", 0x2e3ee845, 0x947d9073),
1751 PCMCIA_DEVICE_PROD_ID13("Xircom", "R2E-100BTX", 0x2e3ee845, 0x2464a6e3),
1752 PCMCIA_DEVICE_PROD_ID13("Xircom", "RE-10", 0x2e3ee845, 0x3e08d609),
1753 PCMCIA_DEVICE_PROD_ID13("Xircom", "XE2000", 0x2e3ee845, 0xf7188e46),
1754 PCMCIA_DEVICE_PROD_ID12("Compaq", "Ethernet LAN Card", 0x54f7c49c, 0x9fd2f0a2),
1755 PCMCIA_DEVICE_PROD_ID12("Compaq", "Netelligent 10/100 PC Card", 0x54f7c49c, 0xefe96769),
1756 PCMCIA_DEVICE_PROD_ID12("Intel", "EtherExpress(TM) PRO/100 PC Card Mobile Adapter16", 0x816cc815, 0x174397db),
1757 PCMCIA_DEVICE_PROD_ID12("Toshiba", "10/100 Ethernet PC Card", 0x44a09d9c, 0xb44deecf),
1758 /* also matches CFE-10 cards! */
1759 /* PCMCIA_DEVICE_MANF_CARD(0x0105, 0x010a), */
1760 PCMCIA_DEVICE_NULL,
1761};
1762MODULE_DEVICE_TABLE(pcmcia, xirc2ps_ids);
1763
1764
1765static struct pcmcia_driver xirc2ps_cs_driver = {
1766 .owner = THIS_MODULE,
1767 .name = "xirc2ps_cs",
1768 .probe = xirc2ps_probe,
1769 .remove = xirc2ps_detach,
1770 .id_table = xirc2ps_ids,
1771 .suspend = xirc2ps_suspend,
1772 .resume = xirc2ps_resume,
1773};
1774module_pcmcia_driver(xirc2ps_cs_driver);
1775
1776#ifndef MODULE
1777static int __init setup_xirc2ps_cs(char *str)
1778{
1779 /* if_port, full_duplex, do_sound, lockup_hack
1780 */
1781 int ints[10] = { -1 };
1782
1783 str = get_options(str, ARRAY_SIZE(ints), ints);
1784
1785#define MAYBE_SET(X,Y) if (ints[0] >= Y && ints[Y] != -1) { X = ints[Y]; }
1786 MAYBE_SET(if_port, 3);
1787 MAYBE_SET(full_duplex, 4);
1788 MAYBE_SET(do_sound, 5);
1789 MAYBE_SET(lockup_hack, 6);
1790#undef MAYBE_SET
1791
1792 return 1;
1793}
1794
1795__setup("xirc2ps_cs=", setup_xirc2ps_cs);
1796#endif
1797

source code of linux/drivers/net/ethernet/xircom/xirc2ps_cs.c