1/* SPDX-License-Identifier: ISC */
2/*
3 * Copyright (c) 2018 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6
7#ifndef WCN3990_QMI_SVC_V01_H
8#define WCN3990_QMI_SVC_V01_H
9
10#define WLFW_SERVICE_ID_V01 0x45
11#define WLFW_SERVICE_VERS_V01 0x01
12
13#define QMI_WLFW_BDF_DOWNLOAD_REQ_V01 0x0025
14#define QMI_WLFW_MEM_READY_IND_V01 0x0037
15#define QMI_WLFW_DYNAMIC_FEATURE_MASK_RESP_V01 0x003B
16#define QMI_WLFW_INITIATE_CAL_UPDATE_IND_V01 0x002A
17#define QMI_WLFW_HOST_CAP_REQ_V01 0x0034
18#define QMI_WLFW_M3_INFO_REQ_V01 0x003C
19#define QMI_WLFW_CAP_REQ_V01 0x0024
20#define QMI_WLFW_FW_INIT_DONE_IND_V01 0x0038
21#define QMI_WLFW_CAL_REPORT_REQ_V01 0x0026
22#define QMI_WLFW_M3_INFO_RESP_V01 0x003C
23#define QMI_WLFW_CAL_UPDATE_RESP_V01 0x0029
24#define QMI_WLFW_CAL_DOWNLOAD_RESP_V01 0x0027
25#define QMI_WLFW_XO_CAL_IND_V01 0x003D
26#define QMI_WLFW_INI_RESP_V01 0x002F
27#define QMI_WLFW_CAL_REPORT_RESP_V01 0x0026
28#define QMI_WLFW_MAC_ADDR_RESP_V01 0x0033
29#define QMI_WLFW_INITIATE_CAL_DOWNLOAD_IND_V01 0x0028
30#define QMI_WLFW_HOST_CAP_RESP_V01 0x0034
31#define QMI_WLFW_MSA_READY_IND_V01 0x002B
32#define QMI_WLFW_ATHDIAG_WRITE_RESP_V01 0x0031
33#define QMI_WLFW_WLAN_MODE_REQ_V01 0x0022
34#define QMI_WLFW_IND_REGISTER_REQ_V01 0x0020
35#define QMI_WLFW_WLAN_CFG_RESP_V01 0x0023
36#define QMI_WLFW_REQUEST_MEM_IND_V01 0x0035
37#define QMI_WLFW_REJUVENATE_IND_V01 0x0039
38#define QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01 0x003B
39#define QMI_WLFW_ATHDIAG_WRITE_REQ_V01 0x0031
40#define QMI_WLFW_WLAN_MODE_RESP_V01 0x0022
41#define QMI_WLFW_RESPOND_MEM_REQ_V01 0x0036
42#define QMI_WLFW_PIN_CONNECT_RESULT_IND_V01 0x002C
43#define QMI_WLFW_FW_READY_IND_V01 0x0021
44#define QMI_WLFW_MSA_READY_RESP_V01 0x002E
45#define QMI_WLFW_CAL_UPDATE_REQ_V01 0x0029
46#define QMI_WLFW_INI_REQ_V01 0x002F
47#define QMI_WLFW_BDF_DOWNLOAD_RESP_V01 0x0025
48#define QMI_WLFW_REJUVENATE_ACK_RESP_V01 0x003A
49#define QMI_WLFW_MSA_INFO_RESP_V01 0x002D
50#define QMI_WLFW_MSA_READY_REQ_V01 0x002E
51#define QMI_WLFW_CAP_RESP_V01 0x0024
52#define QMI_WLFW_REJUVENATE_ACK_REQ_V01 0x003A
53#define QMI_WLFW_ATHDIAG_READ_RESP_V01 0x0030
54#define QMI_WLFW_VBATT_REQ_V01 0x0032
55#define QMI_WLFW_MAC_ADDR_REQ_V01 0x0033
56#define QMI_WLFW_RESPOND_MEM_RESP_V01 0x0036
57#define QMI_WLFW_VBATT_RESP_V01 0x0032
58#define QMI_WLFW_MSA_INFO_REQ_V01 0x002D
59#define QMI_WLFW_CAL_DOWNLOAD_REQ_V01 0x0027
60#define QMI_WLFW_ATHDIAG_READ_REQ_V01 0x0030
61#define QMI_WLFW_WLAN_CFG_REQ_V01 0x0023
62#define QMI_WLFW_IND_REGISTER_RESP_V01 0x0020
63
64#define QMI_WLFW_MAX_MEM_REG_V01 2
65#define QMI_WLFW_MAX_NUM_MEM_SEG_V01 16
66#define QMI_WLFW_MAX_NUM_CAL_V01 5
67#define QMI_WLFW_MAX_DATA_SIZE_V01 6144
68#define QMI_WLFW_FUNCTION_NAME_LEN_V01 128
69#define QMI_WLFW_MAX_NUM_CE_V01 12
70#define QMI_WLFW_MAX_TIMESTAMP_LEN_V01 32
71#define QMI_WLFW_MAX_ATHDIAG_DATA_SIZE_V01 6144
72#define QMI_WLFW_MAX_NUM_GPIO_V01 32
73#define QMI_WLFW_MAX_BUILD_ID_LEN_V01 128
74#define QMI_WLFW_MAX_NUM_MEM_CFG_V01 2
75#define QMI_WLFW_MAX_STR_LEN_V01 16
76#define QMI_WLFW_MAX_NUM_SHADOW_REG_V01 24
77#define QMI_WLFW_MAC_ADDR_SIZE_V01 6
78#define QMI_WLFW_MAX_SHADOW_REG_V2 36
79#define QMI_WLFW_MAX_NUM_SVC_V01 24
80
81enum wlfw_driver_mode_enum_v01 {
82 QMI_WLFW_MISSION_V01 = 0,
83 QMI_WLFW_FTM_V01 = 1,
84 QMI_WLFW_EPPING_V01 = 2,
85 QMI_WLFW_WALTEST_V01 = 3,
86 QMI_WLFW_OFF_V01 = 4,
87 QMI_WLFW_CCPM_V01 = 5,
88 QMI_WLFW_QVIT_V01 = 6,
89 QMI_WLFW_CALIBRATION_V01 = 7,
90};
91
92enum wlfw_cal_temp_id_enum_v01 {
93 QMI_WLFW_CAL_TEMP_IDX_0_V01 = 0,
94 QMI_WLFW_CAL_TEMP_IDX_1_V01 = 1,
95 QMI_WLFW_CAL_TEMP_IDX_2_V01 = 2,
96 QMI_WLFW_CAL_TEMP_IDX_3_V01 = 3,
97 QMI_WLFW_CAL_TEMP_IDX_4_V01 = 4,
98};
99
100enum wlfw_pipedir_enum_v01 {
101 QMI_WLFW_PIPEDIR_NONE_V01 = 0,
102 QMI_WLFW_PIPEDIR_IN_V01 = 1,
103 QMI_WLFW_PIPEDIR_OUT_V01 = 2,
104 QMI_WLFW_PIPEDIR_INOUT_V01 = 3,
105};
106
107enum wlfw_mem_type_enum_v01 {
108 QMI_WLFW_MEM_TYPE_MSA_V01 = 0,
109 QMI_WLFW_MEM_TYPE_DDR_V01 = 1,
110};
111
112#define QMI_WLFW_CE_ATTR_FLAGS_V01 ((u32)0x00)
113#define QMI_WLFW_CE_ATTR_NO_SNOOP_V01 ((u32)0x01)
114#define QMI_WLFW_CE_ATTR_BYTE_SWAP_DATA_V01 ((u32)0x02)
115#define QMI_WLFW_CE_ATTR_SWIZZLE_DESCRIPTORS_V01 ((u32)0x04)
116#define QMI_WLFW_CE_ATTR_DISABLE_INTR_V01 ((u32)0x08)
117#define QMI_WLFW_CE_ATTR_ENABLE_POLL_V01 ((u32)0x10)
118
119#define QMI_WLFW_ALREADY_REGISTERED_V01 ((u64)0x01ULL)
120#define QMI_WLFW_FW_READY_V01 ((u64)0x02ULL)
121#define QMI_WLFW_MSA_READY_V01 ((u64)0x04ULL)
122#define QMI_WLFW_MEM_READY_V01 ((u64)0x08ULL)
123#define QMI_WLFW_FW_INIT_DONE_V01 ((u64)0x10ULL)
124
125#define QMI_WLFW_FW_REJUVENATE_V01 ((u64)0x01ULL)
126
127struct wlfw_ce_tgt_pipe_cfg_s_v01 {
128 __le32 pipe_num;
129 __le32 pipe_dir;
130 __le32 nentries;
131 __le32 nbytes_max;
132 __le32 flags;
133};
134
135struct wlfw_ce_svc_pipe_cfg_s_v01 {
136 __le32 service_id;
137 __le32 pipe_dir;
138 __le32 pipe_num;
139};
140
141struct wlfw_shadow_reg_cfg_s_v01 {
142 u16 id;
143 u16 offset;
144};
145
146struct wlfw_shadow_reg_v2_cfg_s_v01 {
147 u32 addr;
148};
149
150struct wlfw_memory_region_info_s_v01 {
151 u64 region_addr;
152 u32 size;
153 u8 secure_flag;
154};
155
156struct wlfw_mem_cfg_s_v01 {
157 u64 offset;
158 u32 size;
159 u8 secure_flag;
160};
161
162struct wlfw_mem_seg_s_v01 {
163 u32 size;
164 enum wlfw_mem_type_enum_v01 type;
165 u32 mem_cfg_len;
166 struct wlfw_mem_cfg_s_v01 mem_cfg[QMI_WLFW_MAX_NUM_MEM_CFG_V01];
167};
168
169struct wlfw_mem_seg_resp_s_v01 {
170 u64 addr;
171 u32 size;
172 enum wlfw_mem_type_enum_v01 type;
173};
174
175struct wlfw_rf_chip_info_s_v01 {
176 u32 chip_id;
177 u32 chip_family;
178};
179
180struct wlfw_rf_board_info_s_v01 {
181 u32 board_id;
182};
183
184struct wlfw_soc_info_s_v01 {
185 u32 soc_id;
186};
187
188struct wlfw_fw_version_info_s_v01 {
189 u32 fw_version;
190 char fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN_V01 + 1];
191};
192
193struct wlfw_ind_register_req_msg_v01 {
194 u8 fw_ready_enable_valid;
195 u8 fw_ready_enable;
196 u8 initiate_cal_download_enable_valid;
197 u8 initiate_cal_download_enable;
198 u8 initiate_cal_update_enable_valid;
199 u8 initiate_cal_update_enable;
200 u8 msa_ready_enable_valid;
201 u8 msa_ready_enable;
202 u8 pin_connect_result_enable_valid;
203 u8 pin_connect_result_enable;
204 u8 client_id_valid;
205 u32 client_id;
206 u8 request_mem_enable_valid;
207 u8 request_mem_enable;
208 u8 mem_ready_enable_valid;
209 u8 mem_ready_enable;
210 u8 fw_init_done_enable_valid;
211 u8 fw_init_done_enable;
212 u8 rejuvenate_enable_valid;
213 u32 rejuvenate_enable;
214 u8 xo_cal_enable_valid;
215 u8 xo_cal_enable;
216};
217
218#define WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN 50
219extern const struct qmi_elem_info wlfw_ind_register_req_msg_v01_ei[];
220
221struct wlfw_ind_register_resp_msg_v01 {
222 struct qmi_response_type_v01 resp;
223 u8 fw_status_valid;
224 u64 fw_status;
225};
226
227#define WLFW_IND_REGISTER_RESP_MSG_V01_MAX_MSG_LEN 18
228extern const struct qmi_elem_info wlfw_ind_register_resp_msg_v01_ei[];
229
230struct wlfw_fw_ready_ind_msg_v01 {
231 char placeholder;
232};
233
234#define WLFW_FW_READY_IND_MSG_V01_MAX_MSG_LEN 0
235extern const struct qmi_elem_info wlfw_fw_ready_ind_msg_v01_ei[];
236
237struct wlfw_msa_ready_ind_msg_v01 {
238 char placeholder;
239};
240
241#define WLFW_MSA_READY_IND_MSG_V01_MAX_MSG_LEN 0
242extern const struct qmi_elem_info wlfw_msa_ready_ind_msg_v01_ei[];
243
244struct wlfw_pin_connect_result_ind_msg_v01 {
245 u8 pwr_pin_result_valid;
246 u32 pwr_pin_result;
247 u8 phy_io_pin_result_valid;
248 u32 phy_io_pin_result;
249 u8 rf_pin_result_valid;
250 u32 rf_pin_result;
251};
252
253#define WLFW_PIN_CONNECT_RESULT_IND_MSG_V01_MAX_MSG_LEN 21
254extern const struct qmi_elem_info wlfw_pin_connect_result_ind_msg_v01_ei[];
255
256struct wlfw_wlan_mode_req_msg_v01 {
257 enum wlfw_driver_mode_enum_v01 mode;
258 u8 hw_debug_valid;
259 u8 hw_debug;
260};
261
262#define WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN 11
263extern const struct qmi_elem_info wlfw_wlan_mode_req_msg_v01_ei[];
264
265struct wlfw_wlan_mode_resp_msg_v01 {
266 struct qmi_response_type_v01 resp;
267};
268
269#define WLFW_WLAN_MODE_RESP_MSG_V01_MAX_MSG_LEN 7
270extern const struct qmi_elem_info wlfw_wlan_mode_resp_msg_v01_ei[];
271
272struct wlfw_wlan_cfg_req_msg_v01 {
273 u8 host_version_valid;
274 char host_version[QMI_WLFW_MAX_STR_LEN_V01 + 1];
275 u8 tgt_cfg_valid;
276 u32 tgt_cfg_len;
277 struct wlfw_ce_tgt_pipe_cfg_s_v01 tgt_cfg[QMI_WLFW_MAX_NUM_CE_V01];
278 u8 svc_cfg_valid;
279 u32 svc_cfg_len;
280 struct wlfw_ce_svc_pipe_cfg_s_v01 svc_cfg[QMI_WLFW_MAX_NUM_SVC_V01];
281 u8 shadow_reg_valid;
282 u32 shadow_reg_len;
283 struct wlfw_shadow_reg_cfg_s_v01 shadow_reg[QMI_WLFW_MAX_NUM_SHADOW_REG_V01];
284 u8 shadow_reg_v2_valid;
285 u32 shadow_reg_v2_len;
286 struct wlfw_shadow_reg_v2_cfg_s_v01 shadow_reg_v2[QMI_WLFW_MAX_SHADOW_REG_V2];
287};
288
289#define WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN 803
290extern const struct qmi_elem_info wlfw_wlan_cfg_req_msg_v01_ei[];
291
292struct wlfw_wlan_cfg_resp_msg_v01 {
293 struct qmi_response_type_v01 resp;
294};
295
296#define WLFW_WLAN_CFG_RESP_MSG_V01_MAX_MSG_LEN 7
297extern const struct qmi_elem_info wlfw_wlan_cfg_resp_msg_v01_ei[];
298
299struct wlfw_cap_req_msg_v01 {
300 char placeholder;
301};
302
303#define WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN 0
304extern const struct qmi_elem_info wlfw_cap_req_msg_v01_ei[];
305
306struct wlfw_cap_resp_msg_v01 {
307 struct qmi_response_type_v01 resp;
308 u8 chip_info_valid;
309 struct wlfw_rf_chip_info_s_v01 chip_info;
310 u8 board_info_valid;
311 struct wlfw_rf_board_info_s_v01 board_info;
312 u8 soc_info_valid;
313 struct wlfw_soc_info_s_v01 soc_info;
314 u8 fw_version_info_valid;
315 struct wlfw_fw_version_info_s_v01 fw_version_info;
316 u8 fw_build_id_valid;
317 char fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN_V01 + 1];
318 u8 num_macs_valid;
319 u8 num_macs;
320};
321
322#define WLFW_CAP_RESP_MSG_V01_MAX_MSG_LEN 207
323extern const struct qmi_elem_info wlfw_cap_resp_msg_v01_ei[];
324
325struct wlfw_bdf_download_req_msg_v01 {
326 u8 valid;
327 u8 file_id_valid;
328 enum wlfw_cal_temp_id_enum_v01 file_id;
329 u8 total_size_valid;
330 u32 total_size;
331 u8 seg_id_valid;
332 u32 seg_id;
333 u8 data_valid;
334 u32 data_len;
335 u8 data[QMI_WLFW_MAX_DATA_SIZE_V01];
336 u8 end_valid;
337 u8 end;
338 u8 bdf_type_valid;
339 u8 bdf_type;
340};
341
342#define WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN 6182
343extern const struct qmi_elem_info wlfw_bdf_download_req_msg_v01_ei[];
344
345struct wlfw_bdf_download_resp_msg_v01 {
346 struct qmi_response_type_v01 resp;
347};
348
349#define WLFW_BDF_DOWNLOAD_RESP_MSG_V01_MAX_MSG_LEN 7
350extern const struct qmi_elem_info wlfw_bdf_download_resp_msg_v01_ei[];
351
352struct wlfw_cal_report_req_msg_v01 {
353 u32 meta_data_len;
354 enum wlfw_cal_temp_id_enum_v01 meta_data[QMI_WLFW_MAX_NUM_CAL_V01];
355 u8 xo_cal_data_valid;
356 u8 xo_cal_data;
357};
358
359#define WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN 28
360extern const struct qmi_elem_info wlfw_cal_report_req_msg_v01_ei[];
361
362struct wlfw_cal_report_resp_msg_v01 {
363 struct qmi_response_type_v01 resp;
364};
365
366#define WLFW_CAL_REPORT_RESP_MSG_V01_MAX_MSG_LEN 7
367extern const struct qmi_elem_info wlfw_cal_report_resp_msg_v01_ei[];
368
369struct wlfw_initiate_cal_download_ind_msg_v01 {
370 enum wlfw_cal_temp_id_enum_v01 cal_id;
371};
372
373#define WLFW_INITIATE_CAL_DOWNLOAD_IND_MSG_V01_MAX_MSG_LEN 7
374extern const struct qmi_elem_info wlfw_initiate_cal_download_ind_msg_v01_ei[];
375
376struct wlfw_cal_download_req_msg_v01 {
377 u8 valid;
378 u8 file_id_valid;
379 enum wlfw_cal_temp_id_enum_v01 file_id;
380 u8 total_size_valid;
381 u32 total_size;
382 u8 seg_id_valid;
383 u32 seg_id;
384 u8 data_valid;
385 u32 data_len;
386 u8 data[QMI_WLFW_MAX_DATA_SIZE_V01];
387 u8 end_valid;
388 u8 end;
389};
390
391#define WLFW_CAL_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN 6178
392extern const struct qmi_elem_info wlfw_cal_download_req_msg_v01_ei[];
393
394struct wlfw_cal_download_resp_msg_v01 {
395 struct qmi_response_type_v01 resp;
396};
397
398#define WLFW_CAL_DOWNLOAD_RESP_MSG_V01_MAX_MSG_LEN 7
399extern const struct qmi_elem_info wlfw_cal_download_resp_msg_v01_ei[];
400
401struct wlfw_initiate_cal_update_ind_msg_v01 {
402 enum wlfw_cal_temp_id_enum_v01 cal_id;
403 u32 total_size;
404};
405
406#define WLFW_INITIATE_CAL_UPDATE_IND_MSG_V01_MAX_MSG_LEN 14
407extern const struct qmi_elem_info wlfw_initiate_cal_update_ind_msg_v01_ei[];
408
409struct wlfw_cal_update_req_msg_v01 {
410 enum wlfw_cal_temp_id_enum_v01 cal_id;
411 u32 seg_id;
412};
413
414#define WLFW_CAL_UPDATE_REQ_MSG_V01_MAX_MSG_LEN 14
415extern const struct qmi_elem_info wlfw_cal_update_req_msg_v01_ei[];
416
417struct wlfw_cal_update_resp_msg_v01 {
418 struct qmi_response_type_v01 resp;
419 u8 file_id_valid;
420 enum wlfw_cal_temp_id_enum_v01 file_id;
421 u8 total_size_valid;
422 u32 total_size;
423 u8 seg_id_valid;
424 u32 seg_id;
425 u8 data_valid;
426 u32 data_len;
427 u8 data[QMI_WLFW_MAX_DATA_SIZE_V01];
428 u8 end_valid;
429 u8 end;
430};
431
432#define WLFW_CAL_UPDATE_RESP_MSG_V01_MAX_MSG_LEN 6181
433extern const struct qmi_elem_info wlfw_cal_update_resp_msg_v01_ei[];
434
435struct wlfw_msa_info_req_msg_v01 {
436 u64 msa_addr;
437 u32 size;
438};
439
440#define WLFW_MSA_INFO_REQ_MSG_V01_MAX_MSG_LEN 18
441extern const struct qmi_elem_info wlfw_msa_info_req_msg_v01_ei[];
442
443struct wlfw_msa_info_resp_msg_v01 {
444 struct qmi_response_type_v01 resp;
445 u32 mem_region_info_len;
446 struct wlfw_memory_region_info_s_v01 mem_region_info[QMI_WLFW_MAX_MEM_REG_V01];
447};
448
449#define WLFW_MSA_INFO_RESP_MSG_V01_MAX_MSG_LEN 37
450extern const struct qmi_elem_info wlfw_msa_info_resp_msg_v01_ei[];
451
452struct wlfw_msa_ready_req_msg_v01 {
453 char placeholder;
454};
455
456#define WLFW_MSA_READY_REQ_MSG_V01_MAX_MSG_LEN 0
457extern const struct qmi_elem_info wlfw_msa_ready_req_msg_v01_ei[];
458
459struct wlfw_msa_ready_resp_msg_v01 {
460 struct qmi_response_type_v01 resp;
461};
462
463#define WLFW_MSA_READY_RESP_MSG_V01_MAX_MSG_LEN 7
464extern const struct qmi_elem_info wlfw_msa_ready_resp_msg_v01_ei[];
465
466struct wlfw_ini_req_msg_v01 {
467 u8 enablefwlog_valid;
468 u8 enablefwlog;
469};
470
471#define WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN 4
472extern const struct qmi_elem_info wlfw_ini_req_msg_v01_ei[];
473
474struct wlfw_ini_resp_msg_v01 {
475 struct qmi_response_type_v01 resp;
476};
477
478#define WLFW_INI_RESP_MSG_V01_MAX_MSG_LEN 7
479extern const struct qmi_elem_info wlfw_ini_resp_msg_v01_ei[];
480
481struct wlfw_athdiag_read_req_msg_v01 {
482 u32 offset;
483 u32 mem_type;
484 u32 data_len;
485};
486
487#define WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN 21
488extern const struct qmi_elem_info wlfw_athdiag_read_req_msg_v01_ei[];
489
490struct wlfw_athdiag_read_resp_msg_v01 {
491 struct qmi_response_type_v01 resp;
492 u8 data_valid;
493 u32 data_len;
494 u8 data[QMI_WLFW_MAX_ATHDIAG_DATA_SIZE_V01];
495};
496
497#define WLFW_ATHDIAG_READ_RESP_MSG_V01_MAX_MSG_LEN 6156
498extern const struct qmi_elem_info wlfw_athdiag_read_resp_msg_v01_ei[];
499
500struct wlfw_athdiag_write_req_msg_v01 {
501 u32 offset;
502 u32 mem_type;
503 u32 data_len;
504 u8 data[QMI_WLFW_MAX_ATHDIAG_DATA_SIZE_V01];
505};
506
507#define WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN 6163
508extern const struct qmi_elem_info wlfw_athdiag_write_req_msg_v01_ei[];
509
510struct wlfw_athdiag_write_resp_msg_v01 {
511 struct qmi_response_type_v01 resp;
512};
513
514#define WLFW_ATHDIAG_WRITE_RESP_MSG_V01_MAX_MSG_LEN 7
515extern const struct qmi_elem_info wlfw_athdiag_write_resp_msg_v01_ei[];
516
517struct wlfw_vbatt_req_msg_v01 {
518 u64 voltage_uv;
519};
520
521#define WLFW_VBATT_REQ_MSG_V01_MAX_MSG_LEN 11
522extern const struct qmi_elem_info wlfw_vbatt_req_msg_v01_ei[];
523
524struct wlfw_vbatt_resp_msg_v01 {
525 struct qmi_response_type_v01 resp;
526};
527
528#define WLFW_VBATT_RESP_MSG_V01_MAX_MSG_LEN 7
529extern const struct qmi_elem_info wlfw_vbatt_resp_msg_v01_ei[];
530
531struct wlfw_mac_addr_req_msg_v01 {
532 u8 mac_addr_valid;
533 u8 mac_addr[QMI_WLFW_MAC_ADDR_SIZE_V01];
534};
535
536#define WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN 9
537extern const struct qmi_elem_info wlfw_mac_addr_req_msg_v01_ei[];
538
539struct wlfw_mac_addr_resp_msg_v01 {
540 struct qmi_response_type_v01 resp;
541};
542
543#define WLFW_MAC_ADDR_RESP_MSG_V01_MAX_MSG_LEN 7
544extern const struct qmi_elem_info wlfw_mac_addr_resp_msg_v01_ei[];
545
546#define QMI_WLFW_MAX_NUM_GPIO_V01 32
547struct wlfw_host_cap_req_msg_v01 {
548 u8 daemon_support_valid;
549 u32 daemon_support;
550 u8 wake_msi_valid;
551 u32 wake_msi;
552 u8 gpios_valid;
553 u32 gpios_len;
554 u32 gpios[QMI_WLFW_MAX_NUM_GPIO_V01];
555 u8 nm_modem_valid;
556 u8 nm_modem;
557 u8 bdf_support_valid;
558 u8 bdf_support;
559 u8 bdf_cache_support_valid;
560 u8 bdf_cache_support;
561 u8 m3_support_valid;
562 u8 m3_support;
563 u8 m3_cache_support_valid;
564 u8 m3_cache_support;
565 u8 cal_filesys_support_valid;
566 u8 cal_filesys_support;
567 u8 cal_cache_support_valid;
568 u8 cal_cache_support;
569 u8 cal_done_valid;
570 u8 cal_done;
571 u8 mem_bucket_valid;
572 u32 mem_bucket;
573 u8 mem_cfg_mode_valid;
574 u8 mem_cfg_mode;
575};
576
577#define WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN 189
578extern const struct qmi_elem_info wlfw_host_cap_req_msg_v01_ei[];
579extern const struct qmi_elem_info wlfw_host_cap_8bit_req_msg_v01_ei[];
580
581struct wlfw_host_cap_resp_msg_v01 {
582 struct qmi_response_type_v01 resp;
583};
584
585#define WLFW_HOST_CAP_RESP_MSG_V01_MAX_MSG_LEN 7
586extern const struct qmi_elem_info wlfw_host_cap_resp_msg_v01_ei[];
587
588struct wlfw_request_mem_ind_msg_v01 {
589 u32 mem_seg_len;
590 struct wlfw_mem_seg_s_v01 mem_seg[QMI_WLFW_MAX_NUM_MEM_SEG_V01];
591};
592
593#define WLFW_REQUEST_MEM_IND_MSG_V01_MAX_MSG_LEN 564
594extern const struct qmi_elem_info wlfw_request_mem_ind_msg_v01_ei[];
595
596struct wlfw_respond_mem_req_msg_v01 {
597 u32 mem_seg_len;
598 struct wlfw_mem_seg_resp_s_v01 mem_seg[QMI_WLFW_MAX_NUM_MEM_SEG_V01];
599};
600
601#define WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN 260
602extern const struct qmi_elem_info wlfw_respond_mem_req_msg_v01_ei[];
603
604struct wlfw_respond_mem_resp_msg_v01 {
605 struct qmi_response_type_v01 resp;
606};
607
608#define WLFW_RESPOND_MEM_RESP_MSG_V01_MAX_MSG_LEN 7
609extern const struct qmi_elem_info wlfw_respond_mem_resp_msg_v01_ei[];
610
611struct wlfw_mem_ready_ind_msg_v01 {
612 char placeholder;
613};
614
615#define WLFW_MEM_READY_IND_MSG_V01_MAX_MSG_LEN 0
616extern const struct qmi_elem_info wlfw_mem_ready_ind_msg_v01_ei[];
617
618struct wlfw_fw_init_done_ind_msg_v01 {
619 char placeholder;
620};
621
622#define WLFW_FW_INIT_DONE_IND_MSG_V01_MAX_MSG_LEN 0
623extern const struct qmi_elem_info wlfw_fw_init_done_ind_msg_v01_ei[];
624
625struct wlfw_rejuvenate_ind_msg_v01 {
626 u8 cause_for_rejuvenation_valid;
627 u8 cause_for_rejuvenation;
628 u8 requesting_sub_system_valid;
629 u8 requesting_sub_system;
630 u8 line_number_valid;
631 u16 line_number;
632 u8 function_name_valid;
633 char function_name[QMI_WLFW_FUNCTION_NAME_LEN_V01 + 1];
634};
635
636#define WLFW_REJUVENATE_IND_MSG_V01_MAX_MSG_LEN 144
637extern const struct qmi_elem_info wlfw_rejuvenate_ind_msg_v01_ei[];
638
639struct wlfw_rejuvenate_ack_req_msg_v01 {
640 char placeholder;
641};
642
643#define WLFW_REJUVENATE_ACK_REQ_MSG_V01_MAX_MSG_LEN 0
644extern const struct qmi_elem_info wlfw_rejuvenate_ack_req_msg_v01_ei[];
645
646struct wlfw_rejuvenate_ack_resp_msg_v01 {
647 struct qmi_response_type_v01 resp;
648};
649
650#define WLFW_REJUVENATE_ACK_RESP_MSG_V01_MAX_MSG_LEN 7
651extern const struct qmi_elem_info wlfw_rejuvenate_ack_resp_msg_v01_ei[];
652
653struct wlfw_dynamic_feature_mask_req_msg_v01 {
654 u8 mask_valid;
655 u64 mask;
656};
657
658#define WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN 11
659extern const struct qmi_elem_info wlfw_dynamic_feature_mask_req_msg_v01_ei[];
660
661struct wlfw_dynamic_feature_mask_resp_msg_v01 {
662 struct qmi_response_type_v01 resp;
663 u8 prev_mask_valid;
664 u64 prev_mask;
665 u8 curr_mask_valid;
666 u64 curr_mask;
667};
668
669#define WLFW_DYNAMIC_FEATURE_MASK_RESP_MSG_V01_MAX_MSG_LEN 29
670extern const struct qmi_elem_info wlfw_dynamic_feature_mask_resp_msg_v01_ei[];
671
672struct wlfw_m3_info_req_msg_v01 {
673 u64 addr;
674 u32 size;
675};
676
677#define WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN 18
678extern const struct qmi_elem_info wlfw_m3_info_req_msg_v01_ei[];
679
680struct wlfw_m3_info_resp_msg_v01 {
681 struct qmi_response_type_v01 resp;
682};
683
684#define WLFW_M3_INFO_RESP_MSG_V01_MAX_MSG_LEN 7
685extern const struct qmi_elem_info wlfw_m3_info_resp_msg_v01_ei[];
686
687struct wlfw_xo_cal_ind_msg_v01 {
688 u8 xo_cal_data;
689};
690
691#define WLFW_XO_CAL_IND_MSG_V01_MAX_MSG_LEN 4
692extern const struct qmi_elem_info wlfw_xo_cal_ind_msg_v01_ei[];
693
694#endif
695

source code of linux/drivers/net/wireless/ath/ath10k/qmi_wlfw_v01.h