1	/* SPDX-License-Identifier: BSD-3-Clause-Clear */
2	/*
3	* Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4	* Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
5	*/
6
7	#ifndef ATH12K_WMI_H
8	#define ATH12K_WMI_H
9
10	#include <net/mac80211.h>
11	#include "htc.h"
12
13	/* Naming conventions for structures:
14	*
15	* _cmd means that this is a firmware command sent from host to firmware.
16	*
17	* _event means that this is a firmware event sent from firmware to host
18	*
19	* _params is a structure which is embedded either into _cmd or _event (or
20	* both), it is not sent individually.
21	*
22	* _arg is used inside the host, the firmware does not see that at all.
23	*/
24
25	struct ath12k_base;
26	struct ath12k;
27
28	/* There is no signed version of __le32, so for a temporary solution come
29	* up with our own version. The idea is from fs/ntfs/endian.h.
30	*
31	* Use a_ prefix so that it doesn't conflict if we get proper support to
32	* linux/types.h.
33	*/
34	typedef __s32 __bitwise a_sle32;
35
36	static inline a_sle32 a_cpu_to_sle32(s32 val)
37	{
38	return (__force a_sle32)cpu_to_le32(val);
39	}
40
41	static inline s32 a_sle32_to_cpu(a_sle32 val)
42	{
43	return le32_to_cpu((__force __le32)val);
44	}
45
46	/* defines to set Packet extension values which can be 0 us, 8 usec or 16 usec */
47	#define MAX_HE_NSS 8
48	#define MAX_HE_MODULATION 8
49	#define MAX_HE_RU 4
50	#define HE_MODULATION_NONE 7
51	#define HE_PET_0_USEC 0
52	#define HE_PET_8_USEC 1
53	#define HE_PET_16_USEC 2
54
55	#define WMI_MAX_CHAINS 8
56
57	#define WMI_MAX_NUM_SS MAX_HE_NSS
58	#define WMI_MAX_NUM_RU MAX_HE_RU
59
60	#define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1)
61	#define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1)
62	#define WMI_TLV_CMD_UNSUPPORTED 0
63	#define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0
64	#define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0
65
66	struct wmi_cmd_hdr {
67	__le32 cmd_id;
68	} __packed;
69
70	struct wmi_tlv {
71	__le32 header;
72	u8 value[];
73	} __packed;
74
75	#define WMI_TLV_LEN GENMASK(15, 0)
76	#define WMI_TLV_TAG GENMASK(31, 16)
77	#define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header)
78
79	#define WMI_CMD_HDR_CMD_ID GENMASK(23, 0)
80	#define WMI_MAX_MEM_REQS 32
81	#define ATH12K_MAX_HW_LISTEN_INTERVAL 5
82
83	#define WMI_HOST_RC_DS_FLAG 0x01
84	#define WMI_HOST_RC_CW40_FLAG 0x02
85	#define WMI_HOST_RC_SGI_FLAG 0x04
86	#define WMI_HOST_RC_HT_FLAG 0x08
87	#define WMI_HOST_RC_RTSCTS_FLAG 0x10
88	#define WMI_HOST_RC_TX_STBC_FLAG 0x20
89	#define WMI_HOST_RC_RX_STBC_FLAG 0xC0
90	#define WMI_HOST_RC_RX_STBC_FLAG_S 6
91	#define WMI_HOST_RC_WEP_TKIP_FLAG 0x100
92	#define WMI_HOST_RC_TS_FLAG 0x200
93	#define WMI_HOST_RC_UAPSD_FLAG 0x400
94
95	#define WMI_HT_CAP_ENABLED 0x0001
96	#define WMI_HT_CAP_HT20_SGI 0x0002
97	#define WMI_HT_CAP_DYNAMIC_SMPS 0x0004
98	#define WMI_HT_CAP_TX_STBC 0x0008
99	#define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3
100	#define WMI_HT_CAP_RX_STBC 0x0030
101	#define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4
102	#define WMI_HT_CAP_LDPC 0x0040
103	#define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080
104	#define WMI_HT_CAP_MPDU_DENSITY 0x0700
105	#define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8
106	#define WMI_HT_CAP_HT40_SGI 0x0800
107	#define WMI_HT_CAP_RX_LDPC 0x1000
108	#define WMI_HT_CAP_TX_LDPC 0x2000
109	#define WMI_HT_CAP_IBF_BFER 0x4000
110
111	/* These macros should be used when we wish to advertise STBC support for
112	* only 1SS or 2SS or 3SS.
113	*/
114	#define WMI_HT_CAP_RX_STBC_1SS 0x0010
115	#define WMI_HT_CAP_RX_STBC_2SS 0x0020
116	#define WMI_HT_CAP_RX_STBC_3SS 0x0030
117
118	#define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \
119	WMI_HT_CAP_HT20_SGI | \
120	WMI_HT_CAP_HT40_SGI | \
121	WMI_HT_CAP_TX_STBC | \
122	WMI_HT_CAP_RX_STBC | \
123	WMI_HT_CAP_LDPC)
124
125	#define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003
126	#define WMI_VHT_CAP_RX_LDPC 0x00000010
127	#define WMI_VHT_CAP_SGI_80MHZ 0x00000020
128	#define WMI_VHT_CAP_SGI_160MHZ 0x00000040
129	#define WMI_VHT_CAP_TX_STBC 0x00000080
130	#define WMI_VHT_CAP_RX_STBC_MASK 0x00000300
131	#define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8
132	#define WMI_VHT_CAP_SU_BFER 0x00000800
133	#define WMI_VHT_CAP_SU_BFEE 0x00001000
134	#define WMI_VHT_CAP_MAX_CS_ANT_MASK 0x0000E000
135	#define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT 13
136	#define WMI_VHT_CAP_MAX_SND_DIM_MASK 0x00070000
137	#define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT 16
138	#define WMI_VHT_CAP_MU_BFER 0x00080000
139	#define WMI_VHT_CAP_MU_BFEE 0x00100000
140	#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000
141	#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIT 23
142	#define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000
143	#define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000
144
145	#define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002
146
147	/* These macros should be used when we wish to advertise STBC support for
148	* only 1SS or 2SS or 3SS.
149	*/
150	#define WMI_VHT_CAP_RX_STBC_1SS 0x00000100
151	#define WMI_VHT_CAP_RX_STBC_2SS 0x00000200
152	#define WMI_VHT_CAP_RX_STBC_3SS 0x00000300
153
154	#define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \
155	WMI_VHT_CAP_SGI_80MHZ | \
156	WMI_VHT_CAP_TX_STBC | \
157	WMI_VHT_CAP_RX_STBC_MASK | \
158	WMI_VHT_CAP_RX_LDPC | \
159	WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \
160	WMI_VHT_CAP_RX_FIXED_ANT | \
161	WMI_VHT_CAP_TX_FIXED_ANT)
162
163	#define WLAN_SCAN_MAX_HINT_S_SSID 10
164	#define WLAN_SCAN_MAX_HINT_BSSID 10
165	#define MAX_RNR_BSS 5
166
167	#define WLAN_SCAN_MAX_HINT_S_SSID 10
168	#define WLAN_SCAN_MAX_HINT_BSSID 10
169	#define MAX_RNR_BSS 5
170
171	#define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1
172
173	#define WMI_BA_MODE_BUFFER_SIZE_256 3
174
175	/* HW mode config type replicated from FW header
176	* @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active.
177	* @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands,
178	* one in 2G and another in 5G.
179	* @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in
180	* same band; no tx allowed.
181	* @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band.
182	* Support for both PHYs within one band is planned
183	* for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES),
184	* but could be extended to other bands in the future.
185	* The separation of the band between the two PHYs needs
186	* to be communicated separately.
187	* @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS
188	* as in WMI_HW_MODE_SBS, and 3rd on the other band
189	* @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and
190	* 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G).
191	* @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode.
192	*/
193	enum wmi_host_hw_mode_config_type {
194	WMI_HOST_HW_MODE_SINGLE = 0,
195	WMI_HOST_HW_MODE_DBS = 1,
196	WMI_HOST_HW_MODE_SBS_PASSIVE = 2,
197	WMI_HOST_HW_MODE_SBS = 3,
198	WMI_HOST_HW_MODE_DBS_SBS = 4,
199	WMI_HOST_HW_MODE_DBS_OR_SBS = 5,
200
201	/* keep last */
202	WMI_HOST_HW_MODE_MAX
203	};
204
205	/* HW mode priority values used to detect the preferred HW mode
206	* on the available modes.
207	*/
208	enum wmi_host_hw_mode_priority {
209	WMI_HOST_HW_MODE_DBS_SBS_PRI,
210	WMI_HOST_HW_MODE_DBS_PRI,
211	WMI_HOST_HW_MODE_DBS_OR_SBS_PRI,
212	WMI_HOST_HW_MODE_SBS_PRI,
213	WMI_HOST_HW_MODE_SBS_PASSIVE_PRI,
214	WMI_HOST_HW_MODE_SINGLE_PRI,
215
216	/* keep last the lowest priority */
217	WMI_HOST_HW_MODE_MAX_PRI
218	};
219
220	enum WMI_HOST_WLAN_BAND {
221	WMI_HOST_WLAN_2G_CAP = 1,
222	WMI_HOST_WLAN_5G_CAP = 2,
223	WMI_HOST_WLAN_2G_5G_CAP = 3,
224	};
225
226	enum wmi_cmd_group {
227	/* 0 to 2 are reserved */
228	WMI_GRP_START = 0x3,
229	WMI_GRP_SCAN = WMI_GRP_START,
230	WMI_GRP_PDEV = 0x4,
231	WMI_GRP_VDEV = 0x5,
232	WMI_GRP_PEER = 0x6,
233	WMI_GRP_MGMT = 0x7,
234	WMI_GRP_BA_NEG = 0x8,
235	WMI_GRP_STA_PS = 0x9,
236	WMI_GRP_DFS = 0xa,
237	WMI_GRP_ROAM = 0xb,
238	WMI_GRP_OFL_SCAN = 0xc,
239	WMI_GRP_P2P = 0xd,
240	WMI_GRP_AP_PS = 0xe,
241	WMI_GRP_RATE_CTRL = 0xf,
242	WMI_GRP_PROFILE = 0x10,
243	WMI_GRP_SUSPEND = 0x11,
244	WMI_GRP_BCN_FILTER = 0x12,
245	WMI_GRP_WOW = 0x13,
246	WMI_GRP_RTT = 0x14,
247	WMI_GRP_SPECTRAL = 0x15,
248	WMI_GRP_STATS = 0x16,
249	WMI_GRP_ARP_NS_OFL = 0x17,
250	WMI_GRP_NLO_OFL = 0x18,
251	WMI_GRP_GTK_OFL = 0x19,
252	WMI_GRP_CSA_OFL = 0x1a,
253	WMI_GRP_CHATTER = 0x1b,
254	WMI_GRP_TID_ADDBA = 0x1c,
255	WMI_GRP_MISC = 0x1d,
256	WMI_GRP_GPIO = 0x1e,
257	WMI_GRP_FWTEST = 0x1f,
258	WMI_GRP_TDLS = 0x20,
259	WMI_GRP_RESMGR = 0x21,
260	WMI_GRP_STA_SMPS = 0x22,
261	WMI_GRP_WLAN_HB = 0x23,
262	WMI_GRP_RMC = 0x24,
263	WMI_GRP_MHF_OFL = 0x25,
264	WMI_GRP_LOCATION_SCAN = 0x26,
265	WMI_GRP_OEM = 0x27,
266	WMI_GRP_NAN = 0x28,
267	WMI_GRP_COEX = 0x29,
268	WMI_GRP_OBSS_OFL = 0x2a,
269	WMI_GRP_LPI = 0x2b,
270	WMI_GRP_EXTSCAN = 0x2c,
271	WMI_GRP_DHCP_OFL = 0x2d,
272	WMI_GRP_IPA = 0x2e,
273	WMI_GRP_MDNS_OFL = 0x2f,
274	WMI_GRP_SAP_OFL = 0x30,
275	WMI_GRP_OCB = 0x31,
276	WMI_GRP_SOC = 0x32,
277	WMI_GRP_PKT_FILTER = 0x33,
278	WMI_GRP_MAWC = 0x34,
279	WMI_GRP_PMF_OFFLOAD = 0x35,
280	WMI_GRP_BPF_OFFLOAD = 0x36,
281	WMI_GRP_NAN_DATA = 0x37,
282	WMI_GRP_PROTOTYPE = 0x38,
283	WMI_GRP_MONITOR = 0x39,
284	WMI_GRP_REGULATORY = 0x3a,
285	WMI_GRP_HW_DATA_FILTER = 0x3b,
286	WMI_GRP_WLM = 0x3c,
287	WMI_GRP_11K_OFFLOAD = 0x3d,
288	WMI_GRP_TWT = 0x3e,
289	WMI_GRP_MOTION_DET = 0x3f,
290	WMI_GRP_SPATIAL_REUSE = 0x40,
291	};
292
293	#define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
294	#define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
295
296	enum wmi_tlv_cmd_id {
297	WMI_CMD_UNSUPPORTED = 0,
298	WMI_INIT_CMDID = 0x1,
299	WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN),
300	WMI_STOP_SCAN_CMDID,
301	WMI_SCAN_CHAN_LIST_CMDID,
302	WMI_SCAN_SCH_PRIO_TBL_CMDID,
303	WMI_SCAN_UPDATE_REQUEST_CMDID,
304	WMI_SCAN_PROB_REQ_OUI_CMDID,
305	WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID,
306	WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV),
307	WMI_PDEV_SET_CHANNEL_CMDID,
308	WMI_PDEV_SET_PARAM_CMDID,
309	WMI_PDEV_PKTLOG_ENABLE_CMDID,
310	WMI_PDEV_PKTLOG_DISABLE_CMDID,
311	WMI_PDEV_SET_WMM_PARAMS_CMDID,
312	WMI_PDEV_SET_HT_CAP_IE_CMDID,
313	WMI_PDEV_SET_VHT_CAP_IE_CMDID,
314	WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
315	WMI_PDEV_SET_QUIET_MODE_CMDID,
316	WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
317	WMI_PDEV_GET_TPC_CONFIG_CMDID,
318	WMI_PDEV_SET_BASE_MACADDR_CMDID,
319	WMI_PDEV_DUMP_CMDID,
320	WMI_PDEV_SET_LED_CONFIG_CMDID,
321	WMI_PDEV_GET_TEMPERATURE_CMDID,
322	WMI_PDEV_SET_LED_FLASHING_CMDID,
323	WMI_PDEV_SMART_ANT_ENABLE_CMDID,
324	WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
325	WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
326	WMI_PDEV_SET_CTL_TABLE_CMDID,
327	WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID,
328	WMI_PDEV_FIPS_CMDID,
329	WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID,
330	WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
331	WMI_PDEV_GET_NFCAL_POWER_CMDID,
332	WMI_PDEV_GET_TPC_CMDID,
333	WMI_MIB_STATS_ENABLE_CMDID,
334	WMI_PDEV_SET_PCL_CMDID,
335	WMI_PDEV_SET_HW_MODE_CMDID,
336	WMI_PDEV_SET_MAC_CONFIG_CMDID,
337	WMI_PDEV_SET_ANTENNA_MODE_CMDID,
338	WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID,
339	WMI_PDEV_WAL_POWER_DEBUG_CMDID,
340	WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID,
341	WMI_PDEV_SET_WAKEUP_CONFIG_CMDID,
342	WMI_PDEV_GET_ANTDIV_STATUS_CMDID,
343	WMI_PDEV_GET_CHIP_POWER_STATS_CMDID,
344	WMI_PDEV_SET_STATS_THRESHOLD_CMDID,
345	WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID,
346	WMI_PDEV_UPDATE_PKT_ROUTING_CMDID,
347	WMI_PDEV_CHECK_CAL_VERSION_CMDID,
348	WMI_PDEV_SET_DIVERSITY_GAIN_CMDID,
349	WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID,
350	WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
351	WMI_PDEV_UPDATE_PMK_CACHE_CMDID,
352	WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID,
353	WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID,
354	WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID,
355	WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID,
356	WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID,
357	WMI_PDEV_DMA_RING_CFG_REQ_CMDID,
358	WMI_PDEV_HE_TB_ACTION_FRM_CMDID,
359	WMI_PDEV_PKTLOG_FILTER_CMDID,
360	WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV),
361	WMI_VDEV_DELETE_CMDID,
362	WMI_VDEV_START_REQUEST_CMDID,
363	WMI_VDEV_RESTART_REQUEST_CMDID,
364	WMI_VDEV_UP_CMDID,
365	WMI_VDEV_STOP_CMDID,
366	WMI_VDEV_DOWN_CMDID,
367	WMI_VDEV_SET_PARAM_CMDID,
368	WMI_VDEV_INSTALL_KEY_CMDID,
369	WMI_VDEV_WNM_SLEEPMODE_CMDID,
370	WMI_VDEV_WMM_ADDTS_CMDID,
371	WMI_VDEV_WMM_DELTS_CMDID,
372	WMI_VDEV_SET_WMM_PARAMS_CMDID,
373	WMI_VDEV_SET_GTX_PARAMS_CMDID,
374	WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID,
375	WMI_VDEV_PLMREQ_START_CMDID,
376	WMI_VDEV_PLMREQ_STOP_CMDID,
377	WMI_VDEV_TSF_TSTAMP_ACTION_CMDID,
378	WMI_VDEV_SET_IE_CMDID,
379	WMI_VDEV_RATEMASK_CMDID,
380	WMI_VDEV_ATF_REQUEST_CMDID,
381	WMI_VDEV_SET_DSCP_TID_MAP_CMDID,
382	WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
383	WMI_VDEV_SET_QUIET_MODE_CMDID,
384	WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID,
385	WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID,
386	WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID,
387	WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER),
388	WMI_PEER_DELETE_CMDID,
389	WMI_PEER_FLUSH_TIDS_CMDID,
390	WMI_PEER_SET_PARAM_CMDID,
391	WMI_PEER_ASSOC_CMDID,
392	WMI_PEER_ADD_WDS_ENTRY_CMDID,
393	WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
394	WMI_PEER_MCAST_GROUP_CMDID,
395	WMI_PEER_INFO_REQ_CMDID,
396	WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID,
397	WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID,
398	WMI_PEER_UPDATE_WDS_ENTRY_CMDID,
399	WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID,
400	WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
401	WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
402	WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
403	WMI_PEER_ATF_REQUEST_CMDID,
404	WMI_PEER_BWF_REQUEST_CMDID,
405	WMI_PEER_REORDER_QUEUE_SETUP_CMDID,
406	WMI_PEER_REORDER_QUEUE_REMOVE_CMDID,
407	WMI_PEER_SET_RX_BLOCKSIZE_CMDID,
408	WMI_PEER_ANTDIV_INFO_REQ_CMDID,
409	WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT),
410	WMI_PDEV_SEND_BCN_CMDID,
411	WMI_BCN_TMPL_CMDID,
412	WMI_BCN_FILTER_RX_CMDID,
413	WMI_PRB_REQ_FILTER_RX_CMDID,
414	WMI_MGMT_TX_CMDID,
415	WMI_PRB_TMPL_CMDID,
416	WMI_MGMT_TX_SEND_CMDID,
417	WMI_OFFCHAN_DATA_TX_SEND_CMDID,
418	WMI_PDEV_SEND_FD_CMDID,
419	WMI_BCN_OFFLOAD_CTRL_CMDID,
420	WMI_BSS_COLOR_CHANGE_ENABLE_CMDID,
421	WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID,
422	WMI_FILS_DISCOVERY_TMPL_CMDID,
423	WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
424	WMI_ADDBA_SEND_CMDID,
425	WMI_ADDBA_STATUS_CMDID,
426	WMI_DELBA_SEND_CMDID,
427	WMI_ADDBA_SET_RESP_CMDID,
428	WMI_SEND_SINGLEAMSDU_CMDID,
429	WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS),
430	WMI_STA_POWERSAVE_PARAM_CMDID,
431	WMI_STA_MIMO_PS_MODE_CMDID,
432	WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS),
433	WMI_PDEV_DFS_DISABLE_CMDID,
434	WMI_DFS_PHYERR_FILTER_ENA_CMDID,
435	WMI_DFS_PHYERR_FILTER_DIS_CMDID,
436	WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID,
437	WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID,
438	WMI_VDEV_ADFS_CH_CFG_CMDID,
439	WMI_VDEV_ADFS_OCAC_ABORT_CMDID,
440	WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM),
441	WMI_ROAM_SCAN_RSSI_THRESHOLD,
442	WMI_ROAM_SCAN_PERIOD,
443	WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
444	WMI_ROAM_AP_PROFILE,
445	WMI_ROAM_CHAN_LIST,
446	WMI_ROAM_SCAN_CMD,
447	WMI_ROAM_SYNCH_COMPLETE,
448	WMI_ROAM_SET_RIC_REQUEST_CMDID,
449	WMI_ROAM_INVOKE_CMDID,
450	WMI_ROAM_FILTER_CMDID,
451	WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID,
452	WMI_ROAM_CONFIGURE_MAWC_CMDID,
453	WMI_ROAM_SET_MBO_PARAM_CMDID,
454	WMI_ROAM_PER_CONFIG_CMDID,
455	WMI_ROAM_BTM_CONFIG_CMDID,
456	WMI_ENABLE_FILS_CMDID,
457	WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN),
458	WMI_OFL_SCAN_REMOVE_AP_PROFILE,
459	WMI_OFL_SCAN_PERIOD,
460	WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P),
461	WMI_P2P_DEV_SET_DISCOVERABILITY,
462	WMI_P2P_GO_SET_BEACON_IE,
463	WMI_P2P_GO_SET_PROBE_RESP_IE,
464	WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
465	WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID,
466	WMI_P2P_DISC_OFFLOAD_APPIE_CMDID,
467	WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID,
468	WMI_P2P_SET_OPPPS_PARAM_CMDID,
469	WMI_P2P_LISTEN_OFFLOAD_START_CMDID,
470	WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID,
471	WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS),
472	WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
473	WMI_AP_PS_EGAP_PARAM_CMDID,
474	WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL),
475	WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE),
476	WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
477	WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
478	WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
479	WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
480	WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
481	WMI_PDEV_RESUME_CMDID,
482	WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER),
483	WMI_RMV_BCN_FILTER_CMDID,
484	WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW),
485	WMI_WOW_DEL_WAKE_PATTERN_CMDID,
486	WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
487	WMI_WOW_ENABLE_CMDID,
488	WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
489	WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID,
490	WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID,
491	WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID,
492	WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID,
493	WMI_D0_WOW_ENABLE_DISABLE_CMDID,
494	WMI_EXTWOW_ENABLE_CMDID,
495	WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID,
496	WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID,
497	WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID,
498	WMI_WOW_UDP_SVC_OFLD_CMDID,
499	WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID,
500	WMI_WOW_SET_ACTION_WAKE_UP_CMDID,
501	WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT),
502	WMI_RTT_TSF_CMDID,
503	WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL),
504	WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
505	WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS),
506	WMI_MCC_SCHED_TRAFFIC_STATS_CMDID,
507	WMI_REQUEST_STATS_EXT_CMDID,
508	WMI_REQUEST_LINK_STATS_CMDID,
509	WMI_START_LINK_STATS_CMDID,
510	WMI_CLEAR_LINK_STATS_CMDID,
511	WMI_GET_FW_MEM_DUMP_CMDID,
512	WMI_DEBUG_MESG_FLUSH_CMDID,
513	WMI_DIAG_EVENT_LOG_CONFIG_CMDID,
514	WMI_REQUEST_WLAN_STATS_CMDID,
515	WMI_REQUEST_RCPI_CMDID,
516	WMI_REQUEST_PEER_STATS_INFO_CMDID,
517	WMI_REQUEST_RADIO_CHAN_STATS_CMDID,
518	WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL),
519	WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID,
520	WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID,
521	WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
522	WMI_APFIND_CMDID,
523	WMI_PASSPOINT_LIST_CONFIG_CMDID,
524	WMI_NLO_CONFIGURE_MAWC_CMDID,
525	WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
526	WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
527	WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
528	WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER),
529	WMI_CHATTER_ADD_COALESCING_FILTER_CMDID,
530	WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID,
531	WMI_CHATTER_COALESCING_QUERY_CMDID,
532	WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA),
533	WMI_PEER_TID_DELBA_CMDID,
534	WMI_STA_DTIM_PS_METHOD_CMDID,
535	WMI_STA_UAPSD_AUTO_TRIG_CMDID,
536	WMI_STA_KEEPALIVE_CMDID,
537	WMI_BA_REQ_SSN_CMDID,
538	WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC),
539	WMI_PDEV_UTF_CMDID,
540	WMI_DBGLOG_CFG_CMDID,
541	WMI_PDEV_QVIT_CMDID,
542	WMI_PDEV_FTM_INTG_CMDID,
543	WMI_VDEV_SET_KEEPALIVE_CMDID,
544	WMI_VDEV_GET_KEEPALIVE_CMDID,
545	WMI_FORCE_FW_HANG_CMDID,
546	WMI_SET_MCASTBCAST_FILTER_CMDID,
547	WMI_THERMAL_MGMT_CMDID,
548	WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID,
549	WMI_TPC_CHAINMASK_CONFIG_CMDID,
550	WMI_SET_ANTENNA_DIVERSITY_CMDID,
551	WMI_OCB_SET_SCHED_CMDID,
552	WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID,
553	WMI_LRO_CONFIG_CMDID,
554	WMI_TRANSFER_DATA_TO_FLASH_CMDID,
555	WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID,
556	WMI_VDEV_WISA_CMDID,
557	WMI_DBGLOG_TIME_STAMP_SYNC_CMDID,
558	WMI_SET_MULTIPLE_MCAST_FILTER_CMDID,
559	WMI_READ_DATA_FROM_FLASH_CMDID,
560	WMI_THERM_THROT_SET_CONF_CMDID,
561	WMI_RUNTIME_DPD_RECAL_CMDID,
562	WMI_GET_TPC_POWER_CMDID,
563	WMI_IDLE_TRIGGER_MONITOR_CMDID,
564	WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO),
565	WMI_GPIO_OUTPUT_CMDID,
566	WMI_TXBF_CMDID,
567	WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST),
568	WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID,
569	WMI_UNIT_TEST_CMDID,
570	WMI_FWTEST_CMDID,
571	WMI_QBOOST_CFG_CMDID,
572	WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS),
573	WMI_TDLS_PEER_UPDATE_CMDID,
574	WMI_TDLS_SET_OFFCHAN_MODE_CMDID,
575	WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR),
576	WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID,
577	WMI_RESMGR_SET_CHAN_LATENCY_CMDID,
578	WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
579	WMI_STA_SMPS_PARAM_CMDID,
580	WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB),
581	WMI_HB_SET_TCP_PARAMS_CMDID,
582	WMI_HB_SET_TCP_PKT_FILTER_CMDID,
583	WMI_HB_SET_UDP_PARAMS_CMDID,
584	WMI_HB_SET_UDP_PKT_FILTER_CMDID,
585	WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC),
586	WMI_RMC_SET_ACTION_PERIOD_CMDID,
587	WMI_RMC_CONFIG_CMDID,
588	WMI_RMC_SET_MANUAL_LEADER_CMDID,
589	WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL),
590	WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID,
591	WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
592	WMI_BATCH_SCAN_DISABLE_CMDID,
593	WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID,
594	WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM),
595	WMI_OEM_REQUEST_CMDID,
596	WMI_LPI_OEM_REQ_CMDID,
597	WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN),
598	WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX),
599	WMI_CHAN_AVOID_UPDATE_CMDID,
600	WMI_COEX_CONFIG_CMDID,
601	WMI_CHAN_AVOID_RPT_ALLOW_CMDID,
602	WMI_COEX_GET_ANTENNA_ISOLATION_CMDID,
603	WMI_SAR_LIMITS_CMDID,
604	WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL),
605	WMI_OBSS_SCAN_DISABLE_CMDID,
606	WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID,
607	WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI),
608	WMI_LPI_START_SCAN_CMDID,
609	WMI_LPI_STOP_SCAN_CMDID,
610	WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
611	WMI_EXTSCAN_STOP_CMDID,
612	WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID,
613	WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID,
614	WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID,
615	WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID,
616	WMI_EXTSCAN_SET_CAPABILITIES_CMDID,
617	WMI_EXTSCAN_GET_CAPABILITIES_CMDID,
618	WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID,
619	WMI_EXTSCAN_CONFIGURE_MAWC_CMDID,
620	WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL),
621	WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA),
622	WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
623	WMI_MDNS_SET_FQDN_CMDID,
624	WMI_MDNS_SET_RESPONSE_CMDID,
625	WMI_MDNS_GET_STATS_CMDID,
626	WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
627	WMI_SAP_SET_BLACKLIST_PARAM_CMDID,
628	WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB),
629	WMI_OCB_SET_UTC_TIME_CMDID,
630	WMI_OCB_START_TIMING_ADVERT_CMDID,
631	WMI_OCB_STOP_TIMING_ADVERT_CMDID,
632	WMI_OCB_GET_TSF_TIMER_CMDID,
633	WMI_DCC_GET_STATS_CMDID,
634	WMI_DCC_CLEAR_STATS_CMDID,
635	WMI_DCC_UPDATE_NDL_CMDID,
636	WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC),
637	WMI_SOC_SET_HW_MODE_CMDID,
638	WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID,
639	WMI_SOC_SET_ANTENNA_MODE_CMDID,
640	WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER),
641	WMI_PACKET_FILTER_ENABLE_CMDID,
642	WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC),
643	WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD),
644	WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
645	WMI_BPF_GET_VDEV_STATS_CMDID,
646	WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID,
647	WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID,
648	WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID,
649	WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR),
650	WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
651	WMI_11D_SCAN_START_CMDID,
652	WMI_11D_SCAN_STOP_CMDID,
653	WMI_SET_INIT_COUNTRY_CMDID,
654	WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
655	WMI_NDP_INITIATOR_REQ_CMDID,
656	WMI_NDP_RESPONDER_REQ_CMDID,
657	WMI_NDP_END_REQ_CMDID,
658	WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER),
659	WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT),
660	WMI_TWT_DISABLE_CMDID,
661	WMI_TWT_ADD_DIALOG_CMDID,
662	WMI_TWT_DEL_DIALOG_CMDID,
663	WMI_TWT_PAUSE_DIALOG_CMDID,
664	WMI_TWT_RESUME_DIALOG_CMDID,
665	WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID =
666	WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE),
667	WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID,
668	};
669
670	enum wmi_tlv_event_id {
671	WMI_SERVICE_READY_EVENTID = 0x1,
672	WMI_READY_EVENTID,
673	WMI_SERVICE_AVAILABLE_EVENTID,
674	WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
675	WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV),
676	WMI_CHAN_INFO_EVENTID,
677	WMI_PHYERR_EVENTID,
678	WMI_PDEV_DUMP_EVENTID,
679	WMI_TX_PAUSE_EVENTID,
680	WMI_DFS_RADAR_EVENTID,
681	WMI_PDEV_L1SS_TRACK_EVENTID,
682	WMI_PDEV_TEMPERATURE_EVENTID,
683	WMI_SERVICE_READY_EXT_EVENTID,
684	WMI_PDEV_FIPS_EVENTID,
685	WMI_PDEV_CHANNEL_HOPPING_EVENTID,
686	WMI_PDEV_ANI_CCK_LEVEL_EVENTID,
687	WMI_PDEV_ANI_OFDM_LEVEL_EVENTID,
688	WMI_PDEV_TPC_EVENTID,
689	WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
690	WMI_PDEV_SET_HW_MODE_RESP_EVENTID,
691	WMI_PDEV_HW_MODE_TRANSITION_EVENTID,
692	WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID,
693	WMI_PDEV_ANTDIV_STATUS_EVENTID,
694	WMI_PDEV_CHIP_POWER_STATS_EVENTID,
695	WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID,
696	WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID,
697	WMI_PDEV_CHECK_CAL_VERSION_EVENTID,
698	WMI_PDEV_DIV_RSSI_ANTID_EVENTID,
699	WMI_PDEV_BSS_CHAN_INFO_EVENTID,
700	WMI_PDEV_UPDATE_CTLTABLE_EVENTID,
701	WMI_PDEV_DMA_RING_CFG_RSP_EVENTID,
702	WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID,
703	WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID,
704	WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID,
705	WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID,
706	WMI_PDEV_RAP_INFO_EVENTID,
707	WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID,
708	WMI_SERVICE_READY_EXT2_EVENTID,
709	WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV),
710	WMI_VDEV_STOPPED_EVENTID,
711	WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
712	WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID,
713	WMI_VDEV_TSF_REPORT_EVENTID,
714	WMI_VDEV_DELETE_RESP_EVENTID,
715	WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID,
716	WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID,
717	WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER),
718	WMI_PEER_INFO_EVENTID,
719	WMI_PEER_TX_FAIL_CNT_THR_EVENTID,
720	WMI_PEER_ESTIMATED_LINKSPEED_EVENTID,
721	WMI_PEER_STATE_EVENTID,
722	WMI_PEER_ASSOC_CONF_EVENTID,
723	WMI_PEER_DELETE_RESP_EVENTID,
724	WMI_PEER_RATECODE_LIST_EVENTID,
725	WMI_WDS_PEER_EVENTID,
726	WMI_PEER_STA_PS_STATECHG_EVENTID,
727	WMI_PEER_ANTDIV_INFO_EVENTID,
728	WMI_PEER_RESERVED0_EVENTID,
729	WMI_PEER_RESERVED1_EVENTID,
730	WMI_PEER_RESERVED2_EVENTID,
731	WMI_PEER_RESERVED3_EVENTID,
732	WMI_PEER_RESERVED4_EVENTID,
733	WMI_PEER_RESERVED5_EVENTID,
734	WMI_PEER_RESERVED6_EVENTID,
735	WMI_PEER_RESERVED7_EVENTID,
736	WMI_PEER_RESERVED8_EVENTID,
737	WMI_PEER_RESERVED9_EVENTID,
738	WMI_PEER_RESERVED10_EVENTID,
739	WMI_PEER_OPER_MODE_CHANGE_EVENTID,
740	WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT),
741	WMI_HOST_SWBA_EVENTID,
742	WMI_TBTTOFFSET_UPDATE_EVENTID,
743	WMI_OFFLOAD_BCN_TX_STATUS_EVENTID,
744	WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID,
745	WMI_MGMT_TX_COMPLETION_EVENTID,
746	WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID,
747	WMI_TBTTOFFSET_EXT_UPDATE_EVENTID,
748	WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID,
749	WMI_HOST_FILS_DISCOVERY_EVENTID,
750	WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
751	WMI_TX_ADDBA_COMPLETE_EVENTID,
752	WMI_BA_RSP_SSN_EVENTID,
753	WMI_AGGR_STATE_TRIG_EVENTID,
754	WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM),
755	WMI_PROFILE_MATCH,
756	WMI_ROAM_SYNCH_EVENTID,
757	WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P),
758	WMI_P2P_NOA_EVENTID,
759	WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID,
760	WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS),
761	WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
762	WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW),
763	WMI_D0_WOW_DISABLE_ACK_EVENTID,
764	WMI_WOW_INITIAL_WAKEUP_EVENTID,
765	WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT),
766	WMI_TSF_MEASUREMENT_REPORT_EVENTID,
767	WMI_RTT_ERROR_REPORT_EVENTID,
768	WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS),
769	WMI_IFACE_LINK_STATS_EVENTID,
770	WMI_PEER_LINK_STATS_EVENTID,
771	WMI_RADIO_LINK_STATS_EVENTID,
772	WMI_UPDATE_FW_MEM_DUMP_EVENTID,
773	WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID,
774	WMI_INST_RSSI_STATS_EVENTID,
775	WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID,
776	WMI_REPORT_STATS_EVENTID,
777	WMI_UPDATE_RCPI_EVENTID,
778	WMI_PEER_STATS_INFO_EVENTID,
779	WMI_RADIO_CHAN_STATS_EVENTID,
780	WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
781	WMI_NLO_SCAN_COMPLETE_EVENTID,
782	WMI_APFIND_EVENTID,
783	WMI_PASSPOINT_MATCH_EVENTID,
784	WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
785	WMI_GTK_REKEY_FAIL_EVENTID,
786	WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
787	WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER),
788	WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS),
789	WMI_VDEV_DFS_CAC_COMPLETE_EVENTID,
790	WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID,
791	WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC),
792	WMI_PDEV_UTF_EVENTID,
793	WMI_DEBUG_MESG_EVENTID,
794	WMI_UPDATE_STATS_EVENTID,
795	WMI_DEBUG_PRINT_EVENTID,
796	WMI_DCS_INTERFERENCE_EVENTID,
797	WMI_PDEV_QVIT_EVENTID,
798	WMI_WLAN_PROFILE_DATA_EVENTID,
799	WMI_PDEV_FTM_INTG_EVENTID,
800	WMI_WLAN_FREQ_AVOID_EVENTID,
801	WMI_VDEV_GET_KEEPALIVE_EVENTID,
802	WMI_THERMAL_MGMT_EVENTID,
803	WMI_DIAG_DATA_CONTAINER_EVENTID,
804	WMI_HOST_AUTO_SHUTDOWN_EVENTID,
805	WMI_UPDATE_WHAL_MIB_STATS_EVENTID,
806	WMI_UPDATE_VDEV_RATE_STATS_EVENTID,
807	WMI_DIAG_EVENTID,
808	WMI_OCB_SET_SCHED_EVENTID,
809	WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID,
810	WMI_RSSI_BREACH_EVENTID,
811	WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID,
812	WMI_PDEV_UTF_SCPC_EVENTID,
813	WMI_READ_DATA_FROM_FLASH_EVENTID,
814	WMI_REPORT_RX_AGGR_FAILURE_EVENTID,
815	WMI_PKGID_EVENTID,
816	WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO),
817	WMI_UPLOADH_EVENTID,
818	WMI_CAPTUREH_EVENTID,
819	WMI_RFKILL_STATE_CHANGE_EVENTID,
820	WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS),
821	WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
822	WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
823	WMI_BATCH_SCAN_RESULT_EVENTID,
824	WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM),
825	WMI_OEM_MEASUREMENT_REPORT_EVENTID,
826	WMI_OEM_ERROR_REPORT_EVENTID,
827	WMI_OEM_RESPONSE_EVENTID,
828	WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN),
829	WMI_NAN_DISC_IFACE_CREATED_EVENTID,
830	WMI_NAN_DISC_IFACE_DELETED_EVENTID,
831	WMI_NAN_STARTED_CLUSTER_EVENTID,
832	WMI_NAN_JOINED_CLUSTER_EVENTID,
833	WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX),
834	WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI),
835	WMI_LPI_STATUS_EVENTID,
836	WMI_LPI_HANDOFF_EVENTID,
837	WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
838	WMI_EXTSCAN_OPERATION_EVENTID,
839	WMI_EXTSCAN_TABLE_USAGE_EVENTID,
840	WMI_EXTSCAN_CACHED_RESULTS_EVENTID,
841	WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID,
842	WMI_EXTSCAN_HOTLIST_MATCH_EVENTID,
843	WMI_EXTSCAN_CAPABILITIES_EVENTID,
844	WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID,
845	WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
846	WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
847	WMI_SAP_OFL_DEL_STA_EVENTID,
848	WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB),
849	WMI_OCB_GET_TSF_TIMER_RESP_EVENTID,
850	WMI_DCC_GET_STATS_RESP_EVENTID,
851	WMI_DCC_UPDATE_NDL_RESP_EVENTID,
852	WMI_DCC_STATS_EVENTID,
853	WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC),
854	WMI_SOC_HW_MODE_TRANSITION_EVENTID,
855	WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID,
856	WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC),
857	WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
858	WMI_BPF_VDEV_STATS_INFO_EVENTID,
859	WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC),
860	WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
861	WMI_11D_NEW_COUNTRY_EVENTID,
862	WMI_REG_CHAN_LIST_CC_EXT_EVENTID,
863	WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
864	WMI_NDP_INITIATOR_RSP_EVENTID,
865	WMI_NDP_RESPONDER_RSP_EVENTID,
866	WMI_NDP_END_RSP_EVENTID,
867	WMI_NDP_INDICATION_EVENTID,
868	WMI_NDP_CONFIRM_EVENTID,
869	WMI_NDP_END_INDICATION_EVENTID,
870
871	WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT),
872	WMI_TWT_DISABLE_EVENTID,
873	WMI_TWT_ADD_DIALOG_EVENTID,
874	WMI_TWT_DEL_DIALOG_EVENTID,
875	WMI_TWT_PAUSE_DIALOG_EVENTID,
876	WMI_TWT_RESUME_DIALOG_EVENTID,
877	};
878
879	enum wmi_tlv_pdev_param {
880	WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
881	WMI_PDEV_PARAM_RX_CHAIN_MASK,
882	WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
883	WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
884	WMI_PDEV_PARAM_TXPOWER_SCALE,
885	WMI_PDEV_PARAM_BEACON_GEN_MODE,
886	WMI_PDEV_PARAM_BEACON_TX_MODE,
887	WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
888	WMI_PDEV_PARAM_PROTECTION_MODE,
889	WMI_PDEV_PARAM_DYNAMIC_BW,
890	WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
891	WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
892	WMI_PDEV_PARAM_STA_KICKOUT_TH,
893	WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
894	WMI_PDEV_PARAM_LTR_ENABLE,
895	WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
896	WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
897	WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
898	WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
899	WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
900	WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
901	WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
902	WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
903	WMI_PDEV_PARAM_L1SS_ENABLE,
904	WMI_PDEV_PARAM_DSLEEP_ENABLE,
905	WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
906	WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
907	WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
908	WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
909	WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
910	WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
911	WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
912	WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
913	WMI_PDEV_PARAM_PMF_QOS,
914	WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
915	WMI_PDEV_PARAM_DCS,
916	WMI_PDEV_PARAM_ANI_ENABLE,
917	WMI_PDEV_PARAM_ANI_POLL_PERIOD,
918	WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
919	WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
920	WMI_PDEV_PARAM_ANI_CCK_LEVEL,
921	WMI_PDEV_PARAM_DYNTXCHAIN,
922	WMI_PDEV_PARAM_PROXY_STA,
923	WMI_PDEV_PARAM_IDLE_PS_CONFIG,
924	WMI_PDEV_PARAM_POWER_GATING_SLEEP,
925	WMI_PDEV_PARAM_RFKILL_ENABLE,
926	WMI_PDEV_PARAM_BURST_DUR,
927	WMI_PDEV_PARAM_BURST_ENABLE,
928	WMI_PDEV_PARAM_HW_RFKILL_CONFIG,
929	WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE,
930	WMI_PDEV_PARAM_L1SS_TRACK,
931	WMI_PDEV_PARAM_HYST_EN,
932	WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE,
933	WMI_PDEV_PARAM_LED_SYS_STATE,
934	WMI_PDEV_PARAM_LED_ENABLE,
935	WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY,
936	WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE,
937	WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE,
938	WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD,
939	WMI_PDEV_PARAM_CTS_CBW,
940	WMI_PDEV_PARAM_WNTS_CONFIG,
941	WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE,
942	WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP,
943	WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP,
944	WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP,
945	WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE,
946	WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT,
947	WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP,
948	WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT,
949	WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE,
950	WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE,
951	WMI_PDEV_PARAM_TX_CHAIN_MASK_2G,
952	WMI_PDEV_PARAM_RX_CHAIN_MASK_2G,
953	WMI_PDEV_PARAM_TX_CHAIN_MASK_5G,
954	WMI_PDEV_PARAM_RX_CHAIN_MASK_5G,
955	WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK,
956	WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS,
957	WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG,
958	WMI_PDEV_PARAM_TXPOWER_DECR_DB,
959	WMI_PDEV_PARAM_AGGR_BURST,
960	WMI_PDEV_PARAM_RX_DECAP_MODE,
961	WMI_PDEV_PARAM_FAST_CHANNEL_RESET,
962	WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
963	WMI_PDEV_PARAM_ANTENNA_GAIN,
964	WMI_PDEV_PARAM_RX_FILTER,
965	WMI_PDEV_SET_MCAST_TO_UCAST_TID,
966	WMI_PDEV_PARAM_PROXY_STA_MODE,
967	WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE,
968	WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
969	WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
970	WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE,
971	WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
972	WMI_PDEV_PARAM_BLOCK_INTERBSS,
973	WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
974	WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID,
975	WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
976	WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
977	WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
978	WMI_PDEV_PARAM_SET_BURST_MODE_CMDID,
979	WMI_PDEV_PARAM_EN_STATS,
980	WMI_PDEV_PARAM_MU_GROUP_POLICY,
981	WMI_PDEV_PARAM_NOISE_DETECTION,
982	WMI_PDEV_PARAM_NOISE_THRESHOLD,
983	WMI_PDEV_PARAM_DPD_ENABLE,
984	WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
985	WMI_PDEV_PARAM_ATF_STRICT_SCH,
986	WMI_PDEV_PARAM_ATF_SCHED_DURATION,
987	WMI_PDEV_PARAM_ANT_PLZN,
988	WMI_PDEV_PARAM_MGMT_RETRY_LIMIT,
989	WMI_PDEV_PARAM_SENSITIVITY_LEVEL,
990	WMI_PDEV_PARAM_SIGNED_TXPOWER_2G,
991	WMI_PDEV_PARAM_SIGNED_TXPOWER_5G,
992	WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
993	WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
994	WMI_PDEV_PARAM_CCA_THRESHOLD,
995	WMI_PDEV_PARAM_RTS_FIXED_RATE,
996	WMI_PDEV_PARAM_PDEV_RESET,
997	WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET,
998	WMI_PDEV_PARAM_ARP_DBG_SRCADDR,
999	WMI_PDEV_PARAM_ARP_DBG_DSTADDR,
1000	WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
1001	WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
1002	WMI_PDEV_PARAM_CUST_TXPOWER_SCALE,
1003	WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
1004	WMI_PDEV_PARAM_CTRL_RETRY_LIMIT,
1005	WMI_PDEV_PARAM_PROPAGATION_DELAY,
1006	WMI_PDEV_PARAM_ENA_ANT_DIV,
1007	WMI_PDEV_PARAM_FORCE_CHAIN_ANT,
1008	WMI_PDEV_PARAM_ANT_DIV_SELFTEST,
1009	WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL,
1010	WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD,
1011	WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS,
1012	WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN,
1013	WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN,
1014	WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN,
1015	WMI_PDEV_PARAM_TX_SCH_DELAY,
1016	WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING,
1017	WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU,
1018	WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE,
1019	WMI_PDEV_PARAM_FAST_PWR_TRANSITION,
1020	WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE,
1021	WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE,
1022	WMI_PDEV_PARAM_MESH_MCAST_ENABLE,
1023	};
1024
1025	enum wmi_tlv_vdev_param {
1026	WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
1027	WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
1028	WMI_VDEV_PARAM_BEACON_INTERVAL,
1029	WMI_VDEV_PARAM_LISTEN_INTERVAL,
1030	WMI_VDEV_PARAM_MULTICAST_RATE,
1031	WMI_VDEV_PARAM_MGMT_TX_RATE,
1032	WMI_VDEV_PARAM_SLOT_TIME,
1033	WMI_VDEV_PARAM_PREAMBLE,
1034	WMI_VDEV_PARAM_SWBA_TIME,
1035	WMI_VDEV_STATS_UPDATE_PERIOD,
1036	WMI_VDEV_PWRSAVE_AGEOUT_TIME,
1037	WMI_VDEV_HOST_SWBA_INTERVAL,
1038	WMI_VDEV_PARAM_DTIM_PERIOD,
1039	WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
1040	WMI_VDEV_PARAM_WDS,
1041	WMI_VDEV_PARAM_ATIM_WINDOW,
1042	WMI_VDEV_PARAM_BMISS_COUNT_MAX,
1043	WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
1044	WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
1045	WMI_VDEV_PARAM_FEATURE_WMM,
1046	WMI_VDEV_PARAM_CHWIDTH,
1047	WMI_VDEV_PARAM_CHEXTOFFSET,
1048	WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
1049	WMI_VDEV_PARAM_STA_QUICKKICKOUT,
1050	WMI_VDEV_PARAM_MGMT_RATE,
1051	WMI_VDEV_PARAM_PROTECTION_MODE,
1052	WMI_VDEV_PARAM_FIXED_RATE,
1053	WMI_VDEV_PARAM_SGI,
1054	WMI_VDEV_PARAM_LDPC,
1055	WMI_VDEV_PARAM_TX_STBC,
1056	WMI_VDEV_PARAM_RX_STBC,
1057	WMI_VDEV_PARAM_INTRA_BSS_FWD,
1058	WMI_VDEV_PARAM_DEF_KEYID,
1059	WMI_VDEV_PARAM_NSS,
1060	WMI_VDEV_PARAM_BCAST_DATA_RATE,
1061	WMI_VDEV_PARAM_MCAST_DATA_RATE,
1062	WMI_VDEV_PARAM_MCAST_INDICATE,
1063	WMI_VDEV_PARAM_DHCP_INDICATE,
1064	WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
1065	WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
1066	WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
1067	WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
1068	WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
1069	WMI_VDEV_PARAM_ENABLE_RTSCTS,
1070	WMI_VDEV_PARAM_TXBF,
1071	WMI_VDEV_PARAM_PACKET_POWERSAVE,
1072	WMI_VDEV_PARAM_DROP_UNENCRY,
1073	WMI_VDEV_PARAM_TX_ENCAP_TYPE,
1074	WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
1075	WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
1076	WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
1077	WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
1078	WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP,
1079	WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP,
1080	WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
1081	WMI_VDEV_PARAM_TX_PWRLIMIT,
1082	WMI_VDEV_PARAM_SNR_NUM_FOR_CAL,
1083	WMI_VDEV_PARAM_ROAM_FW_OFFLOAD,
1084	WMI_VDEV_PARAM_ENABLE_RMC,
1085	WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS,
1086	WMI_VDEV_PARAM_MAX_RATE,
1087	WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE,
1088	WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR,
1089	WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT,
1090	WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE,
1091	WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED,
1092	WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED,
1093	WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED,
1094	WMI_VDEV_PARAM_INACTIVITY_CNT,
1095	WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS,
1096	WMI_VDEV_PARAM_DTIM_POLICY,
1097	WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS,
1098	WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE,
1099	WMI_VDEV_PARAM_RX_LEAK_WINDOW,
1100	WMI_VDEV_PARAM_STATS_AVG_FACTOR,
1101	WMI_VDEV_PARAM_DISCONNECT_TH,
1102	WMI_VDEV_PARAM_RTSCTS_RATE,
1103	WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE,
1104	WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE,
1105	WMI_VDEV_PARAM_TXPOWER_SCALE,
1106	WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB,
1107	WMI_VDEV_PARAM_MCAST2UCAST_SET,
1108	WMI_VDEV_PARAM_RC_NUM_RETRIES,
1109	WMI_VDEV_PARAM_CABQ_MAXDUR,
1110	WMI_VDEV_PARAM_MFPTEST_SET,
1111	WMI_VDEV_PARAM_RTS_FIXED_RATE,
1112	WMI_VDEV_PARAM_VHT_SGIMASK,
1113	WMI_VDEV_PARAM_VHT80_RATEMASK,
1114	WMI_VDEV_PARAM_PROXY_STA,
1115	WMI_VDEV_PARAM_VIRTUAL_CELL_MODE,
1116	WMI_VDEV_PARAM_RX_DECAP_TYPE,
1117	WMI_VDEV_PARAM_BW_NSS_RATEMASK,
1118	WMI_VDEV_PARAM_SENSOR_AP,
1119	WMI_VDEV_PARAM_BEACON_RATE,
1120	WMI_VDEV_PARAM_DTIM_ENABLE_CTS,
1121	WMI_VDEV_PARAM_STA_KICKOUT,
1122	WMI_VDEV_PARAM_CAPABILITIES,
1123	WMI_VDEV_PARAM_TSF_INCREMENT,
1124	WMI_VDEV_PARAM_AMPDU_PER_AC,
1125	WMI_VDEV_PARAM_RX_FILTER,
1126	WMI_VDEV_PARAM_MGMT_TX_POWER,
1127	WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH,
1128	WMI_VDEV_PARAM_AGG_SW_RETRY_TH,
1129	WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS,
1130	WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
1131	WMI_VDEV_PARAM_HE_DCM,
1132	WMI_VDEV_PARAM_HE_RANGE_EXT,
1133	WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE,
1134	WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME,
1135	WMI_VDEV_PARAM_BA_MODE = 0x7e,
1136	WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87,
1137	WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99,
1138	WMI_VDEV_PARAM_PROTOTYPE = 0x8000,
1139	WMI_VDEV_PARAM_BSS_COLOR,
1140	WMI_VDEV_PARAM_SET_HEMU_MODE,
1141	WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003,
1142	};
1143
1144	enum wmi_tlv_peer_flags {
1145	WMI_PEER_AUTH = 0x00000001,
1146	WMI_PEER_QOS = 0x00000002,
1147	WMI_PEER_NEED_PTK_4_WAY = 0x00000004,
1148	WMI_PEER_NEED_GTK_2_WAY = 0x00000010,
1149	WMI_PEER_HE = 0x00000400,
1150	WMI_PEER_APSD = 0x00000800,
1151	WMI_PEER_HT = 0x00001000,
1152	WMI_PEER_40MHZ = 0x00002000,
1153	WMI_PEER_STBC = 0x00008000,
1154	WMI_PEER_LDPC = 0x00010000,
1155	WMI_PEER_DYN_MIMOPS = 0x00020000,
1156	WMI_PEER_STATIC_MIMOPS = 0x00040000,
1157	WMI_PEER_SPATIAL_MUX = 0x00200000,
1158	WMI_PEER_TWT_REQ = 0x00400000,
1159	WMI_PEER_TWT_RESP = 0x00800000,
1160	WMI_PEER_VHT = 0x02000000,
1161	WMI_PEER_80MHZ = 0x04000000,
1162	WMI_PEER_PMF = 0x08000000,
1163	WMI_PEER_IS_P2P_CAPABLE = 0x20000000,
1164	WMI_PEER_160MHZ = 0x40000000,
1165	WMI_PEER_SAFEMODE_EN = 0x80000000,
1166	};
1167
1168	enum wmi_tlv_peer_flags_ext {
1169	WMI_PEER_EXT_EHT = BIT(0),
1170	WMI_PEER_EXT_320MHZ = BIT(1),
1171	};
1172
1173	/** Enum list of TLV Tags for each parameter structure type. */
1174	enum wmi_tlv_tag {
1175	WMI_TAG_LAST_RESERVED = 15,
1176	WMI_TAG_FIRST_ARRAY_ENUM,
1177	WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM,
1178	WMI_TAG_ARRAY_BYTE,
1179	WMI_TAG_ARRAY_STRUCT,
1180	WMI_TAG_ARRAY_FIXED_STRUCT,
1181	WMI_TAG_LAST_ARRAY_ENUM = 31,
1182	WMI_TAG_SERVICE_READY_EVENT,
1183	WMI_TAG_HAL_REG_CAPABILITIES,
1184	WMI_TAG_WLAN_HOST_MEM_REQ,
1185	WMI_TAG_READY_EVENT,
1186	WMI_TAG_SCAN_EVENT,
1187	WMI_TAG_PDEV_TPC_CONFIG_EVENT,
1188	WMI_TAG_CHAN_INFO_EVENT,
1189	WMI_TAG_COMB_PHYERR_RX_HDR,
1190	WMI_TAG_VDEV_START_RESPONSE_EVENT,
1191	WMI_TAG_VDEV_STOPPED_EVENT,
1192	WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT,
1193	WMI_TAG_PEER_STA_KICKOUT_EVENT,
1194	WMI_TAG_MGMT_RX_HDR,
1195	WMI_TAG_TBTT_OFFSET_EVENT,
1196	WMI_TAG_TX_DELBA_COMPLETE_EVENT,
1197	WMI_TAG_TX_ADDBA_COMPLETE_EVENT,
1198	WMI_TAG_ROAM_EVENT,
1199	WMI_TAG_WOW_EVENT_INFO,
1200	WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP,
1201	WMI_TAG_RTT_EVENT_HEADER,
1202	WMI_TAG_RTT_ERROR_REPORT_EVENT,
1203	WMI_TAG_RTT_MEAS_EVENT,
1204	WMI_TAG_ECHO_EVENT,
1205	WMI_TAG_FTM_INTG_EVENT,
1206	WMI_TAG_VDEV_GET_KEEPALIVE_EVENT,
1207	WMI_TAG_GPIO_INPUT_EVENT,
1208	WMI_TAG_CSA_EVENT,
1209	WMI_TAG_GTK_OFFLOAD_STATUS_EVENT,
1210	WMI_TAG_IGTK_INFO,
1211	WMI_TAG_DCS_INTERFERENCE_EVENT,
1212	WMI_TAG_ATH_DCS_CW_INT,
1213	WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */
1214	WMI_TAG_ATH_DCS_CW_INT,
1215	WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1216	WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */
1217	WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1218	WMI_TAG_WLAN_PROFILE_CTX_T,
1219	WMI_TAG_WLAN_PROFILE_T,
1220	WMI_TAG_PDEV_QVIT_EVENT,
1221	WMI_TAG_HOST_SWBA_EVENT,
1222	WMI_TAG_TIM_INFO,
1223	WMI_TAG_P2P_NOA_INFO,
1224	WMI_TAG_STATS_EVENT,
1225	WMI_TAG_AVOID_FREQ_RANGES_EVENT,
1226	WMI_TAG_AVOID_FREQ_RANGE_DESC,
1227	WMI_TAG_GTK_REKEY_FAIL_EVENT,
1228	WMI_TAG_INIT_CMD,
1229	WMI_TAG_RESOURCE_CONFIG,
1230	WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
1231	WMI_TAG_START_SCAN_CMD,
1232	WMI_TAG_STOP_SCAN_CMD,
1233	WMI_TAG_SCAN_CHAN_LIST_CMD,
1234	WMI_TAG_CHANNEL,
1235	WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1236	WMI_TAG_PDEV_SET_PARAM_CMD,
1237	WMI_TAG_PDEV_SET_WMM_PARAMS_CMD,
1238	WMI_TAG_WMM_PARAMS,
1239	WMI_TAG_PDEV_SET_QUIET_CMD,
1240	WMI_TAG_VDEV_CREATE_CMD,
1241	WMI_TAG_VDEV_DELETE_CMD,
1242	WMI_TAG_VDEV_START_REQUEST_CMD,
1243	WMI_TAG_P2P_NOA_DESCRIPTOR,
1244	WMI_TAG_P2P_GO_SET_BEACON_IE,
1245	WMI_TAG_GTK_OFFLOAD_CMD,
1246	WMI_TAG_VDEV_UP_CMD,
1247	WMI_TAG_VDEV_STOP_CMD,
1248	WMI_TAG_VDEV_DOWN_CMD,
1249	WMI_TAG_VDEV_SET_PARAM_CMD,
1250	WMI_TAG_VDEV_INSTALL_KEY_CMD,
1251	WMI_TAG_PEER_CREATE_CMD,
1252	WMI_TAG_PEER_DELETE_CMD,
1253	WMI_TAG_PEER_FLUSH_TIDS_CMD,
1254	WMI_TAG_PEER_SET_PARAM_CMD,
1255	WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
1256	WMI_TAG_VHT_RATE_SET,
1257	WMI_TAG_BCN_TMPL_CMD,
1258	WMI_TAG_PRB_TMPL_CMD,
1259	WMI_TAG_BCN_PRB_INFO,
1260	WMI_TAG_PEER_TID_ADDBA_CMD,
1261	WMI_TAG_PEER_TID_DELBA_CMD,
1262	WMI_TAG_STA_POWERSAVE_MODE_CMD,
1263	WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1264	WMI_TAG_STA_DTIM_PS_METHOD_CMD,
1265	WMI_TAG_ROAM_SCAN_MODE,
1266	WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD,
1267	WMI_TAG_ROAM_SCAN_PERIOD,
1268	WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1269	WMI_TAG_PDEV_SUSPEND_CMD,
1270	WMI_TAG_PDEV_RESUME_CMD,
1271	WMI_TAG_ADD_BCN_FILTER_CMD,
1272	WMI_TAG_RMV_BCN_FILTER_CMD,
1273	WMI_TAG_WOW_ENABLE_CMD,
1274	WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
1275	WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD,
1276	WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM,
1277	WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
1278	WMI_TAG_ARP_OFFLOAD_TUPLE,
1279	WMI_TAG_NS_OFFLOAD_TUPLE,
1280	WMI_TAG_FTM_INTG_CMD,
1281	WMI_TAG_STA_KEEPALIVE_CMD,
1282	WMI_TAG_STA_KEEPALVE_ARP_RESPONSE,
1283	WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD,
1284	WMI_TAG_AP_PS_PEER_CMD,
1285	WMI_TAG_PEER_RATE_RETRY_SCHED_CMD,
1286	WMI_TAG_WLAN_PROFILE_TRIGGER_CMD,
1287	WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD,
1288	WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD,
1289	WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD,
1290	WMI_TAG_WOW_DEL_PATTERN_CMD,
1291	WMI_TAG_WOW_ADD_DEL_EVT_CMD,
1292	WMI_TAG_RTT_MEASREQ_HEAD,
1293	WMI_TAG_RTT_MEASREQ_BODY,
1294	WMI_TAG_RTT_TSF_CMD,
1295	WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
1296	WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
1297	WMI_TAG_REQUEST_STATS_CMD,
1298	WMI_TAG_NLO_CONFIG_CMD,
1299	WMI_TAG_NLO_CONFIGURED_PARAMETERS,
1300	WMI_TAG_CSA_OFFLOAD_ENABLE_CMD,
1301	WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD,
1302	WMI_TAG_CHATTER_SET_MODE_CMD,
1303	WMI_TAG_ECHO_CMD,
1304	WMI_TAG_VDEV_SET_KEEPALIVE_CMD,
1305	WMI_TAG_VDEV_GET_KEEPALIVE_CMD,
1306	WMI_TAG_FORCE_FW_HANG_CMD,
1307	WMI_TAG_GPIO_CONFIG_CMD,
1308	WMI_TAG_GPIO_OUTPUT_CMD,
1309	WMI_TAG_PEER_ADD_WDS_ENTRY_CMD,
1310	WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD,
1311	WMI_TAG_BCN_TX_HDR,
1312	WMI_TAG_BCN_SEND_FROM_HOST_CMD,
1313	WMI_TAG_MGMT_TX_HDR,
1314	WMI_TAG_ADDBA_CLEAR_RESP_CMD,
1315	WMI_TAG_ADDBA_SEND_CMD,
1316	WMI_TAG_DELBA_SEND_CMD,
1317	WMI_TAG_ADDBA_SETRESPONSE_CMD,
1318	WMI_TAG_SEND_SINGLEAMSDU_CMD,
1319	WMI_TAG_PDEV_PKTLOG_ENABLE_CMD,
1320	WMI_TAG_PDEV_PKTLOG_DISABLE_CMD,
1321	WMI_TAG_PDEV_SET_HT_IE_CMD,
1322	WMI_TAG_PDEV_SET_VHT_IE_CMD,
1323	WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD,
1324	WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD,
1325	WMI_TAG_PDEV_GET_TPC_CONFIG_CMD,
1326	WMI_TAG_PDEV_SET_BASE_MACADDR_CMD,
1327	WMI_TAG_PEER_MCAST_GROUP_CMD,
1328	WMI_TAG_ROAM_AP_PROFILE,
1329	WMI_TAG_AP_PROFILE,
1330	WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD,
1331	WMI_TAG_PDEV_DFS_ENABLE_CMD,
1332	WMI_TAG_PDEV_DFS_DISABLE_CMD,
1333	WMI_TAG_WOW_ADD_PATTERN_CMD,
1334	WMI_TAG_WOW_BITMAP_PATTERN_T,
1335	WMI_TAG_WOW_IPV4_SYNC_PATTERN_T,
1336	WMI_TAG_WOW_IPV6_SYNC_PATTERN_T,
1337	WMI_TAG_WOW_MAGIC_PATTERN_CMD,
1338	WMI_TAG_SCAN_UPDATE_REQUEST_CMD,
1339	WMI_TAG_CHATTER_PKT_COALESCING_FILTER,
1340	WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD,
1341	WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD,
1342	WMI_TAG_CHATTER_COALESCING_QUERY_CMD,
1343	WMI_TAG_TXBF_CMD,
1344	WMI_TAG_DEBUG_LOG_CONFIG_CMD,
1345	WMI_TAG_NLO_EVENT,
1346	WMI_TAG_CHATTER_QUERY_REPLY_EVENT,
1347	WMI_TAG_UPLOAD_H_HDR,
1348	WMI_TAG_CAPTURE_H_EVENT_HDR,
1349	WMI_TAG_VDEV_WNM_SLEEPMODE_CMD,
1350	WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD,
1351	WMI_TAG_VDEV_WMM_ADDTS_CMD,
1352	WMI_TAG_VDEV_WMM_DELTS_CMD,
1353	WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
1354	WMI_TAG_TDLS_SET_STATE_CMD,
1355	WMI_TAG_TDLS_PEER_UPDATE_CMD,
1356	WMI_TAG_TDLS_PEER_EVENT,
1357	WMI_TAG_TDLS_PEER_CAPABILITIES,
1358	WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD,
1359	WMI_TAG_ROAM_CHAN_LIST,
1360	WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT,
1361	WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD,
1362	WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD,
1363	WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD,
1364	WMI_TAG_BA_REQ_SSN_CMD,
1365	WMI_TAG_BA_RSP_SSN_EVENT,
1366	WMI_TAG_STA_SMPS_FORCE_MODE_CMD,
1367	WMI_TAG_SET_MCASTBCAST_FILTER_CMD,
1368	WMI_TAG_P2P_SET_OPPPS_CMD,
1369	WMI_TAG_P2P_SET_NOA_CMD,
1370	WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM,
1371	WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM,
1372	WMI_TAG_STA_SMPS_PARAM_CMD,
1373	WMI_TAG_VDEV_SET_GTX_PARAMS_CMD,
1374	WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD,
1375	WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS,
1376	WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT,
1377	WMI_TAG_P2P_NOA_EVENT,
1378	WMI_TAG_HB_SET_ENABLE_CMD,
1379	WMI_TAG_HB_SET_TCP_PARAMS_CMD,
1380	WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD,
1381	WMI_TAG_HB_SET_UDP_PARAMS_CMD,
1382	WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD,
1383	WMI_TAG_HB_IND_EVENT,
1384	WMI_TAG_TX_PAUSE_EVENT,
1385	WMI_TAG_RFKILL_EVENT,
1386	WMI_TAG_DFS_RADAR_EVENT,
1387	WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD,
1388	WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD,
1389	WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST,
1390	WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO,
1391	WMI_TAG_BATCH_SCAN_ENABLE_CMD,
1392	WMI_TAG_BATCH_SCAN_DISABLE_CMD,
1393	WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD,
1394	WMI_TAG_BATCH_SCAN_ENABLED_EVENT,
1395	WMI_TAG_BATCH_SCAN_RESULT_EVENT,
1396	WMI_TAG_VDEV_PLMREQ_START_CMD,
1397	WMI_TAG_VDEV_PLMREQ_STOP_CMD,
1398	WMI_TAG_THERMAL_MGMT_CMD,
1399	WMI_TAG_THERMAL_MGMT_EVENT,
1400	WMI_TAG_PEER_INFO_REQ_CMD,
1401	WMI_TAG_PEER_INFO_EVENT,
1402	WMI_TAG_PEER_INFO,
1403	WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT,
1404	WMI_TAG_RMC_SET_MODE_CMD,
1405	WMI_TAG_RMC_SET_ACTION_PERIOD_CMD,
1406	WMI_TAG_RMC_CONFIG_CMD,
1407	WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD,
1408	WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD,
1409	WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD,
1410	WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD,
1411	WMI_TAG_NAN_CMD_PARAM,
1412	WMI_TAG_NAN_EVENT_HDR,
1413	WMI_TAG_PDEV_L1SS_TRACK_EVENT,
1414	WMI_TAG_DIAG_DATA_CONTAINER_EVENT,
1415	WMI_TAG_MODEM_POWER_STATE_CMD_PARAM,
1416	WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD,
1417	WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT,
1418	WMI_TAG_AGGR_STATE_TRIG_EVENT,
1419	WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY,
1420	WMI_TAG_ROAM_SCAN_CMD,
1421	WMI_TAG_REQ_STATS_EXT_CMD,
1422	WMI_TAG_STATS_EXT_EVENT,
1423	WMI_TAG_OBSS_SCAN_ENABLE_CMD,
1424	WMI_TAG_OBSS_SCAN_DISABLE_CMD,
1425	WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT,
1426	WMI_TAG_PDEV_SET_LED_CONFIG_CMD,
1427	WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD,
1428	WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT,
1429	WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT,
1430	WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM,
1431	WMI_TAG_WOW_IOAC_PKT_PATTERN_T,
1432	WMI_TAG_WOW_IOAC_TMR_PATTERN_T,
1433	WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD,
1434	WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD,
1435	WMI_TAG_WOW_IOAC_KEEPALIVE_T,
1436	WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD,
1437	WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD,
1438	WMI_TAG_START_LINK_STATS_CMD,
1439	WMI_TAG_CLEAR_LINK_STATS_CMD,
1440	WMI_TAG_REQUEST_LINK_STATS_CMD,
1441	WMI_TAG_IFACE_LINK_STATS_EVENT,
1442	WMI_TAG_RADIO_LINK_STATS_EVENT,
1443	WMI_TAG_PEER_STATS_EVENT,
1444	WMI_TAG_CHANNEL_STATS,
1445	WMI_TAG_RADIO_LINK_STATS,
1446	WMI_TAG_RATE_STATS,
1447	WMI_TAG_PEER_LINK_STATS,
1448	WMI_TAG_WMM_AC_STATS,
1449	WMI_TAG_IFACE_LINK_STATS,
1450	WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD,
1451	WMI_TAG_LPI_START_SCAN_CMD,
1452	WMI_TAG_LPI_STOP_SCAN_CMD,
1453	WMI_TAG_LPI_RESULT_EVENT,
1454	WMI_TAG_PEER_STATE_EVENT,
1455	WMI_TAG_EXTSCAN_BUCKET_CMD,
1456	WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT,
1457	WMI_TAG_EXTSCAN_START_CMD,
1458	WMI_TAG_EXTSCAN_STOP_CMD,
1459	WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD,
1460	WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD,
1461	WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD,
1462	WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD,
1463	WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD,
1464	WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD,
1465	WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD,
1466	WMI_TAG_EXTSCAN_OPERATION_EVENT,
1467	WMI_TAG_EXTSCAN_START_STOP_EVENT,
1468	WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT,
1469	WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT,
1470	WMI_TAG_EXTSCAN_RSSI_INFO_EVENT,
1471	WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT,
1472	WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT,
1473	WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT,
1474	WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT,
1475	WMI_TAG_EXTSCAN_CAPABILITIES_EVENT,
1476	WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT,
1477	WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT,
1478	WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT,
1479	WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD,
1480	WMI_TAG_D0_WOW_DISABLE_ACK_EVENT,
1481	WMI_TAG_UNIT_TEST_CMD,
1482	WMI_TAG_ROAM_OFFLOAD_TLV_PARAM,
1483	WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM,
1484	WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM,
1485	WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM,
1486	WMI_TAG_ROAM_SYNCH_EVENT,
1487	WMI_TAG_ROAM_SYNCH_COMPLETE,
1488	WMI_TAG_EXTWOW_ENABLE_CMD,
1489	WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD,
1490	WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD,
1491	WMI_TAG_LPI_STATUS_EVENT,
1492	WMI_TAG_LPI_HANDOFF_EVENT,
1493	WMI_TAG_VDEV_RATE_STATS_EVENT,
1494	WMI_TAG_VDEV_RATE_HT_INFO,
1495	WMI_TAG_RIC_REQUEST,
1496	WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1497	WMI_TAG_PDEV_TEMPERATURE_EVENT,
1498	WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD,
1499	WMI_TAG_TPC_CHAINMASK_CONFIG_CMD,
1500	WMI_TAG_RIC_TSPEC,
1501	WMI_TAG_TPC_CHAINMASK_CONFIG,
1502	WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD,
1503	WMI_TAG_SCAN_PROB_REQ_OUI_CMD,
1504	WMI_TAG_KEY_MATERIAL,
1505	WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD,
1506	WMI_TAG_SET_LED_FLASHING_CMD,
1507	WMI_TAG_MDNS_OFFLOAD_CMD,
1508	WMI_TAG_MDNS_SET_FQDN_CMD,
1509	WMI_TAG_MDNS_SET_RESP_CMD,
1510	WMI_TAG_MDNS_GET_STATS_CMD,
1511	WMI_TAG_MDNS_STATS_EVENT,
1512	WMI_TAG_ROAM_INVOKE_CMD,
1513	WMI_TAG_PDEV_RESUME_EVENT,
1514	WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD,
1515	WMI_TAG_SAP_OFL_ENABLE_CMD,
1516	WMI_TAG_SAP_OFL_ADD_STA_EVENT,
1517	WMI_TAG_SAP_OFL_DEL_STA_EVENT,
1518	WMI_TAG_APFIND_CMD_PARAM,
1519	WMI_TAG_APFIND_EVENT_HDR,
1520	WMI_TAG_OCB_SET_SCHED_CMD,
1521	WMI_TAG_OCB_SET_SCHED_EVENT,
1522	WMI_TAG_OCB_SET_CONFIG_CMD,
1523	WMI_TAG_OCB_SET_CONFIG_RESP_EVENT,
1524	WMI_TAG_OCB_SET_UTC_TIME_CMD,
1525	WMI_TAG_OCB_START_TIMING_ADVERT_CMD,
1526	WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD,
1527	WMI_TAG_OCB_GET_TSF_TIMER_CMD,
1528	WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT,
1529	WMI_TAG_DCC_GET_STATS_CMD,
1530	WMI_TAG_DCC_CHANNEL_STATS_REQUEST,
1531	WMI_TAG_DCC_GET_STATS_RESP_EVENT,
1532	WMI_TAG_DCC_CLEAR_STATS_CMD,
1533	WMI_TAG_DCC_UPDATE_NDL_CMD,
1534	WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT,
1535	WMI_TAG_DCC_STATS_EVENT,
1536	WMI_TAG_OCB_CHANNEL,
1537	WMI_TAG_OCB_SCHEDULE_ELEMENT,
1538	WMI_TAG_DCC_NDL_STATS_PER_CHANNEL,
1539	WMI_TAG_DCC_NDL_CHAN,
1540	WMI_TAG_QOS_PARAMETER,
1541	WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG,
1542	WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM,
1543	WMI_TAG_ROAM_FILTER,
1544	WMI_TAG_PASSPOINT_CONFIG_CMD,
1545	WMI_TAG_PASSPOINT_EVENT_HDR,
1546	WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD,
1547	WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT,
1548	WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD,
1549	WMI_TAG_VDEV_TSF_REPORT_EVENT,
1550	WMI_TAG_GET_FW_MEM_DUMP,
1551	WMI_TAG_UPDATE_FW_MEM_DUMP,
1552	WMI_TAG_FW_MEM_DUMP_PARAMS,
1553	WMI_TAG_DEBUG_MESG_FLUSH,
1554	WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE,
1555	WMI_TAG_PEER_SET_RATE_REPORT_CONDITION,
1556	WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG,
1557	WMI_TAG_VDEV_SET_IE_CMD,
1558	WMI_TAG_RSSI_BREACH_MONITOR_CONFIG,
1559	WMI_TAG_RSSI_BREACH_EVENT,
1560	WMI_TAG_WOW_EVENT_INITIAL_WAKEUP,
1561	WMI_TAG_SOC_SET_PCL_CMD,
1562	WMI_TAG_SOC_SET_HW_MODE_CMD,
1563	WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT,
1564	WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT,
1565	WMI_TAG_VDEV_TXRX_STREAMS,
1566	WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1567	WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD,
1568	WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT,
1569	WMI_TAG_WOW_IOAC_SOCK_PATTERN_T,
1570	WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD,
1571	WMI_TAG_DIAG_EVENT_LOG_CONFIG,
1572	WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS,
1573	WMI_TAG_PACKET_FILTER_CONFIG,
1574	WMI_TAG_PACKET_FILTER_ENABLE,
1575	WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD,
1576	WMI_TAG_MGMT_TX_SEND_CMD,
1577	WMI_TAG_MGMT_TX_COMPL_EVENT,
1578	WMI_TAG_SOC_SET_ANTENNA_MODE_CMD,
1579	WMI_TAG_WOW_UDP_SVC_OFLD_CMD,
1580	WMI_TAG_LRO_INFO_CMD,
1581	WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM,
1582	WMI_TAG_SERVICE_READY_EXT_EVENT,
1583	WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD,
1584	WMI_TAG_MAWC_ENABLE_SENSOR_EVENT,
1585	WMI_TAG_ROAM_CONFIGURE_MAWC_CMD,
1586	WMI_TAG_NLO_CONFIGURE_MAWC_CMD,
1587	WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD,
1588	WMI_TAG_PEER_ASSOC_CONF_EVENT,
1589	WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD,
1590	WMI_TAG_AP_PS_EGAP_PARAM_CMD,
1591	WMI_TAG_AP_PS_EGAP_INFO_EVENT,
1592	WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD,
1593	WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD,
1594	WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT,
1595	WMI_TAG_SCPC_EVENT,
1596	WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST,
1597	WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT,
1598	WMI_TAG_BPF_GET_CAPABILITY_CMD,
1599	WMI_TAG_BPF_CAPABILITY_INFO_EVT,
1600	WMI_TAG_BPF_GET_VDEV_STATS_CMD,
1601	WMI_TAG_BPF_VDEV_STATS_INFO_EVT,
1602	WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD,
1603	WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD,
1604	WMI_TAG_VDEV_DELETE_RESP_EVENT,
1605	WMI_TAG_PEER_DELETE_RESP_EVENT,
1606	WMI_TAG_ROAM_DENSE_THRES_PARAM,
1607	WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM,
1608	WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD,
1609	WMI_TAG_VDEV_CONFIG_RATEMASK,
1610	WMI_TAG_PDEV_FIPS_CMD,
1611	WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD,
1612	WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD,
1613	WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD,
1614	WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD,
1615	WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD,
1616	WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD,
1617	WMI_TAG_PDEV_SET_CTL_TABLE_CMD,
1618	WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD,
1619	WMI_TAG_FWTEST_SET_PARAM_CMD,
1620	WMI_TAG_PEER_ATF_REQUEST,
1621	WMI_TAG_VDEV_ATF_REQUEST,
1622	WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD,
1623	WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD,
1624	WMI_TAG_INST_RSSI_STATS_RESP,
1625	WMI_TAG_MED_UTIL_REPORT_EVENT,
1626	WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT,
1627	WMI_TAG_WDS_ADDR_EVENT,
1628	WMI_TAG_PEER_RATECODE_LIST_EVENT,
1629	WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT,
1630	WMI_TAG_PDEV_TPC_EVENT,
1631	WMI_TAG_ANI_OFDM_EVENT,
1632	WMI_TAG_ANI_CCK_EVENT,
1633	WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT,
1634	WMI_TAG_PDEV_FIPS_EVENT,
1635	WMI_TAG_ATF_PEER_INFO,
1636	WMI_TAG_PDEV_GET_TPC_CMD,
1637	WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD,
1638	WMI_TAG_QBOOST_CFG_CMD,
1639	WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE,
1640	WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES,
1641	WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM,
1642	WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN,
1643	WMI_TAG_PEER_CCK_OFDM_RATE_INFO,
1644	WMI_TAG_PEER_MCS_RATE_INFO,
1645	WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR,
1646	WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM,
1647	WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM,
1648	WMI_TAG_MU_REPORT_TOTAL_MU,
1649	WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD,
1650	WMI_TAG_ROAM_SET_MBO,
1651	WMI_TAG_MIB_STATS_ENABLE_CMD,
1652	WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT,
1653	WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT,
1654	WMI_TAG_NAN_STARTED_CLUSTER_EVENT,
1655	WMI_TAG_NAN_JOINED_CLUSTER_EVENT,
1656	WMI_TAG_NDI_GET_CAP_REQ,
1657	WMI_TAG_NDP_INITIATOR_REQ,
1658	WMI_TAG_NDP_RESPONDER_REQ,
1659	WMI_TAG_NDP_END_REQ,
1660	WMI_TAG_NDI_CAP_RSP_EVENT,
1661	WMI_TAG_NDP_INITIATOR_RSP_EVENT,
1662	WMI_TAG_NDP_RESPONDER_RSP_EVENT,
1663	WMI_TAG_NDP_END_RSP_EVENT,
1664	WMI_TAG_NDP_INDICATION_EVENT,
1665	WMI_TAG_NDP_CONFIRM_EVENT,
1666	WMI_TAG_NDP_END_INDICATION_EVENT,
1667	WMI_TAG_VDEV_SET_QUIET_CMD,
1668	WMI_TAG_PDEV_SET_PCL_CMD,
1669	WMI_TAG_PDEV_SET_HW_MODE_CMD,
1670	WMI_TAG_PDEV_SET_MAC_CONFIG_CMD,
1671	WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD,
1672	WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT,
1673	WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT,
1674	WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1675	WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT,
1676	WMI_TAG_COEX_CONFIG_CMD,
1677	WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER,
1678	WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD,
1679	WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG,
1680	WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD,
1681	WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD,
1682	WMI_TAG_MAC_PHY_CAPABILITIES,
1683	WMI_TAG_HW_MODE_CAPABILITIES,
1684	WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS,
1685	WMI_TAG_HAL_REG_CAPABILITIES_EXT,
1686	WMI_TAG_SOC_HAL_REG_CAPABILITIES,
1687	WMI_TAG_VDEV_WISA_CMD,
1688	WMI_TAG_TX_POWER_LEVEL_STATS_EVT,
1689	WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV,
1690	WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG,
1691	WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD,
1692	WMI_TAG_NDP_END_RSP_PER_NDI,
1693	WMI_TAG_PEER_BWF_REQUEST,
1694	WMI_TAG_BWF_PEER_INFO,
1695	WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD,
1696	WMI_TAG_RMC_SET_LEADER_CMD,
1697	WMI_TAG_RMC_MANUAL_LEADER_EVENT,
1698	WMI_TAG_PER_CHAIN_RSSI_STATS,
1699	WMI_TAG_RSSI_STATS,
1700	WMI_TAG_P2P_LO_START_CMD,
1701	WMI_TAG_P2P_LO_STOP_CMD,
1702	WMI_TAG_P2P_LO_STOPPED_EVENT,
1703	WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1704	WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1705	WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD,
1706	WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT,
1707	WMI_TAG_READ_DATA_FROM_FLASH_CMD,
1708	WMI_TAG_READ_DATA_FROM_FLASH_EVENT,
1709	WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD,
1710	WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD,
1711	WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID,
1712	WMI_TAG_TLV_BUF_LEN_PARAM,
1713	WMI_TAG_SERVICE_AVAILABLE_EVENT,
1714	WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD,
1715	WMI_TAG_PEER_ANTDIV_INFO_EVENT,
1716	WMI_TAG_PEER_ANTDIV_INFO,
1717	WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD,
1718	WMI_TAG_PDEV_ANTDIV_STATUS_EVENT,
1719	WMI_TAG_MNT_FILTER_CMD,
1720	WMI_TAG_GET_CHIP_POWER_STATS_CMD,
1721	WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT,
1722	WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD,
1723	WMI_TAG_COEX_REPORT_ISOLATION_EVENT,
1724	WMI_TAG_CHAN_CCA_STATS,
1725	WMI_TAG_PEER_SIGNAL_STATS,
1726	WMI_TAG_TX_STATS,
1727	WMI_TAG_PEER_AC_TX_STATS,
1728	WMI_TAG_RX_STATS,
1729	WMI_TAG_PEER_AC_RX_STATS,
1730	WMI_TAG_REPORT_STATS_EVENT,
1731	WMI_TAG_CHAN_CCA_STATS_THRESH,
1732	WMI_TAG_PEER_SIGNAL_STATS_THRESH,
1733	WMI_TAG_TX_STATS_THRESH,
1734	WMI_TAG_RX_STATS_THRESH,
1735	WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD,
1736	WMI_TAG_REQUEST_WLAN_STATS_CMD,
1737	WMI_TAG_RX_AGGR_FAILURE_EVENT,
1738	WMI_TAG_RX_AGGR_FAILURE_INFO,
1739	WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD,
1740	WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT,
1741	WMI_TAG_PDEV_BAND_TO_MAC,
1742	WMI_TAG_TBTT_OFFSET_INFO,
1743	WMI_TAG_TBTT_OFFSET_EXT_EVENT,
1744	WMI_TAG_SAR_LIMITS_CMD,
1745	WMI_TAG_SAR_LIMIT_CMD_ROW,
1746	WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
1747	WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD,
1748	WMI_TAG_VDEV_ADFS_CH_CFG_CMD,
1749	WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD,
1750	WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT,
1751	WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT,
1752	WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT,
1753	WMI_TAG_VENDOR_OUI,
1754	WMI_TAG_REQUEST_RCPI_CMD,
1755	WMI_TAG_UPDATE_RCPI_EVENT,
1756	WMI_TAG_REQUEST_PEER_STATS_INFO_CMD,
1757	WMI_TAG_PEER_STATS_INFO,
1758	WMI_TAG_PEER_STATS_INFO_EVENT,
1759	WMI_TAG_PKGID_EVENT,
1760	WMI_TAG_CONNECTED_NLO_RSSI_PARAMS,
1761	WMI_TAG_SET_CURRENT_COUNTRY_CMD,
1762	WMI_TAG_REGULATORY_RULE_STRUCT,
1763	WMI_TAG_REG_CHAN_LIST_CC_EVENT,
1764	WMI_TAG_11D_SCAN_START_CMD,
1765	WMI_TAG_11D_SCAN_STOP_CMD,
1766	WMI_TAG_11D_NEW_COUNTRY_EVENT,
1767	WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD,
1768	WMI_TAG_RADIO_CHAN_STATS,
1769	WMI_TAG_RADIO_CHAN_STATS_EVENT,
1770	WMI_TAG_ROAM_PER_CONFIG,
1771	WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD,
1772	WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT,
1773	WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD,
1774	WMI_TAG_HW_DATA_FILTER_CMD,
1775	WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF,
1776	WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT,
1777	WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED,
1778	WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD,
1779	WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT,
1780	WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD,
1781	WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD,
1782	WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT,
1783	WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD,
1784	WMI_TAG_MAC_PHY_CHAINMASK_COMBO,
1785	WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY,
1786	WMI_TAG_VDEV_SET_ARP_STATS_CMD,
1787	WMI_TAG_VDEV_GET_ARP_STATS_CMD,
1788	WMI_TAG_VDEV_GET_ARP_STATS_EVENT,
1789	WMI_TAG_IFACE_OFFLOAD_STATS,
1790	WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM,
1791	WMI_TAG_RSSI_CTL_EXT,
1792	WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR,
1793	WMI_TAG_COEX_BT_ACTIVITY_EVENT,
1794	WMI_TAG_VDEV_GET_TX_POWER_CMD,
1795	WMI_TAG_VDEV_TX_POWER_EVENT,
1796	WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT,
1797	WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD,
1798	WMI_TAG_TX_SEND_PARAMS,
1799	WMI_TAG_HE_RATE_SET,
1800	WMI_TAG_CONGESTION_STATS,
1801	WMI_TAG_SET_INIT_COUNTRY_CMD,
1802	WMI_TAG_SCAN_DBS_DUTY_CYCLE,
1803	WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV,
1804	WMI_TAG_PDEV_DIV_GET_RSSI_ANTID,
1805	WMI_TAG_THERM_THROT_CONFIG_REQUEST,
1806	WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO,
1807	WMI_TAG_THERM_THROT_STATS_EVENT,
1808	WMI_TAG_THERM_THROT_LEVEL_STATS_INFO,
1809	WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT,
1810	WMI_TAG_OEM_DMA_RING_CAPABILITIES,
1811	WMI_TAG_OEM_DMA_RING_CFG_REQ,
1812	WMI_TAG_OEM_DMA_RING_CFG_RSP,
1813	WMI_TAG_OEM_INDIRECT_DATA,
1814	WMI_TAG_OEM_DMA_BUF_RELEASE,
1815	WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY,
1816	WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1817	WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT,
1818	WMI_TAG_ROAM_LCA_DISALLOW_CONFIG,
1819	WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD,
1820	WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG,
1821	WMI_TAG_UNIT_TEST_EVENT,
1822	WMI_TAG_ROAM_FILS_OFFLOAD,
1823	WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD,
1824	WMI_TAG_PMK_CACHE,
1825	WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD,
1826	WMI_TAG_ROAM_FILS_SYNCH,
1827	WMI_TAG_GTK_OFFLOAD_EXTENDED,
1828	WMI_TAG_ROAM_BG_SCAN_ROAMING,
1829	WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD,
1830	WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD,
1831	WMI_TAG_OIC_PING_HANDOFF_EVENT,
1832	WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD,
1833	WMI_TAG_DHCP_LEASE_RENEW_EVENT,
1834	WMI_TAG_BTM_CONFIG,
1835	WMI_TAG_DEBUG_MESG_FW_DATA_STALL,
1836	WMI_TAG_WLM_CONFIG_CMD,
1837	WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST,
1838	WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT,
1839	WMI_TAG_ROAM_CND_SCORING_PARAM,
1840	WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION,
1841	WMI_TAG_VENDOR_OUI_EXT,
1842	WMI_TAG_ROAM_SYNCH_FRAME_EVENT,
1843	WMI_TAG_FD_SEND_FROM_HOST_CMD,
1844	WMI_TAG_ENABLE_FILS_CMD,
1845	WMI_TAG_HOST_SWFDA_EVENT,
1846	WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1847	WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD,
1848	WMI_TAG_STATS_PERIOD,
1849	WMI_TAG_NDL_SCHEDULE_UPDATE,
1850	WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD,
1851	WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE,
1852	WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD,
1853	WMI_TAG_SAR2_RESULT_EVENT,
1854	WMI_TAG_SAR_CAPABILITIES,
1855	WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD,
1856	WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT,
1857	WMI_TAG_DMA_RING_CAPABILITIES,
1858	WMI_TAG_DMA_RING_CFG_REQ,
1859	WMI_TAG_DMA_RING_CFG_RSP,
1860	WMI_TAG_DMA_BUF_RELEASE,
1861	WMI_TAG_DMA_BUF_RELEASE_ENTRY,
1862	WMI_TAG_SAR_GET_LIMITS_CMD,
1863	WMI_TAG_SAR_GET_LIMITS_EVENT,
1864	WMI_TAG_SAR_GET_LIMITS_EVENT_ROW,
1865	WMI_TAG_OFFLOAD_11K_REPORT,
1866	WMI_TAG_INVOKE_NEIGHBOR_REPORT,
1867	WMI_TAG_NEIGHBOR_REPORT_OFFLOAD,
1868	WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS,
1869	WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS,
1870	WMI_TAG_BPF_SET_VDEV_ENABLE_CMD,
1871	WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD,
1872	WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD,
1873	WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT,
1874	WMI_TAG_PDEV_GET_NFCAL_POWER,
1875	WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
1876	WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
1877	WMI_TAG_OBSS_COLOR_COLLISION_EVT,
1878	WMI_TAG_RUNTIME_DPD_RECAL_CMD,
1879	WMI_TAG_TWT_ENABLE_CMD,
1880	WMI_TAG_TWT_DISABLE_CMD,
1881	WMI_TAG_TWT_ADD_DIALOG_CMD,
1882	WMI_TAG_TWT_DEL_DIALOG_CMD,
1883	WMI_TAG_TWT_PAUSE_DIALOG_CMD,
1884	WMI_TAG_TWT_RESUME_DIALOG_CMD,
1885	WMI_TAG_TWT_ENABLE_COMPLETE_EVENT,
1886	WMI_TAG_TWT_DISABLE_COMPLETE_EVENT,
1887	WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT,
1888	WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT,
1889	WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT,
1890	WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT,
1891	WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD,
1892	WMI_TAG_ROAM_SCAN_STATS_EVENT,
1893	WMI_TAG_PEER_TID_CONFIGURATIONS_CMD,
1894	WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD,
1895	WMI_TAG_GET_TPC_POWER_CMD,
1896	WMI_TAG_GET_TPC_POWER_EVENT,
1897	WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA,
1898	WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD,
1899	WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD,
1900	WMI_TAG_MOTION_DET_START_STOP_CMD,
1901	WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD,
1902	WMI_TAG_MOTION_DET_EVENT,
1903	WMI_TAG_MOTION_DET_BASE_LINE_EVENT,
1904	WMI_TAG_NDP_TRANSPORT_IP,
1905	WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
1906	WMI_TAG_ESP_ESTIMATE_EVENT,
1907	WMI_TAG_NAN_HOST_CONFIG,
1908	WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS,
1909	WMI_TAG_PEER_CFR_CAPTURE_CMD,
1910	WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD,
1911	WMI_TAG_CHAN_WIDTH_PEER_LIST,
1912	WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD,
1913	WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD,
1914	WMI_TAG_PEER_EXTD2_STATS,
1915	WMI_TAG_HPCS_PULSE_START_CMD,
1916	WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT,
1917	WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD,
1918	WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD,
1919	WMI_TAG_NAN_EVENT_INFO,
1920	WMI_TAG_NDP_CHANNEL_INFO,
1921	WMI_TAG_NDP_CMD,
1922	WMI_TAG_NDP_EVENT,
1923	/* TODO add all the missing cmds */
1924	WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301,
1925	WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO,
1926	WMI_TAG_SERVICE_READY_EXT2_EVENT = 0x334,
1927	WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344,
1928	WMI_TAG_MAC_PHY_CAPABILITIES_EXT = 0x36F,
1929	WMI_TAG_REGULATORY_RULE_EXT_STRUCT = 0x3A9,
1930	WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT,
1931	WMI_TAG_EHT_RATE_SET = 0x3C4,
1932	WMI_TAG_MAX
1933	};
1934
1935	enum wmi_tlv_service {
1936	WMI_TLV_SERVICE_BEACON_OFFLOAD = 0,
1937	WMI_TLV_SERVICE_SCAN_OFFLOAD = 1,
1938	WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2,
1939	WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3,
1940	WMI_TLV_SERVICE_STA_PWRSAVE = 4,
1941	WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5,
1942	WMI_TLV_SERVICE_AP_UAPSD = 6,
1943	WMI_TLV_SERVICE_AP_DFS = 7,
1944	WMI_TLV_SERVICE_11AC = 8,
1945	WMI_TLV_SERVICE_BLOCKACK = 9,
1946	WMI_TLV_SERVICE_PHYERR = 10,
1947	WMI_TLV_SERVICE_BCN_FILTER = 11,
1948	WMI_TLV_SERVICE_RTT = 12,
1949	WMI_TLV_SERVICE_WOW = 13,
1950	WMI_TLV_SERVICE_RATECTRL_CACHE = 14,
1951	WMI_TLV_SERVICE_IRAM_TIDS = 15,
1952	WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16,
1953	WMI_TLV_SERVICE_NLO = 17,
1954	WMI_TLV_SERVICE_GTK_OFFLOAD = 18,
1955	WMI_TLV_SERVICE_SCAN_SCH = 19,
1956	WMI_TLV_SERVICE_CSA_OFFLOAD = 20,
1957	WMI_TLV_SERVICE_CHATTER = 21,
1958	WMI_TLV_SERVICE_COEX_FREQAVOID = 22,
1959	WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23,
1960	WMI_TLV_SERVICE_FORCE_FW_HANG = 24,
1961	WMI_TLV_SERVICE_GPIO = 25,
1962	WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26,
1963	WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27,
1964	WMI_STA_UAPSD_VAR_AUTO_TRIG = 28,
1965	WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29,
1966	WMI_TLV_SERVICE_TX_ENCAP = 30,
1967	WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31,
1968	WMI_TLV_SERVICE_EARLY_RX = 32,
1969	WMI_TLV_SERVICE_STA_SMPS = 33,
1970	WMI_TLV_SERVICE_FWTEST = 34,
1971	WMI_TLV_SERVICE_STA_WMMAC = 35,
1972	WMI_TLV_SERVICE_TDLS = 36,
1973	WMI_TLV_SERVICE_BURST = 37,
1974	WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38,
1975	WMI_TLV_SERVICE_ADAPTIVE_OCS = 39,
1976	WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40,
1977	WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41,
1978	WMI_TLV_SERVICE_WLAN_HB = 42,
1979	WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43,
1980	WMI_TLV_SERVICE_BATCH_SCAN = 44,
1981	WMI_TLV_SERVICE_QPOWER = 45,
1982	WMI_TLV_SERVICE_PLMREQ = 46,
1983	WMI_TLV_SERVICE_THERMAL_MGMT = 47,
1984	WMI_TLV_SERVICE_RMC = 48,
1985	WMI_TLV_SERVICE_MHF_OFFLOAD = 49,
1986	WMI_TLV_SERVICE_COEX_SAR = 50,
1987	WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51,
1988	WMI_TLV_SERVICE_NAN = 52,
1989	WMI_TLV_SERVICE_L1SS_STAT = 53,
1990	WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54,
1991	WMI_TLV_SERVICE_OBSS_SCAN = 55,
1992	WMI_TLV_SERVICE_TDLS_OFFCHAN = 56,
1993	WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57,
1994	WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58,
1995	WMI_TLV_SERVICE_IBSS_PWRSAVE = 59,
1996	WMI_TLV_SERVICE_LPASS = 60,
1997	WMI_TLV_SERVICE_EXTSCAN = 61,
1998	WMI_TLV_SERVICE_D0WOW = 62,
1999	WMI_TLV_SERVICE_HSOFFLOAD = 63,
2000	WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64,
2001	WMI_TLV_SERVICE_RX_FULL_REORDER = 65,
2002	WMI_TLV_SERVICE_DHCP_OFFLOAD = 66,
2003	WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67,
2004	WMI_TLV_SERVICE_MDNS_OFFLOAD = 68,
2005	WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69,
2006	WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70,
2007	WMI_TLV_SERVICE_OCB = 71,
2008	WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72,
2009	WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73,
2010	WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74,
2011	WMI_TLV_SERVICE_MGMT_TX_HTT = 75,
2012	WMI_TLV_SERVICE_MGMT_TX_WMI = 76,
2013	WMI_TLV_SERVICE_EXT_MSG = 77,
2014	WMI_TLV_SERVICE_MAWC = 78,
2015	WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79,
2016	WMI_TLV_SERVICE_EGAP = 80,
2017	WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81,
2018	WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82,
2019	WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83,
2020	WMI_TLV_SERVICE_ATF = 84,
2021	WMI_TLV_SERVICE_COEX_GPIO = 85,
2022	WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86,
2023	WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87,
2024	WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88,
2025	WMI_TLV_SERVICE_ENTERPRISE_MESH = 89,
2026	WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90,
2027	WMI_TLV_SERVICE_BPF_OFFLOAD = 91,
2028	WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92,
2029	WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93,
2030	WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94,
2031	WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95,
2032	WMI_TLV_SERVICE_NAN_DATA = 96,
2033	WMI_TLV_SERVICE_NAN_RTT = 97,
2034	WMI_TLV_SERVICE_11AX = 98,
2035	WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99,
2036	WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100,
2037	WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101,
2038	WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102,
2039	WMI_TLV_SERVICE_MESH_11S = 103,
2040	WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104,
2041	WMI_TLV_SERVICE_VDEV_RX_FILTER = 105,
2042	WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106,
2043	WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107,
2044	WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108,
2045	WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109,
2046	WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110,
2047	WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111,
2048	WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112,
2049	WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113,
2050	WMI_TLV_SERVICE_RCPI_SUPPORT = 114,
2051	WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115,
2052	WMI_TLV_SERVICE_PEER_STATS_INFO = 116,
2053	WMI_TLV_SERVICE_REGULATORY_DB = 117,
2054	WMI_TLV_SERVICE_11D_OFFLOAD = 118,
2055	WMI_TLV_SERVICE_HW_DATA_FILTERING = 119,
2056	WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120,
2057	WMI_TLV_SERVICE_PKT_ROUTING = 121,
2058	WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122,
2059	WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123,
2060	WMI_TLV_SERVICE_8SS_TX_BFEE = 124,
2061	WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125,
2062	WMI_TLV_SERVICE_ACK_TIMEOUT = 126,
2063	WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127,
2064
2065	WMI_MAX_SERVICE = 128,
2066
2067	WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128,
2068	WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129,
2069	WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130,
2070	WMI_TLV_SERVICE_FILS_SUPPORT = 131,
2071	WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132,
2072	WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133,
2073	WMI_TLV_SERVICE_MAWC_SUPPORT = 134,
2074	WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135,
2075	WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136,
2076	WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137,
2077	WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138,
2078	WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139,
2079	WMI_TLV_SERVICE_THERM_THROT = 140,
2080	WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141,
2081	WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142,
2082	WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143,
2083	WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144,
2084	WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145,
2085	WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146,
2086	WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147,
2087	WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148,
2088	WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149,
2089	WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150,
2090	WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151,
2091	WMI_TLV_SERVICE_STA_TWT = 152,
2092	WMI_TLV_SERVICE_AP_TWT = 153,
2093	WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154,
2094	WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155,
2095	WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156,
2096	WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157,
2097	WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158,
2098	WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159,
2099	WMI_TLV_SERVICE_MOTION_DET = 160,
2100	WMI_TLV_SERVICE_INFRA_MBSSID = 161,
2101	WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162,
2102	WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163,
2103	WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164,
2104	WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165,
2105	WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166,
2106	WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167,
2107	WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168,
2108	WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169,
2109	WMI_TLV_SERVICE_ESP_SUPPORT = 170,
2110	WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171,
2111	WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172,
2112	WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173,
2113	WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174,
2114	WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175,
2115	WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176,
2116	WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177,
2117	WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178,
2118	WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179,
2119	WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180,
2120	WMI_TLV_SERVICE_FETCH_TX_PN = 181,
2121	WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182,
2122	WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183,
2123	WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184,
2124	WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185,
2125	WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186,
2126	WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187,
2127	WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188,
2128	WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189,
2129	WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190,
2130	WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191,
2131	WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192,
2132	WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193,
2133	WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194,
2134	WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195,
2135	WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196,
2136	WMI_TLV_SERVICE_VOW_ENABLE = 197,
2137	WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198,
2138	WMI_TLV_SERVICE_BROADCAST_TWT = 199,
2139	WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200,
2140	WMI_TLV_SERVICE_PS_TDCC = 201,
2141	WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY = 202,
2142	WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203,
2143	WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204,
2144	WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205,
2145	WMI_TLV_SERVICE_WPA3_FT_FILS = 206,
2146	WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207,
2147	WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208,
2148	WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209,
2149	WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210,
2150	WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211,
2151	WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212,
2152	WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213,
2153	WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219,
2154	WMI_TLV_SERVICE_EXT2_MSG = 220,
2155
2156	WMI_MAX_EXT_SERVICE = 256,
2157
2158	WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281,
2159
2160	WMI_TLV_SERVICE_11BE = 289,
2161
2162	WMI_TLV_SERVICE_WMSK_COMPACTION_RX_TLVS = 361,
2163
2164	WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT = 365,
2165
2166	WMI_MAX_EXT2_SERVICE,
2167	};
2168
2169	enum {
2170	WMI_SMPS_FORCED_MODE_NONE = 0,
2171	WMI_SMPS_FORCED_MODE_DISABLED,
2172	WMI_SMPS_FORCED_MODE_STATIC,
2173	WMI_SMPS_FORCED_MODE_DYNAMIC
2174	};
2175
2176	enum wmi_tpc_chainmask {
2177	WMI_TPC_CHAINMASK_CONFIG_BAND_2G = 0,
2178	WMI_TPC_CHAINMASK_CONFIG_BAND_5G = 1,
2179	WMI_NUM_SUPPORTED_BAND_MAX = 2,
2180	};
2181
2182	enum wmi_peer_param {
2183	WMI_PEER_MIMO_PS_STATE = 1,
2184	WMI_PEER_AMPDU = 2,
2185	WMI_PEER_AUTHORIZE = 3,
2186	WMI_PEER_CHWIDTH = 4,
2187	WMI_PEER_NSS = 5,
2188	WMI_PEER_USE_4ADDR = 6,
2189	WMI_PEER_MEMBERSHIP = 7,
2190	WMI_PEER_USERPOS = 8,
2191	WMI_PEER_CRIT_PROTO_HINT_ENABLED = 9,
2192	WMI_PEER_TX_FAIL_CNT_THR = 10,
2193	WMI_PEER_SET_HW_RETRY_CTS2S = 11,
2194	WMI_PEER_IBSS_ATIM_WINDOW_LENGTH = 12,
2195	WMI_PEER_PHYMODE = 13,
2196	WMI_PEER_USE_FIXED_PWR = 14,
2197	WMI_PEER_PARAM_FIXED_RATE = 15,
2198	WMI_PEER_SET_MU_WHITELIST = 16,
2199	WMI_PEER_SET_MAX_TX_RATE = 17,
2200	WMI_PEER_SET_MIN_TX_RATE = 18,
2201	WMI_PEER_SET_DEFAULT_ROUTING = 19,
2202	};
2203
2204	enum wmi_slot_time {
2205	WMI_VDEV_SLOT_TIME_LONG = 1,
2206	WMI_VDEV_SLOT_TIME_SHORT = 2,
2207	};
2208
2209	enum wmi_preamble {
2210	WMI_VDEV_PREAMBLE_LONG = 1,
2211	WMI_VDEV_PREAMBLE_SHORT = 2,
2212	};
2213
2214	enum wmi_peer_smps_state {
2215	WMI_PEER_SMPS_PS_NONE = 0,
2216	WMI_PEER_SMPS_STATIC = 1,
2217	WMI_PEER_SMPS_DYNAMIC = 2
2218	};
2219
2220	enum wmi_peer_chwidth {
2221	WMI_PEER_CHWIDTH_20MHZ = 0,
2222	WMI_PEER_CHWIDTH_40MHZ = 1,
2223	WMI_PEER_CHWIDTH_80MHZ = 2,
2224	WMI_PEER_CHWIDTH_160MHZ = 3,
2225	WMI_PEER_CHWIDTH_320MHZ = 4,
2226	};
2227
2228	enum wmi_beacon_gen_mode {
2229	WMI_BEACON_STAGGERED_MODE = 0,
2230	WMI_BEACON_BURST_MODE = 1
2231	};
2232
2233	enum wmi_direct_buffer_module {
2234	WMI_DIRECT_BUF_SPECTRAL = 0,
2235	WMI_DIRECT_BUF_CFR = 1,
2236
2237	/* keep it last */
2238	WMI_DIRECT_BUF_MAX
2239	};
2240
2241	struct ath12k_wmi_pdev_band_arg {
2242	u32 pdev_id;
2243	u32 start_freq;
2244	u32 end_freq;
2245	};
2246
2247	struct ath12k_wmi_ppe_threshold_arg {
2248	u32 numss_m1;
2249	u32 ru_bit_mask;
2250	u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS];
2251	};
2252
2253	#define PSOC_HOST_MAX_PHY_SIZE (3)
2254	#define ATH12K_11B_SUPPORT BIT(0)
2255	#define ATH12K_11G_SUPPORT BIT(1)
2256	#define ATH12K_11A_SUPPORT BIT(2)
2257	#define ATH12K_11N_SUPPORT BIT(3)
2258	#define ATH12K_11AC_SUPPORT BIT(4)
2259	#define ATH12K_11AX_SUPPORT BIT(5)
2260
2261	struct ath12k_wmi_hal_reg_capabilities_ext_arg {
2262	u32 phy_id;
2263	u32 eeprom_reg_domain;
2264	u32 eeprom_reg_domain_ext;
2265	u32 regcap1;
2266	u32 regcap2;
2267	u32 wireless_modes;
2268	u32 low_2ghz_chan;
2269	u32 high_2ghz_chan;
2270	u32 low_5ghz_chan;
2271	u32 high_5ghz_chan;
2272	};
2273
2274	#define WMI_HOST_MAX_PDEV 3
2275
2276	struct ath12k_wmi_host_mem_chunk_params {
2277	__le32 tlv_header;
2278	__le32 req_id;
2279	__le32 ptr;
2280	__le32 size;
2281	} __packed;
2282
2283	struct ath12k_wmi_host_mem_chunk_arg {
2284	void *vaddr;
2285	dma_addr_t paddr;
2286	u32 len;
2287	u32 req_id;
2288	};
2289
2290	struct ath12k_wmi_resource_config_arg {
2291	u32 num_vdevs;
2292	u32 num_peers;
2293	u32 num_active_peers;
2294	u32 num_offload_peers;
2295	u32 num_offload_reorder_buffs;
2296	u32 num_peer_keys;
2297	u32 num_tids;
2298	u32 ast_skid_limit;
2299	u32 tx_chain_mask;
2300	u32 rx_chain_mask;
2301	u32 rx_timeout_pri[4];
2302	u32 rx_decap_mode;
2303	u32 scan_max_pending_req;
2304	u32 bmiss_offload_max_vdev;
2305	u32 roam_offload_max_vdev;
2306	u32 roam_offload_max_ap_profiles;
2307	u32 num_mcast_groups;
2308	u32 num_mcast_table_elems;
2309	u32 mcast2ucast_mode;
2310	u32 tx_dbg_log_size;
2311	u32 num_wds_entries;
2312	u32 dma_burst_size;
2313	u32 mac_aggr_delim;
2314	u32 rx_skip_defrag_timeout_dup_detection_check;
2315	u32 vow_config;
2316	u32 gtk_offload_max_vdev;
2317	u32 num_msdu_desc;
2318	u32 max_frag_entries;
2319	u32 max_peer_ext_stats;
2320	u32 smart_ant_cap;
2321	u32 bk_minfree;
2322	u32 be_minfree;
2323	u32 vi_minfree;
2324	u32 vo_minfree;
2325	u32 rx_batchmode;
2326	u32 tt_support;
2327	u32 atf_config;
2328	u32 iphdr_pad_config;
2329	u32 qwrap_config:16,
2330	alloc_frag_desc_for_data_pkt:16;
2331	u32 num_tdls_vdevs;
2332	u32 num_tdls_conn_table_entries;
2333	u32 beacon_tx_offload_max_vdev;
2334	u32 num_multicast_filter_entries;
2335	u32 num_wow_filters;
2336	u32 num_keep_alive_pattern;
2337	u32 keep_alive_pattern_size;
2338	u32 max_tdls_concurrent_sleep_sta;
2339	u32 max_tdls_concurrent_buffer_sta;
2340	u32 wmi_send_separate;
2341	u32 num_ocb_vdevs;
2342	u32 num_ocb_channels;
2343	u32 num_ocb_schedules;
2344	u32 num_ns_ext_tuples_cfg;
2345	u32 bpf_instruction_size;
2346	u32 max_bssid_rx_filters;
2347	u32 use_pdev_id;
2348	u32 peer_map_unmap_version;
2349	u32 sched_params;
2350	u32 twt_ap_pdev_count;
2351	u32 twt_ap_sta_count;
2352	bool is_reg_cc_ext_event_supported;
2353	u8 dp_peer_meta_data_ver;
2354	};
2355
2356	struct ath12k_wmi_init_cmd_arg {
2357	struct ath12k_wmi_resource_config_arg res_cfg;
2358	u8 num_mem_chunks;
2359	struct ath12k_wmi_host_mem_chunk_arg *mem_chunks;
2360	u32 hw_mode_id;
2361	u32 num_band_to_mac;
2362	struct ath12k_wmi_pdev_band_arg band_to_mac[WMI_HOST_MAX_PDEV];
2363	};
2364
2365	struct ath12k_wmi_pdev_band_to_mac_params {
2366	__le32 tlv_header;
2367	__le32 pdev_id;
2368	__le32 start_freq;
2369	__le32 end_freq;
2370	} __packed;
2371
2372	/* This is both individual command WMI_PDEV_SET_HW_MODE_CMDID and also part
2373	* of WMI_TAG_INIT_CMD.
2374	*/
2375	struct ath12k_wmi_pdev_set_hw_mode_cmd {
2376	__le32 tlv_header;
2377	__le32 pdev_id;
2378	__le32 hw_mode_index;
2379	__le32 num_band_to_mac;
2380	} __packed;
2381
2382	struct ath12k_wmi_ppe_threshold_params {
2383	__le32 numss_m1; /** NSS - 1*/
2384	__le32 ru_info;
2385	__le32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS];
2386	} __packed;
2387
2388	#define HW_BD_INFO_SIZE 5
2389
2390	struct ath12k_wmi_abi_version_params {
2391	__le32 abi_version_0;
2392	__le32 abi_version_1;
2393	__le32 abi_version_ns_0;
2394	__le32 abi_version_ns_1;
2395	__le32 abi_version_ns_2;
2396	__le32 abi_version_ns_3;
2397	} __packed;
2398
2399	struct wmi_init_cmd {
2400	__le32 tlv_header;
2401	struct ath12k_wmi_abi_version_params host_abi_vers;
2402	__le32 num_host_mem_chunks;
2403	} __packed;
2404
2405	#define WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT 4
2406	#define WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION GENMASK(5, 4)
2407
2408	struct ath12k_wmi_resource_config_params {
2409	__le32 tlv_header;
2410	__le32 num_vdevs;
2411	__le32 num_peers;
2412	__le32 num_offload_peers;
2413	__le32 num_offload_reorder_buffs;
2414	__le32 num_peer_keys;
2415	__le32 num_tids;
2416	__le32 ast_skid_limit;
2417	__le32 tx_chain_mask;
2418	__le32 rx_chain_mask;
2419	__le32 rx_timeout_pri[4];
2420	__le32 rx_decap_mode;
2421	__le32 scan_max_pending_req;
2422	__le32 bmiss_offload_max_vdev;
2423	__le32 roam_offload_max_vdev;
2424	__le32 roam_offload_max_ap_profiles;
2425	__le32 num_mcast_groups;
2426	__le32 num_mcast_table_elems;
2427	__le32 mcast2ucast_mode;
2428	__le32 tx_dbg_log_size;
2429	__le32 num_wds_entries;
2430	__le32 dma_burst_size;
2431	__le32 mac_aggr_delim;
2432	__le32 rx_skip_defrag_timeout_dup_detection_check;
2433	__le32 vow_config;
2434	__le32 gtk_offload_max_vdev;
2435	__le32 num_msdu_desc;
2436	__le32 max_frag_entries;
2437	__le32 num_tdls_vdevs;
2438	__le32 num_tdls_conn_table_entries;
2439	__le32 beacon_tx_offload_max_vdev;
2440	__le32 num_multicast_filter_entries;
2441	__le32 num_wow_filters;
2442	__le32 num_keep_alive_pattern;
2443	__le32 keep_alive_pattern_size;
2444	__le32 max_tdls_concurrent_sleep_sta;
2445	__le32 max_tdls_concurrent_buffer_sta;
2446	__le32 wmi_send_separate;
2447	__le32 num_ocb_vdevs;
2448	__le32 num_ocb_channels;
2449	__le32 num_ocb_schedules;
2450	__le32 flag1;
2451	__le32 smart_ant_cap;
2452	__le32 bk_minfree;
2453	__le32 be_minfree;
2454	__le32 vi_minfree;
2455	__le32 vo_minfree;
2456	__le32 alloc_frag_desc_for_data_pkt;
2457	__le32 num_ns_ext_tuples_cfg;
2458	__le32 bpf_instruction_size;
2459	__le32 max_bssid_rx_filters;
2460	__le32 use_pdev_id;
2461	__le32 max_num_dbs_scan_duty_cycle;
2462	__le32 max_num_group_keys;
2463	__le32 peer_map_unmap_version;
2464	__le32 sched_params;
2465	__le32 twt_ap_pdev_count;
2466	__le32 twt_ap_sta_count;
2467	__le32 max_nlo_ssids;
2468	__le32 num_pkt_filters;
2469	__le32 num_max_sta_vdevs;
2470	__le32 max_bssid_indicator;
2471	__le32 ul_resp_config;
2472	__le32 msdu_flow_override_config0;
2473	__le32 msdu_flow_override_config1;
2474	__le32 flags2;
2475	__le32 host_service_flags;
2476	__le32 max_rnr_neighbours;
2477	__le32 ema_max_vap_cnt;
2478	__le32 ema_max_profile_period;
2479	} __packed;
2480
2481	struct wmi_service_ready_event {
2482	__le32 fw_build_vers;
2483	struct ath12k_wmi_abi_version_params fw_abi_vers;
2484	__le32 phy_capability;
2485	__le32 max_frag_entry;
2486	__le32 num_rf_chains;
2487	__le32 ht_cap_info;
2488	__le32 vht_cap_info;
2489	__le32 vht_supp_mcs;
2490	__le32 hw_min_tx_power;
2491	__le32 hw_max_tx_power;
2492	__le32 sys_cap_info;
2493	__le32 min_pkt_size_enable;
2494	__le32 max_bcn_ie_size;
2495	__le32 num_mem_reqs;
2496	__le32 max_num_scan_channels;
2497	__le32 hw_bd_id;
2498	__le32 hw_bd_info[HW_BD_INFO_SIZE];
2499	__le32 max_supported_macs;
2500	__le32 wmi_fw_sub_feat_caps;
2501	__le32 num_dbs_hw_modes;
2502	/* txrx_chainmask
2503	* [7:0] - 2G band tx chain mask
2504	* [15:8] - 2G band rx chain mask
2505	* [23:16] - 5G band tx chain mask
2506	* [31:24] - 5G band rx chain mask
2507	*/
2508	__le32 txrx_chainmask;
2509	__le32 default_dbs_hw_mode_index;
2510	__le32 num_msdu_desc;
2511	} __packed;
2512
2513	#define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32))
2514
2515	#define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */
2516	#define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32))
2517	#define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32
2518	#define WMI_SERVICE_BITS_IN_SIZE32 4
2519
2520	struct wmi_service_ready_ext_event {
2521	__le32 default_conc_scan_config_bits;
2522	__le32 default_fw_config_bits;
2523	struct ath12k_wmi_ppe_threshold_params ppet;
2524	__le32 he_cap_info;
2525	__le32 mpdu_density;
2526	__le32 max_bssid_rx_filters;
2527	__le32 fw_build_vers_ext;
2528	__le32 max_nlo_ssids;
2529	__le32 max_bssid_indicator;
2530	__le32 he_cap_info_ext;
2531	} __packed;
2532
2533	struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params {
2534	__le32 num_hw_modes;
2535	__le32 num_chainmask_tables;
2536	} __packed;
2537
2538	struct ath12k_wmi_hw_mode_cap_params {
2539	__le32 tlv_header;
2540	__le32 hw_mode_id;
2541	__le32 phy_id_map;
2542	__le32 hw_mode_config_type;
2543	} __packed;
2544
2545	#define WMI_MAX_HECAP_PHY_SIZE (3)
2546
2547	/* pdev_id is present in lower 16 bits of pdev_and_hw_link_ids in
2548	* ath12k_wmi_mac_phy_caps_params & ath12k_wmi_caps_ext_params.
2549	*
2550	* hw_link_id is present in higher 16 bits of pdev_and_hw_link_ids.
2551	*/
2552	#define WMI_CAPS_PARAMS_PDEV_ID GENMASK(15, 0)
2553	#define WMI_CAPS_PARAMS_HW_LINK_ID GENMASK(31, 16)
2554
2555	struct ath12k_wmi_mac_phy_caps_params {
2556	__le32 hw_mode_id;
2557	__le32 pdev_and_hw_link_ids;
2558	__le32 phy_id;
2559	__le32 supported_flags;
2560	__le32 supported_bands;
2561	__le32 ampdu_density;
2562	__le32 max_bw_supported_2g;
2563	__le32 ht_cap_info_2g;
2564	__le32 vht_cap_info_2g;
2565	__le32 vht_supp_mcs_2g;
2566	__le32 he_cap_info_2g;
2567	__le32 he_supp_mcs_2g;
2568	__le32 tx_chain_mask_2g;
2569	__le32 rx_chain_mask_2g;
2570	__le32 max_bw_supported_5g;
2571	__le32 ht_cap_info_5g;
2572	__le32 vht_cap_info_5g;
2573	__le32 vht_supp_mcs_5g;
2574	__le32 he_cap_info_5g;
2575	__le32 he_supp_mcs_5g;
2576	__le32 tx_chain_mask_5g;
2577	__le32 rx_chain_mask_5g;
2578	__le32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE];
2579	__le32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE];
2580	struct ath12k_wmi_ppe_threshold_params he_ppet2g;
2581	struct ath12k_wmi_ppe_threshold_params he_ppet5g;
2582	__le32 chainmask_table_id;
2583	__le32 lmac_id;
2584	__le32 he_cap_info_2g_ext;
2585	__le32 he_cap_info_5g_ext;
2586	__le32 he_cap_info_internal;
2587	} __packed;
2588
2589	struct ath12k_wmi_hal_reg_caps_ext_params {
2590	__le32 tlv_header;
2591	__le32 phy_id;
2592	__le32 eeprom_reg_domain;
2593	__le32 eeprom_reg_domain_ext;
2594	__le32 regcap1;
2595	__le32 regcap2;
2596	__le32 wireless_modes;
2597	__le32 low_2ghz_chan;
2598	__le32 high_2ghz_chan;
2599	__le32 low_5ghz_chan;
2600	__le32 high_5ghz_chan;
2601	} __packed;
2602
2603	struct ath12k_wmi_soc_hal_reg_caps_params {
2604	__le32 num_phy;
2605	} __packed;
2606
2607	#define WMI_MAX_EHTCAP_MAC_SIZE 2
2608	#define WMI_MAX_EHTCAP_PHY_SIZE 3
2609	#define WMI_MAX_EHTCAP_RATE_SET 3
2610
2611	/* Used for EHT MCS-NSS array. Data at each array index follows the format given
2612	* in IEEE P802.11be/D2.0, May 20229.4.2.313.4.
2613	*
2614	* Index interpretation:
2615	* 0 - 20 MHz only sta, all 4 bytes valid
2616	* 1 - index for bandwidths <= 80 MHz except 20 MHz-only, first 3 bytes valid
2617	* 2 - index for 160 MHz, first 3 bytes valid
2618	* 3 - index for 320 MHz, first 3 bytes valid
2619	*/
2620	#define WMI_MAX_EHT_SUPP_MCS_2G_SIZE 2
2621	#define WMI_MAX_EHT_SUPP_MCS_5G_SIZE 4
2622
2623	#define WMI_EHTCAP_TXRX_MCS_NSS_IDX_80 0
2624	#define WMI_EHTCAP_TXRX_MCS_NSS_IDX_160 1
2625	#define WMI_EHTCAP_TXRX_MCS_NSS_IDX_320 2
2626
2627	#define WMI_EHT_MCS_NSS_0_7 GENMASK(3, 0)
2628	#define WMI_EHT_MCS_NSS_8_9 GENMASK(7, 4)
2629	#define WMI_EHT_MCS_NSS_10_11 GENMASK(11, 8)
2630	#define WMI_EHT_MCS_NSS_12_13 GENMASK(15, 12)
2631
2632	struct wmi_service_ready_ext2_event {
2633	__le32 reg_db_version;
2634	__le32 hw_min_max_tx_power_2ghz;
2635	__le32 hw_min_max_tx_power_5ghz;
2636	__le32 chwidth_num_peer_caps;
2637	__le32 preamble_puncture_bw;
2638	__le32 max_user_per_ppdu_ofdma;
2639	__le32 max_user_per_ppdu_mumimo;
2640	__le32 target_cap_flags;
2641	__le32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE];
2642	__le32 max_num_linkview_peers;
2643	__le32 max_num_msduq_supported_per_tid;
2644	__le32 default_num_msduq_supported_per_tid;
2645	} __packed;
2646
2647	struct ath12k_wmi_caps_ext_params {
2648	__le32 hw_mode_id;
2649	__le32 pdev_and_hw_link_ids;
2650	__le32 phy_id;
2651	__le32 wireless_modes_ext;
2652	__le32 eht_cap_mac_info_2ghz[WMI_MAX_EHTCAP_MAC_SIZE];
2653	__le32 eht_cap_mac_info_5ghz[WMI_MAX_EHTCAP_MAC_SIZE];
2654	__le32 rsvd0[2];
2655	__le32 eht_cap_phy_info_2ghz[WMI_MAX_EHTCAP_PHY_SIZE];
2656	__le32 eht_cap_phy_info_5ghz[WMI_MAX_EHTCAP_PHY_SIZE];
2657	struct ath12k_wmi_ppe_threshold_params eht_ppet_2ghz;
2658	struct ath12k_wmi_ppe_threshold_params eht_ppet_5ghz;
2659	__le32 eht_cap_info_internal;
2660	__le32 eht_supp_mcs_ext_2ghz[WMI_MAX_EHT_SUPP_MCS_2G_SIZE];
2661	__le32 eht_supp_mcs_ext_5ghz[WMI_MAX_EHT_SUPP_MCS_5G_SIZE];
2662	} __packed;
2663
2664	/* 2 word representation of MAC addr */
2665	struct ath12k_wmi_mac_addr_params {
2666	u8 addr[ETH_ALEN];
2667	u8 padding[2];
2668	} __packed;
2669
2670	struct ath12k_wmi_dma_ring_caps_params {
2671	__le32 tlv_header;
2672	__le32 pdev_id;
2673	__le32 module_id;
2674	__le32 min_elem;
2675	__le32 min_buf_sz;
2676	__le32 min_buf_align;
2677	} __packed;
2678
2679	struct ath12k_wmi_ready_event_min_params {
2680	struct ath12k_wmi_abi_version_params fw_abi_vers;
2681	struct ath12k_wmi_mac_addr_params mac_addr;
2682	__le32 status;
2683	__le32 num_dscp_table;
2684	__le32 num_extra_mac_addr;
2685	__le32 num_total_peers;
2686	__le32 num_extra_peers;
2687	} __packed;
2688
2689	struct wmi_ready_event {
2690	struct ath12k_wmi_ready_event_min_params ready_event_min;
2691	__le32 max_ast_index;
2692	__le32 pktlog_defs_checksum;
2693	} __packed;
2694
2695	struct wmi_service_available_event {
2696	__le32 wmi_service_segment_offset;
2697	__le32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32];
2698	} __packed;
2699
2700	struct ath12k_wmi_vdev_create_arg {
2701	u8 if_id;
2702	u32 type;
2703	u32 subtype;
2704	struct {
2705	u8 tx;
2706	u8 rx;
2707	} chains[NUM_NL80211_BANDS];
2708	u32 pdev_id;
2709	u8 if_stats_id;
2710	};
2711
2712	#define ATH12K_MAX_VDEV_STATS_ID 0x30
2713	#define ATH12K_INVAL_VDEV_STATS_ID 0xFF
2714
2715	struct wmi_vdev_create_cmd {
2716	__le32 tlv_header;
2717	__le32 vdev_id;
2718	__le32 vdev_type;
2719	__le32 vdev_subtype;
2720	struct ath12k_wmi_mac_addr_params vdev_macaddr;
2721	__le32 num_cfg_txrx_streams;
2722	__le32 pdev_id;
2723	__le32 mbssid_flags;
2724	__le32 mbssid_tx_vdev_id;
2725	__le32 vdev_stats_id_valid;
2726	__le32 vdev_stats_id;
2727	} __packed;
2728
2729	struct ath12k_wmi_vdev_txrx_streams_params {
2730	__le32 tlv_header;
2731	u32 band;
2732	u32 supported_tx_streams;
2733	u32 supported_rx_streams;
2734	} __packed;
2735
2736	struct wmi_vdev_delete_cmd {
2737	__le32 tlv_header;
2738	__le32 vdev_id;
2739	} __packed;
2740
2741	struct wmi_vdev_up_cmd {
2742	__le32 tlv_header;
2743	__le32 vdev_id;
2744	__le32 vdev_assoc_id;
2745	struct ath12k_wmi_mac_addr_params vdev_bssid;
2746	struct ath12k_wmi_mac_addr_params trans_bssid;
2747	__le32 profile_idx;
2748	__le32 profile_num;
2749	} __packed;
2750
2751	struct wmi_vdev_stop_cmd {
2752	__le32 tlv_header;
2753	__le32 vdev_id;
2754	} __packed;
2755
2756	struct wmi_vdev_down_cmd {
2757	__le32 tlv_header;
2758	__le32 vdev_id;
2759	} __packed;
2760
2761	#define WMI_VDEV_START_HIDDEN_SSID BIT(0)
2762	#define WMI_VDEV_START_PMF_ENABLED BIT(1)
2763	#define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3)
2764
2765	#define ATH12K_WMI_SSID_LEN 32
2766
2767	struct ath12k_wmi_ssid_params {
2768	__le32 ssid_len;
2769	u8 ssid[ATH12K_WMI_SSID_LEN];
2770	} __packed;
2771
2772	#define ATH12K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ)
2773
2774	enum wmi_vdev_mbssid_flags {
2775	WMI_VDEV_MBSSID_FLAGS_NON_MBSSID_AP = BIT(0),
2776	};
2777
2778	struct wmi_vdev_start_request_cmd {
2779	__le32 tlv_header;
2780	__le32 vdev_id;
2781	__le32 requestor_id;
2782	__le32 beacon_interval;
2783	__le32 dtim_period;
2784	__le32 flags;
2785	struct ath12k_wmi_ssid_params ssid;
2786	__le32 bcn_tx_rate;
2787	__le32 bcn_txpower;
2788	__le32 num_noa_descriptors;
2789	__le32 disable_hw_ack;
2790	__le32 preferred_tx_streams;
2791	__le32 preferred_rx_streams;
2792	__le32 he_ops;
2793	__le32 cac_duration_ms;
2794	__le32 regdomain;
2795	__le32 min_data_rate;
2796	__le32 mbssid_flags; /* uses enum wmi_vdev_mbssid_flags */
2797	__le32 mbssid_tx_vdev_id;
2798	__le32 eht_ops;
2799	__le32 punct_bitmap;
2800	} __packed;
2801
2802	#define MGMT_TX_DL_FRM_LEN 64
2803
2804	struct ath12k_wmi_channel_arg {
2805	u8 chan_id;
2806	u8 pwr;
2807	u32 mhz;
2808	u32 half_rate:1,
2809	quarter_rate:1,
2810	dfs_set:1,
2811	dfs_set_cfreq2:1,
2812	is_chan_passive:1,
2813	allow_ht:1,
2814	allow_vht:1,
2815	allow_he:1,
2816	set_agile:1,
2817	psc_channel:1;
2818	u32 phy_mode;
2819	u32 cfreq1;
2820	u32 cfreq2;
2821	char maxpower;
2822	char minpower;
2823	char maxregpower;
2824	u8 antennamax;
2825	u8 reg_class_id;
2826	};
2827
2828	enum wmi_phy_mode {
2829	MODE_11A = 0,
2830	MODE_11G = 1, /* 11b/g Mode */
2831	MODE_11B = 2, /* 11b Mode */
2832	MODE_11GONLY = 3, /* 11g only Mode */
2833	MODE_11NA_HT20 = 4,
2834	MODE_11NG_HT20 = 5,
2835	MODE_11NA_HT40 = 6,
2836	MODE_11NG_HT40 = 7,
2837	MODE_11AC_VHT20 = 8,
2838	MODE_11AC_VHT40 = 9,
2839	MODE_11AC_VHT80 = 10,
2840	MODE_11AC_VHT20_2G = 11,
2841	MODE_11AC_VHT40_2G = 12,
2842	MODE_11AC_VHT80_2G = 13,
2843	MODE_11AC_VHT80_80 = 14,
2844	MODE_11AC_VHT160 = 15,
2845	MODE_11AX_HE20 = 16,
2846	MODE_11AX_HE40 = 17,
2847	MODE_11AX_HE80 = 18,
2848	MODE_11AX_HE80_80 = 19,
2849	MODE_11AX_HE160 = 20,
2850	MODE_11AX_HE20_2G = 21,
2851	MODE_11AX_HE40_2G = 22,
2852	MODE_11AX_HE80_2G = 23,
2853	MODE_11BE_EHT20 = 24,
2854	MODE_11BE_EHT40 = 25,
2855	MODE_11BE_EHT80 = 26,
2856	MODE_11BE_EHT80_80 = 27,
2857	MODE_11BE_EHT160 = 28,
2858	MODE_11BE_EHT160_160 = 29,
2859	MODE_11BE_EHT320 = 30,
2860	MODE_11BE_EHT20_2G = 31,
2861	MODE_11BE_EHT40_2G = 32,
2862	MODE_UNKNOWN = 33,
2863	MODE_MAX = 33,
2864	};
2865
2866	struct wmi_vdev_start_req_arg {
2867	u32 vdev_id;
2868	u32 freq;
2869	u32 band_center_freq1;
2870	u32 band_center_freq2;
2871	bool passive;
2872	bool allow_ibss;
2873	bool allow_ht;
2874	bool allow_vht;
2875	bool ht40plus;
2876	bool chan_radar;
2877	bool freq2_radar;
2878	bool allow_he;
2879	u32 min_power;
2880	u32 max_power;
2881	u32 max_reg_power;
2882	u32 max_antenna_gain;
2883	enum wmi_phy_mode mode;
2884	u32 bcn_intval;
2885	u32 dtim_period;
2886	u8 *ssid;
2887	u32 ssid_len;
2888	u32 bcn_tx_rate;
2889	u32 bcn_tx_power;
2890	bool disable_hw_ack;
2891	bool hidden_ssid;
2892	bool pmf_enabled;
2893	u32 he_ops;
2894	u32 cac_duration_ms;
2895	u32 regdomain;
2896	u32 pref_rx_streams;
2897	u32 pref_tx_streams;
2898	u32 num_noa_descriptors;
2899	u32 min_data_rate;
2900	u32 mbssid_flags;
2901	u32 mbssid_tx_vdev_id;
2902	u32 punct_bitmap;
2903	};
2904
2905	struct ath12k_wmi_peer_create_arg {
2906	const u8 *peer_addr;
2907	u32 peer_type;
2908	u32 vdev_id;
2909	};
2910
2911	struct ath12k_wmi_pdev_set_regdomain_arg {
2912	u16 current_rd_in_use;
2913	u16 current_rd_2g;
2914	u16 current_rd_5g;
2915	u32 ctl_2g;
2916	u32 ctl_5g;
2917	u8 dfs_domain;
2918	u32 pdev_id;
2919	};
2920
2921	struct ath12k_wmi_rx_reorder_queue_remove_arg {
2922	u8 *peer_macaddr;
2923	u16 vdev_id;
2924	u32 peer_tid_bitmap;
2925	};
2926
2927	#define WMI_HOST_PDEV_ID_SOC 0xFF
2928	#define WMI_HOST_PDEV_ID_0 0
2929	#define WMI_HOST_PDEV_ID_1 1
2930	#define WMI_HOST_PDEV_ID_2 2
2931
2932	#define WMI_PDEV_ID_SOC 0
2933	#define WMI_PDEV_ID_1ST 1
2934	#define WMI_PDEV_ID_2ND 2
2935	#define WMI_PDEV_ID_3RD 3
2936
2937	/* Freq units in MHz */
2938	#define REG_RULE_START_FREQ 0x0000ffff
2939	#define REG_RULE_END_FREQ 0xffff0000
2940	#define REG_RULE_FLAGS 0x0000ffff
2941	#define REG_RULE_MAX_BW 0x0000ffff
2942	#define REG_RULE_REG_PWR 0x00ff0000
2943	#define REG_RULE_ANT_GAIN 0xff000000
2944	#define REG_RULE_PSD_INFO BIT(2)
2945	#define REG_RULE_PSD_EIRP 0xffff0000
2946
2947	#define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
2948	#define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
2949	#define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
2950	#define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
2951
2952	#define HECAP_PHYDWORD_0 0
2953	#define HECAP_PHYDWORD_1 1
2954	#define HECAP_PHYDWORD_2 2
2955
2956	#define HECAP_PHY_SU_BFER BIT(31)
2957	#define HECAP_PHY_SU_BFEE BIT(0)
2958	#define HECAP_PHY_MU_BFER BIT(1)
2959	#define HECAP_PHY_UL_MUMIMO BIT(22)
2960	#define HECAP_PHY_UL_MUOFDMA BIT(23)
2961
2962	#define HECAP_PHY_SUBFMR_GET(hecap_phy) \
2963	u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_SU_BFER)
2964
2965	#define HECAP_PHY_SUBFME_GET(hecap_phy) \
2966	u32_get_bits(hecap_phy[HECAP_PHYDWORD_1], HECAP_PHY_SU_BFEE)
2967
2968	#define HECAP_PHY_MUBFMR_GET(hecap_phy) \
2969	u32_get_bits(hecap_phy[HECAP_PHYDWORD_1], HECAP_PHY_MU_BFER)
2970
2971	#define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \
2972	u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_UL_MUMIMO)
2973
2974	#define HECAP_PHY_ULOFDMA_GET(hecap_phy) \
2975	u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_UL_MUOFDMA)
2976
2977	#define HE_MODE_SU_TX_BFEE BIT(0)
2978	#define HE_MODE_SU_TX_BFER BIT(1)
2979	#define HE_MODE_MU_TX_BFEE BIT(2)
2980	#define HE_MODE_MU_TX_BFER BIT(3)
2981	#define HE_MODE_DL_OFDMA BIT(4)
2982	#define HE_MODE_UL_OFDMA BIT(5)
2983	#define HE_MODE_UL_MUMIMO BIT(6)
2984
2985	#define HE_DL_MUOFDMA_ENABLE 1
2986	#define HE_UL_MUOFDMA_ENABLE 1
2987	#define HE_DL_MUMIMO_ENABLE 1
2988	#define HE_MU_BFEE_ENABLE 1
2989	#define HE_SU_BFEE_ENABLE 1
2990
2991	#define HE_VHT_SOUNDING_MODE_ENABLE 1
2992	#define HE_SU_MU_SOUNDING_MODE_ENABLE 1
2993	#define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1
2994
2995	/* HE or VHT Sounding */
2996	#define HE_VHT_SOUNDING_MODE BIT(0)
2997	/* SU or MU Sounding */
2998	#define HE_SU_MU_SOUNDING_MODE BIT(2)
2999	/* Trig or Non-Trig Sounding */
3000	#define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3)
3001
3002	#define WMI_TXBF_STS_CAP_OFFSET_LSB 4
3003	#define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70
3004	#define WMI_BF_SOUND_DIM_OFFSET_LSB 8
3005	#define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700
3006
3007	enum wmi_peer_type {
3008	WMI_PEER_TYPE_DEFAULT = 0,
3009	WMI_PEER_TYPE_BSS = 1,
3010	WMI_PEER_TYPE_TDLS = 2,
3011	};
3012
3013	struct wmi_peer_create_cmd {
3014	__le32 tlv_header;
3015	__le32 vdev_id;
3016	struct ath12k_wmi_mac_addr_params peer_macaddr;
3017	__le32 peer_type;
3018	} __packed;
3019
3020	struct wmi_peer_delete_cmd {
3021	__le32 tlv_header;
3022	__le32 vdev_id;
3023	struct ath12k_wmi_mac_addr_params peer_macaddr;
3024	} __packed;
3025
3026	struct wmi_peer_reorder_queue_setup_cmd {
3027	__le32 tlv_header;
3028	__le32 vdev_id;
3029	struct ath12k_wmi_mac_addr_params peer_macaddr;
3030	__le32 tid;
3031	__le32 queue_ptr_lo;
3032	__le32 queue_ptr_hi;
3033	__le32 queue_no;
3034	__le32 ba_window_size_valid;
3035	__le32 ba_window_size;
3036	} __packed;
3037
3038	struct wmi_peer_reorder_queue_remove_cmd {
3039	__le32 tlv_header;
3040	__le32 vdev_id;
3041	struct ath12k_wmi_mac_addr_params peer_macaddr;
3042	__le32 tid_mask;
3043	} __packed;
3044
3045	enum wmi_bss_chan_info_req_type {
3046	WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
3047	WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
3048	};
3049
3050	struct wmi_pdev_set_param_cmd {
3051	__le32 tlv_header;
3052	__le32 pdev_id;
3053	__le32 param_id;
3054	__le32 param_value;
3055	} __packed;
3056
3057	struct wmi_pdev_set_ps_mode_cmd {
3058	__le32 tlv_header;
3059	__le32 vdev_id;
3060	__le32 sta_ps_mode;
3061	} __packed;
3062
3063	struct wmi_pdev_suspend_cmd {
3064	__le32 tlv_header;
3065	__le32 pdev_id;
3066	__le32 suspend_opt;
3067	} __packed;
3068
3069	struct wmi_pdev_resume_cmd {
3070	__le32 tlv_header;
3071	__le32 pdev_id;
3072	} __packed;
3073
3074	struct wmi_pdev_bss_chan_info_req_cmd {
3075	__le32 tlv_header;
3076	/* ref wmi_bss_chan_info_req_type */
3077	__le32 req_type;
3078	} __packed;
3079
3080	struct wmi_ap_ps_peer_cmd {
3081	__le32 tlv_header;
3082	__le32 vdev_id;
3083	struct ath12k_wmi_mac_addr_params peer_macaddr;
3084	__le32 param;
3085	__le32 value;
3086	} __packed;
3087
3088	struct wmi_sta_powersave_param_cmd {
3089	__le32 tlv_header;
3090	__le32 vdev_id;
3091	__le32 param;
3092	__le32 value;
3093	} __packed;
3094
3095	struct wmi_pdev_set_regdomain_cmd {
3096	__le32 tlv_header;
3097	__le32 pdev_id;
3098	__le32 reg_domain;
3099	__le32 reg_domain_2g;
3100	__le32 reg_domain_5g;
3101	__le32 conformance_test_limit_2g;
3102	__le32 conformance_test_limit_5g;
3103	__le32 dfs_domain;
3104	} __packed;
3105
3106	struct wmi_peer_set_param_cmd {
3107	__le32 tlv_header;
3108	__le32 vdev_id;
3109	struct ath12k_wmi_mac_addr_params peer_macaddr;
3110	__le32 param_id;
3111	__le32 param_value;
3112	} __packed;
3113
3114	struct wmi_peer_flush_tids_cmd {
3115	__le32 tlv_header;
3116	__le32 vdev_id;
3117	struct ath12k_wmi_mac_addr_params peer_macaddr;
3118	__le32 peer_tid_bitmap;
3119	} __packed;
3120
3121	struct wmi_dfs_phyerr_offload_cmd {
3122	__le32 tlv_header;
3123	__le32 pdev_id;
3124	} __packed;
3125
3126	struct wmi_bcn_offload_ctrl_cmd {
3127	__le32 tlv_header;
3128	__le32 vdev_id;
3129	__le32 bcn_ctrl_op;
3130	} __packed;
3131
3132	enum scan_dwelltime_adaptive_mode {
3133	SCAN_DWELL_MODE_DEFAULT = 0,
3134	SCAN_DWELL_MODE_CONSERVATIVE = 1,
3135	SCAN_DWELL_MODE_MODERATE = 2,
3136	SCAN_DWELL_MODE_AGGRESSIVE = 3,
3137	SCAN_DWELL_MODE_STATIC = 4
3138	};
3139
3140	#define WLAN_SCAN_MAX_NUM_SSID 10
3141	#define WLAN_SCAN_MAX_NUM_BSSID 10
3142
3143	struct ath12k_wmi_element_info_arg {
3144	u32 len;
3145	u8 *ptr;
3146	};
3147
3148	#define WMI_IE_BITMAP_SIZE 8
3149
3150	#define WMI_SCAN_MAX_NUM_SSID 0x0A
3151	/* prefix used by scan requestor ids on the host */
3152	#define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
3153
3154	/* prefix used by scan request ids generated on the host */
3155	/* host cycles through the lower 12 bits to generate ids */
3156	#define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
3157
3158	#define WLAN_SCAN_PARAMS_MAX_SSID 16
3159	#define WLAN_SCAN_PARAMS_MAX_BSSID 4
3160	#define WLAN_SCAN_PARAMS_MAX_IE_LEN 512
3161
3162	/* Values lower than this may be refused by some firmware revisions with a scan
3163	* completion with a timedout reason.
3164	*/
3165	#define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
3166
3167	/* Scan priority numbers must be sequential, starting with 0 */
3168	enum wmi_scan_priority {
3169	WMI_SCAN_PRIORITY_VERY_LOW = 0,
3170	WMI_SCAN_PRIORITY_LOW,
3171	WMI_SCAN_PRIORITY_MEDIUM,
3172	WMI_SCAN_PRIORITY_HIGH,
3173	WMI_SCAN_PRIORITY_VERY_HIGH,
3174	WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */
3175	};
3176
3177	enum wmi_scan_event_type {
3178	WMI_SCAN_EVENT_STARTED = BIT(0),
3179	WMI_SCAN_EVENT_COMPLETED = BIT(1),
3180	WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2),
3181	WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3),
3182	WMI_SCAN_EVENT_DEQUEUED = BIT(4),
3183	/* possibly by high-prio scan */
3184	WMI_SCAN_EVENT_PREEMPTED = BIT(5),
3185	WMI_SCAN_EVENT_START_FAILED = BIT(6),
3186	WMI_SCAN_EVENT_RESTARTED = BIT(7),
3187	WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8),
3188	WMI_SCAN_EVENT_SUSPENDED = BIT(9),
3189	WMI_SCAN_EVENT_RESUMED = BIT(10),
3190	WMI_SCAN_EVENT_MAX = BIT(15),
3191	};
3192
3193	enum wmi_scan_completion_reason {
3194	WMI_SCAN_REASON_COMPLETED,
3195	WMI_SCAN_REASON_CANCELLED,
3196	WMI_SCAN_REASON_PREEMPTED,
3197	WMI_SCAN_REASON_TIMEDOUT,
3198	WMI_SCAN_REASON_INTERNAL_FAILURE,
3199	WMI_SCAN_REASON_MAX,
3200	};
3201
3202	struct wmi_start_scan_cmd {
3203	__le32 tlv_header;
3204	__le32 scan_id;
3205	__le32 scan_req_id;
3206	__le32 vdev_id;
3207	__le32 scan_priority;
3208	__le32 notify_scan_events;
3209	__le32 dwell_time_active;
3210	__le32 dwell_time_passive;
3211	__le32 min_rest_time;
3212	__le32 max_rest_time;
3213	__le32 repeat_probe_time;
3214	__le32 probe_spacing_time;
3215	__le32 idle_time;
3216	__le32 max_scan_time;
3217	__le32 probe_delay;
3218	__le32 scan_ctrl_flags;
3219	__le32 burst_duration;
3220	__le32 num_chan;
3221	__le32 num_bssid;
3222	__le32 num_ssids;
3223	__le32 ie_len;
3224	__le32 n_probes;
3225	struct ath12k_wmi_mac_addr_params mac_addr;
3226	struct ath12k_wmi_mac_addr_params mac_mask;
3227	u32 ie_bitmap[WMI_IE_BITMAP_SIZE];
3228	__le32 num_vendor_oui;
3229	__le32 scan_ctrl_flags_ext;
3230	__le32 dwell_time_active_2g;
3231	__le32 dwell_time_active_6g;
3232	__le32 dwell_time_passive_6g;
3233	__le32 scan_start_offset;
3234	} __packed;
3235
3236	#define WMI_SCAN_FLAG_PASSIVE 0x1
3237	#define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
3238	#define WMI_SCAN_ADD_CCK_RATES 0x4
3239	#define WMI_SCAN_ADD_OFDM_RATES 0x8
3240	#define WMI_SCAN_CHAN_STAT_EVENT 0x10
3241	#define WMI_SCAN_FILTER_PROBE_REQ 0x20
3242	#define WMI_SCAN_BYPASS_DFS_CHN 0x40
3243	#define WMI_SCAN_CONTINUE_ON_ERROR 0x80
3244	#define WMI_SCAN_FILTER_PROMISCUOS 0x100
3245	#define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200
3246	#define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400
3247	#define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800
3248	#define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000
3249	#define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000
3250	#define WMI_SCAN_OFFCHAN_DATA_TX 0x4000
3251	#define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000
3252	#define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000
3253	#define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000
3254	#define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000
3255	#define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000
3256	#define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000
3257
3258	#define WMI_SCAN_DWELL_MODE_MASK GENMASK(23, 21)
3259
3260	enum {
3261	WMI_SCAN_DWELL_MODE_DEFAULT = 0,
3262	WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1,
3263	WMI_SCAN_DWELL_MODE_MODERATE = 2,
3264	WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3,
3265	WMI_SCAN_DWELL_MODE_STATIC = 4,
3266	};
3267
3268	struct ath12k_wmi_hint_short_ssid_arg {
3269	u32 freq_flags;
3270	u32 short_ssid;
3271	};
3272
3273	struct ath12k_wmi_hint_bssid_arg {
3274	u32 freq_flags;
3275	struct ath12k_wmi_mac_addr_params bssid;
3276	};
3277
3278	struct ath12k_wmi_scan_req_arg {
3279	u32 scan_id;
3280	u32 scan_req_id;
3281	u32 vdev_id;
3282	u32 pdev_id;
3283	enum wmi_scan_priority scan_priority;
3284	u32 scan_ev_started:1,
3285	scan_ev_completed:1,
3286	scan_ev_bss_chan:1,
3287	scan_ev_foreign_chan:1,
3288	scan_ev_dequeued:1,
3289	scan_ev_preempted:1,
3290	scan_ev_start_failed:1,
3291	scan_ev_restarted:1,
3292	scan_ev_foreign_chn_exit:1,
3293	scan_ev_invalid:1,
3294	scan_ev_gpio_timeout:1,
3295	scan_ev_suspended:1,
3296	scan_ev_resumed:1;
3297	u32 dwell_time_active;
3298	u32 dwell_time_active_2g;
3299	u32 dwell_time_passive;
3300	u32 dwell_time_active_6g;
3301	u32 dwell_time_passive_6g;
3302	u32 min_rest_time;
3303	u32 max_rest_time;
3304	u32 repeat_probe_time;
3305	u32 probe_spacing_time;
3306	u32 idle_time;
3307	u32 max_scan_time;
3308	u32 probe_delay;
3309	u32 scan_f_passive:1,
3310	scan_f_bcast_probe:1,
3311	scan_f_cck_rates:1,
3312	scan_f_ofdm_rates:1,
3313	scan_f_chan_stat_evnt:1,
3314	scan_f_filter_prb_req:1,
3315	scan_f_bypass_dfs_chn:1,
3316	scan_f_continue_on_err:1,
3317	scan_f_offchan_mgmt_tx:1,
3318	scan_f_offchan_data_tx:1,
3319	scan_f_promisc_mode:1,
3320	scan_f_capture_phy_err:1,
3321	scan_f_strict_passive_pch:1,
3322	scan_f_half_rate:1,
3323	scan_f_quarter_rate:1,
3324	scan_f_force_active_dfs_chn:1,
3325	scan_f_add_tpc_ie_in_probe:1,
3326	scan_f_add_ds_ie_in_probe:1,
3327	scan_f_add_spoofed_mac_in_probe:1,
3328	scan_f_add_rand_seq_in_probe:1,
3329	scan_f_en_ie_whitelist_in_probe:1,
3330	scan_f_forced:1,
3331	scan_f_2ghz:1,
3332	scan_f_5ghz:1,
3333	scan_f_80mhz:1;
3334	enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode;
3335	u32 burst_duration;
3336	u32 num_chan;
3337	u32 num_bssid;
3338	u32 num_ssids;
3339	u32 n_probes;
3340	u32 *chan_list;
3341	u32 notify_scan_events;
3342	struct cfg80211_ssid ssid[WLAN_SCAN_MAX_NUM_SSID];
3343	struct ath12k_wmi_mac_addr_params bssid_list[WLAN_SCAN_MAX_NUM_BSSID];
3344	struct ath12k_wmi_element_info_arg extraie;
3345	u32 num_hint_s_ssid;
3346	u32 num_hint_bssid;
3347	struct ath12k_wmi_hint_short_ssid_arg hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID];
3348	struct ath12k_wmi_hint_bssid_arg hint_bssid[WLAN_SCAN_MAX_HINT_BSSID];
3349	};
3350
3351	struct wmi_ssid_arg {
3352	int len;
3353	const u8 *ssid;
3354	};
3355
3356	struct wmi_bssid_arg {
3357	const u8 *bssid;
3358	};
3359
3360	struct wmi_start_scan_arg {
3361	u32 scan_id;
3362	u32 scan_req_id;
3363	u32 vdev_id;
3364	u32 scan_priority;
3365	u32 notify_scan_events;
3366	u32 dwell_time_active;
3367	u32 dwell_time_passive;
3368	u32 min_rest_time;
3369	u32 max_rest_time;
3370	u32 repeat_probe_time;
3371	u32 probe_spacing_time;
3372	u32 idle_time;
3373	u32 max_scan_time;
3374	u32 probe_delay;
3375	u32 scan_ctrl_flags;
3376
3377	u32 ie_len;
3378	u32 n_channels;
3379	u32 n_ssids;
3380	u32 n_bssids;
3381
3382	u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
3383	u32 channels[64];
3384	struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
3385	struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
3386	};
3387
3388	#define WMI_SCAN_STOP_ONE 0x00000000
3389	#define WMI_SCAN_STOP_VAP_ALL 0x01000000
3390	#define WMI_SCAN_STOP_ALL 0x04000000
3391
3392	/* Prefix 0xA000 indicates that the scan request
3393	* is trigger by HOST
3394	*/
3395	#define ATH12K_SCAN_ID 0xA000
3396
3397	enum scan_cancel_req_type {
3398	WLAN_SCAN_CANCEL_SINGLE = 1,
3399	WLAN_SCAN_CANCEL_VDEV_ALL,
3400	WLAN_SCAN_CANCEL_PDEV_ALL,
3401	};
3402
3403	struct ath12k_wmi_scan_cancel_arg {
3404	u32 requester;
3405	u32 scan_id;
3406	enum scan_cancel_req_type req_type;
3407	u32 vdev_id;
3408	u32 pdev_id;
3409	};
3410
3411	struct wmi_bcn_send_from_host_cmd {
3412	__le32 tlv_header;
3413	__le32 vdev_id;
3414	__le32 data_len;
3415	union {
3416	__le32 frag_ptr;
3417	__le32 frag_ptr_lo;
3418	};
3419	__le32 frame_ctrl;
3420	__le32 dtim_flag;
3421	__le32 bcn_antenna;
3422	__le32 frag_ptr_hi;
3423	};
3424
3425	#define WMI_CHAN_INFO_MODE GENMASK(5, 0)
3426	#define WMI_CHAN_INFO_HT40_PLUS BIT(6)
3427	#define WMI_CHAN_INFO_PASSIVE BIT(7)
3428	#define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8)
3429	#define WMI_CHAN_INFO_AP_DISABLED BIT(9)
3430	#define WMI_CHAN_INFO_DFS BIT(10)
3431	#define WMI_CHAN_INFO_ALLOW_HT BIT(11)
3432	#define WMI_CHAN_INFO_ALLOW_VHT BIT(12)
3433	#define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13)
3434	#define WMI_CHAN_INFO_HALF_RATE BIT(14)
3435	#define WMI_CHAN_INFO_QUARTER_RATE BIT(15)
3436	#define WMI_CHAN_INFO_DFS_FREQ2 BIT(16)
3437	#define WMI_CHAN_INFO_ALLOW_HE BIT(17)
3438	#define WMI_CHAN_INFO_PSC BIT(18)
3439
3440	#define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0)
3441	#define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8)
3442	#define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16)
3443	#define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24)
3444
3445	#define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0)
3446	#define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8)
3447
3448	struct ath12k_wmi_channel_params {
3449	__le32 tlv_header;
3450	__le32 mhz;
3451	__le32 band_center_freq1;
3452	__le32 band_center_freq2;
3453	__le32 info;
3454	__le32 reg_info_1;
3455	__le32 reg_info_2;
3456	} __packed;
3457
3458	enum wmi_sta_ps_mode {
3459	WMI_STA_PS_MODE_DISABLED = 0,
3460	WMI_STA_PS_MODE_ENABLED = 1,
3461	};
3462
3463	#define WMI_SMPS_MASK_LOWER_16BITS 0xFF
3464	#define WMI_SMPS_MASK_UPPER_3BITS 0x7
3465	#define WMI_SMPS_PARAM_VALUE_SHIFT 29
3466
3467	#define ATH12K_WMI_FW_HANG_ASSERT_TYPE 1
3468	#define ATH12K_WMI_FW_HANG_DELAY 0
3469
3470	/* type, 0:unused 1: ASSERT 2: not respond detect command
3471	* delay_time_ms, the simulate will delay time
3472	*/
3473
3474	struct wmi_force_fw_hang_cmd {
3475	__le32 tlv_header;
3476	__le32 type;
3477	__le32 delay_time_ms;
3478	} __packed;
3479
3480	struct wmi_vdev_set_param_cmd {
3481	__le32 tlv_header;
3482	__le32 vdev_id;
3483	__le32 param_id;
3484	__le32 param_value;
3485	} __packed;
3486
3487	struct wmi_get_pdev_temperature_cmd {
3488	__le32 tlv_header;
3489	__le32 param;
3490	__le32 pdev_id;
3491	} __packed;
3492
3493	#define WMI_P2P_MAX_NOA_DESCRIPTORS 4
3494
3495	struct wmi_p2p_noa_event {
3496	__le32 vdev_id;
3497	} __packed;
3498
3499	struct ath12k_wmi_p2p_noa_descriptor {
3500	__le32 type_count; /* 255: continuous schedule, 0: reserved */
3501	__le32 duration; /* Absent period duration in micro seconds */
3502	__le32 interval; /* Absent period interval in micro seconds */
3503	__le32 start_time; /* 32 bit tsf time when in starts */
3504	} __packed;
3505
3506	#define WMI_P2P_NOA_INFO_CHANGED_FLAG BIT(0)
3507	#define WMI_P2P_NOA_INFO_INDEX GENMASK(15, 8)
3508	#define WMI_P2P_NOA_INFO_OPP_PS BIT(16)
3509	#define WMI_P2P_NOA_INFO_CTWIN_TU GENMASK(23, 17)
3510	#define WMI_P2P_NOA_INFO_DESC_NUM GENMASK(31, 24)
3511
3512	struct ath12k_wmi_p2p_noa_info {
3513	/* Bit 0 - Flag to indicate an update in NOA schedule
3514	* Bits 7-1 - Reserved
3515	* Bits 15-8 - Index (identifies the instance of NOA sub element)
3516	* Bit 16 - Opp PS state of the AP
3517	* Bits 23-17 - Ctwindow in TUs
3518	* Bits 31-24 - Number of NOA descriptors
3519	*/
3520	__le32 noa_attr;
3521	struct ath12k_wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
3522	} __packed;
3523
3524	#define WMI_BEACON_TX_BUFFER_SIZE 512
3525
3526	struct wmi_bcn_tmpl_cmd {
3527	__le32 tlv_header;
3528	__le32 vdev_id;
3529	__le32 tim_ie_offset;
3530	__le32 buf_len;
3531	__le32 csa_switch_count_offset;
3532	__le32 ext_csa_switch_count_offset;
3533	__le32 csa_event_bitmap;
3534	__le32 mbssid_ie_offset;
3535	__le32 esp_ie_offset;
3536	} __packed;
3537
3538	struct wmi_p2p_go_set_beacon_ie_cmd {
3539	__le32 tlv_header;
3540	__le32 vdev_id;
3541	__le32 ie_buf_len;
3542	} __packed;
3543
3544	struct wmi_vdev_install_key_cmd {
3545	__le32 tlv_header;
3546	__le32 vdev_id;
3547	struct ath12k_wmi_mac_addr_params peer_macaddr;
3548	__le32 key_idx;
3549	__le32 key_flags;
3550	__le32 key_cipher;
3551	__le64 key_rsc_counter;
3552	__le64 key_global_rsc_counter;
3553	__le64 key_tsc_counter;
3554	u8 wpi_key_rsc_counter[16];
3555	u8 wpi_key_tsc_counter[16];
3556	__le32 key_len;
3557	__le32 key_txmic_len;
3558	__le32 key_rxmic_len;
3559	__le32 is_group_key_id_valid;
3560	__le32 group_key_id;
3561
3562	/* Followed by key_data containing key followed by
3563	* tx mic and then rx mic
3564	*/
3565	} __packed;
3566
3567	struct wmi_vdev_install_key_arg {
3568	u32 vdev_id;
3569	const u8 *macaddr;
3570	u32 key_idx;
3571	u32 key_flags;
3572	u32 key_cipher;
3573	u32 key_len;
3574	u32 key_txmic_len;
3575	u32 key_rxmic_len;
3576	u64 key_rsc_counter;
3577	const void *key_data;
3578	};
3579
3580	#define WMI_MAX_SUPPORTED_RATES 128
3581	#define WMI_HOST_MAX_HECAP_PHY_SIZE 3
3582	#define WMI_HOST_MAX_HE_RATE_SET 3
3583	#define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0
3584	#define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1
3585	#define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2
3586
3587	struct wmi_rate_set_arg {
3588	u32 num_rates;
3589	u8 rates[WMI_MAX_SUPPORTED_RATES];
3590	};
3591
3592	struct ath12k_wmi_peer_assoc_arg {
3593	u32 vdev_id;
3594	u32 peer_new_assoc;
3595	u32 peer_associd;
3596	u32 peer_flags;
3597	u32 peer_caps;
3598	u32 peer_listen_intval;
3599	u32 peer_ht_caps;
3600	u32 peer_max_mpdu;
3601	u32 peer_mpdu_density;
3602	u32 peer_rate_caps;
3603	u32 peer_nss;
3604	u32 peer_vht_caps;
3605	u32 peer_phymode;
3606	u32 peer_ht_info[2];
3607	struct wmi_rate_set_arg peer_legacy_rates;
3608	struct wmi_rate_set_arg peer_ht_rates;
3609	u32 rx_max_rate;
3610	u32 rx_mcs_set;
3611	u32 tx_max_rate;
3612	u32 tx_mcs_set;
3613	u8 vht_capable;
3614	u8 min_data_rate;
3615	u32 tx_max_mcs_nss;
3616	u32 peer_bw_rxnss_override;
3617	bool is_pmf_enabled;
3618	bool is_wme_set;
3619	bool qos_flag;
3620	bool apsd_flag;
3621	bool ht_flag;
3622	bool bw_40;
3623	bool bw_80;
3624	bool bw_160;
3625	bool bw_320;
3626	bool stbc_flag;
3627	bool ldpc_flag;
3628	bool static_mimops_flag;
3629	bool dynamic_mimops_flag;
3630	bool spatial_mux_flag;
3631	bool vht_flag;
3632	bool vht_ng_flag;
3633	bool need_ptk_4_way;
3634	bool need_gtk_2_way;
3635	bool auth_flag;
3636	bool safe_mode_enabled;
3637	bool amsdu_disable;
3638	/* Use common structure */
3639	u8 peer_mac[ETH_ALEN];
3640
3641	bool he_flag;
3642	u32 peer_he_cap_macinfo[2];
3643	u32 peer_he_cap_macinfo_internal;
3644	u32 peer_he_caps_6ghz;
3645	u32 peer_he_ops;
3646	u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE];
3647	u32 peer_he_mcs_count;
3648	u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
3649	u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
3650	bool twt_responder;
3651	bool twt_requester;
3652	struct ath12k_wmi_ppe_threshold_arg peer_ppet;
3653	bool eht_flag;
3654	u32 peer_eht_cap_mac[WMI_MAX_EHTCAP_MAC_SIZE];
3655	u32 peer_eht_cap_phy[WMI_MAX_EHTCAP_PHY_SIZE];
3656	u32 peer_eht_mcs_count;
3657	u32 peer_eht_rx_mcs_set[WMI_MAX_EHTCAP_RATE_SET];
3658	u32 peer_eht_tx_mcs_set[WMI_MAX_EHTCAP_RATE_SET];
3659	struct ath12k_wmi_ppe_threshold_arg peer_eht_ppet;
3660	u32 punct_bitmap;
3661	};
3662
3663	struct wmi_peer_assoc_complete_cmd {
3664	__le32 tlv_header;
3665	struct ath12k_wmi_mac_addr_params peer_macaddr;
3666	__le32 vdev_id;
3667	__le32 peer_new_assoc;
3668	__le32 peer_associd;
3669	__le32 peer_flags;
3670	__le32 peer_caps;
3671	__le32 peer_listen_intval;
3672	__le32 peer_ht_caps;
3673	__le32 peer_max_mpdu;
3674	__le32 peer_mpdu_density;
3675	__le32 peer_rate_caps;
3676	__le32 peer_nss;
3677	__le32 peer_vht_caps;
3678	__le32 peer_phymode;
3679	__le32 peer_ht_info[2];
3680	__le32 num_peer_legacy_rates;
3681	__le32 num_peer_ht_rates;
3682	__le32 peer_bw_rxnss_override;
3683	struct ath12k_wmi_ppe_threshold_params peer_ppet;
3684	__le32 peer_he_cap_info;
3685	__le32 peer_he_ops;
3686	__le32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE];
3687	__le32 peer_he_mcs;
3688	__le32 peer_he_cap_info_ext;
3689	__le32 peer_he_cap_info_internal;
3690	__le32 min_data_rate;
3691	__le32 peer_he_caps_6ghz;
3692	__le32 sta_type;
3693	__le32 bss_max_idle_option;
3694	__le32 auth_mode;
3695	__le32 peer_flags_ext;
3696	__le32 punct_bitmap;
3697	__le32 peer_eht_cap_mac[WMI_MAX_EHTCAP_MAC_SIZE];
3698	__le32 peer_eht_cap_phy[WMI_MAX_EHTCAP_PHY_SIZE];
3699	__le32 peer_eht_ops;
3700	struct ath12k_wmi_ppe_threshold_params peer_eht_ppet;
3701	} __packed;
3702
3703	struct wmi_stop_scan_cmd {
3704	__le32 tlv_header;
3705	__le32 requestor;
3706	__le32 scan_id;
3707	__le32 req_type;
3708	__le32 vdev_id;
3709	__le32 pdev_id;
3710	} __packed;
3711
3712	struct ath12k_wmi_scan_chan_list_arg {
3713	u32 pdev_id;
3714	u16 nallchans;
3715	struct ath12k_wmi_channel_arg channel[];
3716	};
3717
3718	struct wmi_scan_chan_list_cmd {
3719	__le32 tlv_header;
3720	__le32 num_scan_chans;
3721	__le32 flags;
3722	__le32 pdev_id;
3723	} __packed;
3724
3725	#define WMI_MGMT_SEND_DOWNLD_LEN 64
3726
3727	#define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0)
3728	#define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8)
3729	#define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20)
3730	#define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28)
3731
3732	#define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0)
3733	#define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8)
3734	#define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15)
3735	#define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20)
3736	#define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21)
3737
3738	struct wmi_mgmt_send_cmd {
3739	__le32 tlv_header;
3740	__le32 vdev_id;
3741	__le32 desc_id;
3742	__le32 chanfreq;
3743	__le32 paddr_lo;
3744	__le32 paddr_hi;
3745	__le32 frame_len;
3746	__le32 buf_len;
3747	__le32 tx_params_valid;
3748
3749	/* This TLV is followed by struct wmi_mgmt_frame */
3750
3751	/* Followed by struct wmi_mgmt_send_params */
3752	} __packed;
3753
3754	struct wmi_sta_powersave_mode_cmd {
3755	__le32 tlv_header;
3756	__le32 vdev_id;
3757	__le32 sta_ps_mode;
3758	} __packed;
3759
3760	struct wmi_sta_smps_force_mode_cmd {
3761	__le32 tlv_header;
3762	__le32 vdev_id;
3763	__le32 forced_mode;
3764	} __packed;
3765
3766	struct wmi_sta_smps_param_cmd {
3767	__le32 tlv_header;
3768	__le32 vdev_id;
3769	__le32 param;
3770	__le32 value;
3771	} __packed;
3772
3773	struct ath12k_wmi_bcn_prb_info_params {
3774	__le32 tlv_header;
3775	__le32 caps;
3776	__le32 erp;
3777	} __packed;
3778
3779	enum {
3780	WMI_PDEV_SUSPEND,
3781	WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
3782	};
3783
3784	struct wmi_pdev_green_ap_ps_enable_cmd_param {
3785	__le32 tlv_header;
3786	__le32 pdev_id;
3787	__le32 enable;
3788	} __packed;
3789
3790	struct ath12k_wmi_ap_ps_arg {
3791	u32 vdev_id;
3792	u32 param;
3793	u32 value;
3794	};
3795
3796	enum set_init_cc_type {
3797	WMI_COUNTRY_INFO_TYPE_ALPHA,
3798	WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE,
3799	WMI_COUNTRY_INFO_TYPE_REGDOMAIN,
3800	};
3801
3802	enum set_init_cc_flags {
3803	INVALID_CC,
3804	CC_IS_SET,
3805	REGDMN_IS_SET,
3806	ALPHA_IS_SET,
3807	};
3808
3809	struct ath12k_wmi_init_country_arg {
3810	union {
3811	u16 country_code;
3812	u16 regdom_id;
3813	u8 alpha2[3];
3814	} cc_info;
3815	enum set_init_cc_flags flags;
3816	};
3817
3818	struct wmi_init_country_cmd {
3819	__le32 tlv_header;
3820	__le32 pdev_id;
3821	__le32 init_cc_type;
3822	union {
3823	__le32 country_code;
3824	__le32 regdom_id;
3825	__le32 alpha2;
3826	} cc_info;
3827	} __packed;
3828
3829	struct wmi_delba_send_cmd {
3830	__le32 tlv_header;
3831	__le32 vdev_id;
3832	struct ath12k_wmi_mac_addr_params peer_macaddr;
3833	__le32 tid;
3834	__le32 initiator;
3835	__le32 reasoncode;
3836	} __packed;
3837
3838	struct wmi_addba_setresponse_cmd {
3839	__le32 tlv_header;
3840	__le32 vdev_id;
3841	struct ath12k_wmi_mac_addr_params peer_macaddr;
3842	__le32 tid;
3843	__le32 statuscode;
3844	} __packed;
3845
3846	struct wmi_addba_send_cmd {
3847	__le32 tlv_header;
3848	__le32 vdev_id;
3849	struct ath12k_wmi_mac_addr_params peer_macaddr;
3850	__le32 tid;
3851	__le32 buffersize;
3852	} __packed;
3853
3854	struct wmi_addba_clear_resp_cmd {
3855	__le32 tlv_header;
3856	__le32 vdev_id;
3857	struct ath12k_wmi_mac_addr_params peer_macaddr;
3858	} __packed;
3859
3860	#define DFS_PHYERR_UNIT_TEST_CMD 0
3861	#define DFS_UNIT_TEST_MODULE 0x2b
3862	#define DFS_UNIT_TEST_TOKEN 0xAA
3863
3864	enum dfs_test_args_idx {
3865	DFS_TEST_CMDID = 0,
3866	DFS_TEST_PDEV_ID,
3867	DFS_TEST_RADAR_PARAM,
3868	DFS_MAX_TEST_ARGS,
3869	};
3870
3871	struct wmi_dfs_unit_test_arg {
3872	u32 cmd_id;
3873	u32 pdev_id;
3874	u32 radar_param;
3875	};
3876
3877	struct wmi_unit_test_cmd {
3878	__le32 tlv_header;
3879	__le32 vdev_id;
3880	__le32 module_id;
3881	__le32 num_args;
3882	__le32 diag_token;
3883	/* Followed by test args*/
3884	} __packed;
3885
3886	#define MAX_SUPPORTED_RATES 128
3887
3888	struct ath12k_wmi_vht_rate_set_params {
3889	__le32 tlv_header;
3890	__le32 rx_max_rate;
3891	__le32 rx_mcs_set;
3892	__le32 tx_max_rate;
3893	__le32 tx_mcs_set;
3894	__le32 tx_max_mcs_nss;
3895	} __packed;
3896
3897	struct ath12k_wmi_he_rate_set_params {
3898	__le32 tlv_header;
3899	__le32 rx_mcs_set;
3900	__le32 tx_mcs_set;
3901	} __packed;
3902
3903	struct ath12k_wmi_eht_rate_set_params {
3904	__le32 tlv_header;
3905	__le32 rx_mcs_set;
3906	__le32 tx_mcs_set;
3907	} __packed;
3908
3909	#define MAX_REG_RULES 10
3910	#define REG_ALPHA2_LEN 2
3911	#define MAX_6G_REG_RULES 5
3912	#define REG_US_5G_NUM_REG_RULES 4
3913
3914	enum wmi_start_event_param {
3915	WMI_VDEV_START_RESP_EVENT = 0,
3916	WMI_VDEV_RESTART_RESP_EVENT,
3917	};
3918
3919	struct wmi_vdev_start_resp_event {
3920	__le32 vdev_id;
3921	__le32 requestor_id;
3922	/* enum wmi_start_event_param */
3923	__le32 resp_type;
3924	__le32 status;
3925	__le32 chain_mask;
3926	__le32 smps_mode;
3927	union {
3928	__le32 mac_id;
3929	__le32 pdev_id;
3930	};
3931	__le32 cfgd_tx_streams;
3932	__le32 cfgd_rx_streams;
3933	} __packed;
3934
3935	/* VDEV start response status codes */
3936	enum wmi_vdev_start_resp_status_code {
3937	WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0,
3938	WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1,
3939	WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2,
3940	WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3,
3941	WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4,
3942	};
3943
3944	enum wmi_reg_6g_ap_type {
3945	WMI_REG_INDOOR_AP = 0,
3946	WMI_REG_STD_POWER_AP = 1,
3947	WMI_REG_VLP_AP = 2,
3948	WMI_REG_CURRENT_MAX_AP_TYPE,
3949	WMI_REG_MAX_SUPP_AP_TYPE = WMI_REG_VLP_AP,
3950	WMI_REG_MAX_AP_TYPE = 7,
3951	};
3952
3953	enum wmi_reg_6g_client_type {
3954	WMI_REG_DEFAULT_CLIENT = 0,
3955	WMI_REG_SUBORDINATE_CLIENT = 1,
3956	WMI_REG_MAX_CLIENT_TYPE = 2,
3957	};
3958
3959	/* Regulatory Rule Flags Passed by FW */
3960	#define REGULATORY_CHAN_DISABLED BIT(0)
3961	#define REGULATORY_CHAN_NO_IR BIT(1)
3962	#define REGULATORY_CHAN_RADAR BIT(3)
3963	#define REGULATORY_CHAN_NO_OFDM BIT(6)
3964	#define REGULATORY_CHAN_INDOOR_ONLY BIT(9)
3965
3966	#define REGULATORY_CHAN_NO_HT40 BIT(4)
3967	#define REGULATORY_CHAN_NO_80MHZ BIT(7)
3968	#define REGULATORY_CHAN_NO_160MHZ BIT(8)
3969	#define REGULATORY_CHAN_NO_20MHZ BIT(11)
3970	#define REGULATORY_CHAN_NO_10MHZ BIT(12)
3971
3972	enum {
3973	WMI_REG_SET_CC_STATUS_PASS = 0,
3974	WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1,
3975	WMI_REG_INIT_ALPHA2_NOT_FOUND = 2,
3976	WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
3977	WMI_REG_SET_CC_STATUS_NO_MEMORY = 4,
3978	WMI_REG_SET_CC_STATUS_FAIL = 5,
3979	};
3980
3981	#define WMI_REG_CLIENT_MAX 4
3982
3983	struct wmi_reg_chan_list_cc_ext_event {
3984	__le32 status_code;
3985	__le32 phy_id;
3986	__le32 alpha2;
3987	__le32 num_phy;
3988	__le32 country_id;
3989	__le32 domain_code;
3990	__le32 dfs_region;
3991	__le32 phybitmap;
3992	__le32 min_bw_2g;
3993	__le32 max_bw_2g;
3994	__le32 min_bw_5g;
3995	__le32 max_bw_5g;
3996	__le32 num_2g_reg_rules;
3997	__le32 num_5g_reg_rules;
3998	__le32 client_type;
3999	__le32 rnr_tpe_usable;
4000	__le32 unspecified_ap_usable;
4001	__le32 domain_code_6g_ap_lpi;
4002	__le32 domain_code_6g_ap_sp;
4003	__le32 domain_code_6g_ap_vlp;
4004	__le32 domain_code_6g_client_lpi[WMI_REG_CLIENT_MAX];
4005	__le32 domain_code_6g_client_sp[WMI_REG_CLIENT_MAX];
4006	__le32 domain_code_6g_client_vlp[WMI_REG_CLIENT_MAX];
4007	__le32 domain_code_6g_super_id;
4008	__le32 min_bw_6g_ap_sp;
4009	__le32 max_bw_6g_ap_sp;
4010	__le32 min_bw_6g_ap_lpi;
4011	__le32 max_bw_6g_ap_lpi;
4012	__le32 min_bw_6g_ap_vlp;
4013	__le32 max_bw_6g_ap_vlp;
4014	__le32 min_bw_6g_client_sp[WMI_REG_CLIENT_MAX];
4015	__le32 max_bw_6g_client_sp[WMI_REG_CLIENT_MAX];
4016	__le32 min_bw_6g_client_lpi[WMI_REG_CLIENT_MAX];
4017	__le32 max_bw_6g_client_lpi[WMI_REG_CLIENT_MAX];
4018	__le32 min_bw_6g_client_vlp[WMI_REG_CLIENT_MAX];
4019	__le32 max_bw_6g_client_vlp[WMI_REG_CLIENT_MAX];
4020	__le32 num_6g_reg_rules_ap_sp;
4021	__le32 num_6g_reg_rules_ap_lpi;
4022	__le32 num_6g_reg_rules_ap_vlp;
4023	__le32 num_6g_reg_rules_cl_sp[WMI_REG_CLIENT_MAX];
4024	__le32 num_6g_reg_rules_cl_lpi[WMI_REG_CLIENT_MAX];
4025	__le32 num_6g_reg_rules_cl_vlp[WMI_REG_CLIENT_MAX];
4026	} __packed;
4027
4028	struct ath12k_wmi_reg_rule_ext_params {
4029	__le32 tlv_header;
4030	__le32 freq_info;
4031	__le32 bw_pwr_info;
4032	__le32 flag_info;
4033	__le32 psd_power_info;
4034	} __packed;
4035
4036	struct wmi_vdev_delete_resp_event {
4037	__le32 vdev_id;
4038	} __packed;
4039
4040	struct wmi_peer_delete_resp_event {
4041	__le32 vdev_id;
4042	struct ath12k_wmi_mac_addr_params peer_macaddr;
4043	} __packed;
4044
4045	struct wmi_bcn_tx_status_event {
4046	__le32 vdev_id;
4047	__le32 tx_status;
4048	} __packed;
4049
4050	struct wmi_vdev_stopped_event {
4051	__le32 vdev_id;
4052	} __packed;
4053
4054	struct wmi_pdev_bss_chan_info_event {
4055	__le32 pdev_id;
4056	__le32 freq; /* Units in MHz */
4057	__le32 noise_floor; /* units are dBm */
4058	/* rx clear - how often the channel was unused */
4059	__le32 rx_clear_count_low;
4060	__le32 rx_clear_count_high;
4061	/* cycle count - elapsed time during measured period, in clock ticks */
4062	__le32 cycle_count_low;
4063	__le32 cycle_count_high;
4064	/* tx cycle count - elapsed time spent in tx, in clock ticks */
4065	__le32 tx_cycle_count_low;
4066	__le32 tx_cycle_count_high;
4067	/* rx cycle count - elapsed time spent in rx, in clock ticks */
4068	__le32 rx_cycle_count_low;
4069	__le32 rx_cycle_count_high;
4070	/*rx_cycle cnt for my bss in 64bits format */
4071	__le32 rx_bss_cycle_count_low;
4072	__le32 rx_bss_cycle_count_high;
4073	} __packed;
4074
4075	#define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0
4076
4077	struct wmi_vdev_install_key_compl_event {
4078	__le32 vdev_id;
4079	struct ath12k_wmi_mac_addr_params peer_macaddr;
4080	__le32 key_idx;
4081	__le32 key_flags;
4082	__le32 status;
4083	} __packed;
4084
4085	struct wmi_vdev_install_key_complete_arg {
4086	u32 vdev_id;
4087	const u8 *macaddr;
4088	u32 key_idx;
4089	u32 key_flags;
4090	u32 status;
4091	};
4092
4093	struct wmi_peer_assoc_conf_event {
4094	__le32 vdev_id;
4095	struct ath12k_wmi_mac_addr_params peer_macaddr;
4096	} __packed;
4097
4098	struct wmi_peer_assoc_conf_arg {
4099	u32 vdev_id;
4100	const u8 *macaddr;
4101	};
4102
4103	struct wmi_fils_discovery_event {
4104	__le32 vdev_id;
4105	__le32 fils_tt;
4106	__le32 tbtt;
4107	} __packed;
4108
4109	struct wmi_probe_resp_tx_status_event {
4110	__le32 vdev_id;
4111	__le32 tx_status;
4112	} __packed;
4113
4114	struct wmi_pdev_ctl_failsafe_chk_event {
4115	__le32 pdev_id;
4116	__le32 ctl_failsafe_status;
4117	} __packed;
4118
4119	struct ath12k_wmi_pdev_csa_event {
4120	__le32 pdev_id;
4121	__le32 current_switch_count;
4122	__le32 num_vdevs;
4123	} __packed;
4124
4125	struct ath12k_wmi_pdev_radar_event {
4126	__le32 pdev_id;
4127	__le32 detection_mode;
4128	__le32 chan_freq;
4129	__le32 chan_width;
4130	__le32 detector_id;
4131	__le32 segment_id;
4132	__le32 timestamp;
4133	__le32 is_chirp;
4134	a_sle32 freq_offset;
4135	a_sle32 sidx;
4136	} __packed;
4137
4138	struct wmi_pdev_temperature_event {
4139	/* temperature value in Celsius degree */
4140	a_sle32 temp;
4141	__le32 pdev_id;
4142	} __packed;
4143
4144	#define WMI_RX_STATUS_OK 0x00
4145	#define WMI_RX_STATUS_ERR_CRC 0x01
4146	#define WMI_RX_STATUS_ERR_DECRYPT 0x08
4147	#define WMI_RX_STATUS_ERR_MIC 0x10
4148	#define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
4149
4150	#define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4
4151
4152	struct ath12k_wmi_mgmt_rx_arg {
4153	u32 chan_freq;
4154	u32 channel;
4155	u32 snr;
4156	u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA];
4157	u32 rate;
4158	enum wmi_phy_mode phy_mode;
4159	u32 buf_len;
4160	int status;
4161	u32 flags;
4162	int rssi;
4163	u32 tsf_delta;
4164	u8 pdev_id;
4165	};
4166
4167	#define ATH_MAX_ANTENNA 4
4168
4169	struct ath12k_wmi_mgmt_rx_params {
4170	__le32 channel;
4171	__le32 snr;
4172	__le32 rate;
4173	__le32 phy_mode;
4174	__le32 buf_len;
4175	__le32 status;
4176	__le32 rssi_ctl[ATH_MAX_ANTENNA];
4177	__le32 flags;
4178	a_sle32 rssi;
4179	__le32 tsf_delta;
4180	__le32 rx_tsf_l32;
4181	__le32 rx_tsf_u32;
4182	__le32 pdev_id;
4183	__le32 chan_freq;
4184	} __packed;
4185
4186	#define MAX_ANTENNA_EIGHT 8
4187
4188	struct wmi_mgmt_tx_compl_event {
4189	__le32 desc_id;
4190	__le32 status;
4191	__le32 pdev_id;
4192	} __packed;
4193
4194	struct wmi_scan_event {
4195	__le32 event_type; /* %WMI_SCAN_EVENT_ */
4196	__le32 reason; /* %WMI_SCAN_REASON_ */
4197	__le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
4198	__le32 scan_req_id;
4199	__le32 scan_id;
4200	__le32 vdev_id;
4201	/* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed
4202	* In case of AP it is TSF of the AP vdev
4203	* In case of STA connected state, this is the TSF of the AP
4204	* In case of STA not connected, it will be the free running HW timer
4205	*/
4206	__le32 tsf_timestamp;
4207	} __packed;
4208
4209	struct wmi_peer_sta_kickout_arg {
4210	const u8 *mac_addr;
4211	};
4212
4213	struct wmi_peer_sta_kickout_event {
4214	struct ath12k_wmi_mac_addr_params peer_macaddr;
4215	} __packed;
4216
4217	enum wmi_roam_reason {
4218	WMI_ROAM_REASON_BETTER_AP = 1,
4219	WMI_ROAM_REASON_BEACON_MISS = 2,
4220	WMI_ROAM_REASON_LOW_RSSI = 3,
4221	WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
4222	WMI_ROAM_REASON_HO_FAILED = 5,
4223
4224	/* keep last */
4225	WMI_ROAM_REASON_MAX,
4226	};
4227
4228	struct wmi_roam_event {
4229	__le32 vdev_id;
4230	__le32 reason;
4231	__le32 rssi;
4232	} __packed;
4233
4234	#define WMI_CHAN_INFO_START_RESP 0
4235	#define WMI_CHAN_INFO_END_RESP 1
4236
4237	struct wmi_chan_info_event {
4238	__le32 err_code;
4239	__le32 freq;
4240	__le32 cmd_flags;
4241	__le32 noise_floor;
4242	__le32 rx_clear_count;
4243	__le32 cycle_count;
4244	__le32 chan_tx_pwr_range;
4245	__le32 chan_tx_pwr_tp;
4246	__le32 rx_frame_count;
4247	__le32 my_bss_rx_cycle_count;
4248	__le32 rx_11b_mode_data_duration;
4249	__le32 tx_frame_cnt;
4250	__le32 mac_clk_mhz;
4251	__le32 vdev_id;
4252	} __packed;
4253
4254	struct ath12k_wmi_target_cap_arg {
4255	u32 phy_capability;
4256	u32 max_frag_entry;
4257	u32 num_rf_chains;
4258	u32 ht_cap_info;
4259	u32 vht_cap_info;
4260	u32 vht_supp_mcs;
4261	u32 hw_min_tx_power;
4262	u32 hw_max_tx_power;
4263	u32 sys_cap_info;
4264	u32 min_pkt_size_enable;
4265	u32 max_bcn_ie_size;
4266	u32 max_num_scan_channels;
4267	u32 max_supported_macs;
4268	u32 wmi_fw_sub_feat_caps;
4269	u32 txrx_chainmask;
4270	u32 default_dbs_hw_mode_index;
4271	u32 num_msdu_desc;
4272	};
4273
4274	enum wmi_vdev_type {
4275	WMI_VDEV_TYPE_AP = 1,
4276	WMI_VDEV_TYPE_STA = 2,
4277	WMI_VDEV_TYPE_IBSS = 3,
4278	WMI_VDEV_TYPE_MONITOR = 4,
4279	};
4280
4281	enum wmi_vdev_subtype {
4282	WMI_VDEV_SUBTYPE_NONE,
4283	WMI_VDEV_SUBTYPE_P2P_DEVICE,
4284	WMI_VDEV_SUBTYPE_P2P_CLIENT,
4285	WMI_VDEV_SUBTYPE_P2P_GO,
4286	WMI_VDEV_SUBTYPE_PROXY_STA,
4287	WMI_VDEV_SUBTYPE_MESH_NON_11S,
4288	WMI_VDEV_SUBTYPE_MESH_11S,
4289	};
4290
4291	enum wmi_sta_powersave_param {
4292	WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
4293	WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
4294	WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
4295	WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
4296	WMI_STA_PS_PARAM_UAPSD = 4,
4297	};
4298
4299	enum wmi_sta_ps_param_uapsd {
4300	WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
4301	WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
4302	WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
4303	WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
4304	WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
4305	WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
4306	WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
4307	WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
4308	};
4309
4310	enum wmi_sta_ps_param_tx_wake_threshold {
4311	WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
4312	WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
4313
4314	/* Values greater than one indicate that many TX attempts per beacon
4315	* interval before the STA will wake up
4316	*/
4317	};
4318
4319	/* The maximum number of PS-Poll frames the FW will send in response to
4320	* traffic advertised in TIM before waking up (by sending a null frame with PS
4321	* = 0). Value 0 has a special meaning: there is no maximum count and the FW
4322	* will send as many PS-Poll as are necessary to retrieve buffered BU. This
4323	* parameter is used when the RX wake policy is
4324	* WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake
4325	* policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE.
4326	*/
4327	enum wmi_sta_ps_param_pspoll_count {
4328	WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
4329	/* Values greater than 0 indicate the maximum number of PS-Poll frames
4330	* FW will send before waking up.
4331	*/
4332	};
4333
4334	/* U-APSD configuration of peer station from (re)assoc request and TSPECs */
4335	enum wmi_ap_ps_param_uapsd {
4336	WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
4337	WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
4338	WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
4339	WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
4340	WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
4341	WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
4342	WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
4343	WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
4344	};
4345
4346	/* U-APSD maximum service period of peer station */
4347	enum wmi_ap_ps_peer_param_max_sp {
4348	WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
4349	WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
4350	WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
4351	WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
4352	MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
4353	};
4354
4355	enum wmi_ap_ps_peer_param {
4356	/** Set uapsd configuration for a given peer.
4357	*
4358	* This include the delivery and trigger enabled state for each AC.
4359	* The host MLME needs to set this based on AP capability and stations
4360	* request Set in the association request received from the station.
4361	*
4362	* Lower 8 bits of the value specify the UAPSD configuration.
4363	*
4364	* (see enum wmi_ap_ps_param_uapsd)
4365	* The default value is 0.
4366	*/
4367	WMI_AP_PS_PEER_PARAM_UAPSD = 0,
4368
4369	/**
4370	* Set the service period for a UAPSD capable station
4371	*
4372	* The service period from wme ie in the (re)assoc request frame.
4373	*
4374	* (see enum wmi_ap_ps_peer_param_max_sp)
4375	*/
4376	WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
4377
4378	/** Time in seconds for aging out buffered frames
4379	* for STA in power save
4380	*/
4381	WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
4382
4383	/** Specify frame types that are considered SIFS
4384	* RESP trigger frame
4385	*/
4386	WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3,
4387
4388	/** Specifies the trigger state of TID.
4389	* Valid only for UAPSD frame type
4390	*/
4391	WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4,
4392
4393	/* Specifies the WNM sleep state of a STA */
4394	WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5,
4395	};
4396
4397	#define DISABLE_SIFS_RESPONSE_TRIGGER 0
4398
4399	#define WMI_MAX_KEY_INDEX 3
4400	#define WMI_MAX_KEY_LEN 32
4401
4402	enum wmi_key_type {
4403	WMI_KEY_PAIRWISE = 0,
4404	WMI_KEY_GROUP = 1,
4405	};
4406
4407	enum wmi_cipher_type {
4408	WMI_CIPHER_NONE = 0, /* clear key */
4409	WMI_CIPHER_WEP = 1,
4410	WMI_CIPHER_TKIP = 2,
4411	WMI_CIPHER_AES_OCB = 3,
4412	WMI_CIPHER_AES_CCM = 4,
4413	WMI_CIPHER_WAPI = 5,
4414	WMI_CIPHER_CKIP = 6,
4415	WMI_CIPHER_AES_CMAC = 7,
4416	WMI_CIPHER_ANY = 8,
4417	WMI_CIPHER_AES_GCM = 9,
4418	WMI_CIPHER_AES_GMAC = 10,
4419	};
4420
4421	/* Value to disable fixed rate setting */
4422	#define WMI_FIXED_RATE_NONE (0xffff)
4423
4424	#define ATH12K_RC_VERSION_OFFSET 28
4425	#define ATH12K_RC_PREAMBLE_OFFSET 8
4426	#define ATH12K_RC_NSS_OFFSET 5
4427
4428	#define ATH12K_HW_RATE_CODE(rate, nss, preamble) \
4429	((1 << ATH12K_RC_VERSION_OFFSET) | \
4430	((nss) << ATH12K_RC_NSS_OFFSET) | \
4431	((preamble) << ATH12K_RC_PREAMBLE_OFFSET) | \
4432	(rate))
4433
4434	/* Preamble types to be used with VDEV fixed rate configuration */
4435	enum wmi_rate_preamble {
4436	WMI_RATE_PREAMBLE_OFDM,
4437	WMI_RATE_PREAMBLE_CCK,
4438	WMI_RATE_PREAMBLE_HT,
4439	WMI_RATE_PREAMBLE_VHT,
4440	WMI_RATE_PREAMBLE_HE,
4441	};
4442
4443	/**
4444	* enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection.
4445	* @WMI_RTS_CTS_DISABLED: RTS/CTS protection is disabled.
4446	* @WMI_USE_RTS_CTS: RTS/CTS Enabled.
4447	* @WMI_USE_CTS2SELF: CTS to self protection Enabled.
4448	*/
4449	enum wmi_rtscts_prot_mode {
4450	WMI_RTS_CTS_DISABLED = 0,
4451	WMI_USE_RTS_CTS = 1,
4452	WMI_USE_CTS2SELF = 2,
4453	};
4454
4455	/**
4456	* enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling
4457	* protection mode.
4458	* @WMI_RTSCTS_FOR_NO_RATESERIES: Neither of rate-series should use RTS-CTS
4459	* @WMI_RTSCTS_FOR_SECOND_RATESERIES: Only second rate-series will use RTS-CTS
4460	* @WMI_RTSCTS_ACROSS_SW_RETRIES: Only the second rate-series will use RTS-CTS,
4461	* but if there's a sw retry, both the rate
4462	* series will use RTS-CTS.
4463	* @WMI_RTSCTS_ERP: RTS/CTS used for ERP protection for every PPDU.
4464	* @WMI_RTSCTS_FOR_ALL_RATESERIES: Enable RTS-CTS for all rate series.
4465	*/
4466	enum wmi_rtscts_profile {
4467	WMI_RTSCTS_FOR_NO_RATESERIES = 0,
4468	WMI_RTSCTS_FOR_SECOND_RATESERIES = 1,
4469	WMI_RTSCTS_ACROSS_SW_RETRIES = 2,
4470	WMI_RTSCTS_ERP = 3,
4471	WMI_RTSCTS_FOR_ALL_RATESERIES = 4,
4472	};
4473
4474	#define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
4475
4476	enum wmi_sta_ps_param_rx_wake_policy {
4477	WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
4478	WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
4479	};
4480
4481	/* Do not change existing values! Used by ath12k_frame_mode parameter
4482	* module parameter.
4483	*/
4484	enum ath12k_hw_txrx_mode {
4485	ATH12K_HW_TXRX_RAW = 0,
4486	ATH12K_HW_TXRX_NATIVE_WIFI = 1,
4487	ATH12K_HW_TXRX_ETHERNET = 2,
4488	};
4489
4490	struct wmi_wmm_params {
4491	__le32 tlv_header;
4492	__le32 cwmin;
4493	__le32 cwmax;
4494	__le32 aifs;
4495	__le32 txoplimit;
4496	__le32 acm;
4497	__le32 no_ack;
4498	} __packed;
4499
4500	struct wmi_wmm_params_arg {
4501	u8 acm;
4502	u8 aifs;
4503	u16 cwmin;
4504	u16 cwmax;
4505	u16 txop;
4506	u8 no_ack;
4507	};
4508
4509	struct wmi_vdev_set_wmm_params_cmd {
4510	__le32 tlv_header;
4511	__le32 vdev_id;
4512	struct wmi_wmm_params wmm_params[4];
4513	__le32 wmm_param_type;
4514	} __packed;
4515
4516	struct wmi_wmm_params_all_arg {
4517	struct wmi_wmm_params_arg ac_be;
4518	struct wmi_wmm_params_arg ac_bk;
4519	struct wmi_wmm_params_arg ac_vi;
4520	struct wmi_wmm_params_arg ac_vo;
4521	};
4522
4523	#define ATH12K_TWT_DEF_STA_CONG_TIMER_MS 5000
4524	#define ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE 10
4525	#define ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP 50
4526	#define ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20
4527	#define ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100
4528	#define ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80
4529	#define ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50
4530	#define ATH12K_TWT_DEF_MIN_NO_STA_SETUP 10
4531	#define ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN 2
4532	#define ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2
4533	#define ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS 2
4534	#define ATH12K_TWT_DEF_MAX_NO_STA_TWT 500
4535	#define ATH12K_TWT_DEF_MODE_CHECK_INTERVAL 10000
4536	#define ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000
4537	#define ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000
4538
4539	struct wmi_twt_enable_params_cmd {
4540	__le32 tlv_header;
4541	__le32 pdev_id;
4542	__le32 sta_cong_timer_ms;
4543	__le32 mbss_support;
4544	__le32 default_slot_size;
4545	__le32 congestion_thresh_setup;
4546	__le32 congestion_thresh_teardown;
4547	__le32 congestion_thresh_critical;
4548	__le32 interference_thresh_teardown;
4549	__le32 interference_thresh_setup;
4550	__le32 min_no_sta_setup;
4551	__le32 min_no_sta_teardown;
4552	__le32 no_of_bcast_mcast_slots;
4553	__le32 min_no_twt_slots;
4554	__le32 max_no_sta_twt;
4555	__le32 mode_check_interval;
4556	__le32 add_sta_slot_interval;
4557	__le32 remove_sta_slot_interval;
4558	} __packed;
4559
4560	struct wmi_twt_disable_params_cmd {
4561	__le32 tlv_header;
4562	__le32 pdev_id;
4563	} __packed;
4564
4565	struct wmi_obss_spatial_reuse_params_cmd {
4566	__le32 tlv_header;
4567	__le32 pdev_id;
4568	__le32 enable;
4569	a_sle32 obss_min;
4570	a_sle32 obss_max;
4571	__le32 vdev_id;
4572	} __packed;
4573
4574	#define ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS 200
4575	#define ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE 0
4576	#define ATH12K_OBSS_COLOR_COLLISION_DETECTION 1
4577
4578	#define ATH12K_BSS_COLOR_STA_PERIODS 10000
4579	#define ATH12K_BSS_COLOR_AP_PERIODS 5000
4580
4581	struct wmi_obss_color_collision_cfg_params_cmd {
4582	__le32 tlv_header;
4583	__le32 vdev_id;
4584	__le32 flags;
4585	__le32 evt_type;
4586	__le32 current_bss_color;
4587	__le32 detection_period_ms;
4588	__le32 scan_period_ms;
4589	__le32 free_slot_expiry_time_ms;
4590	} __packed;
4591
4592	struct wmi_bss_color_change_enable_params_cmd {
4593	__le32 tlv_header;
4594	__le32 vdev_id;
4595	__le32 enable;
4596	} __packed;
4597
4598	#define ATH12K_IPV4_TH_SEED_SIZE 5
4599	#define ATH12K_IPV6_TH_SEED_SIZE 11
4600
4601	struct ath12k_wmi_pdev_lro_config_cmd {
4602	__le32 tlv_header;
4603	__le32 lro_enable;
4604	__le32 res;
4605	u32 th_4[ATH12K_IPV4_TH_SEED_SIZE];
4606	u32 th_6[ATH12K_IPV6_TH_SEED_SIZE];
4607	__le32 pdev_id;
4608	} __packed;
4609
4610	#define ATH12K_WMI_SPECTRAL_COUNT_DEFAULT 0
4611	#define ATH12K_WMI_SPECTRAL_PERIOD_DEFAULT 224
4612	#define ATH12K_WMI_SPECTRAL_PRIORITY_DEFAULT 1
4613	#define ATH12K_WMI_SPECTRAL_FFT_SIZE_DEFAULT 7
4614	#define ATH12K_WMI_SPECTRAL_GC_ENA_DEFAULT 1
4615	#define ATH12K_WMI_SPECTRAL_RESTART_ENA_DEFAULT 0
4616	#define ATH12K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96
4617	#define ATH12K_WMI_SPECTRAL_INIT_DELAY_DEFAULT 80
4618	#define ATH12K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12
4619	#define ATH12K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8
4620	#define ATH12K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0
4621	#define ATH12K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0
4622	#define ATH12K_WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0
4623	#define ATH12K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0
4624	#define ATH12K_WMI_SPECTRAL_RPT_MODE_DEFAULT 2
4625	#define ATH12K_WMI_SPECTRAL_BIN_SCALE_DEFAULT 1
4626	#define ATH12K_WMI_SPECTRAL_DBM_ADJ_DEFAULT 1
4627	#define ATH12K_WMI_SPECTRAL_CHN_MASK_DEFAULT 1
4628
4629	struct ath12k_wmi_vdev_spectral_conf_arg {
4630	u32 vdev_id;
4631	u32 scan_count;
4632	u32 scan_period;
4633	u32 scan_priority;
4634	u32 scan_fft_size;
4635	u32 scan_gc_ena;
4636	u32 scan_restart_ena;
4637	u32 scan_noise_floor_ref;
4638	u32 scan_init_delay;
4639	u32 scan_nb_tone_thr;
4640	u32 scan_str_bin_thr;
4641	u32 scan_wb_rpt_mode;
4642	u32 scan_rssi_rpt_mode;
4643	u32 scan_rssi_thr;
4644	u32 scan_pwr_format;
4645	u32 scan_rpt_mode;
4646	u32 scan_bin_scale;
4647	u32 scan_dbm_adj;
4648	u32 scan_chn_mask;
4649	};
4650
4651	struct ath12k_wmi_vdev_spectral_conf_cmd {
4652	__le32 tlv_header;
4653	__le32 vdev_id;
4654	__le32 scan_count;
4655	__le32 scan_period;
4656	__le32 scan_priority;
4657	__le32 scan_fft_size;
4658	__le32 scan_gc_ena;
4659	__le32 scan_restart_ena;
4660	__le32 scan_noise_floor_ref;
4661	__le32 scan_init_delay;
4662	__le32 scan_nb_tone_thr;
4663	__le32 scan_str_bin_thr;
4664	__le32 scan_wb_rpt_mode;
4665	__le32 scan_rssi_rpt_mode;
4666	__le32 scan_rssi_thr;
4667	__le32 scan_pwr_format;
4668	__le32 scan_rpt_mode;
4669	__le32 scan_bin_scale;
4670	__le32 scan_dbm_adj;
4671	__le32 scan_chn_mask;
4672	} __packed;
4673
4674	#define ATH12K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1
4675	#define ATH12K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2
4676	#define ATH12K_WMI_SPECTRAL_ENABLE_CMD_ENABLE 1
4677	#define ATH12K_WMI_SPECTRAL_ENABLE_CMD_DISABLE 2
4678
4679	struct ath12k_wmi_vdev_spectral_enable_cmd {
4680	__le32 tlv_header;
4681	__le32 vdev_id;
4682	__le32 trigger_cmd;
4683	__le32 enable_cmd;
4684	} __packed;
4685
4686	struct ath12k_wmi_pdev_dma_ring_cfg_arg {
4687	u32 tlv_header;
4688	u32 pdev_id;
4689	u32 module_id;
4690	u32 base_paddr_lo;
4691	u32 base_paddr_hi;
4692	u32 head_idx_paddr_lo;
4693	u32 head_idx_paddr_hi;
4694	u32 tail_idx_paddr_lo;
4695	u32 tail_idx_paddr_hi;
4696	u32 num_elems;
4697	u32 buf_size;
4698	u32 num_resp_per_event;
4699	u32 event_timeout_ms;
4700	};
4701
4702	struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd {
4703	__le32 tlv_header;
4704	__le32 pdev_id;
4705	__le32 module_id; /* see enum wmi_direct_buffer_module */
4706	__le32 base_paddr_lo;
4707	__le32 base_paddr_hi;
4708	__le32 head_idx_paddr_lo;
4709	__le32 head_idx_paddr_hi;
4710	__le32 tail_idx_paddr_lo;
4711	__le32 tail_idx_paddr_hi;
4712	__le32 num_elems; /* Number of elems in the ring */
4713	__le32 buf_size; /* size of allocated buffer in bytes */
4714
4715	/* Number of wmi_dma_buf_release_entry packed together */
4716	__le32 num_resp_per_event;
4717
4718	/* Target should timeout and send whatever resp
4719	* it has if this time expires, units in milliseconds
4720	*/
4721	__le32 event_timeout_ms;
4722	} __packed;
4723
4724	struct ath12k_wmi_dma_buf_release_fixed_params {
4725	__le32 pdev_id;
4726	__le32 module_id;
4727	__le32 num_buf_release_entry;
4728	__le32 num_meta_data_entry;
4729	} __packed;
4730
4731	struct ath12k_wmi_dma_buf_release_entry_params {
4732	__le32 tlv_header;
4733	__le32 paddr_lo;
4734
4735	/* Bits 11:0: address of data
4736	* Bits 31:12: host context data
4737	*/
4738	__le32 paddr_hi;
4739	} __packed;
4740
4741	#define WMI_SPECTRAL_META_INFO1_FREQ1 GENMASK(15, 0)
4742	#define WMI_SPECTRAL_META_INFO1_FREQ2 GENMASK(31, 16)
4743
4744	#define WMI_SPECTRAL_META_INFO2_CHN_WIDTH GENMASK(7, 0)
4745
4746	struct ath12k_wmi_dma_buf_release_meta_data_params {
4747	__le32 tlv_header;
4748	a_sle32 noise_floor[WMI_MAX_CHAINS];
4749	__le32 reset_delay;
4750	__le32 freq1;
4751	__le32 freq2;
4752	__le32 ch_width;
4753	} __packed;
4754
4755	enum wmi_fils_discovery_cmd_type {
4756	WMI_FILS_DISCOVERY_CMD,
4757	WMI_UNSOL_BCAST_PROBE_RESP,
4758	};
4759
4760	struct wmi_fils_discovery_cmd {
4761	__le32 tlv_header;
4762	__le32 vdev_id;
4763	__le32 interval;
4764	__le32 config; /* enum wmi_fils_discovery_cmd_type */
4765	} __packed;
4766
4767	struct wmi_fils_discovery_tmpl_cmd {
4768	__le32 tlv_header;
4769	__le32 vdev_id;
4770	__le32 buf_len;
4771	} __packed;
4772
4773	struct wmi_probe_tmpl_cmd {
4774	__le32 tlv_header;
4775	__le32 vdev_id;
4776	__le32 buf_len;
4777	} __packed;
4778
4779	#define WMI_MAX_MEM_REQS 32
4780
4781	#define MAX_RADIOS 3
4782
4783	#define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
4784	#define WMI_SEND_TIMEOUT_HZ (3 * HZ)
4785
4786	struct ath12k_wmi_pdev {
4787	struct ath12k_wmi_base *wmi_ab;
4788	enum ath12k_htc_ep_id eid;
4789	u32 rx_decap_mode;
4790	};
4791
4792	struct ath12k_wmi_base {
4793	struct ath12k_base *ab;
4794	struct ath12k_wmi_pdev wmi[MAX_RADIOS];
4795	enum ath12k_htc_ep_id wmi_endpoint_id[MAX_RADIOS];
4796	u32 max_msg_len[MAX_RADIOS];
4797
4798	struct completion service_ready;
4799	struct completion unified_ready;
4800	DECLARE_BITMAP(svc_map, WMI_MAX_EXT2_SERVICE);
4801	wait_queue_head_t tx_credits_wq;
4802	u32 num_mem_chunks;
4803	u32 rx_decap_mode;
4804	struct ath12k_wmi_host_mem_chunk_arg mem_chunks[WMI_MAX_MEM_REQS];
4805
4806	enum wmi_host_hw_mode_config_type preferred_hw_mode;
4807
4808	struct ath12k_wmi_target_cap_arg *targ_cap;
4809	};
4810
4811	#define ATH12K_FW_STATS_BUF_SIZE (1024 * 1024)
4812
4813	enum wmi_sys_cap_info_flags {
4814	WMI_SYS_CAP_INFO_RXTX_LED = BIT(0),
4815	WMI_SYS_CAP_INFO_RFKILL = BIT(1),
4816	};
4817
4818	#define WMI_RFKILL_CFG_GPIO_PIN_NUM GENMASK(5, 0)
4819	#define WMI_RFKILL_CFG_RADIO_LEVEL BIT(6)
4820	#define WMI_RFKILL_CFG_PIN_AS_GPIO GENMASK(10, 7)
4821
4822	enum wmi_rfkill_enable_radio {
4823	WMI_RFKILL_ENABLE_RADIO_ON = 0,
4824	WMI_RFKILL_ENABLE_RADIO_OFF = 1,
4825	};
4826
4827	enum wmi_rfkill_radio_state {
4828	WMI_RFKILL_RADIO_STATE_OFF = 1,
4829	WMI_RFKILL_RADIO_STATE_ON = 2,
4830	};
4831
4832	struct wmi_rfkill_state_change_event {
4833	__le32 gpio_pin_num;
4834	__le32 int_type;
4835	__le32 radio_state;
4836	} __packed;
4837
4838	struct wmi_twt_enable_event {
4839	__le32 pdev_id;
4840	__le32 status;
4841	} __packed;
4842
4843	struct wmi_twt_disable_event {
4844	__le32 pdev_id;
4845	__le32 status;
4846	} __packed;
4847
4848	void ath12k_wmi_init_qcn9274(struct ath12k_base *ab,
4849	struct ath12k_wmi_resource_config_arg *config);
4850	void ath12k_wmi_init_wcn7850(struct ath12k_base *ab,
4851	struct ath12k_wmi_resource_config_arg *config);
4852	int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
4853	u32 cmd_id);
4854	struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_sc, u32 len);
4855	int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id,
4856	struct sk_buff *frame);
4857	int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id,
4858	const u8 *p2p_ie);
4859	int ath12k_wmi_bcn_tmpl(struct ath12k *ar, u32 vdev_id,
4860	struct ieee80211_mutable_offsets *offs,
4861	struct sk_buff *bcn);
4862	int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id);
4863	int ath12k_wmi_vdev_up(struct ath12k *ar, u32 vdev_id, u32 aid,
4864	const u8 *bssid);
4865	int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id);
4866	int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg,
4867	bool restart);
4868	int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr,
4869	u32 vdev_id, u32 param_id, u32 param_val);
4870	int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id,
4871	u32 param_value, u8 pdev_id);
4872	int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable);
4873	int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab);
4874	int ath12k_wmi_cmd_init(struct ath12k_base *ab);
4875	int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab);
4876	int ath12k_wmi_connect(struct ath12k_base *ab);
4877	int ath12k_wmi_pdev_attach(struct ath12k_base *ab,
4878	u8 pdev_id);
4879	int ath12k_wmi_attach(struct ath12k_base *ab);
4880	void ath12k_wmi_detach(struct ath12k_base *ab);
4881	int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr,
4882	struct ath12k_wmi_vdev_create_arg *arg);
4883	int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar,
4884	struct ath12k_wmi_peer_create_arg *arg);
4885	int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id,
4886	u32 param_id, u32 param_value);
4887
4888	int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id,
4889	u32 param, u32 param_value);
4890	int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms);
4891	int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar,
4892	const u8 *peer_addr, u8 vdev_id);
4893	int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id);
4894	void ath12k_wmi_start_scan_init(struct ath12k *ar,
4895	struct ath12k_wmi_scan_req_arg *arg);
4896	int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar,
4897	struct ath12k_wmi_scan_req_arg *arg);
4898	int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar,
4899	struct ath12k_wmi_scan_cancel_arg *arg);
4900	int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id,
4901	struct wmi_wmm_params_all_arg *param);
4902	int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt,
4903	u32 pdev_id);
4904	int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id);
4905
4906	int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar,
4907	struct ath12k_wmi_peer_assoc_arg *arg);
4908	int ath12k_wmi_vdev_install_key(struct ath12k *ar,
4909	struct wmi_vdev_install_key_arg *arg);
4910	int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar,
4911	enum wmi_bss_chan_info_req_type type);
4912	int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar);
4913	int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar,
4914	u8 peer_addr[ETH_ALEN],
4915	u32 peer_tid_bitmap,
4916	u8 vdev_id);
4917	int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr,
4918	struct ath12k_wmi_ap_ps_arg *arg);
4919	int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar,
4920	struct ath12k_wmi_scan_chan_list_arg *arg);
4921	int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar,
4922	u32 pdev_id);
4923	int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac);
4924	int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
4925	u32 tid, u32 buf_size);
4926	int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac,
4927	u32 tid, u32 status);
4928	int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
4929	u32 tid, u32 initiator, u32 reason);
4930	int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar,
4931	u32 vdev_id, u32 bcn_ctrl_op);
4932	int ath12k_wmi_send_init_country_cmd(struct ath12k *ar,
4933	struct ath12k_wmi_init_country_arg *arg);
4934	int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar,
4935	int vdev_id, const u8 *addr,
4936	dma_addr_t paddr, u8 tid,
4937	u8 ba_window_size_valid,
4938	u32 ba_window_size);
4939	int
4940	ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar,
4941	struct ath12k_wmi_rx_reorder_queue_remove_arg *arg);
4942	int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar,
4943	struct ath12k_wmi_pdev_set_regdomain_arg *arg);
4944	int ath12k_wmi_simulate_radar(struct ath12k *ar);
4945	int ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id);
4946	int ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id);
4947	int ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id,
4948	struct ieee80211_he_obss_pd *he_obss_pd);
4949	int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id,
4950	u8 bss_color, u32 period,
4951	bool enable);
4952	int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id,
4953	bool enable);
4954	int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar, int pdev_id);
4955	int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar,
4956	struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg);
4957	int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id,
4958	u32 trigger, u32 enable);
4959	int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar,
4960	struct ath12k_wmi_vdev_spectral_conf_arg *arg);
4961	int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id,
4962	struct sk_buff *tmpl);
4963	int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval,
4964	bool unsol_bcast_probe_resp_enabled);
4965	int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id,
4966	struct sk_buff *tmpl);
4967	int ath12k_wmi_set_hw_mode(struct ath12k_base *ab,
4968	enum wmi_host_hw_mode_config_type mode);
4969
4970	static inline u32
4971	ath12k_wmi_caps_ext_get_pdev_id(const struct ath12k_wmi_caps_ext_params *param)
4972	{
4973	return le32_get_bits(v: param->pdev_and_hw_link_ids, WMI_CAPS_PARAMS_PDEV_ID);
4974	}
4975
4976	static inline u32
4977	ath12k_wmi_caps_ext_get_hw_link_id(const struct ath12k_wmi_caps_ext_params *param)
4978	{
4979	return le32_get_bits(v: param->pdev_and_hw_link_ids, WMI_CAPS_PARAMS_HW_LINK_ID);
4980	}
4981
4982	static inline u32
4983	ath12k_wmi_mac_phy_get_pdev_id(const struct ath12k_wmi_mac_phy_caps_params *param)
4984	{
4985	return le32_get_bits(v: param->pdev_and_hw_link_ids,
4986	WMI_CAPS_PARAMS_PDEV_ID);
4987	}
4988
4989	static inline u32
4990	ath12k_wmi_mac_phy_get_hw_link_id(const struct ath12k_wmi_mac_phy_caps_params *param)
4991	{
4992	return le32_get_bits(v: param->pdev_and_hw_link_ids,
4993	WMI_CAPS_PARAMS_HW_LINK_ID);
4994	}
4995
4996	#endif
4997