1 | /* |
2 | * Copyright (c) 2010-2011 Atheros Communications Inc. |
3 | * Copyright (c) 2011-2012 Qualcomm Atheros, Inc. |
4 | * |
5 | * Permission to use, copy, modify, and/or distribute this software for any |
6 | * purpose with or without fee is hereby granted, provided that the above |
7 | * copyright notice and this permission notice appear in all copies. |
8 | * |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
16 | */ |
17 | |
18 | #ifndef CORE_H |
19 | #define CORE_H |
20 | |
21 | #include <linux/etherdevice.h> |
22 | #include <linux/rtnetlink.h> |
23 | #include <linux/firmware.h> |
24 | #include <linux/sched.h> |
25 | #include <linux/circ_buf.h> |
26 | #include <net/cfg80211.h> |
27 | #include "htc.h" |
28 | #include "wmi.h" |
29 | #include "bmi.h" |
30 | #include "target.h" |
31 | |
32 | #define MAX_ATH6KL 1 |
33 | #define ATH6KL_MAX_RX_BUFFERS 16 |
34 | #define ATH6KL_BUFFER_SIZE 1664 |
35 | #define ATH6KL_MAX_AMSDU_RX_BUFFERS 4 |
36 | #define ATH6KL_AMSDU_REFILL_THRESHOLD 3 |
37 | #define ATH6KL_AMSDU_BUFFER_SIZE (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128) |
38 | #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN 1508 |
39 | #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN 46 |
40 | |
41 | #define USER_SAVEDKEYS_STAT_INIT 0 |
42 | #define USER_SAVEDKEYS_STAT_RUN 1 |
43 | |
44 | #define ATH6KL_TX_TIMEOUT 10 |
45 | #define ATH6KL_MAX_ENDPOINTS 4 |
46 | #define MAX_NODE_NUM 15 |
47 | |
48 | #define ATH6KL_APSD_ALL_FRAME 0xFFFF |
49 | #define ATH6KL_APSD_NUM_OF_AC 0x4 |
50 | #define ATH6KL_APSD_FRAME_MASK 0xF |
51 | |
52 | /* Extra bytes for htc header alignment */ |
53 | #define ATH6KL_HTC_ALIGN_BYTES 3 |
54 | |
55 | /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */ |
56 | #define MAX_DEF_COOKIE_NUM 180 |
57 | #define MAX_HI_COOKIE_NUM 18 /* 10% of MAX_COOKIE_NUM */ |
58 | #define MAX_COOKIE_NUM (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM) |
59 | |
60 | #define MAX_DEFAULT_SEND_QUEUE_DEPTH (MAX_DEF_COOKIE_NUM / WMM_NUM_AC) |
61 | |
62 | #define DISCON_TIMER_INTVAL 10000 /* in msec */ |
63 | |
64 | /* Channel dwell time in fg scan */ |
65 | #define ATH6KL_FG_SCAN_INTERVAL 50 /* in ms */ |
66 | |
67 | /* includes also the null byte */ |
68 | #define ATH6KL_FIRMWARE_MAGIC "QCA-ATH6KL" |
69 | |
70 | enum ath6kl_fw_ie_type { |
71 | ATH6KL_FW_IE_FW_VERSION = 0, |
72 | ATH6KL_FW_IE_TIMESTAMP = 1, |
73 | ATH6KL_FW_IE_OTP_IMAGE = 2, |
74 | ATH6KL_FW_IE_FW_IMAGE = 3, |
75 | ATH6KL_FW_IE_PATCH_IMAGE = 4, |
76 | ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5, |
77 | ATH6KL_FW_IE_CAPABILITIES = 6, |
78 | ATH6KL_FW_IE_PATCH_ADDR = 7, |
79 | ATH6KL_FW_IE_BOARD_ADDR = 8, |
80 | ATH6KL_FW_IE_VIF_MAX = 9, |
81 | }; |
82 | |
83 | enum ath6kl_fw_capability { |
84 | ATH6KL_FW_CAPABILITY_HOST_P2P = 0, |
85 | ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1, |
86 | |
87 | /* |
88 | * Firmware is capable of supporting P2P mgmt operations on a |
89 | * station interface. After group formation, the station |
90 | * interface will become a P2P client/GO interface as the case may be |
91 | */ |
92 | ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, |
93 | |
94 | /* |
95 | * Firmware has support to cleanup inactive stations |
96 | * in AP mode. |
97 | */ |
98 | ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT, |
99 | |
100 | /* Firmware has support to override rsn cap of rsn ie */ |
101 | ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE, |
102 | |
103 | /* |
104 | * Multicast support in WOW and host awake mode. |
105 | * Allow all multicast in host awake mode. |
106 | * Apply multicast filter in WOW mode. |
107 | */ |
108 | ATH6KL_FW_CAPABILITY_WOW_MULTICAST_FILTER, |
109 | |
110 | /* Firmware supports enhanced bmiss detection */ |
111 | ATH6KL_FW_CAPABILITY_BMISS_ENHANCE, |
112 | |
113 | /* |
114 | * FW supports matching of ssid in schedule scan |
115 | */ |
116 | ATH6KL_FW_CAPABILITY_SCHED_SCAN_MATCH_LIST, |
117 | |
118 | /* Firmware supports filtering BSS results by RSSI */ |
119 | , |
120 | |
121 | /* FW sets mac_addr[4] ^= 0x80 for newly created interfaces */ |
122 | ATH6KL_FW_CAPABILITY_CUSTOM_MAC_ADDR, |
123 | |
124 | /* Firmware supports TX error rate notification */ |
125 | ATH6KL_FW_CAPABILITY_TX_ERR_NOTIFY, |
126 | |
127 | /* supports WMI_SET_REGDOMAIN_CMDID command */ |
128 | ATH6KL_FW_CAPABILITY_REGDOMAIN, |
129 | |
130 | /* Firmware supports sched scan decoupled from host sleep */ |
131 | ATH6KL_FW_CAPABILITY_SCHED_SCAN_V2, |
132 | |
133 | /* |
134 | * Firmware capability for hang detection through heart beat |
135 | * challenge messages. |
136 | */ |
137 | ATH6KL_FW_CAPABILITY_HEART_BEAT_POLL, |
138 | |
139 | /* WMI_SET_TX_SELECT_RATES_CMDID uses 64 bit size rate table */ |
140 | ATH6KL_FW_CAPABILITY_64BIT_RATES, |
141 | |
142 | /* WMI_AP_CONN_INACT_CMDID uses minutes as units */ |
143 | ATH6KL_FW_CAPABILITY_AP_INACTIVITY_MINS, |
144 | |
145 | /* use low priority endpoint for all data */ |
146 | ATH6KL_FW_CAPABILITY_MAP_LP_ENDPOINT, |
147 | |
148 | /* ratetable is the 2 stream version (max MCS15) */ |
149 | ATH6KL_FW_CAPABILITY_RATETABLE_MCS15, |
150 | |
151 | /* firmware doesn't support IP checksumming */ |
152 | ATH6KL_FW_CAPABILITY_NO_IP_CHECKSUM, |
153 | |
154 | /* this needs to be last */ |
155 | ATH6KL_FW_CAPABILITY_MAX, |
156 | }; |
157 | |
158 | #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32) |
159 | |
160 | struct ath6kl_fw_ie { |
161 | __le32 id; |
162 | __le32 len; |
163 | u8 data[]; |
164 | }; |
165 | |
166 | enum ath6kl_hw_flags { |
167 | ATH6KL_HW_SDIO_CRC_ERROR_WAR = BIT(3), |
168 | }; |
169 | |
170 | #define ATH6KL_FW_API2_FILE "fw-2.bin" |
171 | #define ATH6KL_FW_API3_FILE "fw-3.bin" |
172 | #define ATH6KL_FW_API4_FILE "fw-4.bin" |
173 | #define ATH6KL_FW_API5_FILE "fw-5.bin" |
174 | |
175 | /* AR6003 1.0 definitions */ |
176 | #define AR6003_HW_1_0_VERSION 0x300002ba |
177 | |
178 | /* AR6003 2.0 definitions */ |
179 | #define AR6003_HW_2_0_VERSION 0x30000384 |
180 | #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS 0x57e910 |
181 | #define AR6003_HW_2_0_FW_DIR "ath6k/AR6003/hw2.0" |
182 | #define AR6003_HW_2_0_OTP_FILE "otp.bin.z77" |
183 | #define AR6003_HW_2_0_FIRMWARE_FILE "athwlan.bin.z77" |
184 | #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "athtcmd_ram.bin" |
185 | #define AR6003_HW_2_0_PATCH_FILE "data.patch.bin" |
186 | #define AR6003_HW_2_0_BOARD_DATA_FILE AR6003_HW_2_0_FW_DIR "/bdata.bin" |
187 | #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \ |
188 | AR6003_HW_2_0_FW_DIR "/bdata.SD31.bin" |
189 | |
190 | /* AR6003 3.0 definitions */ |
191 | #define AR6003_HW_2_1_1_VERSION 0x30000582 |
192 | #define AR6003_HW_2_1_1_FW_DIR "ath6k/AR6003/hw2.1.1" |
193 | #define AR6003_HW_2_1_1_OTP_FILE "otp.bin" |
194 | #define AR6003_HW_2_1_1_FIRMWARE_FILE "athwlan.bin" |
195 | #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE "athtcmd_ram.bin" |
196 | #define AR6003_HW_2_1_1_UTF_FIRMWARE_FILE "utf.bin" |
197 | #define AR6003_HW_2_1_1_TESTSCRIPT_FILE "nullTestFlow.bin" |
198 | #define AR6003_HW_2_1_1_PATCH_FILE "data.patch.bin" |
199 | #define AR6003_HW_2_1_1_BOARD_DATA_FILE AR6003_HW_2_1_1_FW_DIR "/bdata.bin" |
200 | #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \ |
201 | AR6003_HW_2_1_1_FW_DIR "/bdata.SD31.bin" |
202 | |
203 | /* AR6004 1.0 definitions */ |
204 | #define AR6004_HW_1_0_VERSION 0x30000623 |
205 | #define AR6004_HW_1_0_FW_DIR "ath6k/AR6004/hw1.0" |
206 | #define AR6004_HW_1_0_FIRMWARE_FILE "fw.ram.bin" |
207 | #define AR6004_HW_1_0_BOARD_DATA_FILE AR6004_HW_1_0_FW_DIR "/bdata.bin" |
208 | #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \ |
209 | AR6004_HW_1_0_FW_DIR "/bdata.DB132.bin" |
210 | |
211 | /* AR6004 1.1 definitions */ |
212 | #define AR6004_HW_1_1_VERSION 0x30000001 |
213 | #define AR6004_HW_1_1_FW_DIR "ath6k/AR6004/hw1.1" |
214 | #define AR6004_HW_1_1_FIRMWARE_FILE "fw.ram.bin" |
215 | #define AR6004_HW_1_1_BOARD_DATA_FILE AR6004_HW_1_1_FW_DIR "/bdata.bin" |
216 | #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \ |
217 | AR6004_HW_1_1_FW_DIR "/bdata.DB132.bin" |
218 | |
219 | /* AR6004 1.2 definitions */ |
220 | #define AR6004_HW_1_2_VERSION 0x300007e8 |
221 | #define AR6004_HW_1_2_FW_DIR "ath6k/AR6004/hw1.2" |
222 | #define AR6004_HW_1_2_FIRMWARE_FILE "fw.ram.bin" |
223 | #define AR6004_HW_1_2_BOARD_DATA_FILE AR6004_HW_1_2_FW_DIR "/bdata.bin" |
224 | #define AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE \ |
225 | AR6004_HW_1_2_FW_DIR "/bdata.bin" |
226 | |
227 | /* AR6004 1.3 definitions */ |
228 | #define AR6004_HW_1_3_VERSION 0x31c8088a |
229 | #define AR6004_HW_1_3_FW_DIR "ath6k/AR6004/hw1.3" |
230 | #define AR6004_HW_1_3_FIRMWARE_FILE "fw.ram.bin" |
231 | #define AR6004_HW_1_3_TCMD_FIRMWARE_FILE "utf.bin" |
232 | #define AR6004_HW_1_3_UTF_FIRMWARE_FILE "utf.bin" |
233 | #define AR6004_HW_1_3_TESTSCRIPT_FILE "nullTestFlow.bin" |
234 | #define AR6004_HW_1_3_BOARD_DATA_FILE AR6004_HW_1_3_FW_DIR "/bdata.bin" |
235 | #define AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE AR6004_HW_1_3_FW_DIR "/bdata.bin" |
236 | |
237 | /* AR6004 3.0 definitions */ |
238 | #define AR6004_HW_3_0_VERSION 0x31C809F8 |
239 | #define AR6004_HW_3_0_FW_DIR "ath6k/AR6004/hw3.0" |
240 | #define AR6004_HW_3_0_FIRMWARE_FILE "fw.ram.bin" |
241 | #define AR6004_HW_3_0_TCMD_FIRMWARE_FILE "utf.bin" |
242 | #define AR6004_HW_3_0_UTF_FIRMWARE_FILE "utf.bin" |
243 | #define AR6004_HW_3_0_TESTSCRIPT_FILE "nullTestFlow.bin" |
244 | #define AR6004_HW_3_0_BOARD_DATA_FILE AR6004_HW_3_0_FW_DIR "/bdata.bin" |
245 | #define AR6004_HW_3_0_DEFAULT_BOARD_DATA_FILE AR6004_HW_3_0_FW_DIR "/bdata.bin" |
246 | |
247 | /* Per STA data, used in AP mode */ |
248 | #define STA_PS_AWAKE BIT(0) |
249 | #define STA_PS_SLEEP BIT(1) |
250 | #define STA_PS_POLLED BIT(2) |
251 | #define STA_PS_APSD_TRIGGER BIT(3) |
252 | #define STA_PS_APSD_EOSP BIT(4) |
253 | |
254 | /* HTC TX packet tagging definitions */ |
255 | #define ATH6KL_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED |
256 | #define ATH6KL_DATA_PKT_TAG (ATH6KL_CONTROL_PKT_TAG + 1) |
257 | |
258 | #define AR6003_CUST_DATA_SIZE 16 |
259 | |
260 | #define AGGR_WIN_IDX(x, y) ((x) % (y)) |
261 | #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y)) |
262 | #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y)) |
263 | #define ATH6KL_MAX_SEQ_NO 0xFFF |
264 | #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO) |
265 | |
266 | #define NUM_OF_TIDS 8 |
267 | #define AGGR_SZ_DEFAULT 8 |
268 | |
269 | #define AGGR_WIN_SZ_MIN 2 |
270 | #define AGGR_WIN_SZ_MAX 8 |
271 | |
272 | #define TID_WINDOW_SZ(_x) ((_x) << 1) |
273 | |
274 | #define AGGR_NUM_OF_FREE_NETBUFS 16 |
275 | |
276 | #define AGGR_RX_TIMEOUT 100 /* in ms */ |
277 | |
278 | #define WMI_TIMEOUT (2 * HZ) |
279 | |
280 | #define MBOX_YIELD_LIMIT 99 |
281 | |
282 | #define ATH6KL_DEFAULT_LISTEN_INTVAL 100 /* in TUs */ |
283 | #define ATH6KL_DEFAULT_BMISS_TIME 1500 |
284 | #define ATH6KL_MAX_WOW_LISTEN_INTL 300 /* in TUs */ |
285 | #define ATH6KL_MAX_BMISS_TIME 5000 |
286 | |
287 | /* configuration lags */ |
288 | /* |
289 | * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in |
290 | * ERP IE of beacon to determine the short premable support when |
291 | * sending (Re)Assoc req. |
292 | * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power |
293 | * module state transition failure events which happen during |
294 | * scan, to the host. |
295 | */ |
296 | #define ATH6KL_CONF_IGNORE_ERP_BARKER BIT(0) |
297 | #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN BIT(1) |
298 | #define ATH6KL_CONF_ENABLE_11N BIT(2) |
299 | #define ATH6KL_CONF_ENABLE_TX_BURST BIT(3) |
300 | #define ATH6KL_CONF_UART_DEBUG BIT(4) |
301 | |
302 | #define P2P_WILDCARD_SSID_LEN 7 /* DIRECT- */ |
303 | |
304 | enum wlan_low_pwr_state { |
305 | WLAN_POWER_STATE_ON, |
306 | WLAN_POWER_STATE_CUT_PWR, |
307 | WLAN_POWER_STATE_DEEP_SLEEP, |
308 | WLAN_POWER_STATE_WOW |
309 | }; |
310 | |
311 | enum sme_state { |
312 | SME_DISCONNECTED, |
313 | SME_CONNECTING, |
314 | SME_CONNECTED |
315 | }; |
316 | |
317 | struct skb_hold_q { |
318 | struct sk_buff *skb; |
319 | bool is_amsdu; |
320 | u16 seq_no; |
321 | }; |
322 | |
323 | struct rxtid { |
324 | bool aggr; |
325 | bool timer_mon; |
326 | u16 win_sz; |
327 | u16 seq_next; |
328 | u32 hold_q_sz; |
329 | struct skb_hold_q *hold_q; |
330 | struct sk_buff_head q; |
331 | |
332 | /* |
333 | * lock mainly protects seq_next and hold_q. Movement of seq_next |
334 | * needs to be protected between aggr_timeout() and |
335 | * aggr_process_recv_frm(). hold_q will be holding the pending |
336 | * reorder frames and it's access should also be protected. |
337 | * Some of the other fields like hold_q_sz, win_sz and aggr are |
338 | * initialized/reset when receiving addba/delba req, also while |
339 | * deleting aggr state all the pending buffers are flushed before |
340 | * resetting these fields, so there should not be any race in accessing |
341 | * these fields. |
342 | */ |
343 | spinlock_t lock; |
344 | }; |
345 | |
346 | struct rxtid_stats { |
347 | u32 num_into_aggr; |
348 | u32 num_dups; |
349 | u32 num_oow; |
350 | u32 num_mpdu; |
351 | u32 num_amsdu; |
352 | u32 num_delivered; |
353 | u32 num_timeouts; |
354 | u32 num_hole; |
355 | u32 num_bar; |
356 | }; |
357 | |
358 | struct aggr_info_conn { |
359 | u8 aggr_sz; |
360 | u8 timer_scheduled; |
361 | struct timer_list timer; |
362 | struct net_device *dev; |
363 | struct rxtid rx_tid[NUM_OF_TIDS]; |
364 | struct rxtid_stats stat[NUM_OF_TIDS]; |
365 | struct aggr_info *aggr_info; |
366 | }; |
367 | |
368 | struct aggr_info { |
369 | struct aggr_info_conn *aggr_conn; |
370 | struct sk_buff_head rx_amsdu_freeq; |
371 | }; |
372 | |
373 | struct ath6kl_wep_key { |
374 | u8 key_index; |
375 | u8 key_len; |
376 | u8 key[64]; |
377 | }; |
378 | |
379 | #define ATH6KL_KEY_SEQ_LEN 8 |
380 | |
381 | struct ath6kl_key { |
382 | u8 key[WLAN_MAX_KEY_LEN]; |
383 | u8 key_len; |
384 | u8 seq[ATH6KL_KEY_SEQ_LEN]; |
385 | u8 seq_len; |
386 | u32 cipher; |
387 | }; |
388 | |
389 | struct ath6kl_node_mapping { |
390 | u8 mac_addr[ETH_ALEN]; |
391 | u8 ep_id; |
392 | u8 tx_pend; |
393 | }; |
394 | |
395 | struct ath6kl_cookie { |
396 | struct sk_buff *skb; |
397 | u32 map_no; |
398 | struct htc_packet htc_pkt; |
399 | struct ath6kl_cookie *arc_list_next; |
400 | }; |
401 | |
402 | struct ath6kl_mgmt_buff { |
403 | struct list_head list; |
404 | u32 freq; |
405 | u32 wait; |
406 | u32 id; |
407 | bool no_cck; |
408 | size_t len; |
409 | u8 buf[]; |
410 | }; |
411 | |
412 | struct ath6kl_sta { |
413 | u16 sta_flags; |
414 | u8 mac[ETH_ALEN]; |
415 | u8 aid; |
416 | u8 keymgmt; |
417 | u8 ucipher; |
418 | u8 auth; |
419 | u8 wpa_ie[ATH6KL_MAX_IE]; |
420 | struct sk_buff_head psq; |
421 | |
422 | /* protects psq, mgmt_psq, apsdq, and mgmt_psq_len fields */ |
423 | spinlock_t psq_lock; |
424 | |
425 | struct list_head mgmt_psq; |
426 | size_t mgmt_psq_len; |
427 | u8 apsd_info; |
428 | struct sk_buff_head apsdq; |
429 | struct aggr_info_conn *aggr_conn; |
430 | }; |
431 | |
432 | struct ath6kl_version { |
433 | u32 target_ver; |
434 | u32 wlan_ver; |
435 | u32 abi_ver; |
436 | }; |
437 | |
438 | struct ath6kl_bmi { |
439 | u32 cmd_credits; |
440 | bool done_sent; |
441 | u8 *cmd_buf; |
442 | u32 max_data_size; |
443 | u32 max_cmd_size; |
444 | }; |
445 | |
446 | struct target_stats { |
447 | u64 tx_pkt; |
448 | u64 tx_byte; |
449 | u64 tx_ucast_pkt; |
450 | u64 tx_ucast_byte; |
451 | u64 tx_mcast_pkt; |
452 | u64 tx_mcast_byte; |
453 | u64 tx_bcast_pkt; |
454 | u64 tx_bcast_byte; |
455 | u64 tx_rts_success_cnt; |
456 | u64 tx_pkt_per_ac[4]; |
457 | |
458 | u64 tx_err; |
459 | u64 tx_fail_cnt; |
460 | u64 tx_retry_cnt; |
461 | u64 tx_mult_retry_cnt; |
462 | u64 tx_rts_fail_cnt; |
463 | |
464 | u64 rx_pkt; |
465 | u64 rx_byte; |
466 | u64 rx_ucast_pkt; |
467 | u64 rx_ucast_byte; |
468 | u64 rx_mcast_pkt; |
469 | u64 rx_mcast_byte; |
470 | u64 rx_bcast_pkt; |
471 | u64 rx_bcast_byte; |
472 | u64 rx_frgment_pkt; |
473 | |
474 | u64 rx_err; |
475 | u64 rx_crc_err; |
476 | u64 rx_key_cache_miss; |
477 | u64 rx_decrypt_err; |
478 | u64 rx_dupl_frame; |
479 | |
480 | u64 tkip_local_mic_fail; |
481 | u64 tkip_cnter_measures_invoked; |
482 | u64 tkip_replays; |
483 | u64 tkip_fmt_err; |
484 | u64 ccmp_fmt_err; |
485 | u64 ccmp_replays; |
486 | |
487 | u64 pwr_save_fail_cnt; |
488 | |
489 | u64 cs_bmiss_cnt; |
490 | u64 ; |
491 | u64 cs_connect_cnt; |
492 | u64 cs_discon_cnt; |
493 | |
494 | s32 tx_ucast_rate; |
495 | s32 rx_ucast_rate; |
496 | |
497 | u32 lq_val; |
498 | |
499 | u32 wow_pkt_dropped; |
500 | u16 wow_evt_discarded; |
501 | |
502 | s16 noise_floor_calib; |
503 | s16 ; |
504 | s16 ; |
505 | u8 cs_ave_beacon_snr; |
506 | u8 cs_last_roam_msec; |
507 | u8 cs_snr; |
508 | |
509 | u8 wow_host_pkt_wakeups; |
510 | u8 wow_host_evt_wakeups; |
511 | |
512 | u32 arp_received; |
513 | u32 arp_matched; |
514 | u32 arp_replied; |
515 | }; |
516 | |
517 | struct ath6kl_mbox_info { |
518 | u32 htc_addr; |
519 | u32 htc_ext_addr; |
520 | u32 htc_ext_sz; |
521 | |
522 | u32 block_size; |
523 | |
524 | u32 gmbox_addr; |
525 | |
526 | u32 gmbox_sz; |
527 | }; |
528 | |
529 | /* |
530 | * 802.11i defines an extended IV for use with non-WEP ciphers. |
531 | * When the EXTIV bit is set in the key id byte an additional |
532 | * 4 bytes immediately follow the IV for TKIP. For CCMP the |
533 | * EXTIV bit is likewise set but the 8 bytes represent the |
534 | * CCMP header rather than IV+extended-IV. |
535 | */ |
536 | |
537 | #define ATH6KL_KEYBUF_SIZE 16 |
538 | #define ATH6KL_MICBUF_SIZE (8+8) /* space for both tx and rx */ |
539 | |
540 | #define ATH6KL_KEY_XMIT 0x01 |
541 | #define ATH6KL_KEY_RECV 0x02 |
542 | #define ATH6KL_KEY_DEFAULT 0x80 /* default xmit key */ |
543 | |
544 | /* Initial group key for AP mode */ |
545 | struct ath6kl_req_key { |
546 | bool valid; |
547 | u8 key_index; |
548 | int key_type; |
549 | u8 key[WLAN_MAX_KEY_LEN]; |
550 | u8 key_len; |
551 | }; |
552 | |
553 | enum ath6kl_hif_type { |
554 | ATH6KL_HIF_TYPE_SDIO, |
555 | ATH6KL_HIF_TYPE_USB, |
556 | }; |
557 | |
558 | enum ath6kl_htc_type { |
559 | ATH6KL_HTC_TYPE_MBOX, |
560 | ATH6KL_HTC_TYPE_PIPE, |
561 | }; |
562 | |
563 | /* Max number of filters that hw supports */ |
564 | #define ATH6K_MAX_MC_FILTERS_PER_LIST 7 |
565 | struct ath6kl_mc_filter { |
566 | struct list_head list; |
567 | char hw_addr[ATH6KL_MCAST_FILTER_MAC_ADDR_SIZE]; |
568 | }; |
569 | |
570 | struct ath6kl_htcap { |
571 | bool ht_enable; |
572 | u8 ampdu_factor; |
573 | unsigned short cap_info; |
574 | }; |
575 | |
576 | /* |
577 | * Driver's maximum limit, note that some firmwares support only one vif |
578 | * and the runtime (current) limit must be checked from ar->vif_max. |
579 | */ |
580 | #define ATH6KL_VIF_MAX 3 |
581 | |
582 | /* vif flags info */ |
583 | enum ath6kl_vif_state { |
584 | CONNECTED, |
585 | CONNECT_PEND, |
586 | WMM_ENABLED, |
587 | NETQ_STOPPED, |
588 | DTIM_EXPIRED, |
589 | CLEAR_BSSFILTER_ON_BEACON, |
590 | DTIM_PERIOD_AVAIL, |
591 | WLAN_ENABLED, |
592 | STATS_UPDATE_PEND, |
593 | HOST_SLEEP_MODE_CMD_PROCESSED, |
594 | NETDEV_MCAST_ALL_ON, |
595 | NETDEV_MCAST_ALL_OFF, |
596 | SCHED_SCANNING, |
597 | }; |
598 | |
599 | struct ath6kl_vif { |
600 | struct list_head list; |
601 | struct wireless_dev wdev; |
602 | struct net_device *ndev; |
603 | struct ath6kl *ar; |
604 | /* Lock to protect vif specific net_stats and flags */ |
605 | spinlock_t if_lock; |
606 | u8 fw_vif_idx; |
607 | unsigned long flags; |
608 | int ssid_len; |
609 | u8 ssid[IEEE80211_MAX_SSID_LEN]; |
610 | u8 dot11_auth_mode; |
611 | u8 auth_mode; |
612 | u8 prwise_crypto; |
613 | u8 prwise_crypto_len; |
614 | u8 grp_crypto; |
615 | u8 grp_crypto_len; |
616 | u8 def_txkey_index; |
617 | u8 next_mode; |
618 | u8 nw_type; |
619 | u8 bssid[ETH_ALEN]; |
620 | u8 req_bssid[ETH_ALEN]; |
621 | u16 ch_hint; |
622 | u16 bss_ch; |
623 | struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1]; |
624 | struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1]; |
625 | struct aggr_info *aggr_cntxt; |
626 | struct ath6kl_htcap htcap[NUM_NL80211_BANDS]; |
627 | |
628 | struct timer_list disconnect_timer; |
629 | struct timer_list sched_scan_timer; |
630 | |
631 | struct cfg80211_scan_request *scan_req; |
632 | enum sme_state sme_state; |
633 | int reconnect_flag; |
634 | u32 last_roc_id; |
635 | u32 last_cancel_roc_id; |
636 | u32 send_action_id; |
637 | bool probe_req_report; |
638 | u16 assoc_bss_beacon_int; |
639 | u16 listen_intvl_t; |
640 | u16 bmiss_time_t; |
641 | u32 txe_intvl; |
642 | u16 bg_scan_period; |
643 | u8 assoc_bss_dtim_period; |
644 | struct target_stats target_stats; |
645 | struct wmi_connect_cmd profile; |
646 | u16 rsn_capab; |
647 | |
648 | struct list_head mc_filter; |
649 | }; |
650 | |
651 | static inline struct ath6kl_vif *ath6kl_vif_from_wdev(struct wireless_dev *wdev) |
652 | { |
653 | return container_of(wdev, struct ath6kl_vif, wdev); |
654 | } |
655 | |
656 | #define WOW_LIST_ID 0 |
657 | #define WOW_HOST_REQ_DELAY 500 /* ms */ |
658 | |
659 | #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */ |
660 | |
661 | /* Flag info */ |
662 | enum ath6kl_dev_state { |
663 | WMI_ENABLED, |
664 | WMI_READY, |
665 | WMI_CTRL_EP_FULL, |
666 | TESTMODE, |
667 | DESTROY_IN_PROGRESS, |
668 | SKIP_SCAN, |
669 | ROAM_TBL_PEND, |
670 | FIRST_BOOT, |
671 | RECOVERY_CLEANUP, |
672 | }; |
673 | |
674 | enum ath6kl_state { |
675 | ATH6KL_STATE_OFF, |
676 | ATH6KL_STATE_ON, |
677 | ATH6KL_STATE_SUSPENDING, |
678 | ATH6KL_STATE_RESUMING, |
679 | ATH6KL_STATE_DEEPSLEEP, |
680 | ATH6KL_STATE_CUTPOWER, |
681 | ATH6KL_STATE_WOW, |
682 | ATH6KL_STATE_RECOVERY, |
683 | }; |
684 | |
685 | /* Fw error recovery */ |
686 | #define ATH6KL_HB_RESP_MISS_THRES 5 |
687 | |
688 | enum ath6kl_fw_err { |
689 | ATH6KL_FW_ASSERT, |
690 | ATH6KL_FW_HB_RESP_FAILURE, |
691 | ATH6KL_FW_EP_FULL, |
692 | }; |
693 | |
694 | struct ath6kl { |
695 | struct device *dev; |
696 | struct wiphy *wiphy; |
697 | |
698 | enum ath6kl_state state; |
699 | unsigned int testmode; |
700 | |
701 | struct ath6kl_bmi bmi; |
702 | const struct ath6kl_hif_ops *hif_ops; |
703 | const struct ath6kl_htc_ops *htc_ops; |
704 | struct wmi *wmi; |
705 | int tx_pending[ENDPOINT_MAX]; |
706 | int total_tx_data_pend; |
707 | struct htc_target *htc_target; |
708 | enum ath6kl_hif_type hif_type; |
709 | void *hif_priv; |
710 | struct list_head vif_list; |
711 | /* Lock to avoid race in vif_list entries among add/del/traverse */ |
712 | spinlock_t list_lock; |
713 | u8 num_vif; |
714 | unsigned int vif_max; |
715 | u8 max_norm_iface; |
716 | u8 avail_idx_map; |
717 | |
718 | /* |
719 | * Protects at least amsdu_rx_buffer_queue, ath6kl_alloc_cookie() |
720 | * calls, tx_pending and total_tx_data_pend. |
721 | */ |
722 | spinlock_t lock; |
723 | |
724 | struct semaphore sem; |
725 | u8 ; |
726 | struct ath6kl_version version; |
727 | u32 target_type; |
728 | u8 tx_pwr; |
729 | struct ath6kl_node_mapping node_map[MAX_NODE_NUM]; |
730 | u8 ibss_ps_enable; |
731 | bool ibss_if_active; |
732 | u8 node_num; |
733 | u8 next_ep_id; |
734 | struct ath6kl_cookie *cookie_list; |
735 | u32 cookie_count; |
736 | enum htc_endpoint_id ac2ep_map[WMM_NUM_AC]; |
737 | bool ac_stream_active[WMM_NUM_AC]; |
738 | u8 ac_stream_pri_map[WMM_NUM_AC]; |
739 | u8 hiac_stream_active_pri; |
740 | u8 ep2ac_map[ENDPOINT_MAX]; |
741 | enum htc_endpoint_id ctrl_ep; |
742 | struct ath6kl_htc_credit_info credit_state_info; |
743 | u32 connect_ctrl_flags; |
744 | u32 user_key_ctrl; |
745 | u8 usr_bss_filter; |
746 | struct ath6kl_sta sta_list[AP_MAX_NUM_STA]; |
747 | u8 sta_list_index; |
748 | struct ath6kl_req_key ap_mode_bkey; |
749 | struct sk_buff_head mcastpsq; |
750 | u32 want_ch_switch; |
751 | u16 last_ch; |
752 | |
753 | /* |
754 | * FIXME: protects access to mcastpsq but is actually useless as |
755 | * all skbe_queue_*() functions provide serialisation themselves |
756 | */ |
757 | spinlock_t mcastpsq_lock; |
758 | |
759 | u8 intra_bss; |
760 | struct wmi_ap_mode_stat ap_stats; |
761 | u8 ap_country_code[3]; |
762 | struct list_head amsdu_rx_buffer_queue; |
763 | u8 rx_meta_ver; |
764 | enum wlan_low_pwr_state wlan_pwr_state; |
765 | u8 mac_addr[ETH_ALEN]; |
766 | #define AR_MCAST_FILTER_MAC_ADDR_SIZE 4 |
767 | struct { |
768 | void *rx_report; |
769 | size_t rx_report_len; |
770 | } tm; |
771 | |
772 | struct ath6kl_hw { |
773 | u32 id; |
774 | const char *name; |
775 | u32 dataset_patch_addr; |
776 | u32 app_load_addr; |
777 | u32 app_start_override_addr; |
778 | u32 board_ext_data_addr; |
779 | u32 reserved_ram_size; |
780 | u32 board_addr; |
781 | u32 refclk_hz; |
782 | u32 uarttx_pin; |
783 | u32 uarttx_rate; |
784 | u32 testscript_addr; |
785 | u8 tx_ant; |
786 | u8 rx_ant; |
787 | enum wmi_phy_cap cap; |
788 | |
789 | u32 flags; |
790 | |
791 | struct ath6kl_hw_fw { |
792 | const char *dir; |
793 | const char *otp; |
794 | const char *fw; |
795 | const char *tcmd; |
796 | const char *patch; |
797 | const char *utf; |
798 | const char *testscript; |
799 | } fw; |
800 | |
801 | const char *fw_board; |
802 | const char *fw_default_board; |
803 | } hw; |
804 | |
805 | u16 conf_flags; |
806 | u16 suspend_mode; |
807 | u16 wow_suspend_mode; |
808 | wait_queue_head_t event_wq; |
809 | struct ath6kl_mbox_info mbox_info; |
810 | |
811 | struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM]; |
812 | unsigned long flag; |
813 | |
814 | u8 *fw_board; |
815 | size_t fw_board_len; |
816 | |
817 | u8 *fw_otp; |
818 | size_t fw_otp_len; |
819 | |
820 | u8 *fw; |
821 | size_t fw_len; |
822 | |
823 | u8 *fw_patch; |
824 | size_t fw_patch_len; |
825 | |
826 | u8 *fw_testscript; |
827 | size_t fw_testscript_len; |
828 | |
829 | unsigned int fw_api; |
830 | unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN]; |
831 | |
832 | struct workqueue_struct *ath6kl_wq; |
833 | |
834 | struct dentry *debugfs_phy; |
835 | |
836 | bool p2p; |
837 | |
838 | bool wiphy_registered; |
839 | |
840 | struct ath6kl_fw_recovery { |
841 | struct work_struct recovery_work; |
842 | unsigned long err_reason; |
843 | unsigned long hb_poll; |
844 | struct timer_list hb_timer; |
845 | u32 seq_num; |
846 | bool hb_pending; |
847 | u8 hb_misscnt; |
848 | bool enable; |
849 | } fw_recovery; |
850 | |
851 | #ifdef CONFIG_ATH6KL_DEBUG |
852 | struct { |
853 | struct sk_buff_head fwlog_queue; |
854 | struct completion fwlog_completion; |
855 | bool fwlog_open; |
856 | |
857 | u32 fwlog_mask; |
858 | |
859 | unsigned int dbgfs_diag_reg; |
860 | u32 diag_reg_addr_wr; |
861 | u32 diag_reg_val_wr; |
862 | |
863 | struct { |
864 | unsigned int invalid_rate; |
865 | } war_stats; |
866 | |
867 | u8 *roam_tbl; |
868 | unsigned int roam_tbl_len; |
869 | |
870 | u8 keepalive; |
871 | u8 disc_timeout; |
872 | } debug; |
873 | #endif /* CONFIG_ATH6KL_DEBUG */ |
874 | }; |
875 | |
876 | static inline struct ath6kl *ath6kl_priv(struct net_device *dev) |
877 | { |
878 | return ((struct ath6kl_vif *) netdev_priv(dev))->ar; |
879 | } |
880 | |
881 | static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar, |
882 | u32 item_offset) |
883 | { |
884 | u32 addr = 0; |
885 | |
886 | if (ar->target_type == TARGET_TYPE_AR6003) |
887 | addr = ATH6KL_AR6003_HI_START_ADDR + item_offset; |
888 | else if (ar->target_type == TARGET_TYPE_AR6004) |
889 | addr = ATH6KL_AR6004_HI_START_ADDR + item_offset; |
890 | |
891 | return addr; |
892 | } |
893 | |
894 | int ath6kl_configure_target(struct ath6kl *ar); |
895 | void ath6kl_detect_error(unsigned long ptr); |
896 | void disconnect_timer_handler(struct timer_list *t); |
897 | void init_netdev(struct net_device *dev); |
898 | void ath6kl_cookie_init(struct ath6kl *ar); |
899 | void ath6kl_cookie_cleanup(struct ath6kl *ar); |
900 | void ath6kl_rx(struct htc_target *target, struct htc_packet *packet); |
901 | void ath6kl_tx_complete(struct htc_target *context, |
902 | struct list_head *packet_queue); |
903 | enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target, |
904 | struct htc_packet *packet); |
905 | void ath6kl_stop_txrx(struct ath6kl *ar); |
906 | void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar); |
907 | int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value); |
908 | int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length); |
909 | int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value); |
910 | int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length); |
911 | int ath6kl_read_fwlogs(struct ath6kl *ar); |
912 | void ath6kl_init_profile_info(struct ath6kl_vif *vif); |
913 | void ath6kl_tx_data_cleanup(struct ath6kl *ar); |
914 | |
915 | struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar); |
916 | void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie); |
917 | netdev_tx_t ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev); |
918 | |
919 | struct aggr_info *aggr_init(struct ath6kl_vif *vif); |
920 | void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info, |
921 | struct aggr_info_conn *aggr_conn); |
922 | void ath6kl_rx_refill(struct htc_target *target, |
923 | enum htc_endpoint_id endpoint); |
924 | void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count); |
925 | struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target, |
926 | enum htc_endpoint_id endpoint, |
927 | int len); |
928 | void aggr_module_destroy(struct aggr_info *aggr_info); |
929 | void aggr_reset_state(struct aggr_info_conn *aggr_conn); |
930 | |
931 | struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 *node_addr); |
932 | struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid); |
933 | |
934 | void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver, |
935 | enum wmi_phy_cap cap); |
936 | int ath6kl_control_tx(void *devt, struct sk_buff *skb, |
937 | enum htc_endpoint_id eid); |
938 | void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel, |
939 | u8 *bssid, u16 listen_int, |
940 | u16 beacon_int, enum network_type net_type, |
941 | u8 beacon_ie_len, u8 assoc_req_len, |
942 | u8 assoc_resp_len, u8 *assoc_info); |
943 | void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel); |
944 | void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr, |
945 | u8 keymgmt, u8 ucipher, u8 auth, |
946 | u8 assoc_req_len, u8 *assoc_info, u8 apsd_info); |
947 | void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason, |
948 | u8 *bssid, u8 assoc_resp_len, |
949 | u8 *assoc_info, u16 prot_reason_status); |
950 | void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast); |
951 | void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr); |
952 | void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status); |
953 | void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len); |
954 | void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active); |
955 | enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac); |
956 | |
957 | void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid); |
958 | |
959 | void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif); |
960 | void ath6kl_disconnect(struct ath6kl_vif *vif); |
961 | void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid); |
962 | void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no, |
963 | u8 win_sz); |
964 | void ath6kl_wakeup_event(void *dev); |
965 | |
966 | void ath6kl_init_control_info(struct ath6kl_vif *vif); |
967 | struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar); |
968 | void ath6kl_cfg80211_vif_stop(struct ath6kl_vif *vif, bool wmi_ready); |
969 | int ath6kl_init_hw_start(struct ath6kl *ar); |
970 | int ath6kl_init_hw_stop(struct ath6kl *ar); |
971 | int ath6kl_init_fetch_firmwares(struct ath6kl *ar); |
972 | int ath6kl_init_hw_params(struct ath6kl *ar); |
973 | |
974 | void ath6kl_check_wow_status(struct ath6kl *ar); |
975 | |
976 | void ath6kl_core_tx_complete(struct ath6kl *ar, struct sk_buff *skb); |
977 | void ath6kl_core_rx_complete(struct ath6kl *ar, struct sk_buff *skb, u8 pipe); |
978 | |
979 | struct ath6kl *ath6kl_core_create(struct device *dev); |
980 | int ath6kl_core_init(struct ath6kl *ar, enum ath6kl_htc_type htc_type); |
981 | void ath6kl_core_cleanup(struct ath6kl *ar); |
982 | void ath6kl_core_destroy(struct ath6kl *ar); |
983 | |
984 | /* Fw error recovery */ |
985 | void ath6kl_init_hw_restart(struct ath6kl *ar); |
986 | void ath6kl_recovery_err_notify(struct ath6kl *ar, enum ath6kl_fw_err reason); |
987 | void ath6kl_recovery_hb_event(struct ath6kl *ar, u32 cookie); |
988 | void ath6kl_recovery_init(struct ath6kl *ar); |
989 | void ath6kl_recovery_cleanup(struct ath6kl *ar); |
990 | void ath6kl_recovery_suspend(struct ath6kl *ar); |
991 | void ath6kl_recovery_resume(struct ath6kl *ar); |
992 | #endif /* CORE_H */ |
993 | |