1 | /* |
2 | * Atheros CARL9170 driver |
3 | * |
4 | * debug header |
5 | * |
6 | * Copyright 2010, Christian Lamparter <chunkeey@googlemail.com> |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by |
10 | * the Free Software Foundation; either version 2 of the License, or |
11 | * (at your option) any later version. |
12 | * |
13 | * This program is distributed in the hope that it will be useful, |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
16 | * GNU General Public License for more details. |
17 | * |
18 | * You should have received a copy of the GNU General Public License |
19 | * along with this program; see the file COPYING. If not, see |
20 | * http://www.gnu.org/licenses/. |
21 | * |
22 | * This file incorporates work covered by the following copyright and |
23 | * permission notice: |
24 | * Copyright (c) 2007-2008 Atheros Communications, Inc. |
25 | * |
26 | * Permission to use, copy, modify, and/or distribute this software for any |
27 | * purpose with or without fee is hereby granted, provided that the above |
28 | * copyright notice and this permission notice appear in all copies. |
29 | * |
30 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
31 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
32 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
33 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
34 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
35 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
36 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
37 | */ |
38 | #ifndef __DEBUG_H |
39 | #define __DEBUG_H |
40 | |
41 | #include "eeprom.h" |
42 | #include "wlan.h" |
43 | #include "hw.h" |
44 | #include "fwdesc.h" |
45 | #include "fwcmd.h" |
46 | #include "../regd.h" |
47 | |
48 | struct hw_stat_reg_entry { |
49 | u32 reg; |
50 | char nreg[32]; |
51 | }; |
52 | |
53 | #define STAT_MAC_REG(reg) \ |
54 | { (AR9170_MAC_REG_##reg), #reg } |
55 | |
56 | #define STAT_PTA_REG(reg) \ |
57 | { (AR9170_PTA_REG_##reg), #reg } |
58 | |
59 | #define STAT_USB_REG(reg) \ |
60 | { (AR9170_USB_REG_##reg), #reg } |
61 | |
62 | static const struct hw_stat_reg_entry hw_rx_tally_regs[] = { |
63 | STAT_MAC_REG(RX_CRC32), STAT_MAC_REG(RX_CRC16), |
64 | STAT_MAC_REG(RX_TIMEOUT_COUNT), STAT_MAC_REG(RX_ERR_DECRYPTION_UNI), |
65 | STAT_MAC_REG(RX_ERR_DECRYPTION_MUL), STAT_MAC_REG(RX_MPDU), |
66 | STAT_MAC_REG(RX_DROPPED_MPDU), STAT_MAC_REG(RX_DEL_MPDU), |
67 | }; |
68 | |
69 | static const struct hw_stat_reg_entry hw_phy_errors_regs[] = { |
70 | STAT_MAC_REG(RX_PHY_MISC_ERROR), STAT_MAC_REG(RX_PHY_XR_ERROR), |
71 | STAT_MAC_REG(RX_PHY_OFDM_ERROR), STAT_MAC_REG(RX_PHY_CCK_ERROR), |
72 | STAT_MAC_REG(RX_PHY_HT_ERROR), STAT_MAC_REG(RX_PHY_TOTAL), |
73 | }; |
74 | |
75 | static const struct hw_stat_reg_entry hw_tx_tally_regs[] = { |
76 | STAT_MAC_REG(TX_TOTAL), STAT_MAC_REG(TX_UNDERRUN), |
77 | STAT_MAC_REG(TX_RETRY), |
78 | }; |
79 | |
80 | static const struct hw_stat_reg_entry hw_wlan_queue_regs[] = { |
81 | STAT_MAC_REG(DMA_STATUS), STAT_MAC_REG(DMA_TRIGGER), |
82 | STAT_MAC_REG(DMA_TXQ0_ADDR), STAT_MAC_REG(DMA_TXQ0_CURR_ADDR), |
83 | STAT_MAC_REG(DMA_TXQ1_ADDR), STAT_MAC_REG(DMA_TXQ1_CURR_ADDR), |
84 | STAT_MAC_REG(DMA_TXQ2_ADDR), STAT_MAC_REG(DMA_TXQ2_CURR_ADDR), |
85 | STAT_MAC_REG(DMA_TXQ3_ADDR), STAT_MAC_REG(DMA_TXQ3_CURR_ADDR), |
86 | STAT_MAC_REG(DMA_RXQ_ADDR), STAT_MAC_REG(DMA_RXQ_CURR_ADDR), |
87 | }; |
88 | |
89 | static const struct hw_stat_reg_entry hw_ampdu_info_regs[] = { |
90 | STAT_MAC_REG(AMPDU_DENSITY), STAT_MAC_REG(AMPDU_FACTOR), |
91 | }; |
92 | |
93 | static const struct hw_stat_reg_entry hw_pta_queue_regs[] = { |
94 | STAT_PTA_REG(DN_CURR_ADDRH), STAT_PTA_REG(DN_CURR_ADDRL), |
95 | STAT_PTA_REG(UP_CURR_ADDRH), STAT_PTA_REG(UP_CURR_ADDRL), |
96 | STAT_PTA_REG(DMA_STATUS), STAT_PTA_REG(DMA_MODE_CTRL), |
97 | }; |
98 | |
99 | #define DEFINE_TALLY(name) \ |
100 | u32 name##_sum[ARRAY_SIZE(name##_regs)], \ |
101 | name##_counter[ARRAY_SIZE(name##_regs)] \ |
102 | |
103 | #define DEFINE_STAT(name) \ |
104 | u32 name##_counter[ARRAY_SIZE(name##_regs)] \ |
105 | |
106 | struct ath_stats { |
107 | DEFINE_TALLY(hw_tx_tally); |
108 | DEFINE_TALLY(hw_rx_tally); |
109 | DEFINE_TALLY(hw_phy_errors); |
110 | DEFINE_STAT(hw_wlan_queue); |
111 | DEFINE_STAT(hw_pta_queue); |
112 | DEFINE_STAT(hw_ampdu_info); |
113 | }; |
114 | |
115 | struct carl9170_debug_mem_rbe { |
116 | u32 reg; |
117 | u32 value; |
118 | }; |
119 | |
120 | #define CARL9170_DEBUG_RING_SIZE 64 |
121 | |
122 | struct carl9170_debug { |
123 | struct ath_stats stats; |
124 | struct carl9170_debug_mem_rbe ring[CARL9170_DEBUG_RING_SIZE]; |
125 | struct mutex ring_lock; |
126 | unsigned int ring_head, ring_tail; |
127 | struct delayed_work update_tally; |
128 | }; |
129 | |
130 | struct ar9170; |
131 | |
132 | void carl9170_debugfs_register(struct ar9170 *ar); |
133 | void carl9170_debugfs_unregister(struct ar9170 *ar); |
134 | #endif /* __DEBUG_H */ |
135 | |