1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org> |
4 | * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl> |
5 | */ |
6 | |
7 | #include "mt7601u.h" |
8 | #include "trace.h" |
9 | |
10 | enum mt76_txq_id { |
11 | MT_TXQ_VO = IEEE80211_AC_VO, |
12 | MT_TXQ_VI = IEEE80211_AC_VI, |
13 | MT_TXQ_BE = IEEE80211_AC_BE, |
14 | MT_TXQ_BK = IEEE80211_AC_BK, |
15 | MT_TXQ_PSD, |
16 | MT_TXQ_MCU, |
17 | __MT_TXQ_MAX |
18 | }; |
19 | |
20 | /* Hardware uses mirrored order of queues with Q0 having the highest priority */ |
21 | static u8 q2hwq(u8 q) |
22 | { |
23 | return q ^ 0x3; |
24 | } |
25 | |
26 | /* Take mac80211 Q id from the skb and translate it to hardware Q id */ |
27 | static u8 skb2q(struct sk_buff *skb) |
28 | { |
29 | int qid = skb_get_queue_mapping(skb); |
30 | |
31 | if (WARN_ON(qid >= MT_TXQ_PSD)) { |
32 | qid = MT_TXQ_BE; |
33 | skb_set_queue_mapping(skb, queue_mapping: qid); |
34 | } |
35 | |
36 | return q2hwq(q: qid); |
37 | } |
38 | |
39 | /* Note: TX retry reporting is a bit broken. |
40 | * Retries are reported only once per AMPDU and often come a frame early |
41 | * i.e. they are reported in the last status preceding the AMPDU. Apart |
42 | * from the fact that it's hard to know the length of the AMPDU (which is |
43 | * required to know to how many consecutive frames retries should be |
44 | * applied), if status comes early on full FIFO it gets lost and retries |
45 | * of the whole AMPDU become invisible. |
46 | * As a work-around encode the desired rate in PKT_ID of TX descriptor |
47 | * and based on that guess the retries (every rate is tried once). |
48 | * Only downside here is that for MCS0 we have to rely solely on |
49 | * transmission failures as no retries can ever be reported. |
50 | * Not having to read EXT_FIFO has a nice effect of doubling the number |
51 | * of reports which can be fetched. |
52 | * Also the vendor driver never uses the EXT_FIFO register so it may be |
53 | * undertested. |
54 | */ |
55 | static u8 mt7601u_tx_pktid_enc(struct mt7601u_dev *dev, u8 rate, bool is_probe) |
56 | { |
57 | u8 encoded = (rate + 1) + is_probe * 8; |
58 | |
59 | /* Because PKT_ID 0 disables status reporting only 15 values are |
60 | * available but 16 are needed (8 MCS * 2 for encoding is_probe) |
61 | * - we need to cram together two rates. MCS0 and MCS7 with is_probe |
62 | * share PKT_ID 9. |
63 | */ |
64 | if (is_probe && rate == 7) |
65 | return encoded - 7; |
66 | |
67 | return encoded; |
68 | } |
69 | |
70 | static void |
71 | mt7601u_tx_pktid_dec(struct mt7601u_dev *dev, struct mt76_tx_status *stat) |
72 | { |
73 | u8 req_rate = stat->pktid; |
74 | u8 eff_rate = stat->rate & 0x7; |
75 | |
76 | req_rate -= 1; |
77 | |
78 | if (req_rate > 7) { |
79 | stat->is_probe = true; |
80 | req_rate -= 8; |
81 | |
82 | /* Decide between MCS0 and MCS7 which share pktid 9 */ |
83 | if (!req_rate && eff_rate) |
84 | req_rate = 7; |
85 | } |
86 | |
87 | stat->retry = req_rate - eff_rate; |
88 | } |
89 | |
90 | static void mt7601u_tx_skb_remove_dma_overhead(struct sk_buff *skb, |
91 | struct ieee80211_tx_info *info) |
92 | { |
93 | int pkt_len = (unsigned long)info->status.status_driver_data[0]; |
94 | |
95 | skb_pull(skb, len: sizeof(struct mt76_txwi) + 4); |
96 | if (ieee80211_get_hdrlen_from_skb(skb) % 4) |
97 | mt76_remove_hdr_pad(skb); |
98 | |
99 | skb_trim(skb, len: pkt_len); |
100 | } |
101 | |
102 | void mt7601u_tx_status(struct mt7601u_dev *dev, struct sk_buff *skb) |
103 | { |
104 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
105 | |
106 | mt7601u_tx_skb_remove_dma_overhead(skb, info); |
107 | |
108 | ieee80211_tx_info_clear_status(info); |
109 | info->status.rates[0].idx = -1; |
110 | info->flags |= IEEE80211_TX_STAT_ACK; |
111 | |
112 | spin_lock_bh(lock: &dev->mac_lock); |
113 | ieee80211_tx_status_skb(hw: dev->hw, skb); |
114 | spin_unlock_bh(lock: &dev->mac_lock); |
115 | } |
116 | |
117 | static int mt7601u_skb_rooms(struct mt7601u_dev *dev, struct sk_buff *skb) |
118 | { |
119 | int hdr_len = ieee80211_get_hdrlen_from_skb(skb); |
120 | u32 need_head; |
121 | |
122 | need_head = sizeof(struct mt76_txwi) + 4; |
123 | if (hdr_len % 4) |
124 | need_head += 2; |
125 | |
126 | return skb_cow(skb, headroom: need_head); |
127 | } |
128 | |
129 | static struct mt76_txwi * |
130 | mt7601u_push_txwi(struct mt7601u_dev *dev, struct sk_buff *skb, |
131 | struct ieee80211_sta *sta, struct mt76_wcid *wcid, |
132 | int pkt_len) |
133 | { |
134 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
135 | struct ieee80211_tx_rate *rate = &info->control.rates[0]; |
136 | struct mt76_txwi *txwi; |
137 | unsigned long flags; |
138 | bool is_probe; |
139 | u32 pkt_id; |
140 | u16 rate_ctl; |
141 | u8 nss; |
142 | |
143 | txwi = skb_push(skb, len: sizeof(struct mt76_txwi)); |
144 | memset(txwi, 0, sizeof(*txwi)); |
145 | |
146 | if (!wcid->tx_rate_set) |
147 | ieee80211_get_tx_rates(vif: info->control.vif, sta, skb, |
148 | dest: info->control.rates, max_rates: 1); |
149 | |
150 | spin_lock_irqsave(&dev->lock, flags); |
151 | if (rate->idx < 0 || !rate->count) |
152 | rate_ctl = wcid->tx_rate; |
153 | else |
154 | rate_ctl = mt76_mac_tx_rate_val(dev, rate, nss_val: &nss); |
155 | spin_unlock_irqrestore(lock: &dev->lock, flags); |
156 | txwi->rate_ctl = cpu_to_le16(rate_ctl); |
157 | |
158 | if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) |
159 | txwi->ack_ctl |= MT_TXWI_ACK_CTL_REQ; |
160 | if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) |
161 | txwi->ack_ctl |= MT_TXWI_ACK_CTL_NSEQ; |
162 | |
163 | if ((info->flags & IEEE80211_TX_CTL_AMPDU) && sta) { |
164 | u8 ba_size = IEEE80211_MIN_AMPDU_BUF; |
165 | |
166 | ba_size <<= sta->deflink.ht_cap.ampdu_factor; |
167 | ba_size = min_t(int, 63, ba_size); |
168 | if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) |
169 | ba_size = 0; |
170 | txwi->ack_ctl |= FIELD_PREP(MT_TXWI_ACK_CTL_BA_WINDOW, ba_size); |
171 | |
172 | txwi->flags = |
173 | cpu_to_le16(MT_TXWI_FLAGS_AMPDU | |
174 | FIELD_PREP(MT_TXWI_FLAGS_MPDU_DENSITY, |
175 | sta->deflink.ht_cap.ampdu_density)); |
176 | if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) |
177 | txwi->flags = 0; |
178 | } |
179 | |
180 | txwi->wcid = wcid->idx; |
181 | |
182 | is_probe = !!(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE); |
183 | pkt_id = mt7601u_tx_pktid_enc(dev, rate: rate_ctl & 0x7, is_probe); |
184 | pkt_len |= FIELD_PREP(MT_TXWI_LEN_PKTID, pkt_id); |
185 | txwi->len_ctl = cpu_to_le16(pkt_len); |
186 | |
187 | return txwi; |
188 | } |
189 | |
190 | void mt7601u_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control, |
191 | struct sk_buff *skb) |
192 | { |
193 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
194 | struct mt7601u_dev *dev = hw->priv; |
195 | struct ieee80211_vif *vif = info->control.vif; |
196 | struct ieee80211_sta *sta = control->sta; |
197 | struct mt76_sta *msta = NULL; |
198 | struct mt76_wcid *wcid = dev->mon_wcid; |
199 | struct mt76_txwi *txwi; |
200 | int pkt_len = skb->len; |
201 | int hw_q = skb2q(skb); |
202 | |
203 | BUILD_BUG_ON(ARRAY_SIZE(info->status.status_driver_data) < 1); |
204 | info->status.status_driver_data[0] = (void *)(unsigned long)pkt_len; |
205 | |
206 | if (mt7601u_skb_rooms(dev, skb) || mt76_insert_hdr_pad(skb)) { |
207 | ieee80211_free_txskb(hw: dev->hw, skb); |
208 | return; |
209 | } |
210 | |
211 | if (sta) { |
212 | msta = (struct mt76_sta *) sta->drv_priv; |
213 | wcid = &msta->wcid; |
214 | } else if (vif) { |
215 | struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; |
216 | |
217 | wcid = &mvif->group_wcid; |
218 | } |
219 | |
220 | txwi = mt7601u_push_txwi(dev, skb, sta, wcid, pkt_len); |
221 | |
222 | if (mt7601u_dma_enqueue_tx(dev, skb, wcid, hw_q)) |
223 | return; |
224 | |
225 | trace_mt_tx(dev, skb, sta: msta, h: txwi); |
226 | } |
227 | |
228 | void mt7601u_tx_stat(struct work_struct *work) |
229 | { |
230 | struct mt7601u_dev *dev = container_of(work, struct mt7601u_dev, |
231 | stat_work.work); |
232 | struct mt76_tx_status stat; |
233 | unsigned long flags; |
234 | int cleaned = 0; |
235 | |
236 | while (!test_bit(MT7601U_STATE_REMOVED, &dev->state)) { |
237 | stat = mt7601u_mac_fetch_tx_status(dev); |
238 | if (!stat.valid) |
239 | break; |
240 | |
241 | mt7601u_tx_pktid_dec(dev, stat: &stat); |
242 | mt76_send_tx_status(dev, stat: &stat); |
243 | |
244 | cleaned++; |
245 | } |
246 | trace_mt_tx_status_cleaned(dev, cleaned); |
247 | |
248 | spin_lock_irqsave(&dev->tx_lock, flags); |
249 | if (cleaned) |
250 | queue_delayed_work(wq: dev->stat_wq, dwork: &dev->stat_work, |
251 | delay: msecs_to_jiffies(m: 10)); |
252 | else if (test_and_clear_bit(nr: MT7601U_STATE_MORE_STATS, addr: &dev->state)) |
253 | queue_delayed_work(wq: dev->stat_wq, dwork: &dev->stat_work, |
254 | delay: msecs_to_jiffies(m: 20)); |
255 | else |
256 | clear_bit(nr: MT7601U_STATE_READING_STATS, addr: &dev->state); |
257 | spin_unlock_irqrestore(lock: &dev->tx_lock, flags); |
258 | } |
259 | |
260 | int mt7601u_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
261 | unsigned int link_id, u16 queue, |
262 | const struct ieee80211_tx_queue_params *params) |
263 | { |
264 | struct mt7601u_dev *dev = hw->priv; |
265 | u8 cw_min = 5, cw_max = 10, hw_q = q2hwq(q: queue); |
266 | u32 val; |
267 | |
268 | /* TODO: should we do funny things with the parameters? |
269 | * See what mt7601u_set_default_edca() used to do in init.c. |
270 | */ |
271 | |
272 | if (params->cw_min) |
273 | cw_min = fls(x: params->cw_min); |
274 | if (params->cw_max) |
275 | cw_max = fls(x: params->cw_max); |
276 | |
277 | WARN_ON(params->txop > 0xff); |
278 | WARN_ON(params->aifs > 0xf); |
279 | WARN_ON(cw_min > 0xf); |
280 | WARN_ON(cw_max > 0xf); |
281 | |
282 | val = FIELD_PREP(MT_EDCA_CFG_AIFSN, params->aifs) | |
283 | FIELD_PREP(MT_EDCA_CFG_CWMIN, cw_min) | |
284 | FIELD_PREP(MT_EDCA_CFG_CWMAX, cw_max); |
285 | /* TODO: based on user-controlled EnableTxBurst var vendor drv sets |
286 | * a really long txop on AC0 (see connect.c:2009) but only on |
287 | * connect? When not connected should be 0. |
288 | */ |
289 | if (!hw_q) |
290 | val |= 0x60; |
291 | else |
292 | val |= FIELD_PREP(MT_EDCA_CFG_TXOP, params->txop); |
293 | mt76_wr(dev, MT_EDCA_CFG_AC(hw_q), val); |
294 | |
295 | val = mt76_rr(dev, MT_WMM_TXOP(hw_q)); |
296 | val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(hw_q)); |
297 | val |= params->txop << MT_WMM_TXOP_SHIFT(hw_q); |
298 | mt76_wr(dev, MT_WMM_TXOP(hw_q), val); |
299 | |
300 | val = mt76_rr(dev, MT_WMM_AIFSN); |
301 | val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(hw_q)); |
302 | val |= params->aifs << MT_WMM_AIFSN_SHIFT(hw_q); |
303 | mt76_wr(dev, MT_WMM_AIFSN, val); |
304 | |
305 | val = mt76_rr(dev, MT_WMM_CWMIN); |
306 | val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(hw_q)); |
307 | val |= cw_min << MT_WMM_CWMIN_SHIFT(hw_q); |
308 | mt76_wr(dev, MT_WMM_CWMIN, val); |
309 | |
310 | val = mt76_rr(dev, MT_WMM_CWMAX); |
311 | val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(hw_q)); |
312 | val |= cw_max << MT_WMM_CWMAX_SHIFT(hw_q); |
313 | mt76_wr(dev, MT_WMM_CWMAX, val); |
314 | |
315 | return 0; |
316 | } |
317 | |