| 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
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| 2 | /* Copyright (c) 2015-2016 Quantenna Communications. All rights reserved. */ |
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| 3 | |
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| 4 | #ifndef _QTN_HW_IDS_H_ |
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| 5 | #define _QTN_HW_IDS_H_ |
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| 6 | |
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| 7 | #include <linux/pci_ids.h> |
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| 8 | |
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| 9 | #define PCIE_VENDOR_ID_QUANTENNA (0x1bb5) |
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| 10 | |
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| 11 | /* PCIE Device IDs */ |
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| 12 | |
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| 13 | #define PCIE_DEVICE_ID_QSR (0x0008) |
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| 14 | |
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| 15 | #define QTN_REG_SYS_CTRL_CSR 0x14 |
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| 16 | #define QTN_CHIP_ID_MASK 0xF0 |
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| 17 | #define QTN_CHIP_ID_TOPAZ 0x40 |
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| 18 | #define QTN_CHIP_ID_PEARL 0x50 |
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| 19 | #define QTN_CHIP_ID_PEARL_B 0x60 |
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| 20 | #define QTN_CHIP_ID_PEARL_C 0x70 |
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| 21 | |
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| 22 | /* FW names */ |
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| 23 | |
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| 24 | #define QTN_PCI_PEARL_FW_NAME "qtn/fmac_qsr10g.img" |
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| 25 | #define QTN_PCI_TOPAZ_FW_NAME "qtn/fmac_qsr1000.img" |
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| 26 | #define QTN_PCI_TOPAZ_BOOTLD_NAME "qtn/uboot_qsr1000.img" |
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| 27 | |
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| 28 | static inline unsigned int qtnf_chip_id_get(const void __iomem *regs_base) |
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| 29 | { |
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| 30 | u32 board_rev = readl(addr: regs_base + QTN_REG_SYS_CTRL_CSR); |
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| 31 | |
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| 32 | return board_rev & QTN_CHIP_ID_MASK; |
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| 33 | } |
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| 34 | |
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| 35 | #endif /* _QTN_HW_IDS_H_ */ |
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| 36 | |
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