1	// SPDX-License-Identifier: GPL-2.0-or-later
2	/*
3	Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
4	<http://rt2x00.serialmonkey.com>
5
6	*/
7
8	/*
9	Module: rt2500usb
10	Abstract: rt2500usb device specific routines.
11	Supported chipsets: RT2570.
12	*/
13
14	#include <linux/delay.h>
15	#include <linux/etherdevice.h>
16	#include <linux/kernel.h>
17	#include <linux/module.h>
18	#include <linux/slab.h>
19	#include <linux/usb.h>
20
21	#include "rt2x00.h"
22	#include "rt2x00usb.h"
23	#include "rt2500usb.h"
24
25	/*
26	* Allow hardware encryption to be disabled.
27	*/
28	static bool modparam_nohwcrypt;
29	module_param_named(nohwcrypt, modparam_nohwcrypt, bool, 0444);
30	MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
31
32	/*
33	* Register access.
34	* All access to the CSR registers will go through the methods
35	* rt2500usb_register_read and rt2500usb_register_write.
36	* BBP and RF register require indirect register access,
37	* and use the CSR registers BBPCSR and RFCSR to achieve this.
38	* These indirect registers work with busy bits,
39	* and we will try maximal REGISTER_USB_BUSY_COUNT times to access
40	* the register while taking a REGISTER_BUSY_DELAY us delay
41	* between each attampt. When the busy bit is still set at that time,
42	* the access attempt is considered to have failed,
43	* and we will print an error.
44	* If the csr_mutex is already held then the _lock variants must
45	* be used instead.
46	*/
47	static u16 rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
48	const unsigned int offset)
49	{
50	__le16 reg;
51	rt2x00usb_vendor_request_buff(rt2x00dev, request: USB_MULTI_READ,
52	USB_VENDOR_REQUEST_IN, offset,
53	buffer: &reg, buffer_length: sizeof(reg));
54	return le16_to_cpu(reg);
55	}
56
57	static u16 rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
58	const unsigned int offset)
59	{
60	__le16 reg;
61	rt2x00usb_vendor_req_buff_lock(rt2x00dev, request: USB_MULTI_READ,
62	USB_VENDOR_REQUEST_IN, offset,
63	buffer: &reg, buffer_length: sizeof(reg), REGISTER_TIMEOUT);
64	return le16_to_cpu(reg);
65	}
66
67	static void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
68	const unsigned int offset,
69	u16 value)
70	{
71	__le16 reg = cpu_to_le16(value);
72	rt2x00usb_vendor_request_buff(rt2x00dev, request: USB_MULTI_WRITE,
73	USB_VENDOR_REQUEST_OUT, offset,
74	buffer: &reg, buffer_length: sizeof(reg));
75	}
76
77	static void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
78	const unsigned int offset,
79	u16 value)
80	{
81	__le16 reg = cpu_to_le16(value);
82	rt2x00usb_vendor_req_buff_lock(rt2x00dev, request: USB_MULTI_WRITE,
83	USB_VENDOR_REQUEST_OUT, offset,
84	buffer: &reg, buffer_length: sizeof(reg), REGISTER_TIMEOUT);
85	}
86
87	static void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
88	const unsigned int offset,
89	void *value, const u16 length)
90	{
91	rt2x00usb_vendor_request_buff(rt2x00dev, request: USB_MULTI_WRITE,
92	USB_VENDOR_REQUEST_OUT, offset,
93	buffer: value, buffer_length: length);
94	}
95
96	static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
97	const unsigned int offset,
98	struct rt2x00_field16 field,
99	u16 *reg)
100	{
101	unsigned int i;
102
103	for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
104	*reg = rt2500usb_register_read_lock(rt2x00dev, offset);
105	if (!rt2x00_get_field16(*reg, field))
106	return 1;
107	udelay(REGISTER_BUSY_DELAY);
108	}
109
110	rt2x00_err(rt2x00dev, "Indirect register access failed: offset=0x%.08x, value=0x%.08x\n",
111	offset, *reg);
112	*reg = ~0;
113
114	return 0;
115	}
116
117	#define WAIT_FOR_BBP(__dev, __reg) \
118	rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
119	#define WAIT_FOR_RF(__dev, __reg) \
120	rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
121
122	static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
123	const unsigned int word, const u8 value)
124	{
125	u16 reg;
126
127	mutex_lock(&rt2x00dev->csr_mutex);
128
129	/*
130	* Wait until the BBP becomes available, afterwards we
131	* can safely write the new data into the register.
132	*/
133	if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
134	reg = 0;
135	rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
136	rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
137	rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
138
139	rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, value: reg);
140	}
141
142	mutex_unlock(lock: &rt2x00dev->csr_mutex);
143	}
144
145	static u8 rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
146	const unsigned int word)
147	{
148	u16 reg;
149	u8 value;
150
151	mutex_lock(&rt2x00dev->csr_mutex);
152
153	/*
154	* Wait until the BBP becomes available, afterwards we
155	* can safely write the read request into the register.
156	* After the data has been written, we wait until hardware
157	* returns the correct value, if at any time the register
158	* doesn't become available in time, reg will be 0xffffffff
159	* which means we return 0xff to the caller.
160	*/
161	if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
162	reg = 0;
163	rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
164	rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
165
166	rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, value: reg);
167
168	if (WAIT_FOR_BBP(rt2x00dev, &reg))
169	reg = rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7);
170	}
171
172	value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
173
174	mutex_unlock(lock: &rt2x00dev->csr_mutex);
175
176	return value;
177	}
178
179	static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
180	const unsigned int word, const u32 value)
181	{
182	u16 reg;
183
184	mutex_lock(&rt2x00dev->csr_mutex);
185
186	/*
187	* Wait until the RF becomes available, afterwards we
188	* can safely write the new data into the register.
189	*/
190	if (WAIT_FOR_RF(rt2x00dev, &reg)) {
191	reg = 0;
192	rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
193	rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, value: reg);
194
195	reg = 0;
196	rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
197	rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
198	rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
199	rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
200
201	rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, value: reg);
202	rt2x00_rf_write(rt2x00dev, word, data: value);
203	}
204
205	mutex_unlock(lock: &rt2x00dev->csr_mutex);
206	}
207
208	#ifdef CONFIG_RT2X00_LIB_DEBUGFS
209	static u32 _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
210	const unsigned int offset)
211	{
212	return rt2500usb_register_read(rt2x00dev, offset);
213	}
214
215	static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
216	const unsigned int offset,
217	u32 value)
218	{
219	rt2500usb_register_write(rt2x00dev, offset, value);
220	}
221
222	static const struct rt2x00debug rt2500usb_rt2x00debug = {
223	.owner = THIS_MODULE,
224	.csr = {
225	.read = _rt2500usb_register_read,
226	.write = _rt2500usb_register_write,
227	.flags = RT2X00DEBUGFS_OFFSET,
228	.word_base = CSR_REG_BASE,
229	.word_size = sizeof(u16),
230	.word_count = CSR_REG_SIZE / sizeof(u16),
231	},
232	.eeprom = {
233	.read = rt2x00_eeprom_read,
234	.write = rt2x00_eeprom_write,
235	.word_base = EEPROM_BASE,
236	.word_size = sizeof(u16),
237	.word_count = EEPROM_SIZE / sizeof(u16),
238	},
239	.bbp = {
240	.read = rt2500usb_bbp_read,
241	.write = rt2500usb_bbp_write,
242	.word_base = BBP_BASE,
243	.word_size = sizeof(u8),
244	.word_count = BBP_SIZE / sizeof(u8),
245	},
246	.rf = {
247	.read = rt2x00_rf_read,
248	.write = rt2500usb_rf_write,
249	.word_base = RF_BASE,
250	.word_size = sizeof(u32),
251	.word_count = RF_SIZE / sizeof(u32),
252	},
253	};
254	#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
255
256	static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
257	{
258	u16 reg;
259
260	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR19);
261	return rt2x00_get_field16(reg, MAC_CSR19_VAL7);
262	}
263
264	#ifdef CONFIG_RT2X00_LIB_LEDS
265	static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
266	enum led_brightness brightness)
267	{
268	struct rt2x00_led *led =
269	container_of(led_cdev, struct rt2x00_led, led_dev);
270	unsigned int enabled = brightness != LED_OFF;
271	u16 reg;
272
273	reg = rt2500usb_register_read(rt2x00dev: led->rt2x00dev, MAC_CSR20);
274
275	if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
276	rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
277	else if (led->type == LED_TYPE_ACTIVITY)
278	rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
279
280	rt2500usb_register_write(rt2x00dev: led->rt2x00dev, MAC_CSR20, value: reg);
281	}
282
283	static int rt2500usb_blink_set(struct led_classdev *led_cdev,
284	unsigned long *delay_on,
285	unsigned long *delay_off)
286	{
287	struct rt2x00_led *led =
288	container_of(led_cdev, struct rt2x00_led, led_dev);
289	u16 reg;
290
291	reg = rt2500usb_register_read(rt2x00dev: led->rt2x00dev, MAC_CSR21);
292	rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
293	rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
294	rt2500usb_register_write(rt2x00dev: led->rt2x00dev, MAC_CSR21, value: reg);
295
296	return 0;
297	}
298
299	static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
300	struct rt2x00_led *led,
301	enum led_type type)
302	{
303	led->rt2x00dev = rt2x00dev;
304	led->type = type;
305	led->led_dev.brightness_set = rt2500usb_brightness_set;
306	led->led_dev.blink_set = rt2500usb_blink_set;
307	led->flags = LED_INITIALIZED;
308	}
309	#endif /* CONFIG_RT2X00_LIB_LEDS */
310
311	/*
312	* Configuration handlers.
313	*/
314
315	/*
316	* rt2500usb does not differentiate between shared and pairwise
317	* keys, so we should use the same function for both key types.
318	*/
319	static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
320	struct rt2x00lib_crypto *crypto,
321	struct ieee80211_key_conf *key)
322	{
323	u32 mask;
324	u16 reg;
325	enum cipher curr_cipher;
326
327	if (crypto->cmd == SET_KEY) {
328	/*
329	* Disallow to set WEP key other than with index 0,
330	* it is known that not work at least on some hardware.
331	* SW crypto will be used in that case.
332	*/
333	if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
334	key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
335	key->keyidx != 0)
336	return -EOPNOTSUPP;
337
338	/*
339	* Pairwise key will always be entry 0, but this
340	* could collide with a shared key on the same
341	* position...
342	*/
343	mask = TXRX_CSR0_KEY_ID.bit_mask;
344
345	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR0);
346	curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM);
347	reg &= mask;
348
349	if (reg && reg == mask)
350	return -ENOSPC;
351
352	reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
353
354	key->hw_key_idx += reg ? ffz(reg) : 0;
355	/*
356	* Hardware requires that all keys use the same cipher
357	* (e.g. TKIP-only, AES-only, but not TKIP+AES).
358	* If this is not the first key, compare the cipher with the
359	* first one and fall back to SW crypto if not the same.
360	*/
361	if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher)
362	return -EOPNOTSUPP;
363
364	rt2500usb_register_multiwrite(rt2x00dev, KEY_ENTRY(key->hw_key_idx),
365	value: crypto->key, length: sizeof(crypto->key));
366
367	/*
368	* The driver does not support the IV/EIV generation
369	* in hardware. However it demands the data to be provided
370	* both separately as well as inside the frame.
371	* We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
372	* to ensure rt2x00lib will not strip the data from the
373	* frame after the copy, now we must tell mac80211
374	* to generate the IV/EIV data.
375	*/
376	key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
377	key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
378	}
379
380	/*
381	* TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
382	* a particular key is valid.
383	*/
384	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR0);
385	rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
386	rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
387
388	mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
389	if (crypto->cmd == SET_KEY)
390	mask |= 1 << key->hw_key_idx;
391	else if (crypto->cmd == DISABLE_KEY)
392	mask &= ~(1 << key->hw_key_idx);
393	rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
394	rt2500usb_register_write(rt2x00dev, TXRX_CSR0, value: reg);
395
396	return 0;
397	}
398
399	static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
400	const unsigned int filter_flags)
401	{
402	u16 reg;
403
404	/*
405	* Start configuration steps.
406	* Note that the version error will always be dropped
407	* and broadcast frames will always be accepted since
408	* there is no filter for it at this time.
409	*/
410	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR2);
411	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
412	!(filter_flags & FIF_FCSFAIL));
413	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
414	!(filter_flags & FIF_PLCPFAIL));
415	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
416	!(filter_flags & FIF_CONTROL));
417	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
418	!test_bit(CONFIG_MONITORING, &rt2x00dev->flags));
419	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
420	!test_bit(CONFIG_MONITORING, &rt2x00dev->flags) &&
421	!rt2x00dev->intf_ap_count);
422	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
423	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
424	!(filter_flags & FIF_ALLMULTI));
425	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
426	rt2500usb_register_write(rt2x00dev, TXRX_CSR2, value: reg);
427	}
428
429	static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
430	struct rt2x00_intf *intf,
431	struct rt2x00intf_conf *conf,
432	const unsigned int flags)
433	{
434	unsigned int bcn_preload;
435	u16 reg;
436
437	if (flags & CONFIG_UPDATE_TYPE) {
438	/*
439	* Enable beacon config
440	*/
441	bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
442	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR20);
443	rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
444	rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
445	2 * (conf->type != NL80211_IFTYPE_STATION));
446	rt2500usb_register_write(rt2x00dev, TXRX_CSR20, value: reg);
447
448	/*
449	* Enable synchronisation.
450	*/
451	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR18);
452	rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
453	rt2500usb_register_write(rt2x00dev, TXRX_CSR18, value: reg);
454
455	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR19);
456	rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
457	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, value: reg);
458	}
459
460	if (flags & CONFIG_UPDATE_MAC)
461	rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, value: conf->mac,
462	length: (3 * sizeof(__le16)));
463
464	if (flags & CONFIG_UPDATE_BSSID)
465	rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, value: conf->bssid,
466	length: (3 * sizeof(__le16)));
467	}
468
469	static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
470	struct rt2x00lib_erp *erp,
471	u32 changed)
472	{
473	u16 reg;
474
475	if (changed & BSS_CHANGED_ERP_PREAMBLE) {
476	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR10);
477	rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
478	!!erp->short_preamble);
479	rt2500usb_register_write(rt2x00dev, TXRX_CSR10, value: reg);
480	}
481
482	if (changed & BSS_CHANGED_BASIC_RATES)
483	rt2500usb_register_write(rt2x00dev, TXRX_CSR11,
484	value: erp->basic_rates);
485
486	if (changed & BSS_CHANGED_BEACON_INT) {
487	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR18);
488	rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
489	erp->beacon_int * 4);
490	rt2500usb_register_write(rt2x00dev, TXRX_CSR18, value: reg);
491	}
492
493	if (changed & BSS_CHANGED_ERP_SLOT) {
494	rt2500usb_register_write(rt2x00dev, MAC_CSR10, value: erp->slot_time);
495	rt2500usb_register_write(rt2x00dev, MAC_CSR11, value: erp->sifs);
496	rt2500usb_register_write(rt2x00dev, MAC_CSR12, value: erp->eifs);
497	}
498	}
499
500	static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
501	struct antenna_setup *ant)
502	{
503	u8 r2;
504	u8 r14;
505	u16 csr5;
506	u16 csr6;
507
508	/*
509	* We should never come here because rt2x00lib is supposed
510	* to catch this and send us the correct antenna explicitely.
511	*/
512	BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
513	ant->tx == ANTENNA_SW_DIVERSITY);
514
515	r2 = rt2500usb_bbp_read(rt2x00dev, word: 2);
516	r14 = rt2500usb_bbp_read(rt2x00dev, word: 14);
517	csr5 = rt2500usb_register_read(rt2x00dev, PHY_CSR5);
518	csr6 = rt2500usb_register_read(rt2x00dev, PHY_CSR6);
519
520	/*
521	* Configure the TX antenna.
522	*/
523	switch (ant->tx) {
524	case ANTENNA_HW_DIVERSITY:
525	rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
526	rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
527	rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
528	break;
529	case ANTENNA_A:
530	rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
531	rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
532	rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
533	break;
534	case ANTENNA_B:
535	default:
536	rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
537	rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
538	rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
539	break;
540	}
541
542	/*
543	* Configure the RX antenna.
544	*/
545	switch (ant->rx) {
546	case ANTENNA_HW_DIVERSITY:
547	rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
548	break;
549	case ANTENNA_A:
550	rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
551	break;
552	case ANTENNA_B:
553	default:
554	rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
555	break;
556	}
557
558	/*
559	* RT2525E and RT5222 need to flip TX I/Q
560	*/
561	if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
562	rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
563	rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
564	rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
565
566	/*
567	* RT2525E does not need RX I/Q Flip.
568	*/
569	if (rt2x00_rf(rt2x00dev, RF2525E))
570	rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
571	} else {
572	rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
573	rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
574	}
575
576	rt2500usb_bbp_write(rt2x00dev, word: 2, value: r2);
577	rt2500usb_bbp_write(rt2x00dev, word: 14, value: r14);
578	rt2500usb_register_write(rt2x00dev, PHY_CSR5, value: csr5);
579	rt2500usb_register_write(rt2x00dev, PHY_CSR6, value: csr6);
580	}
581
582	static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
583	struct rf_channel *rf, const int txpower)
584	{
585	/*
586	* Set TXpower.
587	*/
588	rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
589
590	/*
591	* For RT2525E we should first set the channel to half band higher.
592	*/
593	if (rt2x00_rf(rt2x00dev, RF2525E)) {
594	static const u32 vals[] = {
595	0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
596	0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
597	0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
598	0x00000902, 0x00000906
599	};
600
601	rt2500usb_rf_write(rt2x00dev, word: 2, value: vals[rf->channel - 1]);
602	if (rf->rf4)
603	rt2500usb_rf_write(rt2x00dev, word: 4, value: rf->rf4);
604	}
605
606	rt2500usb_rf_write(rt2x00dev, word: 1, value: rf->rf1);
607	rt2500usb_rf_write(rt2x00dev, word: 2, value: rf->rf2);
608	rt2500usb_rf_write(rt2x00dev, word: 3, value: rf->rf3);
609	if (rf->rf4)
610	rt2500usb_rf_write(rt2x00dev, word: 4, value: rf->rf4);
611	}
612
613	static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
614	const int txpower)
615	{
616	u32 rf3;
617
618	rf3 = rt2x00_rf_read(rt2x00dev, word: 3);
619	rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
620	rt2500usb_rf_write(rt2x00dev, word: 3, value: rf3);
621	}
622
623	static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
624	struct rt2x00lib_conf *libconf)
625	{
626	enum dev_state state =
627	(libconf->conf->flags & IEEE80211_CONF_PS) ?
628	STATE_SLEEP : STATE_AWAKE;
629	u16 reg;
630
631	if (state == STATE_SLEEP) {
632	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR18);
633	rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
634	rt2x00dev->beacon_int - 20);
635	rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
636	libconf->conf->listen_interval - 1);
637
638	/* We must first disable autowake before it can be enabled */
639	rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
640	rt2500usb_register_write(rt2x00dev, MAC_CSR18, value: reg);
641
642	rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
643	rt2500usb_register_write(rt2x00dev, MAC_CSR18, value: reg);
644	} else {
645	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR18);
646	rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
647	rt2500usb_register_write(rt2x00dev, MAC_CSR18, value: reg);
648	}
649
650	rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
651	}
652
653	static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
654	struct rt2x00lib_conf *libconf,
655	const unsigned int flags)
656	{
657	if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
658	rt2500usb_config_channel(rt2x00dev, rf: &libconf->rf,
659	txpower: libconf->conf->power_level);
660	if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
661	!(flags & IEEE80211_CONF_CHANGE_CHANNEL))
662	rt2500usb_config_txpower(rt2x00dev,
663	txpower: libconf->conf->power_level);
664	if (flags & IEEE80211_CONF_CHANGE_PS)
665	rt2500usb_config_ps(rt2x00dev, libconf);
666	}
667
668	/*
669	* Link tuning
670	*/
671	static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
672	struct link_qual *qual)
673	{
674	u16 reg;
675
676	/*
677	* Update FCS error count from register.
678	*/
679	reg = rt2500usb_register_read(rt2x00dev, STA_CSR0);
680	qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
681
682	/*
683	* Update False CCA count from register.
684	*/
685	reg = rt2500usb_register_read(rt2x00dev, STA_CSR3);
686	qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
687	}
688
689	static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
690	struct link_qual *qual)
691	{
692	u16 eeprom;
693	u16 value;
694
695	eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24);
696	value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
697	rt2500usb_bbp_write(rt2x00dev, word: 24, value);
698
699	eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25);
700	value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
701	rt2500usb_bbp_write(rt2x00dev, word: 25, value);
702
703	eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61);
704	value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
705	rt2500usb_bbp_write(rt2x00dev, word: 61, value);
706
707	eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC);
708	value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
709	rt2500usb_bbp_write(rt2x00dev, word: 17, value);
710
711	qual->vgc_level = value;
712	}
713
714	/*
715	* Queue handlers.
716	*/
717	static void rt2500usb_start_queue(struct data_queue *queue)
718	{
719	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
720	u16 reg;
721
722	switch (queue->qid) {
723	case QID_RX:
724	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR2);
725	rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 0);
726	rt2500usb_register_write(rt2x00dev, TXRX_CSR2, value: reg);
727	break;
728	case QID_BEACON:
729	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR19);
730	rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
731	rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
732	rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
733	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, value: reg);
734	break;
735	default:
736	break;
737	}
738	}
739
740	static void rt2500usb_stop_queue(struct data_queue *queue)
741	{
742	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
743	u16 reg;
744
745	switch (queue->qid) {
746	case QID_RX:
747	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR2);
748	rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
749	rt2500usb_register_write(rt2x00dev, TXRX_CSR2, value: reg);
750	break;
751	case QID_BEACON:
752	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR19);
753	rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
754	rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
755	rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
756	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, value: reg);
757	break;
758	default:
759	break;
760	}
761	}
762
763	/*
764	* Initialization functions.
765	*/
766	static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
767	{
768	u16 reg;
769
770	rt2x00usb_vendor_request_sw(rt2x00dev, request: USB_DEVICE_MODE, offset: 0x0001,
771	value: USB_MODE_TEST, REGISTER_TIMEOUT);
772	rt2x00usb_vendor_request_sw(rt2x00dev, request: USB_SINGLE_WRITE, offset: 0x0308,
773	value: 0x00f0, REGISTER_TIMEOUT);
774
775	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR2);
776	rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
777	rt2500usb_register_write(rt2x00dev, TXRX_CSR2, value: reg);
778
779	rt2500usb_register_write(rt2x00dev, MAC_CSR13, value: 0x1111);
780	rt2500usb_register_write(rt2x00dev, MAC_CSR14, value: 0x1e11);
781
782	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR1);
783	rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
784	rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
785	rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
786	rt2500usb_register_write(rt2x00dev, MAC_CSR1, value: reg);
787
788	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR1);
789	rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
790	rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
791	rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
792	rt2500usb_register_write(rt2x00dev, MAC_CSR1, value: reg);
793
794	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR5);
795	rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
796	rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
797	rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
798	rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
799	rt2500usb_register_write(rt2x00dev, TXRX_CSR5, value: reg);
800
801	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR6);
802	rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
803	rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
804	rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
805	rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
806	rt2500usb_register_write(rt2x00dev, TXRX_CSR6, value: reg);
807
808	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR7);
809	rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
810	rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
811	rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
812	rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
813	rt2500usb_register_write(rt2x00dev, TXRX_CSR7, value: reg);
814
815	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR8);
816	rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
817	rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
818	rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
819	rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
820	rt2500usb_register_write(rt2x00dev, TXRX_CSR8, value: reg);
821
822	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR19);
823	rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
824	rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
825	rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
826	rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
827	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, value: reg);
828
829	rt2500usb_register_write(rt2x00dev, TXRX_CSR21, value: 0xe78f);
830	rt2500usb_register_write(rt2x00dev, MAC_CSR9, value: 0xff1d);
831
832	if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
833	return -EBUSY;
834
835	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR1);
836	rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
837	rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
838	rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
839	rt2500usb_register_write(rt2x00dev, MAC_CSR1, value: reg);
840
841	if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) {
842	reg = rt2500usb_register_read(rt2x00dev, PHY_CSR2);
843	rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
844	} else {
845	reg = 0;
846	rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
847	rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
848	}
849	rt2500usb_register_write(rt2x00dev, PHY_CSR2, value: reg);
850
851	rt2500usb_register_write(rt2x00dev, MAC_CSR11, value: 0x0002);
852	rt2500usb_register_write(rt2x00dev, MAC_CSR22, value: 0x0053);
853	rt2500usb_register_write(rt2x00dev, MAC_CSR15, value: 0x01ee);
854	rt2500usb_register_write(rt2x00dev, MAC_CSR16, value: 0x0000);
855
856	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR8);
857	rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
858	rt2x00dev->rx->data_size);
859	rt2500usb_register_write(rt2x00dev, MAC_CSR8, value: reg);
860
861	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR0);
862	rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, CIPHER_NONE);
863	rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
864	rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
865	rt2500usb_register_write(rt2x00dev, TXRX_CSR0, value: reg);
866
867	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR18);
868	rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
869	rt2500usb_register_write(rt2x00dev, MAC_CSR18, value: reg);
870
871	reg = rt2500usb_register_read(rt2x00dev, PHY_CSR4);
872	rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
873	rt2500usb_register_write(rt2x00dev, PHY_CSR4, value: reg);
874
875	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR1);
876	rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
877	rt2500usb_register_write(rt2x00dev, TXRX_CSR1, value: reg);
878
879	return 0;
880	}
881
882	static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
883	{
884	unsigned int i;
885	u8 value;
886
887	for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
888	value = rt2500usb_bbp_read(rt2x00dev, word: 0);
889	if ((value != 0xff) && (value != 0x00))
890	return 0;
891	udelay(REGISTER_BUSY_DELAY);
892	}
893
894	rt2x00_err(rt2x00dev, "BBP register access failed, aborting\n");
895	return -EACCES;
896	}
897
898	static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
899	{
900	unsigned int i;
901	u16 eeprom;
902	u8 value;
903	u8 reg_id;
904
905	if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
906	return -EACCES;
907
908	rt2500usb_bbp_write(rt2x00dev, word: 3, value: 0x02);
909	rt2500usb_bbp_write(rt2x00dev, word: 4, value: 0x19);
910	rt2500usb_bbp_write(rt2x00dev, word: 14, value: 0x1c);
911	rt2500usb_bbp_write(rt2x00dev, word: 15, value: 0x30);
912	rt2500usb_bbp_write(rt2x00dev, word: 16, value: 0xac);
913	rt2500usb_bbp_write(rt2x00dev, word: 18, value: 0x18);
914	rt2500usb_bbp_write(rt2x00dev, word: 19, value: 0xff);
915	rt2500usb_bbp_write(rt2x00dev, word: 20, value: 0x1e);
916	rt2500usb_bbp_write(rt2x00dev, word: 21, value: 0x08);
917	rt2500usb_bbp_write(rt2x00dev, word: 22, value: 0x08);
918	rt2500usb_bbp_write(rt2x00dev, word: 23, value: 0x08);
919	rt2500usb_bbp_write(rt2x00dev, word: 24, value: 0x80);
920	rt2500usb_bbp_write(rt2x00dev, word: 25, value: 0x50);
921	rt2500usb_bbp_write(rt2x00dev, word: 26, value: 0x08);
922	rt2500usb_bbp_write(rt2x00dev, word: 27, value: 0x23);
923	rt2500usb_bbp_write(rt2x00dev, word: 30, value: 0x10);
924	rt2500usb_bbp_write(rt2x00dev, word: 31, value: 0x2b);
925	rt2500usb_bbp_write(rt2x00dev, word: 32, value: 0xb9);
926	rt2500usb_bbp_write(rt2x00dev, word: 34, value: 0x12);
927	rt2500usb_bbp_write(rt2x00dev, word: 35, value: 0x50);
928	rt2500usb_bbp_write(rt2x00dev, word: 39, value: 0xc4);
929	rt2500usb_bbp_write(rt2x00dev, word: 40, value: 0x02);
930	rt2500usb_bbp_write(rt2x00dev, word: 41, value: 0x60);
931	rt2500usb_bbp_write(rt2x00dev, word: 53, value: 0x10);
932	rt2500usb_bbp_write(rt2x00dev, word: 54, value: 0x18);
933	rt2500usb_bbp_write(rt2x00dev, word: 56, value: 0x08);
934	rt2500usb_bbp_write(rt2x00dev, word: 57, value: 0x10);
935	rt2500usb_bbp_write(rt2x00dev, word: 58, value: 0x08);
936	rt2500usb_bbp_write(rt2x00dev, word: 61, value: 0x60);
937	rt2500usb_bbp_write(rt2x00dev, word: 62, value: 0x10);
938	rt2500usb_bbp_write(rt2x00dev, word: 75, value: 0xff);
939
940	for (i = 0; i < EEPROM_BBP_SIZE; i++) {
941	eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i);
942
943	if (eeprom != 0xffff && eeprom != 0x0000) {
944	reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
945	value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
946	rt2500usb_bbp_write(rt2x00dev, word: reg_id, value);
947	}
948	}
949
950	return 0;
951	}
952
953	/*
954	* Device state switch handlers.
955	*/
956	static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
957	{
958	/*
959	* Initialize all registers.
960	*/
961	if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
962	rt2500usb_init_bbp(rt2x00dev)))
963	return -EIO;
964
965	return 0;
966	}
967
968	static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
969	{
970	rt2500usb_register_write(rt2x00dev, MAC_CSR13, value: 0x2121);
971	rt2500usb_register_write(rt2x00dev, MAC_CSR14, value: 0x2121);
972
973	/*
974	* Disable synchronisation.
975	*/
976	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, value: 0);
977
978	rt2x00usb_disable_radio(rt2x00dev);
979	}
980
981	static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
982	enum dev_state state)
983	{
984	u16 reg;
985	u16 reg2;
986	unsigned int i;
987	bool put_to_sleep;
988	u8 bbp_state;
989	u8 rf_state;
990
991	put_to_sleep = (state != STATE_AWAKE);
992
993	reg = 0;
994	rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
995	rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
996	rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
997	rt2500usb_register_write(rt2x00dev, MAC_CSR17, value: reg);
998	rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
999	rt2500usb_register_write(rt2x00dev, MAC_CSR17, value: reg);
1000
1001	/*
1002	* Device is not guaranteed to be in the requested state yet.
1003	* We must wait until the register indicates that the
1004	* device has entered the correct state.
1005	*/
1006	for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
1007	reg2 = rt2500usb_register_read(rt2x00dev, MAC_CSR17);
1008	bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
1009	rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
1010	if (bbp_state == state && rf_state == state)
1011	return 0;
1012	rt2500usb_register_write(rt2x00dev, MAC_CSR17, value: reg);
1013	msleep(msecs: 30);
1014	}
1015
1016	return -EBUSY;
1017	}
1018
1019	static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1020	enum dev_state state)
1021	{
1022	int retval = 0;
1023
1024	switch (state) {
1025	case STATE_RADIO_ON:
1026	retval = rt2500usb_enable_radio(rt2x00dev);
1027	break;
1028	case STATE_RADIO_OFF:
1029	rt2500usb_disable_radio(rt2x00dev);
1030	break;
1031	case STATE_RADIO_IRQ_ON:
1032	case STATE_RADIO_IRQ_OFF:
1033	/* No support, but no error either */
1034	break;
1035	case STATE_DEEP_SLEEP:
1036	case STATE_SLEEP:
1037	case STATE_STANDBY:
1038	case STATE_AWAKE:
1039	retval = rt2500usb_set_state(rt2x00dev, state);
1040	break;
1041	default:
1042	retval = -ENOTSUPP;
1043	break;
1044	}
1045
1046	if (unlikely(retval))
1047	rt2x00_err(rt2x00dev, "Device failed to enter state %d (%d)\n",
1048	state, retval);
1049
1050	return retval;
1051	}
1052
1053	/*
1054	* TX descriptor initialization
1055	*/
1056	static void rt2500usb_write_tx_desc(struct queue_entry *entry,
1057	struct txentry_desc *txdesc)
1058	{
1059	struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb: entry->skb);
1060	__le32 *txd = (__le32 *) entry->skb->data;
1061	u32 word;
1062
1063	/*
1064	* Start writing the descriptor words.
1065	*/
1066	word = rt2x00_desc_read(desc: txd, word: 0);
1067	rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
1068	rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1069	test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1070	rt2x00_set_field32(&word, TXD_W0_ACK,
1071	test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1072	rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1073	test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1074	rt2x00_set_field32(&word, TXD_W0_OFDM,
1075	(txdesc->rate_mode == RATE_MODE_OFDM));
1076	rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1077	test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
1078	rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->u.plcp.ifs);
1079	rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
1080	rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
1081	rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
1082	rt2x00_desc_write(desc: txd, word: 0, value: word);
1083
1084	word = rt2x00_desc_read(desc: txd, word: 1);
1085	rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
1086	rt2x00_set_field32(&word, TXD_W1_AIFS, entry->queue->aifs);
1087	rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);
1088	rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max);
1089	rt2x00_desc_write(desc: txd, word: 1, value: word);
1090
1091	word = rt2x00_desc_read(desc: txd, word: 2);
1092	rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->u.plcp.signal);
1093	rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->u.plcp.service);
1094	rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW,
1095	txdesc->u.plcp.length_low);
1096	rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH,
1097	txdesc->u.plcp.length_high);
1098	rt2x00_desc_write(desc: txd, word: 2, value: word);
1099
1100	if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
1101	_rt2x00_desc_write(desc: txd, word: 3, value: skbdesc->iv[0]);
1102	_rt2x00_desc_write(desc: txd, word: 4, value: skbdesc->iv[1]);
1103	}
1104
1105	/*
1106	* Register descriptor details in skb frame descriptor.
1107	*/
1108	skbdesc->flags |= SKBDESC_DESC_IN_SKB;
1109	skbdesc->desc = txd;
1110	skbdesc->desc_len = TXD_DESC_SIZE;
1111	}
1112
1113	/*
1114	* TX data initialization
1115	*/
1116	static void rt2500usb_beacondone(struct urb *urb);
1117
1118	static void rt2500usb_write_beacon(struct queue_entry *entry,
1119	struct txentry_desc *txdesc)
1120	{
1121	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1122	struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1123	struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1124	int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
1125	int length;
1126	u16 reg, reg0;
1127
1128	/*
1129	* Disable beaconing while we are reloading the beacon data,
1130	* otherwise we might be sending out invalid data.
1131	*/
1132	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR19);
1133	rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1134	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, value: reg);
1135
1136	/*
1137	* Add space for the descriptor in front of the skb.
1138	*/
1139	skb_push(skb: entry->skb, TXD_DESC_SIZE);
1140	memset(entry->skb->data, 0, TXD_DESC_SIZE);
1141
1142	/*
1143	* Write the TX descriptor for the beacon.
1144	*/
1145	rt2500usb_write_tx_desc(entry, txdesc);
1146
1147	/*
1148	* Dump beacon to userspace through debugfs.
1149	*/
1150	rt2x00debug_dump_frame(rt2x00dev, type: DUMP_FRAME_BEACON, entry);
1151
1152	/*
1153	* USB devices cannot blindly pass the skb->len as the
1154	* length of the data to usb_fill_bulk_urb. Pass the skb
1155	* to the driver to determine what the length should be.
1156	*/
1157	length = rt2x00dev->ops->lib->get_tx_data_len(entry);
1158
1159	usb_fill_bulk_urb(urb: bcn_priv->urb, dev: usb_dev, pipe,
1160	transfer_buffer: entry->skb->data, buffer_length: length, complete_fn: rt2500usb_beacondone,
1161	context: entry);
1162
1163	/*
1164	* Second we need to create the guardian byte.
1165	* We only need a single byte, so lets recycle
1166	* the 'flags' field we are not using for beacons.
1167	*/
1168	bcn_priv->guardian_data = 0;
1169	usb_fill_bulk_urb(urb: bcn_priv->guardian_urb, dev: usb_dev, pipe,
1170	transfer_buffer: &bcn_priv->guardian_data, buffer_length: 1, complete_fn: rt2500usb_beacondone,
1171	context: entry);
1172
1173	/*
1174	* Send out the guardian byte.
1175	*/
1176	usb_submit_urb(urb: bcn_priv->guardian_urb, GFP_ATOMIC);
1177
1178	/*
1179	* Enable beaconing again.
1180	*/
1181	rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1182	rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
1183	reg0 = reg;
1184	rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1185	/*
1186	* Beacon generation will fail initially.
1187	* To prevent this we need to change the TXRX_CSR19
1188	* register several times (reg0 is the same as reg
1189	* except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0
1190	* and 1 in reg).
1191	*/
1192	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, value: reg);
1193	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, value: reg0);
1194	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, value: reg);
1195	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, value: reg0);
1196	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, value: reg);
1197	}
1198
1199	static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
1200	{
1201	int length;
1202
1203	/*
1204	* The length _must_ be a multiple of 2,
1205	* but it must _not_ be a multiple of the USB packet size.
1206	*/
1207	length = roundup(entry->skb->len, 2);
1208	length += (2 * !(length % entry->queue->usb_maxpacket));
1209
1210	return length;
1211	}
1212
1213	/*
1214	* RX control handlers
1215	*/
1216	static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1217	struct rxdone_entry_desc *rxdesc)
1218	{
1219	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1220	struct queue_entry_priv_usb *entry_priv = entry->priv_data;
1221	struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb: entry->skb);
1222	__le32 *rxd =
1223	(__le32 *)(entry->skb->data +
1224	(entry_priv->urb->actual_length -
1225	entry->queue->desc_size));
1226	u32 word0;
1227	u32 word1;
1228
1229	/*
1230	* Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1231	* frame data in rt2x00usb.
1232	*/
1233	memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
1234	rxd = (__le32 *)skbdesc->desc;
1235
1236	/*
1237	* It is now safe to read the descriptor on all architectures.
1238	*/
1239	word0 = rt2x00_desc_read(desc: rxd, word: 0);
1240	word1 = rt2x00_desc_read(desc: rxd, word: 1);
1241
1242	if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1243	rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1244	if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1245	rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
1246
1247	rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
1248	if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1249	rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
1250
1251	if (rxdesc->cipher != CIPHER_NONE) {
1252	rxdesc->iv[0] = _rt2x00_desc_read(desc: rxd, word: 2);
1253	rxdesc->iv[1] = _rt2x00_desc_read(desc: rxd, word: 3);
1254	rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1255
1256	/* ICV is located at the end of frame */
1257
1258	rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
1259	if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1260	rxdesc->flags |= RX_FLAG_DECRYPTED;
1261	else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1262	rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1263	}
1264
1265	/*
1266	* Obtain the status about this packet.
1267	* When frame was received with an OFDM bitrate,
1268	* the signal is the PLCP value. If it was received with
1269	* a CCK bitrate the signal is the rate in 100kbit/s.
1270	*/
1271	rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1272	rxdesc->rssi =
1273	rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
1274	rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1275
1276	if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1277	rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1278	else
1279	rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
1280	if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1281	rxdesc->dev_flags |= RXDONE_MY_BSS;
1282
1283	/*
1284	* Adjust the skb memory window to the frame boundaries.
1285	*/
1286	skb_trim(skb: entry->skb, len: rxdesc->size);
1287	}
1288
1289	/*
1290	* Interrupt functions.
1291	*/
1292	static void rt2500usb_beacondone(struct urb *urb)
1293	{
1294	struct queue_entry *entry = (struct queue_entry *)urb->context;
1295	struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1296
1297	if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
1298	return;
1299
1300	/*
1301	* Check if this was the guardian beacon,
1302	* if that was the case we need to send the real beacon now.
1303	* Otherwise we should free the sk_buffer, the device
1304	* should be doing the rest of the work now.
1305	*/
1306	if (bcn_priv->guardian_urb == urb) {
1307	usb_submit_urb(urb: bcn_priv->urb, GFP_ATOMIC);
1308	} else if (bcn_priv->urb == urb) {
1309	dev_kfree_skb(entry->skb);
1310	entry->skb = NULL;
1311	}
1312	}
1313
1314	/*
1315	* Device probe functions.
1316	*/
1317	static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1318	{
1319	u16 word;
1320	u8 *mac;
1321	u8 bbp;
1322
1323	rt2x00usb_eeprom_read(rt2x00dev, eeprom: rt2x00dev->eeprom, EEPROM_SIZE);
1324
1325	/*
1326	* Start validation of the data that has been read.
1327	*/
1328	mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1329	rt2x00lib_set_mac_address(rt2x00dev, eeprom_mac_addr: mac);
1330
1331	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA);
1332	if (word == 0xffff) {
1333	rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1334	rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1335	ANTENNA_SW_DIVERSITY);
1336	rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1337	ANTENNA_SW_DIVERSITY);
1338	rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1339	LED_MODE_DEFAULT);
1340	rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1341	rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1342	rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1343	rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, data: word);
1344	rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word);
1345	}
1346
1347	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC);
1348	if (word == 0xffff) {
1349	rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1350	rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1351	rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1352	rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, data: word);
1353	rt2x00_eeprom_dbg(rt2x00dev, "NIC: 0x%04x\n", word);
1354	}
1355
1356	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET);
1357	if (word == 0xffff) {
1358	rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1359	DEFAULT_RSSI_OFFSET);
1360	rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, data: word);
1361	rt2x00_eeprom_dbg(rt2x00dev, "Calibrate offset: 0x%04x\n",
1362	word);
1363	}
1364
1365	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE);
1366	if (word == 0xffff) {
1367	rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1368	rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, data: word);
1369	rt2x00_eeprom_dbg(rt2x00dev, "BBPtune: 0x%04x\n", word);
1370	}
1371
1372	/*
1373	* Switch lower vgc bound to current BBP R17 value,
1374	* lower the value a bit for better quality.
1375	*/
1376	bbp = rt2500usb_bbp_read(rt2x00dev, word: 17);
1377	bbp -= 6;
1378
1379	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC);
1380	if (word == 0xffff) {
1381	rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1382	rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1383	rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, data: word);
1384	rt2x00_eeprom_dbg(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1385	} else {
1386	rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1387	rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, data: word);
1388	}
1389
1390	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17);
1391	if (word == 0xffff) {
1392	rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1393	rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1394	rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, data: word);
1395	rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1396	}
1397
1398	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24);
1399	if (word == 0xffff) {
1400	rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1401	rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1402	rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, data: word);
1403	rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1404	}
1405
1406	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25);
1407	if (word == 0xffff) {
1408	rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1409	rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1410	rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, data: word);
1411	rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1412	}
1413
1414	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61);
1415	if (word == 0xffff) {
1416	rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1417	rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1418	rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, data: word);
1419	rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1420	}
1421
1422	return 0;
1423	}
1424
1425	static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1426	{
1427	u16 reg;
1428	u16 value;
1429	u16 eeprom;
1430
1431	/*
1432	* Read EEPROM word for configuration.
1433	*/
1434	eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA);
1435
1436	/*
1437	* Identify RF chipset.
1438	*/
1439	value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1440	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR0);
1441	rt2x00_set_chip(rt2x00dev, RT2570, rf: value, rev: reg);
1442
1443	if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
1444	rt2x00_err(rt2x00dev, "Invalid RT chipset detected\n");
1445	return -ENODEV;
1446	}
1447
1448	if (!rt2x00_rf(rt2x00dev, RF2522) &&
1449	!rt2x00_rf(rt2x00dev, RF2523) &&
1450	!rt2x00_rf(rt2x00dev, RF2524) &&
1451	!rt2x00_rf(rt2x00dev, RF2525) &&
1452	!rt2x00_rf(rt2x00dev, RF2525E) &&
1453	!rt2x00_rf(rt2x00dev, RF5222)) {
1454	rt2x00_err(rt2x00dev, "Invalid RF chipset detected\n");
1455	return -ENODEV;
1456	}
1457
1458	/*
1459	* Identify default antenna configuration.
1460	*/
1461	rt2x00dev->default_ant.tx =
1462	rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1463	rt2x00dev->default_ant.rx =
1464	rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1465
1466	/*
1467	* When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1468	* I am not 100% sure about this, but the legacy drivers do not
1469	* indicate antenna swapping in software is required when
1470	* diversity is enabled.
1471	*/
1472	if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1473	rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1474	if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1475	rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1476
1477	/*
1478	* Store led mode, for correct led behaviour.
1479	*/
1480	#ifdef CONFIG_RT2X00_LIB_LEDS
1481	value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1482
1483	rt2500usb_init_led(rt2x00dev, led: &rt2x00dev->led_radio, type: LED_TYPE_RADIO);
1484	if (value == LED_MODE_TXRX_ACTIVITY ||
1485	value == LED_MODE_DEFAULT ||
1486	value == LED_MODE_ASUS)
1487	rt2500usb_init_led(rt2x00dev, led: &rt2x00dev->led_qual,
1488	type: LED_TYPE_ACTIVITY);
1489	#endif /* CONFIG_RT2X00_LIB_LEDS */
1490
1491	/*
1492	* Detect if this device has an hardware controlled radio.
1493	*/
1494	if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
1495	__set_bit(CAPABILITY_HW_BUTTON, &rt2x00dev->cap_flags);
1496
1497	/*
1498	* Read the RSSI <-> dBm offset information.
1499	*/
1500	eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET);
1501	rt2x00dev->rssi_offset =
1502	rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1503
1504	return 0;
1505	}
1506
1507	/*
1508	* RF value list for RF2522
1509	* Supports: 2.4 GHz
1510	*/
1511	static const struct rf_channel rf_vals_bg_2522[] = {
1512	{ 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1513	{ 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1514	{ 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1515	{ 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1516	{ 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1517	{ 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1518	{ 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1519	{ 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1520	{ 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1521	{ 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1522	{ 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1523	{ 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1524	{ 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1525	{ 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1526	};
1527
1528	/*
1529	* RF value list for RF2523
1530	* Supports: 2.4 GHz
1531	*/
1532	static const struct rf_channel rf_vals_bg_2523[] = {
1533	{ 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1534	{ 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1535	{ 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1536	{ 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1537	{ 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1538	{ 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1539	{ 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1540	{ 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1541	{ 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1542	{ 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1543	{ 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1544	{ 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1545	{ 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1546	{ 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1547	};
1548
1549	/*
1550	* RF value list for RF2524
1551	* Supports: 2.4 GHz
1552	*/
1553	static const struct rf_channel rf_vals_bg_2524[] = {
1554	{ 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1555	{ 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1556	{ 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1557	{ 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1558	{ 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1559	{ 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1560	{ 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1561	{ 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1562	{ 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1563	{ 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1564	{ 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1565	{ 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1566	{ 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1567	{ 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1568	};
1569
1570	/*
1571	* RF value list for RF2525
1572	* Supports: 2.4 GHz
1573	*/
1574	static const struct rf_channel rf_vals_bg_2525[] = {
1575	{ 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1576	{ 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1577	{ 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1578	{ 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1579	{ 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1580	{ 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1581	{ 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1582	{ 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1583	{ 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1584	{ 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1585	{ 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1586	{ 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1587	{ 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1588	{ 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1589	};
1590
1591	/*
1592	* RF value list for RF2525e
1593	* Supports: 2.4 GHz
1594	*/
1595	static const struct rf_channel rf_vals_bg_2525e[] = {
1596	{ 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1597	{ 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1598	{ 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1599	{ 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1600	{ 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1601	{ 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1602	{ 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1603	{ 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1604	{ 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1605	{ 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1606	{ 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1607	{ 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1608	{ 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1609	{ 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1610	};
1611
1612	/*
1613	* RF value list for RF5222
1614	* Supports: 2.4 GHz & 5.2 GHz
1615	*/
1616	static const struct rf_channel rf_vals_5222[] = {
1617	{ 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1618	{ 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1619	{ 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1620	{ 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1621	{ 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1622	{ 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1623	{ 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1624	{ 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1625	{ 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1626	{ 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1627	{ 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1628	{ 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1629	{ 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1630	{ 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1631
1632	/* 802.11 UNI / HyperLan 2 */
1633	{ 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1634	{ 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1635	{ 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1636	{ 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1637	{ 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1638	{ 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1639	{ 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1640	{ 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1641
1642	/* 802.11 HyperLan 2 */
1643	{ 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1644	{ 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1645	{ 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1646	{ 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1647	{ 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1648	{ 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1649	{ 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1650	{ 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1651	{ 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1652	{ 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1653
1654	/* 802.11 UNII */
1655	{ 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1656	{ 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1657	{ 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1658	{ 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1659	{ 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1660	};
1661
1662	static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1663	{
1664	struct hw_mode_spec *spec = &rt2x00dev->spec;
1665	struct channel_info *info;
1666	u8 *tx_power;
1667	unsigned int i;
1668
1669	/*
1670	* Initialize all hw fields.
1671	*
1672	* Don't set IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING unless we are
1673	* capable of sending the buffered frames out after the DTIM
1674	* transmission using rt2x00lib_beacondone. This will send out
1675	* multicast and broadcast traffic immediately instead of buffering it
1676	* infinitly and thus dropping it after some time.
1677	*/
1678	ieee80211_hw_set(rt2x00dev->hw, PS_NULLFUNC_STACK);
1679	ieee80211_hw_set(rt2x00dev->hw, SUPPORTS_PS);
1680	ieee80211_hw_set(rt2x00dev->hw, RX_INCLUDES_FCS);
1681	ieee80211_hw_set(rt2x00dev->hw, SIGNAL_DBM);
1682
1683	/*
1684	* Disable powersaving as default.
1685	*/
1686	rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
1687
1688	SET_IEEE80211_DEV(hw: rt2x00dev->hw, dev: rt2x00dev->dev);
1689	SET_IEEE80211_PERM_ADDR(hw: rt2x00dev->hw,
1690	addr: rt2x00_eeprom_addr(rt2x00dev,
1691	EEPROM_MAC_ADDR_0));
1692
1693	/*
1694	* Initialize hw_mode information.
1695	*/
1696	spec->supported_bands = SUPPORT_BAND_2GHZ;
1697	spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1698
1699	if (rt2x00_rf(rt2x00dev, RF2522)) {
1700	spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1701	spec->channels = rf_vals_bg_2522;
1702	} else if (rt2x00_rf(rt2x00dev, RF2523)) {
1703	spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1704	spec->channels = rf_vals_bg_2523;
1705	} else if (rt2x00_rf(rt2x00dev, RF2524)) {
1706	spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1707	spec->channels = rf_vals_bg_2524;
1708	} else if (rt2x00_rf(rt2x00dev, RF2525)) {
1709	spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1710	spec->channels = rf_vals_bg_2525;
1711	} else if (rt2x00_rf(rt2x00dev, RF2525E)) {
1712	spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1713	spec->channels = rf_vals_bg_2525e;
1714	} else if (rt2x00_rf(rt2x00dev, RF5222)) {
1715	spec->supported_bands |= SUPPORT_BAND_5GHZ;
1716	spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1717	spec->channels = rf_vals_5222;
1718	}
1719
1720	/*
1721	* Create channel information array
1722	*/
1723	info = kcalloc(n: spec->num_channels, size: sizeof(*info), GFP_KERNEL);
1724	if (!info)
1725	return -ENOMEM;
1726
1727	spec->channels_info = info;
1728
1729	tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1730	for (i = 0; i < 14; i++) {
1731	info[i].max_power = MAX_TXPOWER;
1732	info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1733	}
1734
1735	if (spec->num_channels > 14) {
1736	for (i = 14; i < spec->num_channels; i++) {
1737	info[i].max_power = MAX_TXPOWER;
1738	info[i].default_power1 = DEFAULT_TXPOWER;
1739	}
1740	}
1741
1742	return 0;
1743	}
1744
1745	static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1746	{
1747	int retval;
1748	u16 reg;
1749
1750	/*
1751	* Allocate eeprom data.
1752	*/
1753	retval = rt2500usb_validate_eeprom(rt2x00dev);
1754	if (retval)
1755	return retval;
1756
1757	retval = rt2500usb_init_eeprom(rt2x00dev);
1758	if (retval)
1759	return retval;
1760
1761	/*
1762	* Enable rfkill polling by setting GPIO direction of the
1763	* rfkill switch GPIO pin correctly.
1764	*/
1765	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR19);
1766	rt2x00_set_field16(&reg, MAC_CSR19_DIR0, 0);
1767	rt2500usb_register_write(rt2x00dev, MAC_CSR19, value: reg);
1768
1769	/*
1770	* Initialize hw specifications.
1771	*/
1772	retval = rt2500usb_probe_hw_mode(rt2x00dev);
1773	if (retval)
1774	return retval;
1775
1776	/*
1777	* This device requires the atim queue
1778	*/
1779	__set_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags);
1780	__set_bit(REQUIRE_BEACON_GUARD, &rt2x00dev->cap_flags);
1781	if (!modparam_nohwcrypt) {
1782	__set_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags);
1783	__set_bit(REQUIRE_COPY_IV, &rt2x00dev->cap_flags);
1784	}
1785	__set_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags);
1786	__set_bit(REQUIRE_PS_AUTOWAKE, &rt2x00dev->cap_flags);
1787
1788	/*
1789	* Set the rssi offset.
1790	*/
1791	rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1792
1793	return 0;
1794	}
1795
1796	static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1797	.add_chanctx = ieee80211_emulate_add_chanctx,
1798	.remove_chanctx = ieee80211_emulate_remove_chanctx,
1799	.change_chanctx = ieee80211_emulate_change_chanctx,
1800	.switch_vif_chanctx = ieee80211_emulate_switch_vif_chanctx,
1801	.tx = rt2x00mac_tx,
1802	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
1803	.start = rt2x00mac_start,
1804	.stop = rt2x00mac_stop,
1805	.add_interface = rt2x00mac_add_interface,
1806	.remove_interface = rt2x00mac_remove_interface,
1807	.config = rt2x00mac_config,
1808	.configure_filter = rt2x00mac_configure_filter,
1809	.set_tim = rt2x00mac_set_tim,
1810	.set_key = rt2x00mac_set_key,
1811	.sw_scan_start = rt2x00mac_sw_scan_start,
1812	.sw_scan_complete = rt2x00mac_sw_scan_complete,
1813	.get_stats = rt2x00mac_get_stats,
1814	.bss_info_changed = rt2x00mac_bss_info_changed,
1815	.conf_tx = rt2x00mac_conf_tx,
1816	.rfkill_poll = rt2x00mac_rfkill_poll,
1817	.flush = rt2x00mac_flush,
1818	.set_antenna = rt2x00mac_set_antenna,
1819	.get_antenna = rt2x00mac_get_antenna,
1820	.get_ringparam = rt2x00mac_get_ringparam,
1821	.tx_frames_pending = rt2x00mac_tx_frames_pending,
1822	};
1823
1824	static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1825	.probe_hw = rt2500usb_probe_hw,
1826	.initialize = rt2x00usb_initialize,
1827	.uninitialize = rt2x00usb_uninitialize,
1828	.clear_entry = rt2x00usb_clear_entry,
1829	.set_device_state = rt2500usb_set_device_state,
1830	.rfkill_poll = rt2500usb_rfkill_poll,
1831	.link_stats = rt2500usb_link_stats,
1832	.reset_tuner = rt2500usb_reset_tuner,
1833	.watchdog = rt2x00usb_watchdog,
1834	.start_queue = rt2500usb_start_queue,
1835	.kick_queue = rt2x00usb_kick_queue,
1836	.stop_queue = rt2500usb_stop_queue,
1837	.flush_queue = rt2x00usb_flush_queue,
1838	.write_tx_desc = rt2500usb_write_tx_desc,
1839	.write_beacon = rt2500usb_write_beacon,
1840	.get_tx_data_len = rt2500usb_get_tx_data_len,
1841	.fill_rxdone = rt2500usb_fill_rxdone,
1842	.config_shared_key = rt2500usb_config_key,
1843	.config_pairwise_key = rt2500usb_config_key,
1844	.config_filter = rt2500usb_config_filter,
1845	.config_intf = rt2500usb_config_intf,
1846	.config_erp = rt2500usb_config_erp,
1847	.config_ant = rt2500usb_config_ant,
1848	.config = rt2500usb_config,
1849	};
1850
1851	static void rt2500usb_queue_init(struct data_queue *queue)
1852	{
1853	switch (queue->qid) {
1854	case QID_RX:
1855	queue->limit = 32;
1856	queue->data_size = DATA_FRAME_SIZE;
1857	queue->desc_size = RXD_DESC_SIZE;
1858	queue->priv_size = sizeof(struct queue_entry_priv_usb);
1859	break;
1860
1861	case QID_AC_VO:
1862	case QID_AC_VI:
1863	case QID_AC_BE:
1864	case QID_AC_BK:
1865	queue->limit = 32;
1866	queue->data_size = DATA_FRAME_SIZE;
1867	queue->desc_size = TXD_DESC_SIZE;
1868	queue->priv_size = sizeof(struct queue_entry_priv_usb);
1869	break;
1870
1871	case QID_BEACON:
1872	queue->limit = 1;
1873	queue->data_size = MGMT_FRAME_SIZE;
1874	queue->desc_size = TXD_DESC_SIZE;
1875	queue->priv_size = sizeof(struct queue_entry_priv_usb_bcn);
1876	break;
1877
1878	case QID_ATIM:
1879	queue->limit = 8;
1880	queue->data_size = DATA_FRAME_SIZE;
1881	queue->desc_size = TXD_DESC_SIZE;
1882	queue->priv_size = sizeof(struct queue_entry_priv_usb);
1883	break;
1884
1885	default:
1886	BUG();
1887	break;
1888	}
1889	}
1890
1891	static const struct rt2x00_ops rt2500usb_ops = {
1892	.name = KBUILD_MODNAME,
1893	.max_ap_intf = 1,
1894	.eeprom_size = EEPROM_SIZE,
1895	.rf_size = RF_SIZE,
1896	.tx_queues = NUM_TX_QUEUES,
1897	.queue_init = rt2500usb_queue_init,
1898	.lib = &rt2500usb_rt2x00_ops,
1899	.hw = &rt2500usb_mac80211_ops,
1900	#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1901	.debugfs = &rt2500usb_rt2x00debug,
1902	#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1903	};
1904
1905	/*
1906	* rt2500usb module information.
1907	*/
1908	static const struct usb_device_id rt2500usb_device_table[] = {
1909	/* ASUS */
1910	{ USB_DEVICE(0x0b05, 0x1706) },
1911	{ USB_DEVICE(0x0b05, 0x1707) },
1912	/* Belkin */
1913	{ USB_DEVICE(0x050d, 0x7050) }, /* FCC ID: K7SF5D7050A ver. 2.x */
1914	{ USB_DEVICE(0x050d, 0x7051) },
1915	/* Cisco Systems */
1916	{ USB_DEVICE(0x13b1, 0x000d) },
1917	{ USB_DEVICE(0x13b1, 0x0011) },
1918	{ USB_DEVICE(0x13b1, 0x001a) },
1919	/* Conceptronic */
1920	{ USB_DEVICE(0x14b2, 0x3c02) },
1921	/* D-LINK */
1922	{ USB_DEVICE(0x2001, 0x3c00) },
1923	/* Gigabyte */
1924	{ USB_DEVICE(0x1044, 0x8001) },
1925	{ USB_DEVICE(0x1044, 0x8007) },
1926	/* Hercules */
1927	{ USB_DEVICE(0x06f8, 0xe000) },
1928	/* Melco */
1929	{ USB_DEVICE(0x0411, 0x005e) },
1930	{ USB_DEVICE(0x0411, 0x0066) },
1931	{ USB_DEVICE(0x0411, 0x0067) },
1932	{ USB_DEVICE(0x0411, 0x008b) },
1933	{ USB_DEVICE(0x0411, 0x0097) },
1934	/* MSI */
1935	{ USB_DEVICE(0x0db0, 0x6861) },
1936	{ USB_DEVICE(0x0db0, 0x6865) },
1937	{ USB_DEVICE(0x0db0, 0x6869) },
1938	/* Ralink */
1939	{ USB_DEVICE(0x148f, 0x1706) },
1940	{ USB_DEVICE(0x148f, 0x2570) },
1941	{ USB_DEVICE(0x148f, 0x9020) },
1942	/* Sagem */
1943	{ USB_DEVICE(0x079b, 0x004b) },
1944	/* Siemens */
1945	{ USB_DEVICE(0x0681, 0x3c06) },
1946	/* SMC */
1947	{ USB_DEVICE(0x0707, 0xee13) },
1948	/* Spairon */
1949	{ USB_DEVICE(0x114b, 0x0110) },
1950	/* SURECOM */
1951	{ USB_DEVICE(0x0769, 0x11f3) },
1952	/* Trust */
1953	{ USB_DEVICE(0x0eb0, 0x9020) },
1954	/* VTech */
1955	{ USB_DEVICE(0x0f88, 0x3012) },
1956	/* Zinwell */
1957	{ USB_DEVICE(0x5a57, 0x0260) },
1958	{ 0, }
1959	};
1960
1961	MODULE_AUTHOR(DRV_PROJECT);
1962	MODULE_VERSION(DRV_VERSION);
1963	MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1964	MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1965	MODULE_LICENSE("GPL");
1966
1967	static int rt2500usb_probe(struct usb_interface *usb_intf,
1968	const struct usb_device_id *id)
1969	{
1970	return rt2x00usb_probe(usb_intf, ops: &rt2500usb_ops);
1971	}
1972
1973	static struct usb_driver rt2500usb_driver = {
1974	.name = KBUILD_MODNAME,
1975	.id_table = rt2500usb_device_table,
1976	.probe = rt2500usb_probe,
1977	.disconnect = rt2x00usb_disconnect,
1978	.suspend = rt2x00usb_suspend,
1979	.resume = rt2x00usb_resume,
1980	.reset_resume = rt2x00usb_resume,
1981	.disable_hub_initiated_lpm = 1,
1982	};
1983
1984	module_usb_driver(rt2500usb_driver);
1985