1 | /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ |
2 | /* Copyright(c) 2019-2020 Realtek Corporation |
3 | */ |
4 | |
5 | #ifndef __RTW89_CAM_H__ |
6 | #define __RTW89_CAM_H__ |
7 | |
8 | #include "core.h" |
9 | |
10 | #define RTW89_SEC_CAM_LEN 20 |
11 | |
12 | #define RTW89_BSSID_MATCH_ALL GENMASK(5, 0) |
13 | #define RTW89_BSSID_MATCH_5_BYTES GENMASK(4, 0) |
14 | |
15 | static inline void FWCMD_SET_ADDR_IDX(void *cmd, u32 value) |
16 | { |
17 | le32p_replace_bits(p: (__le32 *)(cmd) + 1, val: value, GENMASK(7, 0)); |
18 | } |
19 | |
20 | static inline void FWCMD_SET_ADDR_OFFSET(void *cmd, u32 value) |
21 | { |
22 | le32p_replace_bits(p: (__le32 *)(cmd) + 1, val: value, GENMASK(15, 8)); |
23 | } |
24 | |
25 | static inline void FWCMD_SET_ADDR_LEN(void *cmd, u32 value) |
26 | { |
27 | le32p_replace_bits(p: (__le32 *)(cmd) + 1, val: value, GENMASK(23, 16)); |
28 | } |
29 | |
30 | static inline void FWCMD_SET_ADDR_VALID(void *cmd, u32 value) |
31 | { |
32 | le32p_replace_bits(p: (__le32 *)(cmd) + 2, val: value, BIT(0)); |
33 | } |
34 | |
35 | static inline void FWCMD_SET_ADDR_NET_TYPE(void *cmd, u32 value) |
36 | { |
37 | le32p_replace_bits(p: (__le32 *)(cmd) + 2, val: value, GENMASK(2, 1)); |
38 | } |
39 | |
40 | static inline void FWCMD_SET_ADDR_BCN_HIT_COND(void *cmd, u32 value) |
41 | { |
42 | le32p_replace_bits(p: (__le32 *)(cmd) + 2, val: value, GENMASK(4, 3)); |
43 | } |
44 | |
45 | static inline void FWCMD_SET_ADDR_HIT_RULE(void *cmd, u32 value) |
46 | { |
47 | le32p_replace_bits(p: (__le32 *)(cmd) + 2, val: value, GENMASK(6, 5)); |
48 | } |
49 | |
50 | static inline void FWCMD_SET_ADDR_BB_SEL(void *cmd, u32 value) |
51 | { |
52 | le32p_replace_bits(p: (__le32 *)(cmd) + 2, val: value, BIT(7)); |
53 | } |
54 | |
55 | static inline void FWCMD_SET_ADDR_ADDR_MASK(void *cmd, u32 value) |
56 | { |
57 | le32p_replace_bits(p: (__le32 *)(cmd) + 2, val: value, GENMASK(13, 8)); |
58 | } |
59 | |
60 | static inline void FWCMD_SET_ADDR_MASK_SEL(void *cmd, u32 value) |
61 | { |
62 | le32p_replace_bits(p: (__le32 *)(cmd) + 2, val: value, GENMASK(15, 14)); |
63 | } |
64 | |
65 | static inline void FWCMD_SET_ADDR_SMA_HASH(void *cmd, u32 value) |
66 | { |
67 | le32p_replace_bits(p: (__le32 *)(cmd) + 2, val: value, GENMASK(23, 16)); |
68 | } |
69 | |
70 | static inline void FWCMD_SET_ADDR_TMA_HASH(void *cmd, u32 value) |
71 | { |
72 | le32p_replace_bits(p: (__le32 *)(cmd) + 2, val: value, GENMASK(31, 24)); |
73 | } |
74 | |
75 | static inline void FWCMD_SET_ADDR_BSSID_CAM_IDX(void *cmd, u32 value) |
76 | { |
77 | le32p_replace_bits(p: (__le32 *)(cmd) + 3, val: value, GENMASK(5, 0)); |
78 | } |
79 | |
80 | static inline void FWCMD_SET_ADDR_SMA0(void *cmd, u32 value) |
81 | { |
82 | le32p_replace_bits(p: (__le32 *)(cmd) + 4, val: value, GENMASK(7, 0)); |
83 | } |
84 | |
85 | static inline void FWCMD_SET_ADDR_SMA1(void *cmd, u32 value) |
86 | { |
87 | le32p_replace_bits(p: (__le32 *)(cmd) + 4, val: value, GENMASK(15, 8)); |
88 | } |
89 | |
90 | static inline void FWCMD_SET_ADDR_SMA2(void *cmd, u32 value) |
91 | { |
92 | le32p_replace_bits(p: (__le32 *)(cmd) + 4, val: value, GENMASK(23, 16)); |
93 | } |
94 | |
95 | static inline void FWCMD_SET_ADDR_SMA3(void *cmd, u32 value) |
96 | { |
97 | le32p_replace_bits(p: (__le32 *)(cmd) + 4, val: value, GENMASK(31, 24)); |
98 | } |
99 | |
100 | static inline void FWCMD_SET_ADDR_SMA4(void *cmd, u32 value) |
101 | { |
102 | le32p_replace_bits(p: (__le32 *)(cmd) + 5, val: value, GENMASK(7, 0)); |
103 | } |
104 | |
105 | static inline void FWCMD_SET_ADDR_SMA5(void *cmd, u32 value) |
106 | { |
107 | le32p_replace_bits(p: (__le32 *)(cmd) + 5, val: value, GENMASK(15, 8)); |
108 | } |
109 | |
110 | static inline void FWCMD_SET_ADDR_TMA0(void *cmd, u32 value) |
111 | { |
112 | le32p_replace_bits(p: (__le32 *)(cmd) + 5, val: value, GENMASK(23, 16)); |
113 | } |
114 | |
115 | static inline void FWCMD_SET_ADDR_TMA1(void *cmd, u32 value) |
116 | { |
117 | le32p_replace_bits(p: (__le32 *)(cmd) + 5, val: value, GENMASK(31, 24)); |
118 | } |
119 | |
120 | static inline void FWCMD_SET_ADDR_TMA2(void *cmd, u32 value) |
121 | { |
122 | le32p_replace_bits(p: (__le32 *)(cmd) + 6, val: value, GENMASK(7, 0)); |
123 | } |
124 | |
125 | static inline void FWCMD_SET_ADDR_TMA3(void *cmd, u32 value) |
126 | { |
127 | le32p_replace_bits(p: (__le32 *)(cmd) + 6, val: value, GENMASK(15, 8)); |
128 | } |
129 | |
130 | static inline void FWCMD_SET_ADDR_TMA4(void *cmd, u32 value) |
131 | { |
132 | le32p_replace_bits(p: (__le32 *)(cmd) + 6, val: value, GENMASK(23, 16)); |
133 | } |
134 | |
135 | static inline void FWCMD_SET_ADDR_TMA5(void *cmd, u32 value) |
136 | { |
137 | le32p_replace_bits(p: (__le32 *)(cmd) + 6, val: value, GENMASK(31, 24)); |
138 | } |
139 | |
140 | static inline void FWCMD_SET_ADDR_MACID(void *cmd, u32 value) |
141 | { |
142 | le32p_replace_bits(p: (__le32 *)(cmd) + 8, val: value, GENMASK(7, 0)); |
143 | } |
144 | |
145 | static inline void FWCMD_SET_ADDR_PORT_INT(void *cmd, u32 value) |
146 | { |
147 | le32p_replace_bits(p: (__le32 *)(cmd) + 8, val: value, GENMASK(10, 8)); |
148 | } |
149 | |
150 | static inline void FWCMD_SET_ADDR_TSF_SYNC(void *cmd, u32 value) |
151 | { |
152 | le32p_replace_bits(p: (__le32 *)(cmd) + 8, val: value, GENMASK(13, 11)); |
153 | } |
154 | |
155 | static inline void FWCMD_SET_ADDR_TF_TRS(void *cmd, u32 value) |
156 | { |
157 | le32p_replace_bits(p: (__le32 *)(cmd) + 8, val: value, BIT(14)); |
158 | } |
159 | |
160 | static inline void FWCMD_SET_ADDR_LSIG_TXOP(void *cmd, u32 value) |
161 | { |
162 | le32p_replace_bits(p: (__le32 *)(cmd) + 8, val: value, BIT(15)); |
163 | } |
164 | |
165 | static inline void FWCMD_SET_ADDR_TGT_IND(void *cmd, u32 value) |
166 | { |
167 | le32p_replace_bits(p: (__le32 *)(cmd) + 8, val: value, GENMASK(26, 24)); |
168 | } |
169 | |
170 | static inline void FWCMD_SET_ADDR_FRM_TGT_IND(void *cmd, u32 value) |
171 | { |
172 | le32p_replace_bits(p: (__le32 *)(cmd) + 8, val: value, GENMASK(29, 27)); |
173 | } |
174 | |
175 | static inline void FWCMD_SET_ADDR_AID12(void *cmd, u32 value) |
176 | { |
177 | le32p_replace_bits(p: (__le32 *)(cmd) + 9, val: value, GENMASK(11, 0)); |
178 | } |
179 | |
180 | static inline void FWCMD_SET_ADDR_AID12_0(void *cmd, u32 value) |
181 | { |
182 | le32p_replace_bits(p: (__le32 *)(cmd) + 9, val: value, GENMASK(7, 0)); |
183 | } |
184 | |
185 | static inline void FWCMD_SET_ADDR_AID12_1(void *cmd, u32 value) |
186 | { |
187 | le32p_replace_bits(p: (__le32 *)(cmd) + 9, val: value, GENMASK(11, 8)); |
188 | } |
189 | |
190 | static inline void FWCMD_SET_ADDR_WOL_PATTERN(void *cmd, u32 value) |
191 | { |
192 | le32p_replace_bits(p: (__le32 *)(cmd) + 9, val: value, BIT(12)); |
193 | } |
194 | |
195 | static inline void FWCMD_SET_ADDR_WOL_UC(void *cmd, u32 value) |
196 | { |
197 | le32p_replace_bits(p: (__le32 *)(cmd) + 9, val: value, BIT(13)); |
198 | } |
199 | |
200 | static inline void FWCMD_SET_ADDR_WOL_MAGIC(void *cmd, u32 value) |
201 | { |
202 | le32p_replace_bits(p: (__le32 *)(cmd) + 9, val: value, BIT(14)); |
203 | } |
204 | |
205 | static inline void FWCMD_SET_ADDR_WAPI(void *cmd, u32 value) |
206 | { |
207 | le32p_replace_bits(p: (__le32 *)(cmd) + 9, val: value, BIT(15)); |
208 | } |
209 | |
210 | static inline void FWCMD_SET_ADDR_SEC_ENT_MODE(void *cmd, u32 value) |
211 | { |
212 | le32p_replace_bits(p: (__le32 *)(cmd) + 9, val: value, GENMASK(17, 16)); |
213 | } |
214 | |
215 | static inline void FWCMD_SET_ADDR_SEC_ENT0_KEYID(void *cmd, u32 value) |
216 | { |
217 | le32p_replace_bits(p: (__le32 *)(cmd) + 9, val: value, GENMASK(19, 18)); |
218 | } |
219 | |
220 | static inline void FWCMD_SET_ADDR_SEC_ENT1_KEYID(void *cmd, u32 value) |
221 | { |
222 | le32p_replace_bits(p: (__le32 *)(cmd) + 9, val: value, GENMASK(21, 20)); |
223 | } |
224 | |
225 | static inline void FWCMD_SET_ADDR_SEC_ENT2_KEYID(void *cmd, u32 value) |
226 | { |
227 | le32p_replace_bits(p: (__le32 *)(cmd) + 9, val: value, GENMASK(23, 22)); |
228 | } |
229 | |
230 | static inline void FWCMD_SET_ADDR_SEC_ENT3_KEYID(void *cmd, u32 value) |
231 | { |
232 | le32p_replace_bits(p: (__le32 *)(cmd) + 9, val: value, GENMASK(25, 24)); |
233 | } |
234 | |
235 | static inline void FWCMD_SET_ADDR_SEC_ENT4_KEYID(void *cmd, u32 value) |
236 | { |
237 | le32p_replace_bits(p: (__le32 *)(cmd) + 9, val: value, GENMASK(27, 26)); |
238 | } |
239 | |
240 | static inline void FWCMD_SET_ADDR_SEC_ENT5_KEYID(void *cmd, u32 value) |
241 | { |
242 | le32p_replace_bits(p: (__le32 *)(cmd) + 9, val: value, GENMASK(29, 28)); |
243 | } |
244 | |
245 | static inline void FWCMD_SET_ADDR_SEC_ENT6_KEYID(void *cmd, u32 value) |
246 | { |
247 | le32p_replace_bits(p: (__le32 *)(cmd) + 9, val: value, GENMASK(31, 30)); |
248 | } |
249 | |
250 | static inline void FWCMD_SET_ADDR_SEC_ENT_VALID(void *cmd, u32 value) |
251 | { |
252 | le32p_replace_bits(p: (__le32 *)(cmd) + 10, val: value, GENMASK(7, 0)); |
253 | } |
254 | |
255 | static inline void FWCMD_SET_ADDR_SEC_ENT0(void *cmd, u32 value) |
256 | { |
257 | le32p_replace_bits(p: (__le32 *)(cmd) + 10, val: value, GENMASK(15, 8)); |
258 | } |
259 | |
260 | static inline void FWCMD_SET_ADDR_SEC_ENT1(void *cmd, u32 value) |
261 | { |
262 | le32p_replace_bits(p: (__le32 *)(cmd) + 10, val: value, GENMASK(23, 16)); |
263 | } |
264 | |
265 | static inline void FWCMD_SET_ADDR_SEC_ENT2(void *cmd, u32 value) |
266 | { |
267 | le32p_replace_bits(p: (__le32 *)(cmd) + 10, val: value, GENMASK(31, 24)); |
268 | } |
269 | |
270 | static inline void FWCMD_SET_ADDR_SEC_ENT3(void *cmd, u32 value) |
271 | { |
272 | le32p_replace_bits(p: (__le32 *)(cmd) + 11, val: value, GENMASK(7, 0)); |
273 | } |
274 | |
275 | static inline void FWCMD_SET_ADDR_SEC_ENT4(void *cmd, u32 value) |
276 | { |
277 | le32p_replace_bits(p: (__le32 *)(cmd) + 11, val: value, GENMASK(15, 8)); |
278 | } |
279 | |
280 | static inline void FWCMD_SET_ADDR_SEC_ENT5(void *cmd, u32 value) |
281 | { |
282 | le32p_replace_bits(p: (__le32 *)(cmd) + 11, val: value, GENMASK(23, 16)); |
283 | } |
284 | |
285 | static inline void FWCMD_SET_ADDR_SEC_ENT6(void *cmd, u32 value) |
286 | { |
287 | le32p_replace_bits(p: (__le32 *)(cmd) + 11, val: value, GENMASK(31, 24)); |
288 | } |
289 | |
290 | static inline void FWCMD_SET_ADDR_BSSID_IDX(void *cmd, u32 value) |
291 | { |
292 | le32p_replace_bits(p: (__le32 *)(cmd) + 12, val: value, GENMASK(7, 0)); |
293 | } |
294 | |
295 | static inline void FWCMD_SET_ADDR_BSSID_OFFSET(void *cmd, u32 value) |
296 | { |
297 | le32p_replace_bits(p: (__le32 *)(cmd) + 12, val: value, GENMASK(15, 8)); |
298 | } |
299 | |
300 | static inline void FWCMD_SET_ADDR_BSSID_LEN(void *cmd, u32 value) |
301 | { |
302 | le32p_replace_bits(p: (__le32 *)(cmd) + 12, val: value, GENMASK(23, 16)); |
303 | } |
304 | |
305 | static inline void FWCMD_SET_ADDR_BSSID_VALID(void *cmd, u32 value) |
306 | { |
307 | le32p_replace_bits(p: (__le32 *)(cmd) + 13, val: value, BIT(0)); |
308 | } |
309 | |
310 | static inline void FWCMD_SET_ADDR_BSSID_BB_SEL(void *cmd, u32 value) |
311 | { |
312 | le32p_replace_bits(p: (__le32 *)(cmd) + 13, val: value, BIT(1)); |
313 | } |
314 | |
315 | static inline void FWCMD_SET_ADDR_BSSID_MASK(void *cmd, u32 value) |
316 | { |
317 | le32p_replace_bits(p: (__le32 *)(cmd) + 13, val: value, GENMASK(7, 2)); |
318 | } |
319 | |
320 | static inline void FWCMD_SET_ADDR_BSSID_BSS_COLOR(void *cmd, u32 value) |
321 | { |
322 | le32p_replace_bits(p: (__le32 *)(cmd) + 13, val: value, GENMASK(13, 8)); |
323 | } |
324 | |
325 | static inline void FWCMD_SET_ADDR_BSSID_BSSID0(void *cmd, u32 value) |
326 | { |
327 | le32p_replace_bits(p: (__le32 *)(cmd) + 13, val: value, GENMASK(23, 16)); |
328 | } |
329 | |
330 | static inline void FWCMD_SET_ADDR_BSSID_BSSID1(void *cmd, u32 value) |
331 | { |
332 | le32p_replace_bits(p: (__le32 *)(cmd) + 13, val: value, GENMASK(31, 24)); |
333 | } |
334 | |
335 | static inline void FWCMD_SET_ADDR_BSSID_BSSID2(void *cmd, u32 value) |
336 | { |
337 | le32p_replace_bits(p: (__le32 *)(cmd) + 14, val: value, GENMASK(7, 0)); |
338 | } |
339 | |
340 | static inline void FWCMD_SET_ADDR_BSSID_BSSID3(void *cmd, u32 value) |
341 | { |
342 | le32p_replace_bits(p: (__le32 *)(cmd) + 14, val: value, GENMASK(15, 8)); |
343 | } |
344 | |
345 | static inline void FWCMD_SET_ADDR_BSSID_BSSID4(void *cmd, u32 value) |
346 | { |
347 | le32p_replace_bits(p: (__le32 *)(cmd) + 14, val: value, GENMASK(23, 16)); |
348 | } |
349 | |
350 | static inline void FWCMD_SET_ADDR_BSSID_BSSID5(void *cmd, u32 value) |
351 | { |
352 | le32p_replace_bits(p: (__le32 *)(cmd) + 14, val: value, GENMASK(31, 24)); |
353 | } |
354 | |
355 | struct rtw89_h2c_dctlinfo_ud_v2 { |
356 | __le32 c0; |
357 | __le32 w0; |
358 | __le32 w1; |
359 | __le32 w2; |
360 | __le32 w3; |
361 | __le32 w4; |
362 | __le32 w5; |
363 | __le32 w6; |
364 | __le32 w7; |
365 | __le32 w8; |
366 | __le32 w9; |
367 | __le32 w10; |
368 | __le32 w11; |
369 | __le32 w12; |
370 | __le32 w13; |
371 | __le32 w14; |
372 | __le32 w15; |
373 | __le32 m0; |
374 | __le32 m1; |
375 | __le32 m2; |
376 | __le32 m3; |
377 | __le32 m4; |
378 | __le32 m5; |
379 | __le32 m6; |
380 | __le32 m7; |
381 | __le32 m8; |
382 | __le32 m9; |
383 | __le32 m10; |
384 | __le32 m11; |
385 | __le32 m12; |
386 | __le32 m13; |
387 | __le32 m14; |
388 | __le32 m15; |
389 | } __packed; |
390 | |
391 | #define DCTLINFO_V2_C0_MACID GENMASK(6, 0) |
392 | #define DCTLINFO_V2_C0_OP BIT(7) |
393 | |
394 | #define DCTLINFO_V2_W0_QOS_FIELD_H GENMASK(7, 0) |
395 | #define DCTLINFO_V2_W0_HW_EXSEQ_MACID GENMASK(14, 8) |
396 | #define DCTLINFO_V2_W0_QOS_DATA BIT(15) |
397 | #define DCTLINFO_V2_W0_AES_IV_L GENMASK(31, 16) |
398 | #define DCTLINFO_V2_W0_ALL GENMASK(31, 0) |
399 | #define DCTLINFO_V2_W1_AES_IV_H GENMASK(31, 0) |
400 | #define DCTLINFO_V2_W1_ALL GENMASK(31, 0) |
401 | #define DCTLINFO_V2_W2_SEQ0 GENMASK(11, 0) |
402 | #define DCTLINFO_V2_W2_SEQ1 GENMASK(23, 12) |
403 | #define DCTLINFO_V2_W2_AMSDU_MAX_LEN GENMASK(26, 24) |
404 | #define DCTLINFO_V2_W2_STA_AMSDU_EN BIT(27) |
405 | #define DCTLINFO_V2_W2_CHKSUM_OFLD_EN BIT(28) |
406 | #define DCTLINFO_V2_W2_WITH_LLC BIT(29) |
407 | #define DCTLINFO_V2_W2_NAT25_EN BIT(30) |
408 | #define DCTLINFO_V2_W2_IS_MLD BIT(31) |
409 | #define DCTLINFO_V2_W2_ALL GENMASK(31, 0) |
410 | #define DCTLINFO_V2_W3_SEQ2 GENMASK(11, 0) |
411 | #define DCTLINFO_V2_W3_SEQ3 GENMASK(23, 12) |
412 | #define DCTLINFO_V2_W3_TGT_IND GENMASK(27, 24) |
413 | #define DCTLINFO_V2_W3_TGT_IND_EN BIT(28) |
414 | #define DCTLINFO_V2_W3_HTC_LB GENMASK(31, 29) |
415 | #define DCTLINFO_V2_W3_ALL GENMASK(31, 0) |
416 | #define DCTLINFO_V2_W4_VLAN_TAG_SEL GENMASK(7, 5) |
417 | #define DCTLINFO_V2_W4_HTC_ORDER BIT(8) |
418 | #define DCTLINFO_V2_W4_SEC_KEY_ID GENMASK(10, 9) |
419 | #define DCTLINFO_V2_W4_VLAN_RX_DYNAMIC_PCP_EN BIT(11) |
420 | #define DCTLINFO_V2_W4_VLAN_RX_PKT_DROP BIT(12) |
421 | #define DCTLINFO_V2_W4_VLAN_RX_VALID BIT(13) |
422 | #define DCTLINFO_V2_W4_VLAN_TX_VALID BIT(14) |
423 | #define DCTLINFO_V2_W4_WAPI BIT(15) |
424 | #define DCTLINFO_V2_W4_SEC_ENT_MODE GENMASK(17, 16) |
425 | #define DCTLINFO_V2_W4_SEC_ENT0_KEYID GENMASK(19, 18) |
426 | #define DCTLINFO_V2_W4_SEC_ENT1_KEYID GENMASK(21, 20) |
427 | #define DCTLINFO_V2_W4_SEC_ENT2_KEYID GENMASK(23, 22) |
428 | #define DCTLINFO_V2_W4_SEC_ENT3_KEYID GENMASK(25, 24) |
429 | #define DCTLINFO_V2_W4_SEC_ENT4_KEYID GENMASK(27, 26) |
430 | #define DCTLINFO_V2_W4_SEC_ENT5_KEYID GENMASK(29, 28) |
431 | #define DCTLINFO_V2_W4_SEC_ENT6_KEYID GENMASK(31, 30) |
432 | #define DCTLINFO_V2_W4_ALL GENMASK(31, 5) |
433 | #define DCTLINFO_V2_W5_SEC_ENT7_KEYID GENMASK(1, 0) |
434 | #define DCTLINFO_V2_W5_SEC_ENT8_KEYID GENMASK(3, 2) |
435 | #define DCTLINFO_V2_W5_SEC_ENT_VALID_V1 GENMASK(23, 8) |
436 | #define DCTLINFO_V2_W5_SEC_ENT0_V1 GENMASK(31, 24) |
437 | #define DCTLINFO_V2_W5_ALL (GENMASK(31, 8) | GENMASK(3, 0)) |
438 | #define DCTLINFO_V2_W6_SEC_ENT1_V1 GENMASK(7, 0) |
439 | #define DCTLINFO_V2_W6_SEC_ENT2_V1 GENMASK(15, 8) |
440 | #define DCTLINFO_V2_W6_SEC_ENT3_V1 GENMASK(23, 16) |
441 | #define DCTLINFO_V2_W6_SEC_ENT4_V1 GENMASK(31, 24) |
442 | #define DCTLINFO_V2_W6_ALL GENMASK(31, 0) |
443 | #define DCTLINFO_V2_W7_SEC_ENT5_V1 GENMASK(7, 0) |
444 | #define DCTLINFO_V2_W7_SEC_ENT6_V1 GENMASK(15, 8) |
445 | #define DCTLINFO_V2_W7_SEC_ENT7 GENMASK(23, 16) |
446 | #define DCTLINFO_V2_W7_SEC_ENT8 GENMASK(31, 24) |
447 | #define DCTLINFO_V2_W7_ALL GENMASK(31, 0) |
448 | #define DCTLINFO_V2_W8_MLD_SMA_L_V1 GENMASK(31, 0) |
449 | #define DCTLINFO_V2_W8_ALL GENMASK(31, 0) |
450 | #define DCTLINFO_V2_W9_MLD_SMA_H_V1 GENMASK(15, 0) |
451 | #define DCTLINFO_V2_W9_MLD_TMA_L_V1 GENMASK(31, 16) |
452 | #define DCTLINFO_V2_W9_ALL GENMASK(31, 0) |
453 | #define DCTLINFO_V2_W10_MLD_TMA_H_V1 GENMASK(31, 0) |
454 | #define DCTLINFO_V2_W10_ALL GENMASK(31, 0) |
455 | #define DCTLINFO_V2_W11_MLD_TA_BSSID_L_V1 GENMASK(31, 0) |
456 | #define DCTLINFO_V2_W11_ALL GENMASK(31, 0) |
457 | #define DCTLINFO_V2_W12_MLD_TA_BSSID_H_V1 GENMASK(15, 0) |
458 | #define DCTLINFO_V2_W12_ALL GENMASK(15, 0) |
459 | |
460 | int rtw89_cam_init(struct rtw89_dev *rtwdev, struct rtw89_vif *vif); |
461 | void rtw89_cam_deinit(struct rtw89_dev *rtwdev, struct rtw89_vif *vif); |
462 | int rtw89_cam_init_addr_cam(struct rtw89_dev *rtwdev, |
463 | struct rtw89_addr_cam_entry *addr_cam, |
464 | const struct rtw89_bssid_cam_entry *bssid_cam); |
465 | void rtw89_cam_deinit_addr_cam(struct rtw89_dev *rtwdev, |
466 | struct rtw89_addr_cam_entry *addr_cam); |
467 | int rtw89_cam_init_bssid_cam(struct rtw89_dev *rtwdev, |
468 | struct rtw89_vif *rtwvif, |
469 | struct rtw89_bssid_cam_entry *bssid_cam, |
470 | const u8 *bssid); |
471 | void rtw89_cam_deinit_bssid_cam(struct rtw89_dev *rtwdev, |
472 | struct rtw89_bssid_cam_entry *bssid_cam); |
473 | void rtw89_cam_fill_addr_cam_info(struct rtw89_dev *rtwdev, |
474 | struct rtw89_vif *vif, |
475 | struct rtw89_sta *rtwsta, |
476 | const u8 *scan_mac_addr, u8 *cmd); |
477 | void rtw89_cam_fill_dctl_sec_cam_info_v1(struct rtw89_dev *rtwdev, |
478 | struct rtw89_vif *rtwvif, |
479 | struct rtw89_sta *rtwsta, |
480 | u8 *cmd); |
481 | void rtw89_cam_fill_dctl_sec_cam_info_v2(struct rtw89_dev *rtwdev, |
482 | struct rtw89_vif *rtwvif, |
483 | struct rtw89_sta *rtwsta, |
484 | struct rtw89_h2c_dctlinfo_ud_v2 *h2c); |
485 | int rtw89_cam_fill_bssid_cam_info(struct rtw89_dev *rtwdev, |
486 | struct rtw89_vif *rtwvif, |
487 | struct rtw89_sta *rtwsta, u8 *cmd); |
488 | int rtw89_cam_sec_key_add(struct rtw89_dev *rtwdev, |
489 | struct ieee80211_vif *vif, |
490 | struct ieee80211_sta *sta, |
491 | struct ieee80211_key_conf *key); |
492 | int rtw89_cam_sec_key_del(struct rtw89_dev *rtwdev, |
493 | struct ieee80211_vif *vif, |
494 | struct ieee80211_sta *sta, |
495 | struct ieee80211_key_conf *key, |
496 | bool inform_fw); |
497 | void rtw89_cam_bssid_changed(struct rtw89_dev *rtwdev, |
498 | struct rtw89_vif *rtwvif); |
499 | void rtw89_cam_reset_keys(struct rtw89_dev *rtwdev); |
500 | #endif |
501 | |