1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2/* Copyright(c) 2019-2020 Realtek Corporation
3 */
4
5#ifndef __RTW89_COEX_H__
6#define __RTW89_COEX_H__
7
8#include "core.h"
9
10#define BTC_H2C_MAXLEN 2020
11
12enum btc_mode {
13 BTC_MODE_NORMAL,
14 BTC_MODE_WL,
15 BTC_MODE_BT,
16 BTC_MODE_WLOFF,
17 BTC_MODE_MAX
18};
19
20enum btc_wl_rfk_type {
21 BTC_WRFKT_IQK = 0,
22 BTC_WRFKT_LCK = 1,
23 BTC_WRFKT_DPK = 2,
24 BTC_WRFKT_TXGAPK = 3,
25 BTC_WRFKT_DACK = 4,
26 BTC_WRFKT_RXDCK = 5,
27 BTC_WRFKT_TSSI = 6,
28 BTC_WRFKT_CHLK = 7,
29};
30
31#define NM_EXEC false
32#define FC_EXEC true
33
34#define RTW89_COEX_ACT1_WORK_PERIOD round_jiffies_relative(HZ * 4)
35#define RTW89_COEX_BT_DEVINFO_WORK_PERIOD round_jiffies_relative(HZ * 16)
36#define RTW89_COEX_RFK_CHK_WORK_PERIOD msecs_to_jiffies(300)
37#define BTC_RFK_PATH_MAP GENMASK(3, 0)
38#define BTC_RFK_PHY_MAP GENMASK(5, 4)
39#define BTC_RFK_BAND_MAP GENMASK(7, 6)
40
41enum btc_wl_rfk_state {
42 BTC_WRFK_STOP = 0,
43 BTC_WRFK_START = 1,
44 BTC_WRFK_ONESHOT_START = 2,
45 BTC_WRFK_ONESHOT_STOP = 3,
46};
47
48enum btc_pri {
49 BTC_PRI_MASK_RX_RESP = 0,
50 BTC_PRI_MASK_TX_RESP,
51 BTC_PRI_MASK_BEACON,
52 BTC_PRI_MASK_RX_CCK,
53 BTC_PRI_MASK_TX_MNGQ,
54 BTC_PRI_MASK_MAX,
55};
56
57enum btc_bt_trs {
58 BTC_BT_SS_GROUP = 0x0,
59 BTC_BT_TX_GROUP = 0x2,
60 BTC_BT_RX_GROUP = 0x3,
61 BTC_BT_MAX_GROUP,
62};
63
64enum btc_rssi_st {
65 BTC_RSSI_ST_LOW = 0x0,
66 BTC_RSSI_ST_HIGH,
67 BTC_RSSI_ST_STAY_LOW,
68 BTC_RSSI_ST_STAY_HIGH,
69 BTC_RSSI_ST_MAX
70};
71
72enum btc_fddt_en {
73 BTC_FDDT_DISABLE,
74 BTC_FDDT_ENABLE,
75};
76
77#define BTC_RSSI_HIGH(_rssi_) \
78 ({typeof(_rssi_) __rssi = (_rssi_); \
79 ((__rssi == BTC_RSSI_ST_HIGH || \
80 __rssi == BTC_RSSI_ST_STAY_HIGH) ? 1 : 0); })
81
82#define BTC_RSSI_LOW(_rssi_) \
83 ({typeof(_rssi_) __rssi = (_rssi_); \
84 ((__rssi == BTC_RSSI_ST_LOW || \
85 __rssi == BTC_RSSI_ST_STAY_LOW) ? 1 : 0); })
86
87#define BTC_RSSI_CHANGE(_rssi_) \
88 ({typeof(_rssi_) __rssi = (_rssi_); \
89 ((__rssi == BTC_RSSI_ST_LOW || \
90 __rssi == BTC_RSSI_ST_HIGH) ? 1 : 0); })
91
92enum btc_ant {
93 BTC_ANT_SHARED = 0,
94 BTC_ANT_DEDICATED,
95 BTC_ANTTYPE_MAX
96};
97
98enum btc_bt_btg {
99 BTC_BT_ALONE = 0,
100 BTC_BT_BTG
101};
102
103enum btc_switch {
104 BTC_SWITCH_INTERNAL = 0,
105 BTC_SWITCH_EXTERNAL
106};
107
108enum btc_pkt_type {
109 PACKET_DHCP,
110 PACKET_ARP,
111 PACKET_EAPOL,
112 PACKET_EAPOL_END,
113 PACKET_ICMP,
114 PACKET_MAX
115};
116
117enum btc_bt_mailbox_id {
118 BTC_BTINFO_REPLY = 0x23,
119 BTC_BTINFO_AUTO = 0x27
120};
121
122enum btc_role_state {
123 BTC_ROLE_START,
124 BTC_ROLE_STOP,
125 BTC_ROLE_CHG_TYPE,
126 BTC_ROLE_MSTS_STA_CONN_START,
127 BTC_ROLE_MSTS_STA_CONN_END,
128 BTC_ROLE_MSTS_STA_DIS_CONN,
129 BTC_ROLE_MSTS_AP_START,
130 BTC_ROLE_MSTS_AP_STOP,
131 BTC_ROLE_STATE_UNKNOWN
132};
133
134enum btc_rfctrl {
135 BTC_RFCTRL_WL_OFF,
136 BTC_RFCTRL_WL_ON,
137 BTC_RFCTRL_LPS_WL_ON,
138 BTC_RFCTRL_FW_CTRL,
139 BTC_RFCTRL_MAX
140};
141
142enum btc_lps_state {
143 BTC_LPS_OFF = 0,
144 BTC_LPS_RF_OFF = 1,
145 BTC_LPS_RF_ON = 2
146};
147
148#define R_BTC_BB_BTG_RX 0x980
149#define R_BTC_BB_PRE_AGC_S1 0x476C
150#define R_BTC_BB_PRE_AGC_S0 0x4688
151
152#define B_BTC_BB_GNT_MUX GENMASK(20, 17)
153#define B_BTC_BB_PRE_AGC_MASK GENMASK(31, 24)
154#define B_BTC_BB_PRE_AGC_VAL BIT(31)
155
156#define BTC_REG_NOTFOUND 0xff
157
158#define R_BTC_ZB_COEX_TBL_0 0xE328
159#define R_BTC_ZB_COEX_TBL_1 0xE32c
160#define R_BTC_ZB_BREAK_TBL 0xE350
161
162enum btc_ant_div_pos {
163 BTC_ANT_DIV_MAIN = 0,
164 BTC_ANT_DIV_AUX = 1,
165};
166
167enum btc_get_reg_status {
168 BTC_CSTATUS_TXDIV_POS = 0,
169 BTC_CSTATUS_RXDIV_POS = 1,
170 BTC_CSTATUS_BB_GNT_MUX = 2,
171 BTC_CSTATUS_BB_GNT_MUX_MON = 3,
172 BTC_CSTATUS_BB_PRE_AGC = 4,
173 BTC_CSTATUS_BB_PRE_AGC_MON = 5,
174};
175
176enum btc_preagc_type {
177 BTC_PREAGC_DISABLE,
178 BTC_PREAGC_ENABLE,
179 BTC_PREAGC_BB_FWCTRL,
180 BTC_PREAGC_NOTFOUND,
181};
182
183enum btc_btgctrl_type {
184 BTC_BTGCTRL_DISABLE,
185 BTC_BTGCTRL_ENABLE,
186 BTC_BTGCTRL_BB_GNT_FWCTRL,
187 BTC_BTGCTRL_BB_GNT_NOTFOUND,
188};
189
190enum btc_wa_type {
191 BTC_WA_5G_HI_CH_RX = BIT(0),
192 BTC_WA_NULL_AP = BIT(1),
193 BTC_WA_HFP_ZB = BIT(2), /* HFP PTA req bit4 define issue */
194};
195
196enum btc_3cx_type {
197 BTC_3CX_NONE = 0,
198 BTC_3CX_BT2 = BIT(0),
199 BTC_3CX_ZB = BIT(1),
200 BTC_3CX_LTE = BIT(2),
201 BTC_3CX_MAX,
202};
203
204void rtw89_btc_ntfy_poweron(struct rtw89_dev *rtwdev);
205void rtw89_btc_ntfy_poweroff(struct rtw89_dev *rtwdev);
206void rtw89_btc_ntfy_init(struct rtw89_dev *rtwdev, u8 mode);
207void rtw89_btc_ntfy_scan_start(struct rtw89_dev *rtwdev, u8 phy_idx, u8 band);
208void rtw89_btc_ntfy_scan_finish(struct rtw89_dev *rtwdev, u8 phy_idx);
209void rtw89_btc_ntfy_switch_band(struct rtw89_dev *rtwdev, u8 phy_idx, u8 band);
210void rtw89_btc_ntfy_specific_packet(struct rtw89_dev *rtwdev,
211 enum btc_pkt_type pkt_type);
212void rtw89_btc_ntfy_eapol_packet_work(struct work_struct *work);
213void rtw89_btc_ntfy_arp_packet_work(struct work_struct *work);
214void rtw89_btc_ntfy_dhcp_packet_work(struct work_struct *work);
215void rtw89_btc_ntfy_icmp_packet_work(struct work_struct *work);
216void rtw89_btc_ntfy_role_info(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
217 struct rtw89_sta *rtwsta, enum btc_role_state state);
218void rtw89_btc_ntfy_radio_state(struct rtw89_dev *rtwdev, enum btc_rfctrl rf_state);
219void rtw89_btc_ntfy_wl_rfk(struct rtw89_dev *rtwdev, u8 phy_map,
220 enum btc_wl_rfk_type type,
221 enum btc_wl_rfk_state state);
222void rtw89_btc_ntfy_wl_sta(struct rtw89_dev *rtwdev);
223void rtw89_btc_c2h_handle(struct rtw89_dev *rtwdev, struct sk_buff *skb,
224 u32 len, u8 class, u8 func);
225void rtw89_btc_dump_info(struct rtw89_dev *rtwdev, struct seq_file *m);
226void rtw89_coex_act1_work(struct work_struct *work);
227void rtw89_coex_bt_devinfo_work(struct work_struct *work);
228void rtw89_coex_rfk_chk_work(struct work_struct *work);
229void rtw89_coex_power_on(struct rtw89_dev *rtwdev);
230void rtw89_btc_set_policy(struct rtw89_dev *rtwdev, u16 policy_type);
231void rtw89_btc_set_policy_v1(struct rtw89_dev *rtwdev, u16 policy_type);
232void rtw89_coex_recognize_ver(struct rtw89_dev *rtwdev);
233
234static inline u8 rtw89_btc_phymap(struct rtw89_dev *rtwdev,
235 enum rtw89_phy_idx phy_idx,
236 enum rtw89_rf_path_bit paths)
237{
238 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, idx: RTW89_SUB_ENTITY_0);
239 u8 phy_map;
240
241 phy_map = FIELD_PREP(BTC_RFK_PATH_MAP, paths) |
242 FIELD_PREP(BTC_RFK_PHY_MAP, BIT(phy_idx)) |
243 FIELD_PREP(BTC_RFK_BAND_MAP, chan->band_type);
244
245 return phy_map;
246}
247
248static inline u8 rtw89_btc_path_phymap(struct rtw89_dev *rtwdev,
249 enum rtw89_phy_idx phy_idx,
250 enum rtw89_rf_path path)
251{
252 return rtw89_btc_phymap(rtwdev, phy_idx, BIT(path));
253}
254
255/* return bt req len in TU */
256static inline u16 rtw89_coex_query_bt_req_len(struct rtw89_dev *rtwdev,
257 enum rtw89_phy_idx phy_idx)
258{
259 struct rtw89_btc *btc = &rtwdev->btc;
260
261 return btc->bt_req_len;
262}
263
264#endif
265

source code of linux/drivers/net/wireless/realtek/rtw89/coex.h