1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * Pinctrl for Cirrus Logic CS47L85 |
4 | * |
5 | * Copyright (C) 2016-2017 Cirrus Logic |
6 | */ |
7 | |
8 | #include <linux/err.h> |
9 | #include <linux/mfd/madera/core.h> |
10 | |
11 | #include "pinctrl-madera.h" |
12 | |
13 | /* |
14 | * The alt func groups are the most commonly used functions we place these at |
15 | * the lower function indexes for convenience, and the less commonly used gpio |
16 | * functions at higher indexes. |
17 | * |
18 | * To stay consistent with the datasheet the function names are the same as |
19 | * the group names for that function's pins |
20 | * |
21 | * Note - all 1 less than in datasheet because these are zero-indexed |
22 | */ |
23 | static const unsigned int cs47l85_mif1_pins[] = { 8, 9 }; |
24 | static const unsigned int cs47l85_mif2_pins[] = { 10, 11 }; |
25 | static const unsigned int cs47l85_mif3_pins[] = { 12, 13 }; |
26 | static const unsigned int cs47l85_aif1_pins[] = { 14, 15, 16, 17 }; |
27 | static const unsigned int cs47l85_aif2_pins[] = { 18, 19, 20, 21 }; |
28 | static const unsigned int cs47l85_aif3_pins[] = { 22, 23, 24, 25 }; |
29 | static const unsigned int cs47l85_aif4_pins[] = { 26, 27, 28, 29 }; |
30 | static const unsigned int cs47l85_dmic4_pins[] = { 30, 31 }; |
31 | static const unsigned int cs47l85_dmic5_pins[] = { 32, 33 }; |
32 | static const unsigned int cs47l85_dmic6_pins[] = { 34, 35 }; |
33 | static const unsigned int cs47l85_spk1_pins[] = { 36, 38 }; |
34 | static const unsigned int cs47l85_spk2_pins[] = { 37, 39 }; |
35 | |
36 | static const struct madera_pin_groups cs47l85_pin_groups[] = { |
37 | { "aif1" , cs47l85_aif1_pins, ARRAY_SIZE(cs47l85_aif1_pins) }, |
38 | { "aif2" , cs47l85_aif2_pins, ARRAY_SIZE(cs47l85_aif2_pins) }, |
39 | { "aif3" , cs47l85_aif3_pins, ARRAY_SIZE(cs47l85_aif3_pins) }, |
40 | { "aif4" , cs47l85_aif4_pins, ARRAY_SIZE(cs47l85_aif4_pins) }, |
41 | { "mif1" , cs47l85_mif1_pins, ARRAY_SIZE(cs47l85_mif1_pins) }, |
42 | { "mif2" , cs47l85_mif2_pins, ARRAY_SIZE(cs47l85_mif2_pins) }, |
43 | { "mif3" , cs47l85_mif3_pins, ARRAY_SIZE(cs47l85_mif3_pins) }, |
44 | { "dmic4" , cs47l85_dmic4_pins, ARRAY_SIZE(cs47l85_dmic4_pins) }, |
45 | { "dmic5" , cs47l85_dmic5_pins, ARRAY_SIZE(cs47l85_dmic5_pins) }, |
46 | { "dmic6" , cs47l85_dmic6_pins, ARRAY_SIZE(cs47l85_dmic6_pins) }, |
47 | { "pdmspk1" , cs47l85_spk1_pins, ARRAY_SIZE(cs47l85_spk1_pins) }, |
48 | { "pdmspk2" , cs47l85_spk2_pins, ARRAY_SIZE(cs47l85_spk2_pins) }, |
49 | }; |
50 | |
51 | const struct madera_pin_chip cs47l85_pin_chip = { |
52 | .n_pins = CS47L85_NUM_GPIOS, |
53 | .pin_groups = cs47l85_pin_groups, |
54 | .n_pin_groups = ARRAY_SIZE(cs47l85_pin_groups), |
55 | }; |
56 | |