1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * Copyright 2019~2020 NXP |
4 | */ |
5 | |
6 | #include <dt-bindings/pinctrl/pads-imx8dxl.h> |
7 | #include <linux/err.h> |
8 | #include <linux/firmware/imx/sci.h> |
9 | #include <linux/init.h> |
10 | #include <linux/io.h> |
11 | #include <linux/mod_devicetable.h> |
12 | #include <linux/module.h> |
13 | #include <linux/pinctrl/pinctrl.h> |
14 | #include <linux/platform_device.h> |
15 | |
16 | #include "pinctrl-imx.h" |
17 | |
18 | static const struct pinctrl_pin_desc imx8dxl_pinctrl_pads[] = { |
19 | IMX_PINCTRL_PIN(IMX8DXL_PCIE_CTRL0_PERST_B), |
20 | IMX_PINCTRL_PIN(IMX8DXL_PCIE_CTRL0_CLKREQ_B), |
21 | IMX_PINCTRL_PIN(IMX8DXL_PCIE_CTRL0_WAKE_B), |
22 | IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_PCIESEP), |
23 | IMX_PINCTRL_PIN(IMX8DXL_USB_SS3_TC0), |
24 | IMX_PINCTRL_PIN(IMX8DXL_USB_SS3_TC1), |
25 | IMX_PINCTRL_PIN(IMX8DXL_USB_SS3_TC2), |
26 | IMX_PINCTRL_PIN(IMX8DXL_USB_SS3_TC3), |
27 | IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_3V3_USB3IO), |
28 | IMX_PINCTRL_PIN(IMX8DXL_EMMC0_CLK), |
29 | IMX_PINCTRL_PIN(IMX8DXL_EMMC0_CMD), |
30 | IMX_PINCTRL_PIN(IMX8DXL_EMMC0_DATA0), |
31 | IMX_PINCTRL_PIN(IMX8DXL_EMMC0_DATA1), |
32 | IMX_PINCTRL_PIN(IMX8DXL_EMMC0_DATA2), |
33 | IMX_PINCTRL_PIN(IMX8DXL_EMMC0_DATA3), |
34 | IMX_PINCTRL_PIN(IMX8DXL_EMMC0_DATA4), |
35 | IMX_PINCTRL_PIN(IMX8DXL_EMMC0_DATA5), |
36 | IMX_PINCTRL_PIN(IMX8DXL_EMMC0_DATA6), |
37 | IMX_PINCTRL_PIN(IMX8DXL_EMMC0_DATA7), |
38 | IMX_PINCTRL_PIN(IMX8DXL_EMMC0_STROBE), |
39 | IMX_PINCTRL_PIN(IMX8DXL_EMMC0_RESET_B), |
40 | IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_SD1FIX0), |
41 | IMX_PINCTRL_PIN(IMX8DXL_USDHC1_RESET_B), |
42 | IMX_PINCTRL_PIN(IMX8DXL_USDHC1_VSELECT), |
43 | IMX_PINCTRL_PIN(IMX8DXL_CTL_NAND_RE_P_N), |
44 | IMX_PINCTRL_PIN(IMX8DXL_USDHC1_WP), |
45 | IMX_PINCTRL_PIN(IMX8DXL_USDHC1_CD_B), |
46 | IMX_PINCTRL_PIN(IMX8DXL_CTL_NAND_DQS_P_N), |
47 | IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_VSELSEP), |
48 | IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_TXC), |
49 | IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_TX_CTL), |
50 | IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_TXD0), |
51 | IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_TXD1), |
52 | IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_TXD2), |
53 | IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_TXD3), |
54 | IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0), |
55 | IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_RXC), |
56 | IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_RX_CTL), |
57 | IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_RXD0), |
58 | IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_RXD1), |
59 | IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_RXD2), |
60 | IMX_PINCTRL_PIN(IMX8DXL_ENET0_RGMII_RXD3), |
61 | IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1), |
62 | IMX_PINCTRL_PIN(IMX8DXL_ENET0_REFCLK_125M_25M), |
63 | IMX_PINCTRL_PIN(IMX8DXL_ENET0_MDIO), |
64 | IMX_PINCTRL_PIN(IMX8DXL_ENET0_MDC), |
65 | IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_GPIOCT), |
66 | IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_TXC), |
67 | IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_TXD2), |
68 | IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_TX_CTL), |
69 | IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_TXD3), |
70 | IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_RXC), |
71 | IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_RXD3), |
72 | IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_RXD2), |
73 | IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_RXD1), |
74 | IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_TXD0), |
75 | IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_TXD1), |
76 | IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_RXD0), |
77 | IMX_PINCTRL_PIN(IMX8DXL_ENET1_RGMII_RX_CTL), |
78 | IMX_PINCTRL_PIN(IMX8DXL_ENET1_REFCLK_125M_25M), |
79 | IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_GPIORHB), |
80 | IMX_PINCTRL_PIN(IMX8DXL_SPI3_SCK), |
81 | IMX_PINCTRL_PIN(IMX8DXL_SPI3_SDO), |
82 | IMX_PINCTRL_PIN(IMX8DXL_SPI3_SDI), |
83 | IMX_PINCTRL_PIN(IMX8DXL_SPI3_CS0), |
84 | IMX_PINCTRL_PIN(IMX8DXL_SPI3_CS1), |
85 | IMX_PINCTRL_PIN(IMX8DXL_MCLK_IN1), |
86 | IMX_PINCTRL_PIN(IMX8DXL_MCLK_IN0), |
87 | IMX_PINCTRL_PIN(IMX8DXL_MCLK_OUT0), |
88 | IMX_PINCTRL_PIN(IMX8DXL_UART1_TX), |
89 | IMX_PINCTRL_PIN(IMX8DXL_UART1_RX), |
90 | IMX_PINCTRL_PIN(IMX8DXL_UART1_RTS_B), |
91 | IMX_PINCTRL_PIN(IMX8DXL_UART1_CTS_B), |
92 | IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_GPIORHK), |
93 | IMX_PINCTRL_PIN(IMX8DXL_SPI0_SCK), |
94 | IMX_PINCTRL_PIN(IMX8DXL_SPI0_SDI), |
95 | IMX_PINCTRL_PIN(IMX8DXL_SPI0_SDO), |
96 | IMX_PINCTRL_PIN(IMX8DXL_SPI0_CS1), |
97 | IMX_PINCTRL_PIN(IMX8DXL_SPI0_CS0), |
98 | IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_GPIORHT), |
99 | IMX_PINCTRL_PIN(IMX8DXL_ADC_IN1), |
100 | IMX_PINCTRL_PIN(IMX8DXL_ADC_IN0), |
101 | IMX_PINCTRL_PIN(IMX8DXL_ADC_IN3), |
102 | IMX_PINCTRL_PIN(IMX8DXL_ADC_IN2), |
103 | IMX_PINCTRL_PIN(IMX8DXL_ADC_IN5), |
104 | IMX_PINCTRL_PIN(IMX8DXL_ADC_IN4), |
105 | IMX_PINCTRL_PIN(IMX8DXL_FLEXCAN0_RX), |
106 | IMX_PINCTRL_PIN(IMX8DXL_FLEXCAN0_TX), |
107 | IMX_PINCTRL_PIN(IMX8DXL_FLEXCAN1_RX), |
108 | IMX_PINCTRL_PIN(IMX8DXL_FLEXCAN1_TX), |
109 | IMX_PINCTRL_PIN(IMX8DXL_FLEXCAN2_RX), |
110 | IMX_PINCTRL_PIN(IMX8DXL_FLEXCAN2_TX), |
111 | IMX_PINCTRL_PIN(IMX8DXL_UART0_RX), |
112 | IMX_PINCTRL_PIN(IMX8DXL_UART0_TX), |
113 | IMX_PINCTRL_PIN(IMX8DXL_UART2_TX), |
114 | IMX_PINCTRL_PIN(IMX8DXL_UART2_RX), |
115 | IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_GPIOLH), |
116 | IMX_PINCTRL_PIN(IMX8DXL_JTAG_TRST_B), |
117 | IMX_PINCTRL_PIN(IMX8DXL_PMIC_I2C_SCL), |
118 | IMX_PINCTRL_PIN(IMX8DXL_PMIC_I2C_SDA), |
119 | IMX_PINCTRL_PIN(IMX8DXL_PMIC_INT_B), |
120 | IMX_PINCTRL_PIN(IMX8DXL_SCU_GPIO0_00), |
121 | IMX_PINCTRL_PIN(IMX8DXL_SCU_GPIO0_01), |
122 | IMX_PINCTRL_PIN(IMX8DXL_SCU_PMIC_STANDBY), |
123 | IMX_PINCTRL_PIN(IMX8DXL_SCU_BOOT_MODE1), |
124 | IMX_PINCTRL_PIN(IMX8DXL_SCU_BOOT_MODE0), |
125 | IMX_PINCTRL_PIN(IMX8DXL_SCU_BOOT_MODE2), |
126 | IMX_PINCTRL_PIN(IMX8DXL_SNVS_TAMPER_OUT1), |
127 | IMX_PINCTRL_PIN(IMX8DXL_SNVS_TAMPER_OUT2), |
128 | IMX_PINCTRL_PIN(IMX8DXL_SNVS_TAMPER_OUT3), |
129 | IMX_PINCTRL_PIN(IMX8DXL_SNVS_TAMPER_OUT4), |
130 | IMX_PINCTRL_PIN(IMX8DXL_SNVS_TAMPER_IN0), |
131 | IMX_PINCTRL_PIN(IMX8DXL_SNVS_TAMPER_IN1), |
132 | IMX_PINCTRL_PIN(IMX8DXL_SNVS_TAMPER_IN2), |
133 | IMX_PINCTRL_PIN(IMX8DXL_SNVS_TAMPER_IN3), |
134 | IMX_PINCTRL_PIN(IMX8DXL_SPI1_SCK), |
135 | IMX_PINCTRL_PIN(IMX8DXL_SPI1_SDO), |
136 | IMX_PINCTRL_PIN(IMX8DXL_SPI1_SDI), |
137 | IMX_PINCTRL_PIN(IMX8DXL_SPI1_CS0), |
138 | IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_GPIORHD), |
139 | IMX_PINCTRL_PIN(IMX8DXL_QSPI0A_DATA1), |
140 | IMX_PINCTRL_PIN(IMX8DXL_QSPI0A_DATA0), |
141 | IMX_PINCTRL_PIN(IMX8DXL_QSPI0A_DATA3), |
142 | IMX_PINCTRL_PIN(IMX8DXL_QSPI0A_DATA2), |
143 | IMX_PINCTRL_PIN(IMX8DXL_QSPI0A_SS0_B), |
144 | IMX_PINCTRL_PIN(IMX8DXL_QSPI0A_DQS), |
145 | IMX_PINCTRL_PIN(IMX8DXL_QSPI0A_SCLK), |
146 | IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_QSPI0A), |
147 | IMX_PINCTRL_PIN(IMX8DXL_QSPI0B_SCLK), |
148 | IMX_PINCTRL_PIN(IMX8DXL_QSPI0B_DQS), |
149 | IMX_PINCTRL_PIN(IMX8DXL_QSPI0B_DATA1), |
150 | IMX_PINCTRL_PIN(IMX8DXL_QSPI0B_DATA0), |
151 | IMX_PINCTRL_PIN(IMX8DXL_QSPI0B_DATA3), |
152 | IMX_PINCTRL_PIN(IMX8DXL_QSPI0B_DATA2), |
153 | IMX_PINCTRL_PIN(IMX8DXL_QSPI0B_SS0_B), |
154 | IMX_PINCTRL_PIN(IMX8DXL_COMP_CTL_GPIO_1V8_3V3_QSPI0B) |
155 | }; |
156 | |
157 | |
158 | static const struct imx_pinctrl_soc_info imx8dxl_pinctrl_info = { |
159 | .pins = imx8dxl_pinctrl_pads, |
160 | .npins = ARRAY_SIZE(imx8dxl_pinctrl_pads), |
161 | .flags = IMX_USE_SCU, |
162 | .imx_pinconf_get = imx_pinconf_get_scu, |
163 | .imx_pinconf_set = imx_pinconf_set_scu, |
164 | .imx_pinctrl_parse_pin = imx_pinctrl_parse_pin_scu, |
165 | }; |
166 | |
167 | static const struct of_device_id imx8dxl_pinctrl_of_match[] = { |
168 | { .compatible = "fsl,imx8dxl-iomuxc" , }, |
169 | { /* sentinel */ } |
170 | }; |
171 | MODULE_DEVICE_TABLE(of, imx8dxl_pinctrl_of_match); |
172 | |
173 | static int imx8dxl_pinctrl_probe(struct platform_device *pdev) |
174 | { |
175 | int ret; |
176 | |
177 | ret = imx_pinctrl_sc_ipc_init(pdev); |
178 | if (ret) |
179 | return ret; |
180 | |
181 | return imx_pinctrl_probe(pdev, info: &imx8dxl_pinctrl_info); |
182 | } |
183 | |
184 | static struct platform_driver imx8dxl_pinctrl_driver = { |
185 | .driver = { |
186 | .name = "fsl,imx8dxl-iomuxc" , |
187 | .of_match_table = imx8dxl_pinctrl_of_match, |
188 | .suppress_bind_attrs = true, |
189 | }, |
190 | .probe = imx8dxl_pinctrl_probe, |
191 | }; |
192 | |
193 | static int __init imx8dxl_pinctrl_init(void) |
194 | { |
195 | return platform_driver_register(&imx8dxl_pinctrl_driver); |
196 | } |
197 | arch_initcall(imx8dxl_pinctrl_init); |
198 | |
199 | MODULE_AUTHOR("Anson Huang <Anson.Huang@nxp.com>" ); |
200 | MODULE_DESCRIPTION("NXP i.MX8DXL pinctrl driver" ); |
201 | MODULE_LICENSE("GPL v2" ); |
202 | |