1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * Copyright (C) 2020 |
4 | * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com> |
5 | */ |
6 | |
7 | #include <linux/err.h> |
8 | #include <linux/init.h> |
9 | #include <linux/of.h> |
10 | #include <linux/pinctrl/pinctrl.h> |
11 | #include <linux/platform_device.h> |
12 | |
13 | #include "pinctrl-imx.h" |
14 | |
15 | enum imxrt1050_pads { |
16 | IMXRT1050_PAD_RESERVE0, |
17 | IMXRT1050_PAD_RESERVE1, |
18 | IMXRT1050_PAD_RESERVE2, |
19 | IMXRT1050_PAD_RESERVE3, |
20 | IMXRT1050_PAD_RESERVE4, |
21 | IMXRT1050_PAD_EMC_00, |
22 | IMXRT1050_PAD_EMC_01, |
23 | IMXRT1050_PAD_EMC_02, |
24 | IMXRT1050_PAD_EMC_03, |
25 | IMXRT1050_PAD_EMC_04, |
26 | IMXRT1050_PAD_EMC_05, |
27 | IMXRT1050_PAD_EMC_06, |
28 | IMXRT1050_PAD_EMC_07, |
29 | IMXRT1050_PAD_EMC_08, |
30 | IMXRT1050_PAD_EMC_09, |
31 | IMXRT1050_PAD_EMC_10, |
32 | IMXRT1050_PAD_EMC_11, |
33 | IMXRT1050_PAD_EMC_12, |
34 | IMXRT1050_PAD_EMC_13, |
35 | IMXRT1050_PAD_EMC_14, |
36 | IMXRT1050_PAD_EMC_15, |
37 | IMXRT1050_PAD_EMC_16, |
38 | IMXRT1050_PAD_EMC_17, |
39 | IMXRT1050_PAD_EMC_18, |
40 | IMXRT1050_PAD_EMC_19, |
41 | IMXRT1050_PAD_EMC_20, |
42 | IMXRT1050_PAD_EMC_21, |
43 | IMXRT1050_PAD_EMC_22, |
44 | IMXRT1050_PAD_EMC_23, |
45 | IMXRT1050_PAD_EMC_24, |
46 | IMXRT1050_PAD_EMC_25, |
47 | IMXRT1050_PAD_EMC_26, |
48 | IMXRT1050_PAD_EMC_27, |
49 | IMXRT1050_PAD_EMC_28, |
50 | IMXRT1050_PAD_EMC_29, |
51 | IMXRT1050_PAD_EMC_30, |
52 | IMXRT1050_PAD_EMC_31, |
53 | IMXRT1050_PAD_EMC_32, |
54 | IMXRT1050_PAD_EMC_33, |
55 | IMXRT1050_PAD_EMC_34, |
56 | IMXRT1050_PAD_EMC_35, |
57 | IMXRT1050_PAD_EMC_36, |
58 | IMXRT1050_PAD_EMC_37, |
59 | IMXRT1050_PAD_EMC_38, |
60 | IMXRT1050_PAD_EMC_39, |
61 | IMXRT1050_PAD_EMC_40, |
62 | IMXRT1050_PAD_EMC_41, |
63 | IMXRT1050_PAD_AD_B0_00, |
64 | IMXRT1050_PAD_AD_B0_01, |
65 | IMXRT1050_PAD_AD_B0_02, |
66 | IMXRT1050_PAD_AD_B0_03, |
67 | IMXRT1050_PAD_AD_B0_04, |
68 | IMXRT1050_PAD_AD_B0_05, |
69 | IMXRT1050_PAD_AD_B0_06, |
70 | IMXRT1050_PAD_AD_B0_07, |
71 | IMXRT1050_PAD_AD_B0_08, |
72 | IMXRT1050_PAD_AD_B0_09, |
73 | IMXRT1050_PAD_AD_B0_10, |
74 | IMXRT1050_PAD_AD_B0_11, |
75 | IMXRT1050_PAD_AD_B0_12, |
76 | IMXRT1050_PAD_AD_B0_13, |
77 | IMXRT1050_PAD_AD_B0_14, |
78 | IMXRT1050_PAD_AD_B0_15, |
79 | IMXRT1050_PAD_AD_B1_00, |
80 | IMXRT1050_PAD_AD_B1_01, |
81 | IMXRT1050_PAD_AD_B1_02, |
82 | IMXRT1050_PAD_AD_B1_03, |
83 | IMXRT1050_PAD_AD_B1_04, |
84 | IMXRT1050_PAD_AD_B1_05, |
85 | IMXRT1050_PAD_AD_B1_06, |
86 | IMXRT1050_PAD_AD_B1_07, |
87 | IMXRT1050_PAD_AD_B1_08, |
88 | IMXRT1050_PAD_AD_B1_09, |
89 | IMXRT1050_PAD_AD_B1_10, |
90 | IMXRT1050_PAD_AD_B1_11, |
91 | IMXRT1050_PAD_AD_B1_12, |
92 | IMXRT1050_PAD_AD_B1_13, |
93 | IMXRT1050_PAD_AD_B1_14, |
94 | IMXRT1050_PAD_AD_B1_15, |
95 | IMXRT1050_PAD_B0_00, |
96 | IMXRT1050_PAD_B0_01, |
97 | IMXRT1050_PAD_B0_02, |
98 | IMXRT1050_PAD_B0_03, |
99 | IMXRT1050_PAD_B0_04, |
100 | IMXRT1050_PAD_B0_05, |
101 | IMXRT1050_PAD_B0_06, |
102 | IMXRT1050_PAD_B0_07, |
103 | IMXRT1050_PAD_B0_08, |
104 | IMXRT1050_PAD_B0_09, |
105 | IMXRT1050_PAD_B0_10, |
106 | IMXRT1050_PAD_B0_11, |
107 | IMXRT1050_PAD_B0_12, |
108 | IMXRT1050_PAD_B0_13, |
109 | IMXRT1050_PAD_B0_14, |
110 | IMXRT1050_PAD_B0_15, |
111 | IMXRT1050_PAD_B1_00, |
112 | IMXRT1050_PAD_B1_01, |
113 | IMXRT1050_PAD_B1_02, |
114 | IMXRT1050_PAD_B1_03, |
115 | IMXRT1050_PAD_B1_04, |
116 | IMXRT1050_PAD_B1_05, |
117 | IMXRT1050_PAD_B1_06, |
118 | IMXRT1050_PAD_B1_07, |
119 | IMXRT1050_PAD_B1_08, |
120 | IMXRT1050_PAD_B1_09, |
121 | IMXRT1050_PAD_B1_10, |
122 | IMXRT1050_PAD_B1_11, |
123 | IMXRT1050_PAD_B1_12, |
124 | IMXRT1050_PAD_B1_13, |
125 | IMXRT1050_PAD_B1_14, |
126 | IMXRT1050_PAD_B1_15, |
127 | IMXRT1050_PAD_SD_B0_00, |
128 | IMXRT1050_PAD_SD_B0_01, |
129 | IMXRT1050_PAD_SD_B0_02, |
130 | IMXRT1050_PAD_SD_B0_03, |
131 | IMXRT1050_PAD_SD_B0_04, |
132 | IMXRT1050_PAD_SD_B0_05, |
133 | IMXRT1050_PAD_SD_B1_00, |
134 | IMXRT1050_PAD_SD_B1_01, |
135 | IMXRT1050_PAD_SD_B1_02, |
136 | IMXRT1050_PAD_SD_B1_03, |
137 | IMXRT1050_PAD_SD_B1_04, |
138 | IMXRT1050_PAD_SD_B1_05, |
139 | IMXRT1050_PAD_SD_B1_06, |
140 | IMXRT1050_PAD_SD_B1_07, |
141 | IMXRT1050_PAD_SD_B1_08, |
142 | IMXRT1050_PAD_SD_B1_09, |
143 | IMXRT1050_PAD_SD_B1_10, |
144 | IMXRT1050_PAD_SD_B1_11, |
145 | }; |
146 | |
147 | /* Pad names for the pinmux subsystem */ |
148 | static const struct pinctrl_pin_desc imxrt1050_pinctrl_pads[] = { |
149 | IMX_PINCTRL_PIN(IMXRT1050_PAD_RESERVE0), |
150 | IMX_PINCTRL_PIN(IMXRT1050_PAD_RESERVE1), |
151 | IMX_PINCTRL_PIN(IMXRT1050_PAD_RESERVE2), |
152 | IMX_PINCTRL_PIN(IMXRT1050_PAD_RESERVE3), |
153 | IMX_PINCTRL_PIN(IMXRT1050_PAD_RESERVE4), |
154 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_00), |
155 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_01), |
156 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_02), |
157 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_03), |
158 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_04), |
159 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_05), |
160 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_06), |
161 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_07), |
162 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_08), |
163 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_09), |
164 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_10), |
165 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_11), |
166 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_12), |
167 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_13), |
168 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_14), |
169 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_15), |
170 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_16), |
171 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_17), |
172 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_18), |
173 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_19), |
174 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_20), |
175 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_21), |
176 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_22), |
177 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_23), |
178 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_24), |
179 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_25), |
180 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_26), |
181 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_27), |
182 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_28), |
183 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_29), |
184 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_30), |
185 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_31), |
186 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_32), |
187 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_33), |
188 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_34), |
189 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_35), |
190 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_36), |
191 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_37), |
192 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_38), |
193 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_39), |
194 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_40), |
195 | IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_41), |
196 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_00), |
197 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_01), |
198 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_02), |
199 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_03), |
200 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_04), |
201 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_05), |
202 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_06), |
203 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_07), |
204 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_08), |
205 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_09), |
206 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_10), |
207 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_11), |
208 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_12), |
209 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_13), |
210 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_14), |
211 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_15), |
212 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_00), |
213 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_01), |
214 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_02), |
215 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_03), |
216 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_04), |
217 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_05), |
218 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_06), |
219 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_07), |
220 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_08), |
221 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_09), |
222 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_10), |
223 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_11), |
224 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_12), |
225 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_13), |
226 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_14), |
227 | IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_15), |
228 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_00), |
229 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_01), |
230 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_02), |
231 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_03), |
232 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_04), |
233 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_05), |
234 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_06), |
235 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_07), |
236 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_08), |
237 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_09), |
238 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_10), |
239 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_11), |
240 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_12), |
241 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_13), |
242 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_14), |
243 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_15), |
244 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_00), |
245 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_01), |
246 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_02), |
247 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_03), |
248 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_04), |
249 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_05), |
250 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_06), |
251 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_07), |
252 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_08), |
253 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_09), |
254 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_10), |
255 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_11), |
256 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_12), |
257 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_13), |
258 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_14), |
259 | IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_15), |
260 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_00), |
261 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_01), |
262 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_02), |
263 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_03), |
264 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_04), |
265 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_05), |
266 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_00), |
267 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_01), |
268 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_02), |
269 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_03), |
270 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_04), |
271 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_05), |
272 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_06), |
273 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_07), |
274 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_08), |
275 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_09), |
276 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_10), |
277 | IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_11), |
278 | }; |
279 | |
280 | static const struct imx_pinctrl_soc_info imxrt1050_pinctrl_info = { |
281 | .pins = imxrt1050_pinctrl_pads, |
282 | .npins = ARRAY_SIZE(imxrt1050_pinctrl_pads), |
283 | .gpr_compatible = "fsl,imxrt1050-iomuxc-gpr" , |
284 | }; |
285 | |
286 | static const struct of_device_id imxrt1050_pinctrl_of_match[] = { |
287 | { .compatible = "fsl,imxrt1050-iomuxc" , .data = &imxrt1050_pinctrl_info, }, |
288 | { /* sentinel */ } |
289 | }; |
290 | |
291 | static int imxrt1050_pinctrl_probe(struct platform_device *pdev) |
292 | { |
293 | return imx_pinctrl_probe(pdev, info: &imxrt1050_pinctrl_info); |
294 | } |
295 | |
296 | static struct platform_driver imxrt1050_pinctrl_driver = { |
297 | .driver = { |
298 | .name = "imxrt1050-pinctrl" , |
299 | .of_match_table = of_match_ptr(imxrt1050_pinctrl_of_match), |
300 | .suppress_bind_attrs = true, |
301 | }, |
302 | .probe = imxrt1050_pinctrl_probe, |
303 | }; |
304 | |
305 | static int __init imxrt1050_pinctrl_init(void) |
306 | { |
307 | return platform_driver_register(&imxrt1050_pinctrl_driver); |
308 | } |
309 | arch_initcall(imxrt1050_pinctrl_init); |
310 | |