1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Intel Alder Lake PCH pinctrl/GPIO driver
4 *
5 * Copyright (C) 2020, 2022 Intel Corporation
6 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7 */
8
9#include <linux/mod_devicetable.h>
10#include <linux/module.h>
11#include <linux/platform_device.h>
12#include <linux/pm.h>
13
14#include <linux/pinctrl/pinctrl.h>
15
16#include "pinctrl-intel.h"
17
18#define ADL_N_PAD_OWN 0x020
19#define ADL_N_PADCFGLOCK 0x080
20#define ADL_N_HOSTSW_OWN 0x0b0
21#define ADL_N_GPI_IS 0x100
22#define ADL_N_GPI_IE 0x120
23
24#define ADL_S_PAD_OWN 0x0a0
25#define ADL_S_PADCFGLOCK 0x110
26#define ADL_S_HOSTSW_OWN 0x150
27#define ADL_S_GPI_IS 0x200
28#define ADL_S_GPI_IE 0x220
29
30#define ADL_GPP(r, s, e, g) \
31 { \
32 .reg_num = (r), \
33 .base = (s), \
34 .size = ((e) - (s) + 1), \
35 .gpio_base = (g), \
36 }
37
38#define ADL_N_COMMUNITY(b, s, e, g) \
39 INTEL_COMMUNITY_GPPS(b, s, e, g, ADL_N)
40
41#define ADL_S_COMMUNITY(b, s, e, g) \
42 INTEL_COMMUNITY_GPPS(b, s, e, g, ADL_S)
43
44/* Alder Lake-N */
45static const struct pinctrl_pin_desc adln_pins[] = {
46 /* GPP_B */
47 PINCTRL_PIN(0, "CORE_VID_0"),
48 PINCTRL_PIN(1, "CORE_VID_1"),
49 PINCTRL_PIN(2, "GPPC_B_2"),
50 PINCTRL_PIN(3, "GPPC_B_3"),
51 PINCTRL_PIN(4, "GPPC_B_4"),
52 PINCTRL_PIN(5, "GPPC_B_5"),
53 PINCTRL_PIN(6, "GPPC_B_6"),
54 PINCTRL_PIN(7, "GPPC_B_7"),
55 PINCTRL_PIN(8, "GPPC_B_8"),
56 PINCTRL_PIN(9, "GPPC_B_9"),
57 PINCTRL_PIN(10, "GPPC_B_10"),
58 PINCTRL_PIN(11, "GPPC_B_11"),
59 PINCTRL_PIN(12, "SLP_S0B"),
60 PINCTRL_PIN(13, "PLTRSTB"),
61 PINCTRL_PIN(14, "GPPC_B_14"),
62 PINCTRL_PIN(15, "GPPC_B_15"),
63 PINCTRL_PIN(16, "GPPC_B_16"),
64 PINCTRL_PIN(17, "GPPC_B_17"),
65 PINCTRL_PIN(18, "GPPC_B_18"),
66 PINCTRL_PIN(19, "GPPC_B_19"),
67 PINCTRL_PIN(20, "GPPC_B_20"),
68 PINCTRL_PIN(21, "GPPC_B_21"),
69 PINCTRL_PIN(22, "GPPC_B_22"),
70 PINCTRL_PIN(23, "GPPC_B_23"),
71 PINCTRL_PIN(24, "GSPI0_CLK_LOOPBK"),
72 PINCTRL_PIN(25, "GSPI1_CLK_LOOPBK"),
73 /* GPP_T */
74 PINCTRL_PIN(26, "GPPC_T_0"),
75 PINCTRL_PIN(27, "GPPC_T_1"),
76 PINCTRL_PIN(28, "FUSA_DIAGTEST_EN"),
77 PINCTRL_PIN(29, "FUSA_DIAGTEST_MODE"),
78 PINCTRL_PIN(30, "GPPC_T_4"),
79 PINCTRL_PIN(31, "GPPC_T_5"),
80 PINCTRL_PIN(32, "GPPC_T_6"),
81 PINCTRL_PIN(33, "GPPC_T_7"),
82 PINCTRL_PIN(34, "GPPC_T_8"),
83 PINCTRL_PIN(35, "GPPC_T_9"),
84 PINCTRL_PIN(36, "GPPC_T_10"),
85 PINCTRL_PIN(37, "GPPC_T_11"),
86 PINCTRL_PIN(38, "GPPC_T_12"),
87 PINCTRL_PIN(39, "GPPC_T_13"),
88 PINCTRL_PIN(40, "GPPC_T_14"),
89 PINCTRL_PIN(41, "GPPC_T_15"),
90 /* GPP_A */
91 PINCTRL_PIN(42, "ESPI_IO_0"),
92 PINCTRL_PIN(43, "ESPI_IO_1"),
93 PINCTRL_PIN(44, "ESPI_IO_2"),
94 PINCTRL_PIN(45, "ESPI_IO_3"),
95 PINCTRL_PIN(46, "ESPI_CS0B"),
96 PINCTRL_PIN(47, "ESPI_ALERT0B"),
97 PINCTRL_PIN(48, "ESPI_ALERT1B"),
98 PINCTRL_PIN(49, "GPPC_A_7"),
99 PINCTRL_PIN(50, "GPPC_A_8"),
100 PINCTRL_PIN(51, "ESPI_CLK"),
101 PINCTRL_PIN(52, "ESPI_RESETB"),
102 PINCTRL_PIN(53, "GPPC_A_11"),
103 PINCTRL_PIN(54, "GPPC_A_12"),
104 PINCTRL_PIN(55, "GPPC_A_13"),
105 PINCTRL_PIN(56, "GPPC_A_14"),
106 PINCTRL_PIN(57, "GPPC_A_15"),
107 PINCTRL_PIN(58, "GPPC_A_16"),
108 PINCTRL_PIN(59, "GPPC_A_17"),
109 PINCTRL_PIN(60, "GPPC_A_18"),
110 PINCTRL_PIN(61, "GPPC_A_19"),
111 PINCTRL_PIN(62, "GPPC_A_20"),
112 PINCTRL_PIN(63, "GPPC_A_21"),
113 PINCTRL_PIN(64, "GPPC_A_22"),
114 PINCTRL_PIN(65, "ESPI_CS1B"),
115 PINCTRL_PIN(66, "ESPI_CLK_LOOPBK"),
116 /* GPP_S */
117 PINCTRL_PIN(67, "GPP_S_0"),
118 PINCTRL_PIN(68, "GPP_S_1"),
119 PINCTRL_PIN(69, "GPP_S_2"),
120 PINCTRL_PIN(70, "GPP_S_3"),
121 PINCTRL_PIN(71, "GPP_S_4"),
122 PINCTRL_PIN(72, "GPP_S_5"),
123 PINCTRL_PIN(73, "GPP_S_6"),
124 PINCTRL_PIN(74, "GPP_S_7"),
125 /* GPP_I */
126 PINCTRL_PIN(75, "GPP_F_0_CNV_BRI_DT_UART0_RTSB"),
127 PINCTRL_PIN(76, "GPP_F_1_CNV_BRI_RSP_UART0_RXD"),
128 PINCTRL_PIN(77, "GPP_F_2_CNV_RGI_DT_UART0_TXD"),
129 PINCTRL_PIN(78, "GPP_F_3_CNV_RGI_RSP_UART0_CTSB"),
130 PINCTRL_PIN(79, "GPP_F_4_CNV_RF_RESET_B"),
131 PINCTRL_PIN(80, "GPP_F_5_MODEM_CLKREQ"),
132 PINCTRL_PIN(81, "GPP_F_6_CNV_PA_BLANKING"),
133 PINCTRL_PIN(82, "GPP_F_7_EMMC_CMD"),
134 PINCTRL_PIN(83, "GPP_F_8_EMMC_DATA0"),
135 PINCTRL_PIN(84, "GPP_F_9_EMMC_DATA1"),
136 PINCTRL_PIN(85, "GPP_F_10_EMMC_DATA2"),
137 PINCTRL_PIN(86, "GPP_F_11_EMMC_DATA3"),
138 PINCTRL_PIN(87, "GPP_F_12_EMMC_DATA4"),
139 PINCTRL_PIN(88, "GPP_F_13_EMMC_DATA5"),
140 PINCTRL_PIN(89, "GPP_F_14_EMMC_DATA6"),
141 PINCTRL_PIN(90, "GPP_F_15_EMMC_DATA7"),
142 PINCTRL_PIN(91, "GPP_F_16_EMMC_RCLK"),
143 PINCTRL_PIN(92, "GPP_F_17_EMMC_CLK"),
144 PINCTRL_PIN(93, "GPP_F_18_EMMC_RESETB"),
145 PINCTRL_PIN(94, "GPP_F_19_A4WP_PRESENT"),
146 /* GPP_H */
147 PINCTRL_PIN(95, "GPPC_H_0"),
148 PINCTRL_PIN(96, "GPPC_H_1"),
149 PINCTRL_PIN(97, "GPPC_H_2"),
150 PINCTRL_PIN(98, "GPPC_H_3"),
151 PINCTRL_PIN(99, "GPPC_H_4"),
152 PINCTRL_PIN(100, "GPPC_H_5"),
153 PINCTRL_PIN(101, "GPPC_H_6"),
154 PINCTRL_PIN(102, "GPPC_H_7"),
155 PINCTRL_PIN(103, "GPPC_H_8"),
156 PINCTRL_PIN(104, "GPPC_H_9"),
157 PINCTRL_PIN(105, "GPPC_H_10"),
158 PINCTRL_PIN(106, "GPPC_H_11"),
159 PINCTRL_PIN(107, "I2C7_SDA"),
160 PINCTRL_PIN(108, "I2C7_SCL"),
161 PINCTRL_PIN(109, "GPPC_H_14"),
162 PINCTRL_PIN(110, "GPPC_H_15"),
163 PINCTRL_PIN(111, "GPPC_H_16"),
164 PINCTRL_PIN(112, "GPPC_H_17"),
165 PINCTRL_PIN(113, "CPU_C10_GATEB"),
166 PINCTRL_PIN(114, "GPPC_H_19"),
167 PINCTRL_PIN(115, "GPPC_H_20"),
168 PINCTRL_PIN(116, "GPPC_H_21"),
169 PINCTRL_PIN(117, "GPPC_H_22"),
170 PINCTRL_PIN(118, "GPPC_H_23"),
171 /* GPP_D */
172 PINCTRL_PIN(119, "GPPC_D_0"),
173 PINCTRL_PIN(120, "GPPC_D_1"),
174 PINCTRL_PIN(121, "GPPC_D_2"),
175 PINCTRL_PIN(122, "GPPC_D_3"),
176 PINCTRL_PIN(123, "GPPC_D_4"),
177 PINCTRL_PIN(124, "GPPC_D_5"),
178 PINCTRL_PIN(125, "GPPC_D_6"),
179 PINCTRL_PIN(126, "GPPC_D_7"),
180 PINCTRL_PIN(127, "GPPC_D_8"),
181 PINCTRL_PIN(128, "BSSB_LS2_RX"),
182 PINCTRL_PIN(129, "BSSB_LS2_TX"),
183 PINCTRL_PIN(130, "BSSB_LS3_RX"),
184 PINCTRL_PIN(131, "BSSB_LS3_TX"),
185 PINCTRL_PIN(132, "GPPC_D_13"),
186 PINCTRL_PIN(133, "GPPC_D_14"),
187 PINCTRL_PIN(134, "GPPC_D_15"),
188 PINCTRL_PIN(135, "GPPC_D_16"),
189 PINCTRL_PIN(136, "GPPC_D_17"),
190 PINCTRL_PIN(137, "GPPC_D_18"),
191 PINCTRL_PIN(138, "GPPC_D_19"),
192 PINCTRL_PIN(139, "GSPI2_CLK_LOOPBK"),
193 /* vGPIO */
194 PINCTRL_PIN(140, "CNV_BTEN"),
195 PINCTRL_PIN(141, "CNV_BT_HOST_WAKEB"),
196 PINCTRL_PIN(142, "CNV_BT_IF_SELECT"),
197 PINCTRL_PIN(143, "vCNV_BT_UART_TXD"),
198 PINCTRL_PIN(144, "vCNV_BT_UART_RXD"),
199 PINCTRL_PIN(145, "vCNV_BT_UART_CTS_B"),
200 PINCTRL_PIN(146, "vCNV_BT_UART_RTS_B"),
201 PINCTRL_PIN(147, "vCNV_MFUART1_TXD"),
202 PINCTRL_PIN(148, "vCNV_MFUART1_RXD"),
203 PINCTRL_PIN(149, "vCNV_MFUART1_CTS_B"),
204 PINCTRL_PIN(150, "vCNV_MFUART1_RTS_B"),
205 PINCTRL_PIN(151, "vUART0_TXD"),
206 PINCTRL_PIN(152, "vUART0_RXD"),
207 PINCTRL_PIN(153, "vUART0_CTS_B"),
208 PINCTRL_PIN(154, "vUART0_RTS_B"),
209 PINCTRL_PIN(155, "vISH_UART0_TXD"),
210 PINCTRL_PIN(156, "vISH_UART0_RXD"),
211 PINCTRL_PIN(157, "vISH_UART0_CTS_B"),
212 PINCTRL_PIN(158, "vISH_UART0_RTS_B"),
213 PINCTRL_PIN(159, "vCNV_BT_I2S_BCLK"),
214 PINCTRL_PIN(160, "vCNV_BT_I2S_WS_SYNC"),
215 PINCTRL_PIN(161, "vCNV_BT_I2S_SDO"),
216 PINCTRL_PIN(162, "vCNV_BT_I2S_SDI"),
217 PINCTRL_PIN(163, "vI2S2_SCLK"),
218 PINCTRL_PIN(164, "vI2S2_SFRM"),
219 PINCTRL_PIN(165, "vI2S2_TXD"),
220 PINCTRL_PIN(166, "vI2S2_RXD"),
221 PINCTRL_PIN(167, "THC0_WOT_INT"),
222 PINCTRL_PIN(168, "THC1_WOT_INT"),
223 /* GPP_C */
224 PINCTRL_PIN(169, "SMBCLK"),
225 PINCTRL_PIN(170, "SMBDATA"),
226 PINCTRL_PIN(171, "SMBALERTB"),
227 PINCTRL_PIN(172, "SML0CLK"),
228 PINCTRL_PIN(173, "SML0DATA"),
229 PINCTRL_PIN(174, "GPPC_C_5"),
230 PINCTRL_PIN(175, "GPPC_C_6"),
231 PINCTRL_PIN(176, "GPPC_C_7"),
232 PINCTRL_PIN(177, "GPPC_C_8"),
233 PINCTRL_PIN(178, "GPPC_C_9"),
234 PINCTRL_PIN(179, "GPPC_C_10"),
235 PINCTRL_PIN(180, "GPPC_C_11"),
236 PINCTRL_PIN(181, "GPPC_C_12"),
237 PINCTRL_PIN(182, "GPPC_C_13"),
238 PINCTRL_PIN(183, "GPPC_C_14"),
239 PINCTRL_PIN(184, "GPPC_C_15"),
240 PINCTRL_PIN(185, "GPPC_C_16"),
241 PINCTRL_PIN(186, "GPPC_C_17"),
242 PINCTRL_PIN(187, "GPPC_C_18"),
243 PINCTRL_PIN(188, "GPPC_C_19"),
244 PINCTRL_PIN(189, "GPPC_C_20"),
245 PINCTRL_PIN(190, "GPPC_C_21"),
246 PINCTRL_PIN(191, "GPPC_C_22"),
247 PINCTRL_PIN(192, "GPPC_C_23"),
248 /* GPP_F */
249 PINCTRL_PIN(193, "CNV_BRI_DT"),
250 PINCTRL_PIN(194, "CNV_BRI_RSP"),
251 PINCTRL_PIN(195, "CNV_RGI_DT"),
252 PINCTRL_PIN(196, "CNV_RGI_RSP"),
253 PINCTRL_PIN(197, "CNV_RF_RESET_B"),
254 PINCTRL_PIN(198, "MODEM_CLKREQ"),
255 PINCTRL_PIN(199, "GPPC_F_6"),
256 PINCTRL_PIN(200, "GPPC_F_7"),
257 PINCTRL_PIN(201, "GPPC_F_8"),
258 PINCTRL_PIN(202, "BOOTMPC"),
259 PINCTRL_PIN(203, "GPPC_F_10"),
260 PINCTRL_PIN(204, "GPPC_F_11"),
261 PINCTRL_PIN(205, "GPPC_F_12"),
262 PINCTRL_PIN(206, "GPPC_F_13"),
263 PINCTRL_PIN(207, "GPPC_F_14"),
264 PINCTRL_PIN(208, "GPPC_F_15"),
265 PINCTRL_PIN(209, "GPPC_F_16"),
266 PINCTRL_PIN(210, "GPPC_F_17"),
267 PINCTRL_PIN(211, "GPPC_F_18"),
268 PINCTRL_PIN(212, "GPPC_F_19"),
269 PINCTRL_PIN(213, "EXT_PWR_GATEB"),
270 PINCTRL_PIN(214, "EXT_PWR_GATE2B"),
271 PINCTRL_PIN(215, "GPPC_F_22"),
272 PINCTRL_PIN(216, "GPPC_F_23"),
273 PINCTRL_PIN(217, "GPPF_CLK_LOOPBACK"),
274 /* HVCMOS */
275 PINCTRL_PIN(218, "L_BKLTEN"),
276 PINCTRL_PIN(219, "L_BKLTCTL"),
277 PINCTRL_PIN(220, "L_VDDEN"),
278 PINCTRL_PIN(221, "SYS_PWROK"),
279 PINCTRL_PIN(222, "SYS_RESETB"),
280 PINCTRL_PIN(223, "MLK_RSTB"),
281 /* GPP_E */
282 PINCTRL_PIN(224, "GPPC_E_0"),
283 PINCTRL_PIN(225, "GPPC_E_1"),
284 PINCTRL_PIN(226, "GPPC_E_2"),
285 PINCTRL_PIN(227, "GPPC_E_3"),
286 PINCTRL_PIN(228, "GPPC_E_4"),
287 PINCTRL_PIN(229, "GPPC_E_5"),
288 PINCTRL_PIN(230, "GPPC_E_6"),
289 PINCTRL_PIN(231, "GPPC_E_7"),
290 PINCTRL_PIN(232, "GPPC_E_8"),
291 PINCTRL_PIN(233, "GPPC_E_9"),
292 PINCTRL_PIN(234, "GPPC_E_10"),
293 PINCTRL_PIN(235, "GPPC_E_11"),
294 PINCTRL_PIN(236, "GPPC_E_12"),
295 PINCTRL_PIN(237, "GPPC_E_13"),
296 PINCTRL_PIN(238, "GPPC_E_14"),
297 PINCTRL_PIN(239, "FIVR_DIGPB_0"),
298 PINCTRL_PIN(240, "FIVR_DIGPB_1"),
299 PINCTRL_PIN(241, "GPPC_E_17"),
300 PINCTRL_PIN(242, "BSSB_LS0_RX"),
301 PINCTRL_PIN(243, "BSSB_LS0_TX"),
302 PINCTRL_PIN(244, "BSSB_LS1_RX"),
303 PINCTRL_PIN(245, "BSSB_LS1_TX"),
304 PINCTRL_PIN(246, "DNX_FORCE_RELOAD"),
305 PINCTRL_PIN(247, "GPPC_E_23"),
306 PINCTRL_PIN(248, "GPPE_CLK_LOOPBACK"),
307 /* GPP_R */
308 PINCTRL_PIN(249, "HDA_BCLK"),
309 PINCTRL_PIN(250, "HDA_SYNC"),
310 PINCTRL_PIN(251, "HDA_SDO"),
311 PINCTRL_PIN(252, "HDA_SDI_0"),
312 PINCTRL_PIN(253, "HDA_RSTB"),
313 PINCTRL_PIN(254, "GPP_R_5"),
314 PINCTRL_PIN(255, "GPP_R_6"),
315 PINCTRL_PIN(256, "GPP_R_7"),
316};
317
318static const struct intel_padgroup adln_community0_gpps[] = {
319 ADL_GPP(0, 0, 25, 0), /* GPP_B */
320 ADL_GPP(1, 26, 41, 32), /* GPP_T */
321 ADL_GPP(2, 42, 66, 64), /* GPP_A */
322};
323
324static const struct intel_padgroup adln_community1_gpps[] = {
325 ADL_GPP(0, 67, 74, 96), /* GPP_S */
326 ADL_GPP(1, 75, 94, 128), /* GPP_I */
327 ADL_GPP(2, 95, 118, 160), /* GPP_H */
328 ADL_GPP(3, 119, 139, 192), /* GPP_D */
329 ADL_GPP(4, 140, 168, 224), /* vGPIO */
330};
331
332static const struct intel_padgroup adln_community4_gpps[] = {
333 ADL_GPP(0, 169, 192, 256), /* GPP_C */
334 ADL_GPP(1, 193, 217, 288), /* GPP_F */
335 ADL_GPP(2, 218, 223, INTEL_GPIO_BASE_NOMAP), /* HVCMOS */
336 ADL_GPP(3, 224, 248, 320), /* GPP_E */
337};
338
339static const struct intel_padgroup adln_community5_gpps[] = {
340 ADL_GPP(0, 249, 256, 352), /* GPP_R */
341};
342
343static const struct intel_community adln_communities[] = {
344 ADL_N_COMMUNITY(0, 0, 66, adln_community0_gpps),
345 ADL_N_COMMUNITY(1, 67, 168, adln_community1_gpps),
346 ADL_N_COMMUNITY(2, 169, 248, adln_community4_gpps),
347 ADL_N_COMMUNITY(3, 249, 256, adln_community5_gpps),
348};
349
350static const struct intel_pinctrl_soc_data adln_soc_data = {
351 .pins = adln_pins,
352 .npins = ARRAY_SIZE(adln_pins),
353 .communities = adln_communities,
354 .ncommunities = ARRAY_SIZE(adln_communities),
355};
356
357/* Alder Lake-S */
358static const struct pinctrl_pin_desc adls_pins[] = {
359 /* GPP_I */
360 PINCTRL_PIN(0, "EXT_PWR_GATEB"),
361 PINCTRL_PIN(1, "DDSP_HPD_1"),
362 PINCTRL_PIN(2, "DDSP_HPD_2"),
363 PINCTRL_PIN(3, "DDSP_HPD_3"),
364 PINCTRL_PIN(4, "DDSP_HPD_4"),
365 PINCTRL_PIN(5, "DDPB_CTRLCLK"),
366 PINCTRL_PIN(6, "DDPB_CTRLDATA"),
367 PINCTRL_PIN(7, "DDPC_CTRLCLK"),
368 PINCTRL_PIN(8, "DDPC_CTRLDATA"),
369 PINCTRL_PIN(9, "GSPI0_CS1B"),
370 PINCTRL_PIN(10, "GSPI1_CS1B"),
371 PINCTRL_PIN(11, "USB2_OCB_4"),
372 PINCTRL_PIN(12, "USB2_OCB_5"),
373 PINCTRL_PIN(13, "USB2_OCB_6"),
374 PINCTRL_PIN(14, "USB2_OCB_7"),
375 PINCTRL_PIN(15, "GSPI0_CS0B"),
376 PINCTRL_PIN(16, "GSPI0_CLK"),
377 PINCTRL_PIN(17, "GSPI0_MISO"),
378 PINCTRL_PIN(18, "GSPI0_MOSI"),
379 PINCTRL_PIN(19, "GSPI1_CS0B"),
380 PINCTRL_PIN(20, "GSPI1_CLK"),
381 PINCTRL_PIN(21, "GSPI1_MISO"),
382 PINCTRL_PIN(22, "GSPI1_MOSI"),
383 PINCTRL_PIN(23, "GSPI0_CLK_LOOPBK"),
384 PINCTRL_PIN(24, "GSPI1_CLK_LOOPBK"),
385 /* GPP_R */
386 PINCTRL_PIN(25, "HDA_BCLK"),
387 PINCTRL_PIN(26, "HDA_SYNC"),
388 PINCTRL_PIN(27, "HDA_SDO"),
389 PINCTRL_PIN(28, "HDA_SDI_0"),
390 PINCTRL_PIN(29, "HDA_RSTB"),
391 PINCTRL_PIN(30, "HDA_SDI_1"),
392 PINCTRL_PIN(31, "GPP_R_6"),
393 PINCTRL_PIN(32, "GPP_R_7"),
394 PINCTRL_PIN(33, "GPP_R_8"),
395 PINCTRL_PIN(34, "DDSP_HPD_A"),
396 PINCTRL_PIN(35, "DDSP_HPD_B"),
397 PINCTRL_PIN(36, "DDSP_HPD_C"),
398 PINCTRL_PIN(37, "ISH_SPI_CSB"),
399 PINCTRL_PIN(38, "ISH_SPI_CLK"),
400 PINCTRL_PIN(39, "ISH_SPI_MISO"),
401 PINCTRL_PIN(40, "ISH_SPI_MOSI"),
402 PINCTRL_PIN(41, "DDP1_CTRLCLK"),
403 PINCTRL_PIN(42, "DDP1_CTRLDATA"),
404 PINCTRL_PIN(43, "DDP2_CTRLCLK"),
405 PINCTRL_PIN(44, "DDP2_CTRLDATA"),
406 PINCTRL_PIN(45, "DDPA_CTRLCLK"),
407 PINCTRL_PIN(46, "DDPA_CTRLDATA"),
408 PINCTRL_PIN(47, "GSPI2_CLK_LOOPBK"),
409 /* GPP_J */
410 PINCTRL_PIN(48, "CNV_PA_BLANKING"),
411 PINCTRL_PIN(49, "CPU_C10_GATEB"),
412 PINCTRL_PIN(50, "CNV_BRI_DT"),
413 PINCTRL_PIN(51, "CNV_BRI_RSP"),
414 PINCTRL_PIN(52, "CNV_RGI_DT"),
415 PINCTRL_PIN(53, "CNV_RGI_RSP"),
416 PINCTRL_PIN(54, "CNV_MFUART2_RXD"),
417 PINCTRL_PIN(55, "CNV_MFUART2_TXD"),
418 PINCTRL_PIN(56, "SRCCLKREQB_16"),
419 PINCTRL_PIN(57, "SRCCLKREQB_17"),
420 PINCTRL_PIN(58, "BSSB_LS_RX"),
421 PINCTRL_PIN(59, "BSSB_LS_TX"),
422 /* vGPIO */
423 PINCTRL_PIN(60, "CNV_BTEN"),
424 PINCTRL_PIN(61, "CNV_BT_HOST_WAKEB"),
425 PINCTRL_PIN(62, "CNV_BT_IF_SELECT"),
426 PINCTRL_PIN(63, "vCNV_BT_UART_TXD"),
427 PINCTRL_PIN(64, "vCNV_BT_UART_RXD"),
428 PINCTRL_PIN(65, "vCNV_BT_UART_CTS_B"),
429 PINCTRL_PIN(66, "vCNV_BT_UART_RTS_B"),
430 PINCTRL_PIN(67, "vCNV_MFUART1_TXD"),
431 PINCTRL_PIN(68, "vCNV_MFUART1_RXD"),
432 PINCTRL_PIN(69, "vCNV_MFUART1_CTS_B"),
433 PINCTRL_PIN(70, "vCNV_MFUART1_RTS_B"),
434 PINCTRL_PIN(71, "vUART0_TXD"),
435 PINCTRL_PIN(72, "vUART0_RXD"),
436 PINCTRL_PIN(73, "vUART0_CTS_B"),
437 PINCTRL_PIN(74, "vUART0_RTS_B"),
438 PINCTRL_PIN(75, "vISH_UART0_TXD"),
439 PINCTRL_PIN(76, "vISH_UART0_RXD"),
440 PINCTRL_PIN(77, "vISH_UART0_CTS_B"),
441 PINCTRL_PIN(78, "vISH_UART0_RTS_B"),
442 PINCTRL_PIN(79, "vCNV_BT_I2S_BCLK"),
443 PINCTRL_PIN(80, "vCNV_BT_I2S_WS_SYNC"),
444 PINCTRL_PIN(81, "vCNV_BT_I2S_SDO"),
445 PINCTRL_PIN(82, "vCNV_BT_I2S_SDI"),
446 PINCTRL_PIN(83, "vI2S2_SCLK"),
447 PINCTRL_PIN(84, "vI2S2_SFRM"),
448 PINCTRL_PIN(85, "vI2S2_TXD"),
449 PINCTRL_PIN(86, "vI2S2_RXD"),
450 /* vGPIO_0 */
451 PINCTRL_PIN(87, "ESPI_USB_OCB_0"),
452 PINCTRL_PIN(88, "ESPI_USB_OCB_1"),
453 PINCTRL_PIN(89, "ESPI_USB_OCB_2"),
454 PINCTRL_PIN(90, "ESPI_USB_OCB_3"),
455 PINCTRL_PIN(91, "USB_CPU_OCB_0"),
456 PINCTRL_PIN(92, "USB_CPU_OCB_1"),
457 PINCTRL_PIN(93, "USB_CPU_OCB_2"),
458 PINCTRL_PIN(94, "USB_CPU_OCB_3"),
459 /* GPP_B */
460 PINCTRL_PIN(95, "PCIE_LNK_DOWN"),
461 PINCTRL_PIN(96, "ISH_UART0_RTSB"),
462 PINCTRL_PIN(97, "VRALERTB"),
463 PINCTRL_PIN(98, "CPU_GP_2"),
464 PINCTRL_PIN(99, "CPU_GP_3"),
465 PINCTRL_PIN(100, "SX_EXIT_HOLDOFFB"),
466 PINCTRL_PIN(101, "CLKOUT_48"),
467 PINCTRL_PIN(102, "ISH_GP_7"),
468 PINCTRL_PIN(103, "ISH_GP_0"),
469 PINCTRL_PIN(104, "ISH_GP_1"),
470 PINCTRL_PIN(105, "ISH_GP_2"),
471 PINCTRL_PIN(106, "I2S_MCLK"),
472 PINCTRL_PIN(107, "SLP_S0B"),
473 PINCTRL_PIN(108, "PLTRSTB"),
474 PINCTRL_PIN(109, "SPKR"),
475 PINCTRL_PIN(110, "ISH_GP_3"),
476 PINCTRL_PIN(111, "ISH_GP_4"),
477 PINCTRL_PIN(112, "ISH_GP_5"),
478 PINCTRL_PIN(113, "PMCALERTB"),
479 PINCTRL_PIN(114, "FUSA_DIAGTEST_EN"),
480 PINCTRL_PIN(115, "FUSA_DIAGTEST_MODE"),
481 PINCTRL_PIN(116, "GPP_B_21"),
482 PINCTRL_PIN(117, "GPP_B_22"),
483 PINCTRL_PIN(118, "SML1ALERTB"),
484 /* GPP_G */
485 PINCTRL_PIN(119, "GPP_G_0"),
486 PINCTRL_PIN(120, "GPP_G_1"),
487 PINCTRL_PIN(121, "DNX_FORCE_RELOAD"),
488 PINCTRL_PIN(122, "GMII_MDC_0"),
489 PINCTRL_PIN(123, "GMII_MDIO_0"),
490 PINCTRL_PIN(124, "SLP_DRAMB"),
491 PINCTRL_PIN(125, "GPP_G_6"),
492 PINCTRL_PIN(126, "GPP_G_7"),
493 /* GPP_H */
494 PINCTRL_PIN(127, "SRCCLKREQB_18"),
495 PINCTRL_PIN(128, "GPP_H_1"),
496 PINCTRL_PIN(129, "SRCCLKREQB_8"),
497 PINCTRL_PIN(130, "SRCCLKREQB_9"),
498 PINCTRL_PIN(131, "SRCCLKREQB_10"),
499 PINCTRL_PIN(132, "SRCCLKREQB_11"),
500 PINCTRL_PIN(133, "SRCCLKREQB_12"),
501 PINCTRL_PIN(134, "SRCCLKREQB_13"),
502 PINCTRL_PIN(135, "SRCCLKREQB_14"),
503 PINCTRL_PIN(136, "SRCCLKREQB_15"),
504 PINCTRL_PIN(137, "SML2CLK"),
505 PINCTRL_PIN(138, "SML2DATA"),
506 PINCTRL_PIN(139, "SML2ALERTB"),
507 PINCTRL_PIN(140, "SML3CLK"),
508 PINCTRL_PIN(141, "SML3DATA"),
509 PINCTRL_PIN(142, "SML3ALERTB"),
510 PINCTRL_PIN(143, "SML4CLK"),
511 PINCTRL_PIN(144, "SML4DATA"),
512 PINCTRL_PIN(145, "SML4ALERTB"),
513 PINCTRL_PIN(146, "ISH_I2C0_SDA"),
514 PINCTRL_PIN(147, "ISH_I2C0_SCL"),
515 PINCTRL_PIN(148, "ISH_I2C1_SDA"),
516 PINCTRL_PIN(149, "ISH_I2C1_SCL"),
517 PINCTRL_PIN(150, "TIME_SYNC_0"),
518 /* SPI0 */
519 PINCTRL_PIN(151, "SPI0_IO_2"),
520 PINCTRL_PIN(152, "SPI0_IO_3"),
521 PINCTRL_PIN(153, "SPI0_MOSI_IO_0"),
522 PINCTRL_PIN(154, "SPI0_MISO_IO_1"),
523 PINCTRL_PIN(155, "SPI0_TPM_CSB"),
524 PINCTRL_PIN(156, "SPI0_FLASH_0_CSB"),
525 PINCTRL_PIN(157, "SPI0_FLASH_1_CSB"),
526 PINCTRL_PIN(158, "SPI0_CLK"),
527 PINCTRL_PIN(159, "SPI0_CLK_LOOPBK"),
528 /* GPP_A */
529 PINCTRL_PIN(160, "ESPI_IO_0"),
530 PINCTRL_PIN(161, "ESPI_IO_1"),
531 PINCTRL_PIN(162, "ESPI_IO_2"),
532 PINCTRL_PIN(163, "ESPI_IO_3"),
533 PINCTRL_PIN(164, "ESPI_CS0B"),
534 PINCTRL_PIN(165, "ESPI_CLK"),
535 PINCTRL_PIN(166, "ESPI_RESETB"),
536 PINCTRL_PIN(167, "ESPI_CS1B"),
537 PINCTRL_PIN(168, "ESPI_CS2B"),
538 PINCTRL_PIN(169, "ESPI_CS3B"),
539 PINCTRL_PIN(170, "ESPI_ALERT0B"),
540 PINCTRL_PIN(171, "ESPI_ALERT1B"),
541 PINCTRL_PIN(172, "ESPI_ALERT2B"),
542 PINCTRL_PIN(173, "ESPI_ALERT3B"),
543 PINCTRL_PIN(174, "GPP_A_14"),
544 PINCTRL_PIN(175, "ESPI_CLK_LOOPBK"),
545 /* GPP_C */
546 PINCTRL_PIN(176, "SMBCLK"),
547 PINCTRL_PIN(177, "SMBDATA"),
548 PINCTRL_PIN(178, "SMBALERTB"),
549 PINCTRL_PIN(179, "ISH_UART0_RXD"),
550 PINCTRL_PIN(180, "ISH_UART0_TXD"),
551 PINCTRL_PIN(181, "SML0ALERTB"),
552 PINCTRL_PIN(182, "ISH_I2C2_SDA"),
553 PINCTRL_PIN(183, "ISH_I2C2_SCL"),
554 PINCTRL_PIN(184, "UART0_RXD"),
555 PINCTRL_PIN(185, "UART0_TXD"),
556 PINCTRL_PIN(186, "UART0_RTSB"),
557 PINCTRL_PIN(187, "UART0_CTSB"),
558 PINCTRL_PIN(188, "UART1_RXD"),
559 PINCTRL_PIN(189, "UART1_TXD"),
560 PINCTRL_PIN(190, "UART1_RTSB"),
561 PINCTRL_PIN(191, "UART1_CTSB"),
562 PINCTRL_PIN(192, "I2C0_SDA"),
563 PINCTRL_PIN(193, "I2C0_SCL"),
564 PINCTRL_PIN(194, "I2C1_SDA"),
565 PINCTRL_PIN(195, "I2C1_SCL"),
566 PINCTRL_PIN(196, "UART2_RXD"),
567 PINCTRL_PIN(197, "UART2_TXD"),
568 PINCTRL_PIN(198, "UART2_RTSB"),
569 PINCTRL_PIN(199, "UART2_CTSB"),
570 /* GPP_S */
571 PINCTRL_PIN(200, "SNDW1_CLK"),
572 PINCTRL_PIN(201, "SNDW1_DATA"),
573 PINCTRL_PIN(202, "SNDW2_CLK"),
574 PINCTRL_PIN(203, "SNDW2_DATA"),
575 PINCTRL_PIN(204, "SNDW3_CLK"),
576 PINCTRL_PIN(205, "SNDW3_DATA"),
577 PINCTRL_PIN(206, "SNDW4_CLK"),
578 PINCTRL_PIN(207, "SNDW4_DATA"),
579 /* GPP_E */
580 PINCTRL_PIN(208, "SATAXPCIE_0"),
581 PINCTRL_PIN(209, "SATAXPCIE_1"),
582 PINCTRL_PIN(210, "SATAXPCIE_2"),
583 PINCTRL_PIN(211, "CPU_GP_0"),
584 PINCTRL_PIN(212, "SATA_DEVSLP_0"),
585 PINCTRL_PIN(213, "SATA_DEVSLP_1"),
586 PINCTRL_PIN(214, "SATA_DEVSLP_2"),
587 PINCTRL_PIN(215, "CPU_GP_1"),
588 PINCTRL_PIN(216, "SATA_LEDB"),
589 PINCTRL_PIN(217, "USB2_OCB_0"),
590 PINCTRL_PIN(218, "USB2_OCB_1"),
591 PINCTRL_PIN(219, "USB2_OCB_2"),
592 PINCTRL_PIN(220, "USB2_OCB_3"),
593 PINCTRL_PIN(221, "SPI1_CSB"),
594 PINCTRL_PIN(222, "SPI1_CLK"),
595 PINCTRL_PIN(223, "SPI1_MISO_IO_1"),
596 PINCTRL_PIN(224, "SPI1_MOSI_IO_0"),
597 PINCTRL_PIN(225, "SPI1_IO_2"),
598 PINCTRL_PIN(226, "SPI1_IO_3"),
599 PINCTRL_PIN(227, "GPP_E_19"),
600 PINCTRL_PIN(228, "GPP_E_20"),
601 PINCTRL_PIN(229, "ISH_UART0_CTSB"),
602 PINCTRL_PIN(230, "SPI1_CLK_LOOPBK"),
603 /* GPP_K */
604 PINCTRL_PIN(231, "GSXDOUT"),
605 PINCTRL_PIN(232, "GSXSLOAD"),
606 PINCTRL_PIN(233, "GSXDIN"),
607 PINCTRL_PIN(234, "GSXSRESETB"),
608 PINCTRL_PIN(235, "GSXCLK"),
609 PINCTRL_PIN(236, "ADR_COMPLETE"),
610 PINCTRL_PIN(237, "GPP_K_6"),
611 PINCTRL_PIN(238, "GPP_K_7"),
612 PINCTRL_PIN(239, "CORE_VID_0"),
613 PINCTRL_PIN(240, "CORE_VID_1"),
614 PINCTRL_PIN(241, "GPP_K_10"),
615 PINCTRL_PIN(242, "GPP_K_11"),
616 PINCTRL_PIN(243, "SYS_PWROK"),
617 PINCTRL_PIN(244, "SYS_RESETB"),
618 PINCTRL_PIN(245, "MLK_RSTB"),
619 /* GPP_F */
620 PINCTRL_PIN(246, "SATAXPCIE_3"),
621 PINCTRL_PIN(247, "SATAXPCIE_4"),
622 PINCTRL_PIN(248, "SATAXPCIE_5"),
623 PINCTRL_PIN(249, "SATAXPCIE_6"),
624 PINCTRL_PIN(250, "SATAXPCIE_7"),
625 PINCTRL_PIN(251, "SATA_DEVSLP_3"),
626 PINCTRL_PIN(252, "SATA_DEVSLP_4"),
627 PINCTRL_PIN(253, "SATA_DEVSLP_5"),
628 PINCTRL_PIN(254, "SATA_DEVSLP_6"),
629 PINCTRL_PIN(255, "SATA_DEVSLP_7"),
630 PINCTRL_PIN(256, "SATA_SCLOCK"),
631 PINCTRL_PIN(257, "SATA_SLOAD"),
632 PINCTRL_PIN(258, "SATA_SDATAOUT1"),
633 PINCTRL_PIN(259, "SATA_SDATAOUT0"),
634 PINCTRL_PIN(260, "PS_ONB"),
635 PINCTRL_PIN(261, "M2_SKT2_CFG_0"),
636 PINCTRL_PIN(262, "M2_SKT2_CFG_1"),
637 PINCTRL_PIN(263, "M2_SKT2_CFG_2"),
638 PINCTRL_PIN(264, "M2_SKT2_CFG_3"),
639 PINCTRL_PIN(265, "L_VDDEN"),
640 PINCTRL_PIN(266, "L_BKLTEN"),
641 PINCTRL_PIN(267, "L_BKLTCTL"),
642 PINCTRL_PIN(268, "VNN_CTRL"),
643 PINCTRL_PIN(269, "GPP_F_23"),
644 /* GPP_D */
645 PINCTRL_PIN(270, "SRCCLKREQB_0"),
646 PINCTRL_PIN(271, "SRCCLKREQB_1"),
647 PINCTRL_PIN(272, "SRCCLKREQB_2"),
648 PINCTRL_PIN(273, "SRCCLKREQB_3"),
649 PINCTRL_PIN(274, "SML1CLK"),
650 PINCTRL_PIN(275, "I2S2_SFRM"),
651 PINCTRL_PIN(276, "I2S2_TXD"),
652 PINCTRL_PIN(277, "I2S2_RXD"),
653 PINCTRL_PIN(278, "I2S2_SCLK"),
654 PINCTRL_PIN(279, "SML0CLK"),
655 PINCTRL_PIN(280, "SML0DATA"),
656 PINCTRL_PIN(281, "SRCCLKREQB_4"),
657 PINCTRL_PIN(282, "SRCCLKREQB_5"),
658 PINCTRL_PIN(283, "SRCCLKREQB_6"),
659 PINCTRL_PIN(284, "SRCCLKREQB_7"),
660 PINCTRL_PIN(285, "SML1DATA"),
661 PINCTRL_PIN(286, "GSPI3_CS0B"),
662 PINCTRL_PIN(287, "GSPI3_CLK"),
663 PINCTRL_PIN(288, "GSPI3_MISO"),
664 PINCTRL_PIN(289, "GSPI3_MOSI"),
665 PINCTRL_PIN(290, "UART3_RXD"),
666 PINCTRL_PIN(291, "UART3_TXD"),
667 PINCTRL_PIN(292, "UART3_RTSB"),
668 PINCTRL_PIN(293, "UART3_CTSB"),
669 PINCTRL_PIN(294, "GSPI3_CLK_LOOPBK"),
670 /* JTAG */
671 PINCTRL_PIN(295, "JTAG_TDO"),
672 PINCTRL_PIN(296, "JTAGX"),
673 PINCTRL_PIN(297, "PRDYB"),
674 PINCTRL_PIN(298, "PREQB"),
675 PINCTRL_PIN(299, "JTAG_TDI"),
676 PINCTRL_PIN(300, "JTAG_TMS"),
677 PINCTRL_PIN(301, "JTAG_TCK"),
678 PINCTRL_PIN(302, "DBG_PMODE"),
679 PINCTRL_PIN(303, "CPU_TRSTB"),
680};
681
682static const struct intel_padgroup adls_community0_gpps[] = {
683 ADL_GPP(0, 0, 24, 0), /* GPP_I */
684 ADL_GPP(1, 25, 47, 32), /* GPP_R */
685 ADL_GPP(2, 48, 59, 64), /* GPP_J */
686 ADL_GPP(3, 60, 86, 96), /* vGPIO */
687 ADL_GPP(4, 87, 94, 128), /* vGPIO_0 */
688};
689
690static const struct intel_padgroup adls_community1_gpps[] = {
691 ADL_GPP(0, 95, 118, 160), /* GPP_B */
692 ADL_GPP(1, 119, 126, 192), /* GPP_G */
693 ADL_GPP(2, 127, 150, 224), /* GPP_H */
694};
695
696static const struct intel_padgroup adls_community3_gpps[] = {
697 ADL_GPP(0, 151, 159, INTEL_GPIO_BASE_NOMAP), /* SPI0 */
698 ADL_GPP(1, 160, 175, 256), /* GPP_A */
699 ADL_GPP(2, 176, 199, 288), /* GPP_C */
700};
701
702static const struct intel_padgroup adls_community4_gpps[] = {
703 ADL_GPP(0, 200, 207, 320), /* GPP_S */
704 ADL_GPP(1, 208, 230, 352), /* GPP_E */
705 ADL_GPP(2, 231, 245, 384), /* GPP_K */
706 ADL_GPP(3, 246, 269, 416), /* GPP_F */
707};
708
709static const struct intel_padgroup adls_community5_gpps[] = {
710 ADL_GPP(0, 270, 294, 448), /* GPP_D */
711 ADL_GPP(1, 295, 303, INTEL_GPIO_BASE_NOMAP), /* JTAG */
712};
713
714static const struct intel_community adls_communities[] = {
715 ADL_S_COMMUNITY(0, 0, 94, adls_community0_gpps),
716 ADL_S_COMMUNITY(1, 95, 150, adls_community1_gpps),
717 ADL_S_COMMUNITY(2, 151, 199, adls_community3_gpps),
718 ADL_S_COMMUNITY(3, 200, 269, adls_community4_gpps),
719 ADL_S_COMMUNITY(4, 270, 303, adls_community5_gpps),
720};
721
722static const struct intel_pinctrl_soc_data adls_soc_data = {
723 .pins = adls_pins,
724 .npins = ARRAY_SIZE(adls_pins),
725 .communities = adls_communities,
726 .ncommunities = ARRAY_SIZE(adls_communities),
727};
728
729static const struct acpi_device_id adl_pinctrl_acpi_match[] = {
730 { "INTC1056", (kernel_ulong_t)&adls_soc_data },
731 { "INTC1057", (kernel_ulong_t)&adln_soc_data },
732 { "INTC1085", (kernel_ulong_t)&adls_soc_data },
733 { }
734};
735MODULE_DEVICE_TABLE(acpi, adl_pinctrl_acpi_match);
736
737static struct platform_driver adl_pinctrl_driver = {
738 .probe = intel_pinctrl_probe_by_hid,
739 .driver = {
740 .name = "alderlake-pinctrl",
741 .acpi_match_table = adl_pinctrl_acpi_match,
742 .pm = pm_sleep_ptr(&intel_pinctrl_pm_ops),
743 },
744};
745module_platform_driver(adl_pinctrl_driver);
746
747MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
748MODULE_DESCRIPTION("Intel Alder Lake PCH pinctrl/GPIO driver");
749MODULE_LICENSE("GPL v2");
750MODULE_IMPORT_NS(PINCTRL_INTEL);
751

source code of linux/drivers/pinctrl/intel/pinctrl-alderlake.c