1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * Intel Emmitsburg PCH pinctrl/GPIO driver |
4 | * |
5 | * Copyright (C) 2020, Intel Corporation |
6 | * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
7 | */ |
8 | |
9 | #include <linux/mod_devicetable.h> |
10 | #include <linux/module.h> |
11 | #include <linux/platform_device.h> |
12 | #include <linux/pm.h> |
13 | |
14 | #include <linux/pinctrl/pinctrl.h> |
15 | |
16 | #include "pinctrl-intel.h" |
17 | |
18 | #define EBG_PAD_OWN 0x0a0 |
19 | #define EBG_PADCFGLOCK 0x100 |
20 | #define EBG_HOSTSW_OWN 0x130 |
21 | #define EBG_GPI_IS 0x200 |
22 | #define EBG_GPI_IE 0x210 |
23 | |
24 | #define EBG_GPP(r, s, e) \ |
25 | { \ |
26 | .reg_num = (r), \ |
27 | .base = (s), \ |
28 | .size = ((e) - (s) + 1), \ |
29 | } |
30 | |
31 | #define (b, s, e, g) \ |
32 | INTEL_COMMUNITY_GPPS(b, s, e, g, EBG) |
33 | |
34 | /* Emmitsburg */ |
35 | static const struct pinctrl_pin_desc ebg_pins[] = { |
36 | /* GPP_A */ |
37 | PINCTRL_PIN(0, "ESPI_ALERT0B" ), |
38 | PINCTRL_PIN(1, "ESPI_ALERT1B" ), |
39 | PINCTRL_PIN(2, "ESPI_IO_0" ), |
40 | PINCTRL_PIN(3, "ESPI_IO_1" ), |
41 | PINCTRL_PIN(4, "ESPI_IO_2" ), |
42 | PINCTRL_PIN(5, "ESPI_IO_3" ), |
43 | PINCTRL_PIN(6, "ESPI_CS0B" ), |
44 | PINCTRL_PIN(7, "ESPI_CS1B" ), |
45 | PINCTRL_PIN(8, "ESPI_RESETB" ), |
46 | PINCTRL_PIN(9, "ESPI_CLK" ), |
47 | PINCTRL_PIN(10, "SRCCLKREQB_0" ), |
48 | PINCTRL_PIN(11, "SRCCLKREQB_1" ), |
49 | PINCTRL_PIN(12, "SRCCLKREQB_2" ), |
50 | PINCTRL_PIN(13, "SRCCLKREQB_3" ), |
51 | PINCTRL_PIN(14, "SRCCLKREQB_4" ), |
52 | PINCTRL_PIN(15, "SRCCLKREQB_5" ), |
53 | PINCTRL_PIN(16, "SRCCLKREQB_6" ), |
54 | PINCTRL_PIN(17, "SRCCLKREQB_7" ), |
55 | PINCTRL_PIN(18, "SRCCLKREQB_8" ), |
56 | PINCTRL_PIN(19, "SRCCLKREQB_9" ), |
57 | PINCTRL_PIN(20, "ESPI_CLK_LOOPBK" ), |
58 | /* GPP_B */ |
59 | PINCTRL_PIN(21, "GSXDOUT" ), |
60 | PINCTRL_PIN(22, "GSXSLOAD" ), |
61 | PINCTRL_PIN(23, "GSXDIN" ), |
62 | PINCTRL_PIN(24, "GSXSRESETB" ), |
63 | PINCTRL_PIN(25, "GSXCLK" ), |
64 | PINCTRL_PIN(26, "USB2_OCB_0" ), |
65 | PINCTRL_PIN(27, "USB2_OCB_1" ), |
66 | PINCTRL_PIN(28, "USB2_OCB_2" ), |
67 | PINCTRL_PIN(29, "USB2_OCB_3" ), |
68 | PINCTRL_PIN(30, "USB2_OCB_4" ), |
69 | PINCTRL_PIN(31, "USB2_OCB_5" ), |
70 | PINCTRL_PIN(32, "USB2_OCB_6" ), |
71 | PINCTRL_PIN(33, "HS_UART0_RXD" ), |
72 | PINCTRL_PIN(34, "HS_UART0_TXD" ), |
73 | PINCTRL_PIN(35, "HS_UART0_RTSB" ), |
74 | PINCTRL_PIN(36, "HS_UART0_CTSB" ), |
75 | PINCTRL_PIN(37, "HS_UART1_RXD" ), |
76 | PINCTRL_PIN(38, "HS_UART1_TXD" ), |
77 | PINCTRL_PIN(39, "HS_UART1_RTSB" ), |
78 | PINCTRL_PIN(40, "HS_UART1_CTSB" ), |
79 | PINCTRL_PIN(41, "GPPC_B_20" ), |
80 | PINCTRL_PIN(42, "GPPC_B_21" ), |
81 | PINCTRL_PIN(43, "GPPC_B_22" ), |
82 | PINCTRL_PIN(44, "PS_ONB" ), |
83 | /* SPI */ |
84 | PINCTRL_PIN(45, "SPI0_IO_2" ), |
85 | PINCTRL_PIN(46, "SPI0_IO_3" ), |
86 | PINCTRL_PIN(47, "SPI0_MOSI_IO_0" ), |
87 | PINCTRL_PIN(48, "SPI0_MISO_IO_1" ), |
88 | PINCTRL_PIN(49, "SPI0_TPM_CSB" ), |
89 | PINCTRL_PIN(50, "SPI0_FLASH_0_CSB" ), |
90 | PINCTRL_PIN(51, "SPI0_FLASH_1_CSB" ), |
91 | PINCTRL_PIN(52, "SPI0_CLK" ), |
92 | PINCTRL_PIN(53, "TIME_SYNC_0" ), |
93 | PINCTRL_PIN(54, "SPKR" ), |
94 | PINCTRL_PIN(55, "CPU_GP_0" ), |
95 | PINCTRL_PIN(56, "CPU_GP_1" ), |
96 | PINCTRL_PIN(57, "CPU_GP_2" ), |
97 | PINCTRL_PIN(58, "CPU_GP_3" ), |
98 | PINCTRL_PIN(59, "SUSWARNB_SUSPWRDNACK" ), |
99 | PINCTRL_PIN(60, "SUSACKB" ), |
100 | PINCTRL_PIN(61, "NMIB" ), |
101 | PINCTRL_PIN(62, "SMIB" ), |
102 | PINCTRL_PIN(63, "GPPC_S_10" ), |
103 | PINCTRL_PIN(64, "GPPC_S_11" ), |
104 | PINCTRL_PIN(65, "SPI_CLK_LOOPBK" ), |
105 | /* GPP_C */ |
106 | PINCTRL_PIN(66, "ME_SML0CLK" ), |
107 | PINCTRL_PIN(67, "ME_SML0DATA" ), |
108 | PINCTRL_PIN(68, "ME_SML0ALERTB" ), |
109 | PINCTRL_PIN(69, "ME_SML0BDATA" ), |
110 | PINCTRL_PIN(70, "ME_SML0BCLK" ), |
111 | PINCTRL_PIN(71, "ME_SML0BALERTB" ), |
112 | PINCTRL_PIN(72, "ME_SML1CLK" ), |
113 | PINCTRL_PIN(73, "ME_SML1DATA" ), |
114 | PINCTRL_PIN(74, "ME_SML1ALERTB" ), |
115 | PINCTRL_PIN(75, "ME_SML2CLK" ), |
116 | PINCTRL_PIN(76, "ME_SML2DATA" ), |
117 | PINCTRL_PIN(77, "ME_SML2ALERTB" ), |
118 | PINCTRL_PIN(78, "ME_SML3CLK" ), |
119 | PINCTRL_PIN(79, "ME_SML3DATA" ), |
120 | PINCTRL_PIN(80, "ME_SML3ALERTB" ), |
121 | PINCTRL_PIN(81, "ME_SML4CLK" ), |
122 | PINCTRL_PIN(82, "ME_SML4DATA" ), |
123 | PINCTRL_PIN(83, "ME_SML4ALERTB" ), |
124 | PINCTRL_PIN(84, "GPPC_C_18" ), |
125 | PINCTRL_PIN(85, "MC_SMBCLK" ), |
126 | PINCTRL_PIN(86, "MC_SMBDATA" ), |
127 | PINCTRL_PIN(87, "MC_SMBALERTB" ), |
128 | /* GPP_D */ |
129 | PINCTRL_PIN(88, "HS_SMBCLK" ), |
130 | PINCTRL_PIN(89, "HS_SMBDATA" ), |
131 | PINCTRL_PIN(90, "HS_SMBALERTB" ), |
132 | PINCTRL_PIN(91, "GBE_SMB_ALRT_N" ), |
133 | PINCTRL_PIN(92, "GBE_SMB_CLK" ), |
134 | PINCTRL_PIN(93, "GBE_SMB_DATA" ), |
135 | PINCTRL_PIN(94, "GBE_GPIO10" ), |
136 | PINCTRL_PIN(95, "GBE_GPIO11" ), |
137 | PINCTRL_PIN(96, "CRASHLOG_TRIG_N" ), |
138 | PINCTRL_PIN(97, "PMEB" ), |
139 | PINCTRL_PIN(98, "BM_BUSYB" ), |
140 | PINCTRL_PIN(99, "PLTRSTB" ), |
141 | PINCTRL_PIN(100, "PCHHOTB" ), |
142 | PINCTRL_PIN(101, "ADR_COMPLETE" ), |
143 | PINCTRL_PIN(102, "ADR_TRIGGER_N" ), |
144 | PINCTRL_PIN(103, "VRALERTB" ), |
145 | PINCTRL_PIN(104, "ADR_ACK" ), |
146 | PINCTRL_PIN(105, "THERMTRIP_N" ), |
147 | PINCTRL_PIN(106, "MEMTRIP_N" ), |
148 | PINCTRL_PIN(107, "MSMI_N" ), |
149 | PINCTRL_PIN(108, "CATERR_N" ), |
150 | PINCTRL_PIN(109, "GLB_RST_WARN_B" ), |
151 | PINCTRL_PIN(110, "USB2_OCB_7" ), |
152 | PINCTRL_PIN(111, "GPP_D_23" ), |
153 | /* GPP_E */ |
154 | PINCTRL_PIN(112, "SATA1_XPCIE_0" ), |
155 | PINCTRL_PIN(113, "SATA1_XPCIE_1" ), |
156 | PINCTRL_PIN(114, "SATA1_XPCIE_2" ), |
157 | PINCTRL_PIN(115, "SATA1_XPCIE_3" ), |
158 | PINCTRL_PIN(116, "SATA0_XPCIE_2" ), |
159 | PINCTRL_PIN(117, "SATA0_XPCIE_3" ), |
160 | PINCTRL_PIN(118, "SATA0_USB3_XPCIE_0" ), |
161 | PINCTRL_PIN(119, "SATA0_USB3_XPCIE_1" ), |
162 | PINCTRL_PIN(120, "SATA0_SCLOCK" ), |
163 | PINCTRL_PIN(121, "SATA0_SLOAD" ), |
164 | PINCTRL_PIN(122, "SATA0_SDATAOUT" ), |
165 | PINCTRL_PIN(123, "SATA1_SCLOCK" ), |
166 | PINCTRL_PIN(124, "SATA1_SLOAD" ), |
167 | PINCTRL_PIN(125, "SATA1_SDATAOUT" ), |
168 | PINCTRL_PIN(126, "SATA2_SCLOCK" ), |
169 | PINCTRL_PIN(127, "SATA2_SLOAD" ), |
170 | PINCTRL_PIN(128, "SATA2_SDATAOUT" ), |
171 | PINCTRL_PIN(129, "ERR0_N" ), |
172 | PINCTRL_PIN(130, "ERR1_N" ), |
173 | PINCTRL_PIN(131, "ERR2_N" ), |
174 | PINCTRL_PIN(132, "GBE_UART_RXD" ), |
175 | PINCTRL_PIN(133, "GBE_UART_TXD" ), |
176 | PINCTRL_PIN(134, "GBE_UART_RTSB" ), |
177 | PINCTRL_PIN(135, "GBE_UART_CTSB" ), |
178 | /* JTAG */ |
179 | PINCTRL_PIN(136, "JTAG_TDO" ), |
180 | PINCTRL_PIN(137, "JTAG_TDI" ), |
181 | PINCTRL_PIN(138, "JTAG_TCK" ), |
182 | PINCTRL_PIN(139, "JTAG_TMS" ), |
183 | PINCTRL_PIN(140, "JTAGX" ), |
184 | PINCTRL_PIN(141, "PRDYB" ), |
185 | PINCTRL_PIN(142, "PREQB" ), |
186 | PINCTRL_PIN(143, "GLB_PC_DISABLE" ), |
187 | PINCTRL_PIN(144, "DBG_PMODE" ), |
188 | PINCTRL_PIN(145, "GLB_EXT_ACC_DISABLE" ), |
189 | /* GPP_H */ |
190 | PINCTRL_PIN(146, "GBE_GPIO12" ), |
191 | PINCTRL_PIN(147, "GBE_GPIO13" ), |
192 | PINCTRL_PIN(148, "GBE_SDP_TIMESYNC0_S2N" ), |
193 | PINCTRL_PIN(149, "GBE_SDP_TIMESYNC1_S2N" ), |
194 | PINCTRL_PIN(150, "GBE_SDP_TIMESYNC2_S2N" ), |
195 | PINCTRL_PIN(151, "GBE_SDP_TIMESYNC3_S2N" ), |
196 | PINCTRL_PIN(152, "GPPC_H_6" ), |
197 | PINCTRL_PIN(153, "GPPC_H_7" ), |
198 | PINCTRL_PIN(154, "NCSI_CLK_IN" ), |
199 | PINCTRL_PIN(155, "NCSI_CRS_DV" ), |
200 | PINCTRL_PIN(156, "NCSI_RXD0" ), |
201 | PINCTRL_PIN(157, "NCSI_RXD1" ), |
202 | PINCTRL_PIN(158, "NCSI_TX_EN" ), |
203 | PINCTRL_PIN(159, "NCSI_TXD0" ), |
204 | PINCTRL_PIN(160, "NCSI_TXD1" ), |
205 | PINCTRL_PIN(161, "NAC_NCSI_CLK_OUT_0" ), |
206 | PINCTRL_PIN(162, "NAC_NCSI_CLK_OUT_1" ), |
207 | PINCTRL_PIN(163, "NAC_NCSI_CLK_OUT_2" ), |
208 | PINCTRL_PIN(164, "PMCALERTB" ), |
209 | PINCTRL_PIN(165, "GPPC_H_19" ), |
210 | /* GPP_J */ |
211 | PINCTRL_PIN(166, "CPUPWRGD" ), |
212 | PINCTRL_PIN(167, "CPU_THRMTRIP_N" ), |
213 | PINCTRL_PIN(168, "PLTRST_CPUB" ), |
214 | PINCTRL_PIN(169, "TRIGGER0_N" ), |
215 | PINCTRL_PIN(170, "TRIGGER1_N" ), |
216 | PINCTRL_PIN(171, "CPU_PWR_DEBUG_N" ), |
217 | PINCTRL_PIN(172, "CPU_MEMTRIP_N" ), |
218 | PINCTRL_PIN(173, "CPU_MSMI_N" ), |
219 | PINCTRL_PIN(174, "ME_PECI" ), |
220 | PINCTRL_PIN(175, "NAC_SPARE0" ), |
221 | PINCTRL_PIN(176, "NAC_SPARE1" ), |
222 | PINCTRL_PIN(177, "NAC_SPARE2" ), |
223 | PINCTRL_PIN(178, "CPU_ERR0_N" ), |
224 | PINCTRL_PIN(179, "CPU_CATERR_N" ), |
225 | PINCTRL_PIN(180, "CPU_ERR1_N" ), |
226 | PINCTRL_PIN(181, "CPU_ERR2_N" ), |
227 | PINCTRL_PIN(182, "GPP_J_16" ), |
228 | PINCTRL_PIN(183, "GPP_J_17" ), |
229 | /* GPP_I */ |
230 | PINCTRL_PIN(184, "GBE_GPIO4" ), |
231 | PINCTRL_PIN(185, "GBE_GPIO5" ), |
232 | PINCTRL_PIN(186, "GBE_GPIO6" ), |
233 | PINCTRL_PIN(187, "GBE_GPIO7" ), |
234 | PINCTRL_PIN(188, "GBE1_LED1" ), |
235 | PINCTRL_PIN(189, "GBE1_LED2" ), |
236 | PINCTRL_PIN(190, "GBE2_LED0" ), |
237 | PINCTRL_PIN(191, "GBE2_LED1" ), |
238 | PINCTRL_PIN(192, "GBE2_LED2" ), |
239 | PINCTRL_PIN(193, "GBE3_LED0" ), |
240 | PINCTRL_PIN(194, "GBE3_LED1" ), |
241 | PINCTRL_PIN(195, "GBE3_LED2" ), |
242 | PINCTRL_PIN(196, "GBE0_I2C_CLK" ), |
243 | PINCTRL_PIN(197, "GBE0_I2C_DATA" ), |
244 | PINCTRL_PIN(198, "GBE1_I2C_CLK" ), |
245 | PINCTRL_PIN(199, "GBE1_I2C_DATA" ), |
246 | PINCTRL_PIN(200, "GBE2_I2C_CLK" ), |
247 | PINCTRL_PIN(201, "GBE2_I2C_DATA" ), |
248 | PINCTRL_PIN(202, "GBE3_I2C_CLK" ), |
249 | PINCTRL_PIN(203, "GBE3_I2C_DATA" ), |
250 | PINCTRL_PIN(204, "GBE4_I2C_CLK" ), |
251 | PINCTRL_PIN(205, "GBE4_I2C_DATA" ), |
252 | PINCTRL_PIN(206, "GBE_GPIO8" ), |
253 | PINCTRL_PIN(207, "GBE_GPIO9" ), |
254 | /* GPP_L */ |
255 | PINCTRL_PIN(208, "PM_SYNC_0" ), |
256 | PINCTRL_PIN(209, "PM_DOWN_0" ), |
257 | PINCTRL_PIN(210, "PM_SYNC_CLK_0" ), |
258 | PINCTRL_PIN(211, "GPP_L_3" ), |
259 | PINCTRL_PIN(212, "GPP_L_4" ), |
260 | PINCTRL_PIN(213, "GPP_L_5" ), |
261 | PINCTRL_PIN(214, "GPP_L_6" ), |
262 | PINCTRL_PIN(215, "GPP_L_7" ), |
263 | PINCTRL_PIN(216, "GPP_L_8" ), |
264 | PINCTRL_PIN(217, "NAC_GBE_GPIO0_S2N" ), |
265 | PINCTRL_PIN(218, "NAC_GBE_GPIO1_S2N" ), |
266 | PINCTRL_PIN(219, "NAC_GBE_GPIO2_S2N" ), |
267 | PINCTRL_PIN(220, "NAC_GBE_GPIO3_S2N" ), |
268 | PINCTRL_PIN(221, "NAC_GBE_SMB_DATA_IN" ), |
269 | PINCTRL_PIN(222, "NAC_GBE_SMB_DATA_OUT" ), |
270 | PINCTRL_PIN(223, "NAC_GBE_SMB_ALRT_N" ), |
271 | PINCTRL_PIN(224, "NAC_GBE_SMB_CLK_IN" ), |
272 | PINCTRL_PIN(225, "NAC_GBE_SMB_CLK_OUT" ), |
273 | /* GPP_M */ |
274 | PINCTRL_PIN(226, "GPP_M_0" ), |
275 | PINCTRL_PIN(227, "GPP_M_1" ), |
276 | PINCTRL_PIN(228, "GPP_M_2" ), |
277 | PINCTRL_PIN(229, "GPP_M_3" ), |
278 | PINCTRL_PIN(230, "NAC_WAKE_N" ), |
279 | PINCTRL_PIN(231, "GPP_M_5" ), |
280 | PINCTRL_PIN(232, "GPP_M_6" ), |
281 | PINCTRL_PIN(233, "GPP_M_7" ), |
282 | PINCTRL_PIN(234, "GPP_M_8" ), |
283 | PINCTRL_PIN(235, "NAC_SBLINK_S2N" ), |
284 | PINCTRL_PIN(236, "NAC_SBLINK_N2S" ), |
285 | PINCTRL_PIN(237, "NAC_SBLINK_CLK_N2S" ), |
286 | PINCTRL_PIN(238, "NAC_SBLINK_CLK_S2N" ), |
287 | PINCTRL_PIN(239, "NAC_XTAL_VALID" ), |
288 | PINCTRL_PIN(240, "NAC_RESET_NAC_N" ), |
289 | PINCTRL_PIN(241, "GPP_M_15" ), |
290 | PINCTRL_PIN(242, "GPP_M_16" ), |
291 | PINCTRL_PIN(243, "GPP_M_17" ), |
292 | /* GPP_N */ |
293 | PINCTRL_PIN(244, "GPP_N_0" ), |
294 | PINCTRL_PIN(245, "NAC_NCSI_TXD0" ), |
295 | PINCTRL_PIN(246, "GPP_N_2" ), |
296 | PINCTRL_PIN(247, "GPP_N_3" ), |
297 | PINCTRL_PIN(248, "NAC_NCSI_REFCLK_IN" ), |
298 | PINCTRL_PIN(249, "GPP_N_5" ), |
299 | PINCTRL_PIN(250, "GPP_N_6" ), |
300 | PINCTRL_PIN(251, "GPP_N_7" ), |
301 | PINCTRL_PIN(252, "NAC_NCSI_RXD0" ), |
302 | PINCTRL_PIN(253, "NAC_NCSI_RXD1" ), |
303 | PINCTRL_PIN(254, "NAC_NCSI_CRS_DV" ), |
304 | PINCTRL_PIN(255, "NAC_NCSI_CLK_IN" ), |
305 | PINCTRL_PIN(256, "NAC_NCSI_REFCLK_OUT" ), |
306 | PINCTRL_PIN(257, "NAC_NCSI_TX_EN" ), |
307 | PINCTRL_PIN(258, "NAC_NCSI_TXD1" ), |
308 | PINCTRL_PIN(259, "NAC_NCSI_OE_N" ), |
309 | PINCTRL_PIN(260, "NAC_GR_N" ), |
310 | PINCTRL_PIN(261, "NAC_INIT_SX_WAKE_N" ), |
311 | }; |
312 | |
313 | static const struct intel_padgroup [] = { |
314 | EBG_GPP(0, 0, 20), /* GPP_A */ |
315 | EBG_GPP(1, 21, 44), /* GPP_B */ |
316 | EBG_GPP(2, 45, 65), /* SPI */ |
317 | }; |
318 | |
319 | static const struct intel_padgroup [] = { |
320 | EBG_GPP(0, 66, 87), /* GPP_C */ |
321 | EBG_GPP(1, 88, 111), /* GPP_D */ |
322 | }; |
323 | |
324 | static const struct intel_padgroup [] = { |
325 | EBG_GPP(0, 112, 135), /* GPP_E */ |
326 | EBG_GPP(1, 136, 145), /* JTAG */ |
327 | }; |
328 | |
329 | static const struct intel_padgroup [] = { |
330 | EBG_GPP(0, 146, 165), /* GPP_H */ |
331 | EBG_GPP(1, 166, 183), /* GPP_J */ |
332 | }; |
333 | |
334 | static const struct intel_padgroup [] = { |
335 | EBG_GPP(0, 184, 207), /* GPP_I */ |
336 | EBG_GPP(1, 208, 225), /* GPP_L */ |
337 | EBG_GPP(2, 226, 243), /* GPP_M */ |
338 | EBG_GPP(3, 244, 261), /* GPP_N */ |
339 | }; |
340 | |
341 | static const struct intel_community ebg_communities[] = { |
342 | EBG_COMMUNITY(0, 0, 65, ebg_community0_gpps), |
343 | EBG_COMMUNITY(1, 66, 111, ebg_community1_gpps), |
344 | EBG_COMMUNITY(2, 112, 145, ebg_community3_gpps), |
345 | EBG_COMMUNITY(3, 146, 183, ebg_community4_gpps), |
346 | EBG_COMMUNITY(4, 184, 261, ebg_community5_gpps), |
347 | }; |
348 | |
349 | static const struct intel_pinctrl_soc_data ebg_soc_data = { |
350 | .pins = ebg_pins, |
351 | .npins = ARRAY_SIZE(ebg_pins), |
352 | .communities = ebg_communities, |
353 | .ncommunities = ARRAY_SIZE(ebg_communities), |
354 | }; |
355 | |
356 | static const struct acpi_device_id ebg_pinctrl_acpi_match[] = { |
357 | { "INTC1071" , (kernel_ulong_t)&ebg_soc_data }, |
358 | { } |
359 | }; |
360 | MODULE_DEVICE_TABLE(acpi, ebg_pinctrl_acpi_match); |
361 | |
362 | static struct platform_driver ebg_pinctrl_driver = { |
363 | .probe = intel_pinctrl_probe_by_hid, |
364 | .driver = { |
365 | .name = "emmitsburg-pinctrl" , |
366 | .acpi_match_table = ebg_pinctrl_acpi_match, |
367 | .pm = pm_sleep_ptr(&intel_pinctrl_pm_ops), |
368 | }, |
369 | }; |
370 | module_platform_driver(ebg_pinctrl_driver); |
371 | |
372 | MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>" ); |
373 | MODULE_DESCRIPTION("Intel Emmitsburg PCH pinctrl/GPIO driver" ); |
374 | MODULE_LICENSE("GPL v2" ); |
375 | MODULE_IMPORT_NS(PINCTRL_INTEL); |
376 | |