1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Intel Lewisburg pinctrl/GPIO driver
4 *
5 * Copyright (C) 2017, Intel Corporation
6 * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
7 */
8
9#include <linux/mod_devicetable.h>
10#include <linux/module.h>
11#include <linux/platform_device.h>
12#include <linux/pm.h>
13
14#include <linux/pinctrl/pinctrl.h>
15
16#include "pinctrl-intel.h"
17
18#define LBG_PAD_OWN 0x020
19#define LBG_PADCFGLOCK 0x060
20#define LBG_HOSTSW_OWN 0x080
21#define LBG_GPI_IS 0x100
22#define LBG_GPI_IE 0x110
23
24#define LBG_COMMUNITY(b, s, e) \
25 INTEL_COMMUNITY_SIZE(b, s, e, 24, 3, LBG)
26
27/* Lewisburg */
28static const struct pinctrl_pin_desc lbg_pins[] = {
29 /* GPP_A */
30 PINCTRL_PIN(0, "RCINB"),
31 PINCTRL_PIN(1, "LAD_0"),
32 PINCTRL_PIN(2, "LAD_1"),
33 PINCTRL_PIN(3, "LAD_2"),
34 PINCTRL_PIN(4, "LAD_3"),
35 PINCTRL_PIN(5, "LFRAMEB"),
36 PINCTRL_PIN(6, "SERIRQ"),
37 PINCTRL_PIN(7, "PIRQAB"),
38 PINCTRL_PIN(8, "CLKRUNB"),
39 PINCTRL_PIN(9, "CLKOUT_LPC_0"),
40 PINCTRL_PIN(10, "CLKOUT_LPC_1"),
41 PINCTRL_PIN(11, "PMEB"),
42 PINCTRL_PIN(12, "BM_BUSYB"),
43 PINCTRL_PIN(13, "SUSWARNB_SUSPWRDNACK"),
44 PINCTRL_PIN(14, "ESPI_RESETB"),
45 PINCTRL_PIN(15, "SUSACKB"),
46 PINCTRL_PIN(16, "CLKOUT_LPC_2"),
47 PINCTRL_PIN(17, "GPP_A_17"),
48 PINCTRL_PIN(18, "GPP_A_18"),
49 PINCTRL_PIN(19, "GPP_A_19"),
50 PINCTRL_PIN(20, "GPP_A_20"),
51 PINCTRL_PIN(21, "GPP_A_21"),
52 PINCTRL_PIN(22, "GPP_A_22"),
53 PINCTRL_PIN(23, "GPP_A_23"),
54 /* GPP_B */
55 PINCTRL_PIN(24, "CORE_VID_0"),
56 PINCTRL_PIN(25, "CORE_VID_1"),
57 PINCTRL_PIN(26, "VRALERTB"),
58 PINCTRL_PIN(27, "CPU_GP_2"),
59 PINCTRL_PIN(28, "CPU_GP_3"),
60 PINCTRL_PIN(29, "SRCCLKREQB_0"),
61 PINCTRL_PIN(30, "SRCCLKREQB_1"),
62 PINCTRL_PIN(31, "SRCCLKREQB_2"),
63 PINCTRL_PIN(32, "SRCCLKREQB_3"),
64 PINCTRL_PIN(33, "SRCCLKREQB_4"),
65 PINCTRL_PIN(34, "SRCCLKREQB_5"),
66 PINCTRL_PIN(35, "GPP_B_11"),
67 PINCTRL_PIN(36, "SLP_S0B"),
68 PINCTRL_PIN(37, "PLTRSTB"),
69 PINCTRL_PIN(38, "SPKR"),
70 PINCTRL_PIN(39, "GPP_B_15"),
71 PINCTRL_PIN(40, "GPP_B_16"),
72 PINCTRL_PIN(41, "GPP_B_17"),
73 PINCTRL_PIN(42, "GPP_B_18"),
74 PINCTRL_PIN(43, "GPP_B_19"),
75 PINCTRL_PIN(44, "GPP_B_20"),
76 PINCTRL_PIN(45, "GPP_B_21"),
77 PINCTRL_PIN(46, "GPP_B_22"),
78 PINCTRL_PIN(47, "SML1ALERTB"),
79 /* GPP_F */
80 PINCTRL_PIN(48, "SATAXPCIE_3"),
81 PINCTRL_PIN(49, "SATAXPCIE_4"),
82 PINCTRL_PIN(50, "SATAXPCIE_5"),
83 PINCTRL_PIN(51, "SATAXPCIE_6"),
84 PINCTRL_PIN(52, "SATAXPCIE_7"),
85 PINCTRL_PIN(53, "SATA_DEVSLP_3"),
86 PINCTRL_PIN(54, "SATA_DEVSLP_4"),
87 PINCTRL_PIN(55, "SATA_DEVSLP_5"),
88 PINCTRL_PIN(56, "SATA_DEVSLP_6"),
89 PINCTRL_PIN(57, "SATA_DEVSLP_7"),
90 PINCTRL_PIN(58, "SATA_SCLOCK"),
91 PINCTRL_PIN(59, "SATA_SLOAD"),
92 PINCTRL_PIN(60, "SATA_SDATAOUT1"),
93 PINCTRL_PIN(61, "SATA_SDATAOUT0"),
94 PINCTRL_PIN(62, "SSATA_LEDB"),
95 PINCTRL_PIN(63, "USB2_OCB_4"),
96 PINCTRL_PIN(64, "USB2_OCB_5"),
97 PINCTRL_PIN(65, "USB2_OCB_6"),
98 PINCTRL_PIN(66, "USB2_OCB_7"),
99 PINCTRL_PIN(67, "GBE_SMBUS_CLK"),
100 PINCTRL_PIN(68, "GBE_SMBDATA"),
101 PINCTRL_PIN(69, "GBE_SMBALRTN"),
102 PINCTRL_PIN(70, "SSATA_SCLOCK"),
103 PINCTRL_PIN(71, "SSATA_SLOAD"),
104 /* GPP_C */
105 PINCTRL_PIN(72, "SMBCLK"),
106 PINCTRL_PIN(73, "SMBDATA"),
107 PINCTRL_PIN(74, "SMBALERTB"),
108 PINCTRL_PIN(75, "SML0CLK"),
109 PINCTRL_PIN(76, "SML0DATA"),
110 PINCTRL_PIN(77, "SML0ALERTB"),
111 PINCTRL_PIN(78, "SML1CLK"),
112 PINCTRL_PIN(79, "SML1DATA"),
113 PINCTRL_PIN(80, "GPP_C_8"),
114 PINCTRL_PIN(81, "GPP_C_9"),
115 PINCTRL_PIN(82, "GPP_C_10"),
116 PINCTRL_PIN(83, "GPP_C_11"),
117 PINCTRL_PIN(84, "GPP_C_12"),
118 PINCTRL_PIN(85, "GPP_C_13"),
119 PINCTRL_PIN(86, "GPP_C_14"),
120 PINCTRL_PIN(87, "GPP_C_15"),
121 PINCTRL_PIN(88, "GPP_C_16"),
122 PINCTRL_PIN(89, "GPP_C_17"),
123 PINCTRL_PIN(90, "GPP_C_18"),
124 PINCTRL_PIN(91, "GPP_C_19"),
125 PINCTRL_PIN(92, "GPP_C_20"),
126 PINCTRL_PIN(93, "GPP_C_21"),
127 PINCTRL_PIN(94, "GPP_C_22"),
128 PINCTRL_PIN(95, "GPP_C_23"),
129 /* GPP_D */
130 PINCTRL_PIN(96, "GPP_D_0"),
131 PINCTRL_PIN(97, "GPP_D_1"),
132 PINCTRL_PIN(98, "GPP_D_2"),
133 PINCTRL_PIN(99, "GPP_D_3"),
134 PINCTRL_PIN(100, "GPP_D_4"),
135 PINCTRL_PIN(101, "SSP0_SFRM"),
136 PINCTRL_PIN(102, "SSP0_TXD"),
137 PINCTRL_PIN(103, "SSP0_RXD"),
138 PINCTRL_PIN(104, "SSP0_SCLK"),
139 PINCTRL_PIN(105, "SSATA_DEVSLP_3"),
140 PINCTRL_PIN(106, "SSATA_DEVSLP_4"),
141 PINCTRL_PIN(107, "SSATA_DEVSLP_5"),
142 PINCTRL_PIN(108, "SSATA_SDATAOUT1"),
143 PINCTRL_PIN(109, "SML0BCLK_SML0BCLKIE"),
144 PINCTRL_PIN(110, "SML0BDATA_SML0BDATAIE"),
145 PINCTRL_PIN(111, "SSATA_SDATAOUT0"),
146 PINCTRL_PIN(112, "SML0BALERTB_SML0BALERTBIE"),
147 PINCTRL_PIN(113, "DMIC_CLK_1"),
148 PINCTRL_PIN(114, "DMIC_DATA_1"),
149 PINCTRL_PIN(115, "DMIC_CLK_0"),
150 PINCTRL_PIN(116, "DMIC_DATA_0"),
151 PINCTRL_PIN(117, "IE_UART_RXD"),
152 PINCTRL_PIN(118, "IE_UART_TXD"),
153 PINCTRL_PIN(119, "GPP_D_23"),
154 /* GPP_E */
155 PINCTRL_PIN(120, "SATAXPCIE_0"),
156 PINCTRL_PIN(121, "SATAXPCIE_1"),
157 PINCTRL_PIN(122, "SATAXPCIE_2"),
158 PINCTRL_PIN(123, "CPU_GP_0"),
159 PINCTRL_PIN(124, "SATA_DEVSLP_0"),
160 PINCTRL_PIN(125, "SATA_DEVSLP_1"),
161 PINCTRL_PIN(126, "SATA_DEVSLP_2"),
162 PINCTRL_PIN(127, "CPU_GP_1"),
163 PINCTRL_PIN(128, "SATA_LEDB"),
164 PINCTRL_PIN(129, "USB2_OCB_0"),
165 PINCTRL_PIN(130, "USB2_OCB_1"),
166 PINCTRL_PIN(131, "USB2_OCB_2"),
167 PINCTRL_PIN(132, "USB2_OCB_3"),
168 /* GPP_I */
169 PINCTRL_PIN(133, "GBE_TDO"),
170 PINCTRL_PIN(134, "GBE_TCK"),
171 PINCTRL_PIN(135, "GBE_TMS"),
172 PINCTRL_PIN(136, "GBE_TDI"),
173 PINCTRL_PIN(137, "DO_RESET_INB"),
174 PINCTRL_PIN(138, "DO_RESET_OUTB"),
175 PINCTRL_PIN(139, "RESET_DONE"),
176 PINCTRL_PIN(140, "GBE_TRST_N"),
177 PINCTRL_PIN(141, "GBE_PCI_DIS"),
178 PINCTRL_PIN(142, "GBE_LAN_DIS"),
179 PINCTRL_PIN(143, "GPP_I_10"),
180 /* GPP_J */
181 PINCTRL_PIN(144, "GBE_LED_0_0"),
182 PINCTRL_PIN(145, "GBE_LED_0_1"),
183 PINCTRL_PIN(146, "GBE_LED_1_0"),
184 PINCTRL_PIN(147, "GBE_LED_1_1"),
185 PINCTRL_PIN(148, "GBE_LED_2_0"),
186 PINCTRL_PIN(149, "GBE_LED_2_1"),
187 PINCTRL_PIN(150, "GBE_LED_3_0"),
188 PINCTRL_PIN(151, "GBE_LED_3_1"),
189 PINCTRL_PIN(152, "GBE_SCL_0"),
190 PINCTRL_PIN(153, "GBE_SDA_0"),
191 PINCTRL_PIN(154, "GBE_SCL_1"),
192 PINCTRL_PIN(155, "GBE_SDA_1"),
193 PINCTRL_PIN(156, "GBE_SCL_2"),
194 PINCTRL_PIN(157, "GBE_SDA_2"),
195 PINCTRL_PIN(158, "GBE_SCL_3"),
196 PINCTRL_PIN(159, "GBE_SDA_3"),
197 PINCTRL_PIN(160, "GBE_SDP_0_0"),
198 PINCTRL_PIN(161, "GBE_SDP_0_1"),
199 PINCTRL_PIN(162, "GBE_SDP_1_0"),
200 PINCTRL_PIN(163, "GBE_SDP_1_1"),
201 PINCTRL_PIN(164, "GBE_SDP_2_0"),
202 PINCTRL_PIN(165, "GBE_SDP_2_1"),
203 PINCTRL_PIN(166, "GBE_SDP_3_0"),
204 PINCTRL_PIN(167, "GBE_SDP_3_1"),
205 /* GPP_K */
206 PINCTRL_PIN(168, "GBE_RMIICLK"),
207 PINCTRL_PIN(169, "GBE_RMII_RXD_0"),
208 PINCTRL_PIN(170, "GBE_RMII_RXD_1"),
209 PINCTRL_PIN(171, "GBE_RMII_CRS_DV"),
210 PINCTRL_PIN(172, "GBE_RMII_TX_EN"),
211 PINCTRL_PIN(173, "GBE_RMII_TXD_0"),
212 PINCTRL_PIN(174, "GBE_RMII_TXD_1"),
213 PINCTRL_PIN(175, "GBE_RMII_RX_ER"),
214 PINCTRL_PIN(176, "GBE_RMII_ARBIN"),
215 PINCTRL_PIN(177, "GBE_RMII_ARB_OUT"),
216 PINCTRL_PIN(178, "PE_RST_N"),
217 /* GPP_G */
218 PINCTRL_PIN(179, "FAN_TACH_0"),
219 PINCTRL_PIN(180, "FAN_TACH_1"),
220 PINCTRL_PIN(181, "FAN_TACH_2"),
221 PINCTRL_PIN(182, "FAN_TACH_3"),
222 PINCTRL_PIN(183, "FAN_TACH_4"),
223 PINCTRL_PIN(184, "FAN_TACH_5"),
224 PINCTRL_PIN(185, "FAN_TACH_6"),
225 PINCTRL_PIN(186, "FAN_TACH_7"),
226 PINCTRL_PIN(187, "FAN_PWM_0"),
227 PINCTRL_PIN(188, "FAN_PWM_1"),
228 PINCTRL_PIN(189, "FAN_PWM_2"),
229 PINCTRL_PIN(190, "FAN_PWM_3"),
230 PINCTRL_PIN(191, "GSXDOUT"),
231 PINCTRL_PIN(192, "GSXSLOAD"),
232 PINCTRL_PIN(193, "GSXDIN"),
233 PINCTRL_PIN(194, "GSXSRESETB"),
234 PINCTRL_PIN(195, "GSXCLK"),
235 PINCTRL_PIN(196, "ADR_COMPLETE"),
236 PINCTRL_PIN(197, "NMIB"),
237 PINCTRL_PIN(198, "SMIB"),
238 PINCTRL_PIN(199, "SSATA_DEVSLP_0"),
239 PINCTRL_PIN(200, "SSATA_DEVSLP_1"),
240 PINCTRL_PIN(201, "SSATA_DEVSLP_2"),
241 PINCTRL_PIN(202, "SSATAXPCIE0_SSATAGP0"),
242 /* GPP_H */
243 PINCTRL_PIN(203, "SRCCLKREQB_6"),
244 PINCTRL_PIN(204, "SRCCLKREQB_7"),
245 PINCTRL_PIN(205, "SRCCLKREQB_8"),
246 PINCTRL_PIN(206, "SRCCLKREQB_9"),
247 PINCTRL_PIN(207, "SRCCLKREQB_10"),
248 PINCTRL_PIN(208, "SRCCLKREQB_11"),
249 PINCTRL_PIN(209, "SRCCLKREQB_12"),
250 PINCTRL_PIN(210, "SRCCLKREQB_13"),
251 PINCTRL_PIN(211, "SRCCLKREQB_14"),
252 PINCTRL_PIN(212, "SRCCLKREQB_15"),
253 PINCTRL_PIN(213, "SML2CLK"),
254 PINCTRL_PIN(214, "SML2DATA"),
255 PINCTRL_PIN(215, "SML2ALERTB"),
256 PINCTRL_PIN(216, "SML3CLK"),
257 PINCTRL_PIN(217, "SML3DATA"),
258 PINCTRL_PIN(218, "SML3ALERTB"),
259 PINCTRL_PIN(219, "SML4CLK"),
260 PINCTRL_PIN(220, "SML4DATA"),
261 PINCTRL_PIN(221, "SML4ALERTB"),
262 PINCTRL_PIN(222, "SSATAXPCIE1_SSATAGP1"),
263 PINCTRL_PIN(223, "SSATAXPCIE2_SSATAGP2"),
264 PINCTRL_PIN(224, "SSATAXPCIE3_SSATAGP3"),
265 PINCTRL_PIN(225, "SSATAXPCIE4_SSATAGP4"),
266 PINCTRL_PIN(226, "SSATAXPCIE5_SSATAGP5"),
267 /* GPP_L */
268 PINCTRL_PIN(227, "GPP_L_0"),
269 PINCTRL_PIN(228, "EC_CSME_INTR_OUT"),
270 PINCTRL_PIN(229, "VISA2CH0_D0"),
271 PINCTRL_PIN(230, "VISA2CH0_D1"),
272 PINCTRL_PIN(231, "VISA2CH0_D2"),
273 PINCTRL_PIN(232, "VISA2CH0_D3"),
274 PINCTRL_PIN(233, "VISA2CH0_D4"),
275 PINCTRL_PIN(234, "VISA2CH0_D5"),
276 PINCTRL_PIN(235, "VISA2CH0_D6"),
277 PINCTRL_PIN(236, "VISA2CH0_D7"),
278 PINCTRL_PIN(237, "VISA2CH0_CLK"),
279 PINCTRL_PIN(238, "VISA2CH1_D0"),
280 PINCTRL_PIN(239, "VISA2CH1_D1"),
281 PINCTRL_PIN(240, "VISA2CH1_D2"),
282 PINCTRL_PIN(241, "VISA2CH1_D3"),
283 PINCTRL_PIN(242, "VISA2CH1_D4"),
284 PINCTRL_PIN(243, "VISA2CH1_D5"),
285 PINCTRL_PIN(244, "VISA2CH1_D6"),
286 PINCTRL_PIN(245, "VISA2CH1_D7"),
287 PINCTRL_PIN(246, "VISA2CH1_CLK"),
288};
289
290static const struct intel_community lbg_communities[] = {
291 LBG_COMMUNITY(0, 0, 71),
292 LBG_COMMUNITY(1, 72, 132),
293 LBG_COMMUNITY(3, 133, 143),
294 LBG_COMMUNITY(4, 144, 178),
295 LBG_COMMUNITY(5, 179, 246),
296};
297
298static const struct intel_pinctrl_soc_data lbg_soc_data = {
299 .pins = lbg_pins,
300 .npins = ARRAY_SIZE(lbg_pins),
301 .communities = lbg_communities,
302 .ncommunities = ARRAY_SIZE(lbg_communities),
303};
304
305static const struct acpi_device_id lbg_pinctrl_acpi_match[] = {
306 { "INT3536", (kernel_ulong_t)&lbg_soc_data },
307 { }
308};
309MODULE_DEVICE_TABLE(acpi, lbg_pinctrl_acpi_match);
310
311static struct platform_driver lbg_pinctrl_driver = {
312 .probe = intel_pinctrl_probe_by_hid,
313 .driver = {
314 .name = "lewisburg-pinctrl",
315 .acpi_match_table = lbg_pinctrl_acpi_match,
316 .pm = pm_sleep_ptr(&intel_pinctrl_pm_ops),
317 },
318};
319module_platform_driver(lbg_pinctrl_driver);
320
321MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
322MODULE_DESCRIPTION("Intel Lewisburg pinctrl/GPIO driver");
323MODULE_LICENSE("GPL v2");
324MODULE_IMPORT_NS(PINCTRL_INTEL);
325

source code of linux/drivers/pinctrl/intel/pinctrl-lewisburg.c