1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * Copyright (c) 2015 MediaTek Inc. |
4 | * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com> |
5 | */ |
6 | |
7 | #include <linux/init.h> |
8 | #include <linux/platform_device.h> |
9 | #include <linux/of.h> |
10 | #include <linux/pinctrl/pinctrl.h> |
11 | #include <linux/pinctrl/pinconf-generic.h> |
12 | #include <linux/mfd/mt6397/core.h> |
13 | |
14 | #include "pinctrl-mtk-common.h" |
15 | #include "pinctrl-mtk-mt6397.h" |
16 | |
17 | #define MT6397_PIN_REG_BASE 0xc000 |
18 | |
19 | static const struct mtk_pinctrl_devdata mt6397_pinctrl_data = { |
20 | .pins = mtk_pins_mt6397, |
21 | .npins = ARRAY_SIZE(mtk_pins_mt6397), |
22 | .dir_offset = (MT6397_PIN_REG_BASE + 0x000), |
23 | .ies_offset = MTK_PINCTRL_NOT_SUPPORT, |
24 | .smt_offset = MTK_PINCTRL_NOT_SUPPORT, |
25 | .pullen_offset = (MT6397_PIN_REG_BASE + 0x020), |
26 | .pullsel_offset = (MT6397_PIN_REG_BASE + 0x040), |
27 | .dout_offset = (MT6397_PIN_REG_BASE + 0x080), |
28 | .din_offset = (MT6397_PIN_REG_BASE + 0x0a0), |
29 | .pinmux_offset = (MT6397_PIN_REG_BASE + 0x0c0), |
30 | .type1_start = 41, |
31 | .type1_end = 41, |
32 | .port_shf = 3, |
33 | .port_mask = 0x3, |
34 | .port_align = 2, |
35 | .mode_mask = 0xf, |
36 | .mode_per_reg = 5, |
37 | .mode_shf = 4, |
38 | }; |
39 | |
40 | static int mt6397_pinctrl_probe(struct platform_device *pdev) |
41 | { |
42 | struct mt6397_chip *mt6397; |
43 | |
44 | mt6397 = dev_get_drvdata(dev: pdev->dev.parent); |
45 | return mtk_pctrl_init(pdev, data: &mt6397_pinctrl_data, regmap: mt6397->regmap); |
46 | } |
47 | |
48 | static const struct of_device_id mt6397_pctrl_match[] = { |
49 | { .compatible = "mediatek,mt6397-pinctrl" , }, |
50 | { } |
51 | }; |
52 | |
53 | static struct platform_driver mtk_pinctrl_driver = { |
54 | .probe = mt6397_pinctrl_probe, |
55 | .driver = { |
56 | .name = "mediatek-mt6397-pinctrl" , |
57 | .of_match_table = mt6397_pctrl_match, |
58 | }, |
59 | }; |
60 | |
61 | builtin_platform_driver(mtk_pinctrl_driver); |
62 | |