1 | // SPDX-License-Identifier: (GPL-2.0-only OR MIT) |
2 | /* |
3 | * Pin controller and GPIO driver for Amlogic C3 SoC. |
4 | * |
5 | * Copyright (c) 2021 Amlogic, Inc. All rights reserved. |
6 | * Author: Huqiang Qin <huqiang.qin@amlogic.com> |
7 | */ |
8 | |
9 | #include <dt-bindings/gpio/amlogic-c3-gpio.h> |
10 | #include "pinctrl-meson.h" |
11 | #include "pinctrl-meson-axg-pmx.h" |
12 | |
13 | static const struct pinctrl_pin_desc c3_periphs_pins[] = { |
14 | MESON_PIN(GPIOE_0), |
15 | MESON_PIN(GPIOE_1), |
16 | MESON_PIN(GPIOE_2), |
17 | MESON_PIN(GPIOE_3), |
18 | MESON_PIN(GPIOE_4), |
19 | MESON_PIN(GPIOB_0), |
20 | MESON_PIN(GPIOB_1), |
21 | MESON_PIN(GPIOB_2), |
22 | MESON_PIN(GPIOB_3), |
23 | MESON_PIN(GPIOB_4), |
24 | MESON_PIN(GPIOB_5), |
25 | MESON_PIN(GPIOB_6), |
26 | MESON_PIN(GPIOB_7), |
27 | MESON_PIN(GPIOB_8), |
28 | MESON_PIN(GPIOB_9), |
29 | MESON_PIN(GPIOB_10), |
30 | MESON_PIN(GPIOB_11), |
31 | MESON_PIN(GPIOB_12), |
32 | MESON_PIN(GPIOB_13), |
33 | MESON_PIN(GPIOB_14), |
34 | MESON_PIN(GPIOC_0), |
35 | MESON_PIN(GPIOC_1), |
36 | MESON_PIN(GPIOC_2), |
37 | MESON_PIN(GPIOC_3), |
38 | MESON_PIN(GPIOC_4), |
39 | MESON_PIN(GPIOC_5), |
40 | MESON_PIN(GPIOC_6), |
41 | MESON_PIN(GPIOX_0), |
42 | MESON_PIN(GPIOX_1), |
43 | MESON_PIN(GPIOX_2), |
44 | MESON_PIN(GPIOX_3), |
45 | MESON_PIN(GPIOX_4), |
46 | MESON_PIN(GPIOX_5), |
47 | MESON_PIN(GPIOX_6), |
48 | MESON_PIN(GPIOX_7), |
49 | MESON_PIN(GPIOX_8), |
50 | MESON_PIN(GPIOX_9), |
51 | MESON_PIN(GPIOX_10), |
52 | MESON_PIN(GPIOX_11), |
53 | MESON_PIN(GPIOX_12), |
54 | MESON_PIN(GPIOX_13), |
55 | MESON_PIN(GPIOD_0), |
56 | MESON_PIN(GPIOD_1), |
57 | MESON_PIN(GPIOD_2), |
58 | MESON_PIN(GPIOD_3), |
59 | MESON_PIN(GPIOD_4), |
60 | MESON_PIN(GPIOD_5), |
61 | MESON_PIN(GPIOD_6), |
62 | MESON_PIN(GPIOA_0), |
63 | MESON_PIN(GPIOA_1), |
64 | MESON_PIN(GPIOA_2), |
65 | MESON_PIN(GPIOA_3), |
66 | MESON_PIN(GPIOA_4), |
67 | MESON_PIN(GPIOA_5), |
68 | MESON_PIN(GPIO_TEST_N), |
69 | }; |
70 | |
71 | /* Bank E func1 */ |
72 | static const unsigned int pwm_a_pins[] = { GPIOE_0 }; |
73 | static const unsigned int pwm_b_pins[] = { GPIOE_1 }; |
74 | static const unsigned int i2c2_sda_pins[] = { GPIOE_2 }; |
75 | static const unsigned int i2c2_scl_pins[] = { GPIOE_3 }; |
76 | static const unsigned int gen_clk_e_pins[] = { GPIOE_4 }; |
77 | |
78 | /* Bank E func2 */ |
79 | static const unsigned int i2c0_sda_e_pins[] = { GPIOE_0 }; |
80 | static const unsigned int i2c0_scl_e_pins[] = { GPIOE_1 }; |
81 | static const unsigned int clk_32k_in_pins[] = { GPIOE_4 }; |
82 | |
83 | /* Bank E func3 */ |
84 | static const unsigned int i2c_slave_scl_pins[] = { GPIOE_0 }; |
85 | static const unsigned int i2c_slave_sda_pins[] = { GPIOE_1 }; |
86 | static const unsigned int clk12_24_e_pins[] = { GPIOE_4 }; |
87 | |
88 | /* Bank B func1 */ |
89 | static const unsigned int emmc_nand_d0_pins[] = { GPIOB_0 }; |
90 | static const unsigned int emmc_nand_d1_pins[] = { GPIOB_1 }; |
91 | static const unsigned int emmc_nand_d2_pins[] = { GPIOB_2 }; |
92 | static const unsigned int emmc_nand_d3_pins[] = { GPIOB_3 }; |
93 | static const unsigned int emmc_nand_d4_pins[] = { GPIOB_4 }; |
94 | static const unsigned int emmc_nand_d5_pins[] = { GPIOB_5 }; |
95 | static const unsigned int emmc_nand_d6_pins[] = { GPIOB_6 }; |
96 | static const unsigned int emmc_nand_d7_pins[] = { GPIOB_7 }; |
97 | static const unsigned int emmc_clk_pins[] = { GPIOB_8 }; |
98 | static const unsigned int emmc_rst_pins[] = { GPIOB_9 }; |
99 | static const unsigned int emmc_cmd_pins[] = { GPIOB_10 }; |
100 | static const unsigned int emmc_nand_ds_pins[] = { GPIOB_11 }; |
101 | |
102 | /* Bank B func2 */ |
103 | static const unsigned int nand_wen_clk_pins[] = { GPIOB_8 }; |
104 | static const unsigned int nand_ale_pins[] = { GPIOB_9 }; |
105 | static const unsigned int nand_ren_wr_pins[] = { GPIOB_10 }; |
106 | static const unsigned int nand_cle_pins[] = { GPIOB_11 }; |
107 | static const unsigned int nand_ce0_pins[] = { GPIOB_12 }; |
108 | |
109 | /* Bank B func3 */ |
110 | static const unsigned int pwm_g_b_pins[] = { GPIOB_0 }; |
111 | static const unsigned int pwm_h_b_pins[] = { GPIOB_1 }; |
112 | static const unsigned int pwm_i_b_pins[] = { GPIOB_2 }; |
113 | static const unsigned int spif_hold_pins[] = { GPIOB_3 }; |
114 | static const unsigned int spif_mo_pins[] = { GPIOB_4 }; |
115 | static const unsigned int spif_mi_pins[] = { GPIOB_5 }; |
116 | static const unsigned int spif_clk_pins[] = { GPIOB_6 }; |
117 | static const unsigned int spif_wp_pins[] = { GPIOB_7 }; |
118 | static const unsigned int pwm_j_b_pins[] = { GPIOB_8 }; |
119 | static const unsigned int pwm_k_b_pins[] = { GPIOB_9 }; |
120 | static const unsigned int pwm_l_b_pins[] = { GPIOB_10 }; |
121 | static const unsigned int pwm_m_b_pins[] = { GPIOB_11 }; |
122 | static const unsigned int pwm_n_b_pins[] = { GPIOB_12 }; |
123 | static const unsigned int spif_cs_pins[] = { GPIOB_13 }; |
124 | static const unsigned int spif_clk_loop_pins[] = { GPIOB_14 }; |
125 | |
126 | /* Bank B func4 */ |
127 | static const unsigned int lcd_d0_pins[] = { GPIOB_0 }; |
128 | static const unsigned int lcd_d1_pins[] = { GPIOB_1 }; |
129 | static const unsigned int lcd_d2_pins[] = { GPIOB_2 }; |
130 | static const unsigned int lcd_d3_pins[] = { GPIOB_8 }; |
131 | static const unsigned int lcd_d4_pins[] = { GPIOB_9 }; |
132 | static const unsigned int lcd_d5_pins[] = { GPIOB_10 }; |
133 | static const unsigned int lcd_d6_pins[] = { GPIOB_11 }; |
134 | static const unsigned int lcd_d7_pins[] = { GPIOB_12 }; |
135 | |
136 | /* Bank B func5 */ |
137 | static const unsigned int spi_a_mosi_b_pins[] = { GPIOB_0 }; |
138 | static const unsigned int spi_a_miso_b_pins[] = { GPIOB_1 }; |
139 | static const unsigned int spi_a_clk_b_pins[] = { GPIOB_2 }; |
140 | static const unsigned int spi_a_ss0_b_pins[] = { GPIOB_8 }; |
141 | static const unsigned int spi_a_ss1_b_pins[] = { GPIOB_9 }; |
142 | static const unsigned int spi_a_ss2_b_pins[] = { GPIOB_10 }; |
143 | static const unsigned int i2c1_sda_b_pins[] = { GPIOB_11 }; |
144 | static const unsigned int i2c1_scl_b_pins[] = { GPIOB_12 }; |
145 | |
146 | /* Bank B func6 */ |
147 | static const unsigned int uart_a_tx_b_pins[] = { GPIOB_0 }; |
148 | static const unsigned int uart_a_rx_b_pins[] = { GPIOB_1 }; |
149 | static const unsigned int uart_a_cts_b_pins[] = { GPIOB_2 }; |
150 | static const unsigned int uart_a_rts_b_pins[] = { GPIOB_8 }; |
151 | static const unsigned int uart_d_tx_b_pins[] = { GPIOB_9 }; |
152 | static const unsigned int uart_d_rx_b_pins[] = { GPIOB_10 }; |
153 | static const unsigned int pdm_dclk_b_pins[] = { GPIOB_11 }; |
154 | static const unsigned int pdm_din0_b_pins[] = { GPIOB_12 }; |
155 | |
156 | /* Bank C func1 */ |
157 | static const unsigned int sdcard_d0_pins[] = { GPIOC_0 }; |
158 | static const unsigned int sdcard_d1_pins[] = { GPIOC_1 }; |
159 | static const unsigned int sdcard_d2_pins[] = { GPIOC_2 }; |
160 | static const unsigned int sdcard_d3_pins[] = { GPIOC_3 }; |
161 | static const unsigned int sdcard_clk_pins[] = { GPIOC_4 }; |
162 | static const unsigned int sdcard_cmd_pins[] = { GPIOC_5 }; |
163 | static const unsigned int sdcard_cd_pins[] = { GPIOC_6 }; |
164 | |
165 | /* Bank C func2 */ |
166 | static const unsigned int jtag_b_tdo_pins[] = { GPIOC_0 }; |
167 | static const unsigned int jtag_b_tdi_pins[] = { GPIOC_1 }; |
168 | static const unsigned int uart_b_rx_c_pins[] = { GPIOC_2 }; |
169 | static const unsigned int uart_b_tx_c_pins[] = { GPIOC_3 }; |
170 | static const unsigned int jtag_b_clk_pins[] = { GPIOC_4 }; |
171 | static const unsigned int jtag_b_tms_pins[] = { GPIOC_5 }; |
172 | static const unsigned int gen_clk_c_pins[] = { GPIOC_6 }; |
173 | |
174 | /* Bank C func3 */ |
175 | static const unsigned int tdm_d3_pins[] = { GPIOC_0 }; |
176 | static const unsigned int tdm_d2_pins[] = { GPIOC_1 }; |
177 | static const unsigned int mclk_1_pins[] = { GPIOC_2 }; |
178 | static const unsigned int tdm_sclk1_pins[] = { GPIOC_3 }; |
179 | static const unsigned int tdm_fs1_pins[] = { GPIOC_4 }; |
180 | static const unsigned int pdm_dclk_c_pins[] = { GPIOC_5 }; |
181 | static const unsigned int pdm_din0_c_pins[] = { GPIOC_6 }; |
182 | |
183 | /* Bank C func4 */ |
184 | static const unsigned int spi_a_mosi_c_pins[] = { GPIOC_0 }; |
185 | static const unsigned int spi_a_miso_c_pins[] = { GPIOC_1 }; |
186 | static const unsigned int spi_a_clk_c_pins[] = { GPIOC_2 }; |
187 | static const unsigned int spi_a_ss0_c_pins[] = { GPIOC_3 }; |
188 | static const unsigned int spi_a_ss1_c_pins[] = { GPIOC_4 }; |
189 | |
190 | /* Bank C func5 */ |
191 | static const unsigned int pwm_g_c_pins[] = { GPIOC_0 }; |
192 | static const unsigned int pwm_h_c_pins[] = { GPIOC_1 }; |
193 | static const unsigned int pwm_i_c_pins[] = { GPIOC_2 }; |
194 | static const unsigned int pwm_j_c_pins[] = { GPIOC_3 }; |
195 | static const unsigned int pwm_k_c_pins[] = { GPIOC_4 }; |
196 | static const unsigned int pwm_l_c_pins[] = { GPIOC_5 }; |
197 | static const unsigned int pwm_m_c_pins[] = { GPIOC_6 }; |
198 | |
199 | /* Bank C func6 */ |
200 | static const unsigned int uart_a_rx_c_pins[] = { GPIOC_0 }; |
201 | static const unsigned int uart_a_tx_c_pins[] = { GPIOC_1 }; |
202 | static const unsigned int uart_c_rx_c_pins[] = { GPIOC_2 }; |
203 | static const unsigned int uart_c_tx_c_pins[] = { GPIOC_3 }; |
204 | static const unsigned int i2c3_sda_c_pins[] = { GPIOC_4 }; |
205 | static const unsigned int i2c3_scl_c_pins[] = { GPIOC_5 }; |
206 | static const unsigned int clk12_24_c_pins[] = { GPIOC_6 }; |
207 | |
208 | /* Bank X func1 */ |
209 | static const unsigned int sdio_d0_pins[] = { GPIOX_0 }; |
210 | static const unsigned int sdio_d1_pins[] = { GPIOX_1 }; |
211 | static const unsigned int sdio_d2_pins[] = { GPIOX_2 }; |
212 | static const unsigned int sdio_d3_pins[] = { GPIOX_3 }; |
213 | static const unsigned int sdio_clk_pins[] = { GPIOX_4 }; |
214 | static const unsigned int sdio_cmd_pins[] = { GPIOX_5 }; |
215 | static const unsigned int clk12_24_x_pins[] = { GPIOX_6 }; |
216 | static const unsigned int uart_e_tx_x_pins[] = { GPIOX_7 }; |
217 | static const unsigned int uart_e_rx_x_pins[] = { GPIOX_8 }; |
218 | static const unsigned int uart_e_cts_pins[] = { GPIOX_9 }; |
219 | static const unsigned int uart_e_rts_pins[] = { GPIOX_10 }; |
220 | static const unsigned int pwm_e_pins[] = { GPIOX_11 }; |
221 | static const unsigned int pwm_j_x12_pins[] = { GPIOX_12 }; |
222 | static const unsigned int pwm_k_x13_pins[] = { GPIOX_13 }; |
223 | |
224 | /* Bank X func2 */ |
225 | static const unsigned int spi_a_mosi_x_pins[] = { GPIOX_0 }; |
226 | static const unsigned int spi_a_miso_x_pins[] = { GPIOX_1 }; |
227 | static const unsigned int spi_a_clk_x_pins[] = { GPIOX_2 }; |
228 | static const unsigned int spi_a_ss0_x_pins[] = { GPIOX_3 }; |
229 | static const unsigned int spi_a_ss1_x_pins[] = { GPIOX_4 }; |
230 | static const unsigned int spi_a_ss2_x_pins[] = { GPIOX_5 }; |
231 | static const unsigned int spi_b_ss2_x6_pins[] = { GPIOX_6 }; |
232 | static const unsigned int spi_b_miso_x_pins[] = { GPIOX_7 }; |
233 | static const unsigned int spi_b_clk_x_pins[] = { GPIOX_8 }; |
234 | static const unsigned int spi_b_mosi_x_pins[] = { GPIOX_9 }; |
235 | static const unsigned int spi_b_ss0_x_pins[] = { GPIOX_10 }; |
236 | static const unsigned int spi_b_ss1_x_pins[] = { GPIOX_11 }; |
237 | static const unsigned int spi_b_ss2_x12_pins[] = { GPIOX_12 }; |
238 | static const unsigned int gen_clk_x_pins[] = { GPIOX_13 }; |
239 | |
240 | /* Bank X func3 */ |
241 | static const unsigned int tdm_d1_x_pins[] = { GPIOX_0 }; |
242 | static const unsigned int tdm_d0_x_pins[] = { GPIOX_1 }; |
243 | static const unsigned int mclk_0_x_pins[] = { GPIOX_2 }; |
244 | static const unsigned int tdm_sclk0_x_pins[] = { GPIOX_3 }; |
245 | static const unsigned int tdm_fs0_x_pins[] = { GPIOX_4 }; |
246 | static const unsigned int pdm_dclk_x5_pins[] = { GPIOX_5 }; |
247 | static const unsigned int pdm_din0_x6_pins[] = { GPIOX_6 }; |
248 | static const unsigned int pdm_din0_x9_pins[] = { GPIOX_9 }; |
249 | static const unsigned int pdm_dclk_x10_pins[] = { GPIOX_10 }; |
250 | static const unsigned int clk12_24_x13_pins[] = { GPIOX_13 }; |
251 | |
252 | /* Bank X func4 */ |
253 | static const unsigned int lcd_d8_pins[] = { GPIOX_0 }; |
254 | static const unsigned int lcd_d9_pins[] = { GPIOX_1 }; |
255 | static const unsigned int lcd_d10_pins[] = { GPIOX_2 }; |
256 | static const unsigned int lcd_d11_pins[] = { GPIOX_3 }; |
257 | static const unsigned int lcd_d12_pins[] = { GPIOX_4 }; |
258 | static const unsigned int lcd_d13_pins[] = { GPIOX_5 }; |
259 | static const unsigned int lcd_d14_pins[] = { GPIOX_6 }; |
260 | static const unsigned int lcd_d15_pins[] = { GPIOX_7 }; |
261 | static const unsigned int lcd_vs_pins[] = { GPIOX_8 }; |
262 | static const unsigned int lcd_hs_pins[] = { GPIOX_9 }; |
263 | static const unsigned int lcd_den_pins[] = { GPIOX_10 }; |
264 | static const unsigned int lcd_d16_pins[] = { GPIOX_11 }; |
265 | static const unsigned int lcd_clk_x_pins[] = { GPIOX_12 }; |
266 | static const unsigned int lcd_d17_pins[] = { GPIOX_13 }; |
267 | |
268 | /* Bank X func5 */ |
269 | static const unsigned int pwm_g_x0_pins[] = { GPIOX_0 }; |
270 | static const unsigned int pwm_h_x1_pins[] = { GPIOX_1 }; |
271 | static const unsigned int pwm_i_x2_pins[] = { GPIOX_2 }; |
272 | static const unsigned int pwm_j_x3_pins[] = { GPIOX_3 }; |
273 | static const unsigned int pwm_k_x4_pins[] = { GPIOX_4 }; |
274 | static const unsigned int pwm_l_x_pins[] = { GPIOX_5 }; |
275 | static const unsigned int pwm_m_x_pins[] = { GPIOX_6 }; |
276 | static const unsigned int pwm_n_x_pins[] = { GPIOX_7 }; |
277 | static const unsigned int pwm_g_x8_pins[] = { GPIOX_8 }; |
278 | static const unsigned int pwm_h_x9_pins[] = { GPIOX_9 }; |
279 | static const unsigned int pwm_i_x10_pins[] = { GPIOX_10 }; |
280 | static const unsigned int clk12_24_x11_pins[] = { GPIOX_11 }; |
281 | |
282 | /* Bank X func6 */ |
283 | static const unsigned int uart_a_rx_x_pins[] = { GPIOX_0 }; |
284 | static const unsigned int uart_a_tx_x_pins[] = { GPIOX_1 }; |
285 | static const unsigned int uart_c_rx_x_pins[] = { GPIOX_2 }; |
286 | static const unsigned int uart_c_tx_x_pins[] = { GPIOX_3 }; |
287 | static const unsigned int i2c3_sda_x_pins[] = { GPIOX_4 }; |
288 | static const unsigned int i2c3_scl_x_pins[] = { GPIOX_5 }; |
289 | static const unsigned int i2c1_sda_x_pins[] = { GPIOX_7 }; |
290 | static const unsigned int i2c1_scl_x_pins[] = { GPIOX_8 }; |
291 | static const unsigned int uart_d_tx_x_pins[] = { GPIOX_9 }; |
292 | static const unsigned int uart_d_rx_x_pins[] = { GPIOX_10 }; |
293 | |
294 | /* Bank D func1 */ |
295 | static const unsigned int pwm_g_d_pins[] = { GPIOD_0 }; |
296 | static const unsigned int pwm_h_d_pins[] = { GPIOD_1 }; |
297 | static const unsigned int eth_led_act_pins[] = { GPIOD_2 }; |
298 | static const unsigned int eth_led_link_pins[] = { GPIOD_3 }; |
299 | static const unsigned int pwm_d_pins[] = { GPIOD_4 }; |
300 | static const unsigned int pwm_f_pins[] = { GPIOD_5 }; |
301 | static const unsigned int pwm_k_d_pins[] = { GPIOD_6 }; |
302 | |
303 | /* Bank D func2 */ |
304 | static const unsigned int uart_a_tx_d_pins[] = { GPIOD_0 }; |
305 | static const unsigned int uart_a_rx_d_pins[] = { GPIOD_1 }; |
306 | static const unsigned int spi_b_miso_d_pins[] = { GPIOD_2 }; |
307 | static const unsigned int spi_b_clk_d_pins[] = { GPIOD_3 }; |
308 | static const unsigned int spi_b_mosi_d_pins[] = { GPIOD_4 }; |
309 | static const unsigned int spi_b_ss0_d_pins[] = { GPIOD_5 }; |
310 | static const unsigned int spi_b_ss1_d_pins[] = { GPIOD_6 }; |
311 | |
312 | /* Bank D func3 */ |
313 | static const unsigned int i2c0_sda_d_pins[] = { GPIOD_0 }; |
314 | static const unsigned int i2c0_scl_d_pins[] = { GPIOD_1 }; |
315 | static const unsigned int i2c1_sda_d_pins[] = { GPIOD_2 }; |
316 | static const unsigned int i2c1_scl_d_pins[] = { GPIOD_3 }; |
317 | static const unsigned int pdm_dclk_d_pins[] = { GPIOD_4 }; |
318 | static const unsigned int pdm_din0_d_pins[] = { GPIOD_5 }; |
319 | static const unsigned int ir_in_d6_pins[] = { GPIOD_6 }; |
320 | |
321 | /* Bank D func4 */ |
322 | static const unsigned int ir_in_d0_pins[] = { GPIOD_0 }; |
323 | static const unsigned int ir_out_pins[] = { GPIOD_1 }; |
324 | static const unsigned int pwm_i_d_pins[] = { GPIOD_2 }; |
325 | static const unsigned int pwm_j_d_pins[] = { GPIOD_3 }; |
326 | static const unsigned int i2c3_sda_d_pins[] = { GPIOD_4 }; |
327 | static const unsigned int i2c3_scl_d_pins[] = { GPIOD_5 }; |
328 | |
329 | /* Bank D func5 */ |
330 | static const unsigned int tdm_fs0_d_pins[] = { GPIOD_2 }; |
331 | static const unsigned int tdm_sclk0_d_pins[] = { GPIOD_3 }; |
332 | static const unsigned int mclk_0_d_pins[] = { GPIOD_4 }; |
333 | static const unsigned int tdm_d1_d_pins[] = { GPIOD_5 }; |
334 | static const unsigned int tdm_d0_d_pins[] = { GPIOD_6 }; |
335 | |
336 | /* Bank D func6 */ |
337 | static const unsigned int uart_d_tx_d_pins[] = { GPIOD_0 }; |
338 | static const unsigned int uart_d_rx_d_pins[] = { GPIOD_1 }; |
339 | static const unsigned int uart_c_tx_d_pins[] = { GPIOD_2 }; |
340 | static const unsigned int uart_c_rx_d_pins[] = { GPIOD_3 }; |
341 | |
342 | /* Bank A func1 */ |
343 | static const unsigned int uart_b_tx_a_pins[] = { GPIOA_0 }; |
344 | static const unsigned int uart_b_rx_a_pins[] = { GPIOA_1 }; |
345 | static const unsigned int pwm_c_pins[] = { GPIOA_2 }; |
346 | static const unsigned int pwm_l_a_pins[] = { GPIOA_3 }; |
347 | static const unsigned int i2c1_sda_a_pins[] = { GPIOA_4 }; |
348 | static const unsigned int i2c1_scl_a_pins[] = { GPIOA_5 }; |
349 | |
350 | /* Bank A func2 */ |
351 | static const unsigned int pwm_c_hiz_pins[] = { GPIOA_2 }; |
352 | static const unsigned int gen_clk_a_pins[] = { GPIOA_3 }; |
353 | static const unsigned int pdm_dclk_z_pins[] = { GPIOA_4 }; |
354 | static const unsigned int pdm_din0_a_pins[] = { GPIOA_5 }; |
355 | |
356 | /* Bank A func3 */ |
357 | static const unsigned int jtag_a_clk_pins[] = { GPIOA_2 }; |
358 | static const unsigned int jtag_a_tms_pins[] = { GPIOA_3 }; |
359 | static const unsigned int jtag_a_tdi_pins[] = { GPIOA_4 }; |
360 | static const unsigned int jtag_a_tdo_pins[] = { GPIOA_5 }; |
361 | |
362 | /* Bank A func4 */ |
363 | static const unsigned int lcd_clk_a_pins[] = { GPIOA_3 }; |
364 | static const unsigned int uart_f_tx_a_pins[] = { GPIOA_4 }; |
365 | static const unsigned int uart_f_rx_a_pins[] = { GPIOA_5 }; |
366 | |
367 | /* Bank A func5 */ |
368 | static const unsigned int uart_e_tx_a_pins[] = { GPIOA_2 }; |
369 | static const unsigned int uart_e_rx_a_pins[] = { GPIOA_3 }; |
370 | static const unsigned int pwm_m_a_pins[] = { GPIOA_4 }; |
371 | static const unsigned int pwm_n_a_pins[] = { GPIOA_5 }; |
372 | |
373 | /* Bank A func6 */ |
374 | static const unsigned int spi_a_mosi_a_pins[] = { GPIOA_3 }; |
375 | static const unsigned int gen_clk_a4_pins[] = { GPIOA_4 }; |
376 | static const unsigned int clk12_24_a_pins[] = { GPIOA_5 }; |
377 | |
378 | static struct meson_pmx_group c3_periphs_groups[] = { |
379 | GPIO_GROUP(GPIOE_0), |
380 | GPIO_GROUP(GPIOE_1), |
381 | GPIO_GROUP(GPIOE_2), |
382 | GPIO_GROUP(GPIOE_3), |
383 | GPIO_GROUP(GPIOE_4), |
384 | GPIO_GROUP(GPIOB_0), |
385 | GPIO_GROUP(GPIOB_1), |
386 | GPIO_GROUP(GPIOB_2), |
387 | GPIO_GROUP(GPIOB_3), |
388 | GPIO_GROUP(GPIOB_4), |
389 | GPIO_GROUP(GPIOB_5), |
390 | GPIO_GROUP(GPIOB_6), |
391 | GPIO_GROUP(GPIOB_7), |
392 | GPIO_GROUP(GPIOB_8), |
393 | GPIO_GROUP(GPIOB_9), |
394 | GPIO_GROUP(GPIOB_10), |
395 | GPIO_GROUP(GPIOB_11), |
396 | GPIO_GROUP(GPIOB_12), |
397 | GPIO_GROUP(GPIOB_13), |
398 | GPIO_GROUP(GPIOB_14), |
399 | GPIO_GROUP(GPIOC_0), |
400 | GPIO_GROUP(GPIOC_1), |
401 | GPIO_GROUP(GPIOC_2), |
402 | GPIO_GROUP(GPIOC_3), |
403 | GPIO_GROUP(GPIOC_4), |
404 | GPIO_GROUP(GPIOC_5), |
405 | GPIO_GROUP(GPIOC_6), |
406 | GPIO_GROUP(GPIOX_0), |
407 | GPIO_GROUP(GPIOX_1), |
408 | GPIO_GROUP(GPIOX_2), |
409 | GPIO_GROUP(GPIOX_3), |
410 | GPIO_GROUP(GPIOX_4), |
411 | GPIO_GROUP(GPIOX_5), |
412 | GPIO_GROUP(GPIOX_6), |
413 | GPIO_GROUP(GPIOX_7), |
414 | GPIO_GROUP(GPIOX_8), |
415 | GPIO_GROUP(GPIOX_9), |
416 | GPIO_GROUP(GPIOX_10), |
417 | GPIO_GROUP(GPIOX_11), |
418 | GPIO_GROUP(GPIOX_12), |
419 | GPIO_GROUP(GPIOX_13), |
420 | GPIO_GROUP(GPIOD_0), |
421 | GPIO_GROUP(GPIOD_1), |
422 | GPIO_GROUP(GPIOD_2), |
423 | GPIO_GROUP(GPIOD_3), |
424 | GPIO_GROUP(GPIOD_4), |
425 | GPIO_GROUP(GPIOD_5), |
426 | GPIO_GROUP(GPIOD_6), |
427 | GPIO_GROUP(GPIOA_0), |
428 | GPIO_GROUP(GPIOA_1), |
429 | GPIO_GROUP(GPIOA_2), |
430 | GPIO_GROUP(GPIOA_3), |
431 | GPIO_GROUP(GPIOA_4), |
432 | GPIO_GROUP(GPIOA_5), |
433 | GPIO_GROUP(GPIO_TEST_N), |
434 | |
435 | /* Bank E func1 */ |
436 | GROUP(pwm_a, 1), |
437 | GROUP(pwm_b, 1), |
438 | GROUP(i2c2_sda, 1), |
439 | GROUP(i2c2_scl, 1), |
440 | GROUP(gen_clk_e, 1), |
441 | |
442 | /* Bank E func2 */ |
443 | GROUP(i2c0_sda_e, 2), |
444 | GROUP(i2c0_scl_e, 2), |
445 | GROUP(clk_32k_in, 2), |
446 | |
447 | /* Bank E func3 */ |
448 | GROUP(i2c_slave_scl, 3), |
449 | GROUP(i2c_slave_sda, 3), |
450 | GROUP(clk12_24_e, 3), |
451 | |
452 | /* Bank B func1 */ |
453 | GROUP(emmc_nand_d0, 1), |
454 | GROUP(emmc_nand_d1, 1), |
455 | GROUP(emmc_nand_d2, 1), |
456 | GROUP(emmc_nand_d3, 1), |
457 | GROUP(emmc_nand_d4, 1), |
458 | GROUP(emmc_nand_d5, 1), |
459 | GROUP(emmc_nand_d6, 1), |
460 | GROUP(emmc_nand_d7, 1), |
461 | GROUP(emmc_clk, 1), |
462 | GROUP(emmc_rst, 1), |
463 | GROUP(emmc_cmd, 1), |
464 | GROUP(emmc_nand_ds, 1), |
465 | |
466 | /* Bank B func2 */ |
467 | GROUP(nand_wen_clk, 2), |
468 | GROUP(nand_ale, 2), |
469 | GROUP(nand_ren_wr, 2), |
470 | GROUP(nand_cle, 2), |
471 | GROUP(nand_ce0, 2), |
472 | |
473 | /* Bank B func3 */ |
474 | GROUP(pwm_g_b, 3), |
475 | GROUP(pwm_h_b, 3), |
476 | GROUP(pwm_i_b, 3), |
477 | GROUP(spif_hold, 3), |
478 | GROUP(spif_mo, 3), |
479 | GROUP(spif_mi, 3), |
480 | GROUP(spif_clk, 3), |
481 | GROUP(spif_wp, 3), |
482 | GROUP(pwm_j_b, 3), |
483 | GROUP(pwm_k_b, 3), |
484 | GROUP(pwm_l_b, 3), |
485 | GROUP(pwm_m_b, 3), |
486 | GROUP(pwm_n_b, 3), |
487 | GROUP(spif_cs, 3), |
488 | GROUP(spif_clk_loop, 3), |
489 | |
490 | /* Bank B func4 */ |
491 | GROUP(lcd_d0, 4), |
492 | GROUP(lcd_d1, 4), |
493 | GROUP(lcd_d2, 4), |
494 | GROUP(lcd_d3, 4), |
495 | GROUP(lcd_d4, 4), |
496 | GROUP(lcd_d5, 4), |
497 | GROUP(lcd_d6, 4), |
498 | GROUP(lcd_d7, 4), |
499 | |
500 | /* Bank B func5 */ |
501 | GROUP(spi_a_mosi_b, 5), |
502 | GROUP(spi_a_miso_b, 5), |
503 | GROUP(spi_a_clk_b, 5), |
504 | GROUP(spi_a_ss0_b, 5), |
505 | GROUP(spi_a_ss1_b, 5), |
506 | GROUP(spi_a_ss2_b, 5), |
507 | GROUP(i2c1_sda_b, 5), |
508 | GROUP(i2c1_scl_b, 5), |
509 | |
510 | /* Bank B func6 */ |
511 | GROUP(uart_a_tx_b, 6), |
512 | GROUP(uart_a_rx_b, 6), |
513 | GROUP(uart_a_cts_b, 6), |
514 | GROUP(uart_a_rts_b, 6), |
515 | GROUP(uart_d_tx_b, 6), |
516 | GROUP(uart_d_rx_b, 6), |
517 | GROUP(pdm_dclk_b, 6), |
518 | GROUP(pdm_din0_b, 6), |
519 | |
520 | /* Bank C func1 */ |
521 | GROUP(sdcard_d0, 1), |
522 | GROUP(sdcard_d1, 1), |
523 | GROUP(sdcard_d2, 1), |
524 | GROUP(sdcard_d3, 1), |
525 | GROUP(sdcard_clk, 1), |
526 | GROUP(sdcard_cmd, 1), |
527 | GROUP(sdcard_cd, 1), |
528 | |
529 | /* Bank C func2 */ |
530 | GROUP(jtag_b_tdo, 2), |
531 | GROUP(jtag_b_tdi, 2), |
532 | GROUP(uart_b_rx_c, 2), |
533 | GROUP(uart_b_tx_c, 2), |
534 | GROUP(jtag_b_clk, 2), |
535 | GROUP(jtag_b_tms, 2), |
536 | GROUP(gen_clk_c, 2), |
537 | |
538 | /* Bank C func3 */ |
539 | GROUP(tdm_d3, 3), |
540 | GROUP(tdm_d2, 3), |
541 | GROUP(mclk_1, 3), |
542 | GROUP(tdm_sclk1, 3), |
543 | GROUP(tdm_fs1, 3), |
544 | GROUP(pdm_dclk_c, 3), |
545 | GROUP(pdm_din0_c, 3), |
546 | |
547 | /* Bank C func4 */ |
548 | GROUP(spi_a_mosi_c, 4), |
549 | GROUP(spi_a_miso_c, 4), |
550 | GROUP(spi_a_clk_c, 4), |
551 | GROUP(spi_a_ss0_c, 4), |
552 | GROUP(spi_a_ss1_c, 4), |
553 | |
554 | /* Bank C func5 */ |
555 | GROUP(pwm_g_c, 5), |
556 | GROUP(pwm_h_c, 5), |
557 | GROUP(pwm_i_c, 5), |
558 | GROUP(pwm_j_c, 5), |
559 | GROUP(pwm_k_c, 5), |
560 | GROUP(pwm_l_c, 5), |
561 | GROUP(pwm_m_c, 5), |
562 | |
563 | /* Bank C func6 */ |
564 | GROUP(uart_a_rx_c, 6), |
565 | GROUP(uart_a_tx_c, 6), |
566 | GROUP(uart_c_rx_c, 6), |
567 | GROUP(uart_c_tx_c, 6), |
568 | GROUP(i2c3_sda_c, 6), |
569 | GROUP(i2c3_scl_c, 6), |
570 | GROUP(clk12_24_c, 6), |
571 | |
572 | /* Bank X func1 */ |
573 | GROUP(sdio_d0, 1), |
574 | GROUP(sdio_d1, 1), |
575 | GROUP(sdio_d2, 1), |
576 | GROUP(sdio_d3, 1), |
577 | GROUP(sdio_clk, 1), |
578 | GROUP(sdio_cmd, 1), |
579 | GROUP(clk12_24_x, 1), |
580 | GROUP(uart_e_tx_x, 1), |
581 | GROUP(uart_e_rx_x, 1), |
582 | GROUP(uart_e_cts, 1), |
583 | GROUP(uart_e_rts, 1), |
584 | GROUP(pwm_e, 1), |
585 | GROUP(pwm_j_x12, 1), |
586 | GROUP(pwm_k_x13, 1), |
587 | |
588 | /* Bank X func2 */ |
589 | GROUP(spi_a_mosi_x, 2), |
590 | GROUP(spi_a_miso_x, 2), |
591 | GROUP(spi_a_clk_x, 2), |
592 | GROUP(spi_a_ss0_x, 2), |
593 | GROUP(spi_a_ss1_x, 2), |
594 | GROUP(spi_a_ss2_x, 2), |
595 | GROUP(spi_b_ss2_x6, 2), |
596 | GROUP(spi_b_miso_x, 2), |
597 | GROUP(spi_b_clk_x, 2), |
598 | GROUP(spi_b_mosi_x, 2), |
599 | GROUP(spi_b_ss0_x, 2), |
600 | GROUP(spi_b_ss1_x, 2), |
601 | GROUP(spi_b_ss2_x12, 2), |
602 | GROUP(gen_clk_x, 2), |
603 | |
604 | /* Bank X func3 */ |
605 | GROUP(tdm_d1_x, 3), |
606 | GROUP(tdm_d0_x, 3), |
607 | GROUP(mclk_0_x, 3), |
608 | GROUP(tdm_sclk0_x, 3), |
609 | GROUP(tdm_fs0_x, 3), |
610 | GROUP(pdm_dclk_x5, 3), |
611 | GROUP(pdm_din0_x6, 3), |
612 | GROUP(pdm_din0_x9, 3), |
613 | GROUP(pdm_dclk_x10, 3), |
614 | GROUP(clk12_24_x13, 3), |
615 | |
616 | /* Bank X func4 */ |
617 | GROUP(lcd_d8, 4), |
618 | GROUP(lcd_d9, 4), |
619 | GROUP(lcd_d10, 4), |
620 | GROUP(lcd_d11, 4), |
621 | GROUP(lcd_d12, 4), |
622 | GROUP(lcd_d13, 4), |
623 | GROUP(lcd_d14, 4), |
624 | GROUP(lcd_d15, 4), |
625 | GROUP(lcd_vs, 4), |
626 | GROUP(lcd_hs, 4), |
627 | GROUP(lcd_den, 4), |
628 | GROUP(lcd_d16, 4), |
629 | GROUP(lcd_clk_x, 4), |
630 | GROUP(lcd_d17, 4), |
631 | |
632 | /* Bank X func5 */ |
633 | GROUP(pwm_g_x0, 5), |
634 | GROUP(pwm_h_x1, 5), |
635 | GROUP(pwm_i_x2, 5), |
636 | GROUP(pwm_j_x3, 5), |
637 | GROUP(pwm_k_x4, 5), |
638 | GROUP(pwm_l_x, 5), |
639 | GROUP(pwm_m_x, 5), |
640 | GROUP(pwm_n_x, 5), |
641 | GROUP(pwm_g_x8, 5), |
642 | GROUP(pwm_h_x9, 5), |
643 | GROUP(pwm_i_x10, 5), |
644 | GROUP(clk12_24_x11, 5), |
645 | |
646 | /* Bank X func6 */ |
647 | GROUP(uart_a_rx_x, 6), |
648 | GROUP(uart_a_tx_x, 6), |
649 | GROUP(uart_c_rx_x, 6), |
650 | GROUP(uart_c_tx_x, 6), |
651 | GROUP(i2c3_sda_x, 6), |
652 | GROUP(i2c3_scl_x, 6), |
653 | GROUP(i2c1_sda_x, 6), |
654 | GROUP(i2c1_scl_x, 6), |
655 | GROUP(uart_d_tx_x, 6), |
656 | GROUP(uart_d_rx_x, 6), |
657 | |
658 | /* Bank D func1 */ |
659 | GROUP(pwm_g_d, 1), |
660 | GROUP(pwm_h_d, 1), |
661 | GROUP(eth_led_act, 1), |
662 | GROUP(eth_led_link, 1), |
663 | GROUP(pwm_d, 1), |
664 | GROUP(pwm_f, 1), |
665 | GROUP(pwm_k_d, 1), |
666 | |
667 | /* Bank D func2 */ |
668 | GROUP(uart_a_tx_d, 2), |
669 | GROUP(uart_a_rx_d, 2), |
670 | GROUP(spi_b_miso_d, 2), |
671 | GROUP(spi_b_clk_d, 2), |
672 | GROUP(spi_b_mosi_d, 2), |
673 | GROUP(spi_b_ss0_d, 2), |
674 | GROUP(spi_b_ss1_d, 2), |
675 | |
676 | /* Bank D func3 */ |
677 | GROUP(i2c0_sda_d, 3), |
678 | GROUP(i2c0_scl_d, 3), |
679 | GROUP(i2c1_sda_d, 3), |
680 | GROUP(i2c1_scl_d, 3), |
681 | GROUP(pdm_dclk_d, 3), |
682 | GROUP(pdm_din0_d, 3), |
683 | GROUP(ir_in_d6, 3), |
684 | |
685 | /* Bank D func4 */ |
686 | GROUP(ir_in_d0, 4), |
687 | GROUP(ir_out, 4), |
688 | GROUP(pwm_i_d, 4), |
689 | GROUP(pwm_j_d, 4), |
690 | GROUP(i2c3_sda_d, 4), |
691 | GROUP(i2c3_scl_d, 4), |
692 | |
693 | /* Bank D func5 */ |
694 | GROUP(tdm_fs0_d, 5), |
695 | GROUP(tdm_sclk0_d, 5), |
696 | GROUP(mclk_0_d, 5), |
697 | GROUP(tdm_d1_d, 5), |
698 | GROUP(tdm_d0_d, 5), |
699 | |
700 | /* Bank D func6 */ |
701 | GROUP(uart_d_tx_d, 6), |
702 | GROUP(uart_d_rx_d, 6), |
703 | GROUP(uart_c_tx_d, 6), |
704 | GROUP(uart_c_rx_d, 6), |
705 | |
706 | /* Bank A func1 */ |
707 | GROUP(uart_b_tx_a, 1), |
708 | GROUP(uart_b_rx_a, 1), |
709 | GROUP(pwm_c, 1), |
710 | GROUP(pwm_l_a, 1), |
711 | GROUP(i2c1_sda_a, 1), |
712 | GROUP(i2c1_scl_a, 1), |
713 | |
714 | /* Bank A func2 */ |
715 | GROUP(pwm_c_hiz, 2), |
716 | GROUP(gen_clk_a, 2), |
717 | GROUP(pdm_dclk_z, 2), |
718 | GROUP(pdm_din0_a, 2), |
719 | |
720 | /* Bank A func3 */ |
721 | GROUP(jtag_a_clk, 3), |
722 | GROUP(jtag_a_tms, 3), |
723 | GROUP(jtag_a_tdi, 3), |
724 | GROUP(jtag_a_tdo, 3), |
725 | |
726 | /* Bank A func4 */ |
727 | GROUP(lcd_clk_a, 4), |
728 | GROUP(uart_f_tx_a, 4), |
729 | GROUP(uart_f_rx_a, 4), |
730 | |
731 | /* Bank A func5 */ |
732 | GROUP(uart_e_tx_a, 5), |
733 | GROUP(uart_e_rx_a, 5), |
734 | GROUP(pwm_m_a, 5), |
735 | GROUP(pwm_n_a, 5), |
736 | |
737 | /* Bank A func6 */ |
738 | GROUP(spi_a_mosi_a, 6), |
739 | GROUP(gen_clk_a4, 6), |
740 | GROUP(clk12_24_a, 6), |
741 | }; |
742 | |
743 | static const char * const gpio_periphs_groups[] = { |
744 | "GPIO_TEST_N" , |
745 | |
746 | "GPIOE_0" , "GPIOE_1" , "GPIOE_2" , "GPIOE_3" , "GPIOE_4" , |
747 | |
748 | "GPIOB_0" , "GPIOB_1" , "GPIOB_2" , "GPIOB_3" , "GPIOB_4" , |
749 | "GPIOB_5" , "GPIOB_6" , "GPIOB_7" , "GPIOB_8" , "GPIOB_9" , |
750 | "GPIOB_10" , "GPIOB_11" , "GPIOB_12" , "GPIOB_13" , |
751 | "GPIOB_14" , |
752 | |
753 | "GPIOC_0" , "GPIOC_1" , "GPIOC_2" , "GPIOC_3" , "GPIOC_4" , |
754 | "GPIOC_5" , "GPIOC_6" , |
755 | |
756 | "GPIOX_0" , "GPIOX_1" , "GPIOX_2" , "GPIOX_3" , "GPIOX_4" , |
757 | "GPIOX_5" , "GPIOX_6" , "GPIOX_7" , "GPIOX_8" , "GPIOX_9" , |
758 | "GPIOX_10" , "GPIOX_11" , "GPIOX_12" , "GPIOX_13" , |
759 | |
760 | "GPIOD_0" , "GPIOD_1" , "GPIOD_2" , "GPIOD_3" , "GPIOD_4" , |
761 | "GPIOD_5" , "GPIOD_6" , |
762 | |
763 | "GPIOA_0" , "GPIOA_1" , "GPIOA_2" , "GPIOA_3" , "GPIOA_4" , |
764 | "GPIOA_5" , |
765 | }; |
766 | |
767 | static const char * const uart_a_groups[] = { |
768 | "uart_a_tx_b" , "uart_a_rx_b" , "uart_a_cts_b" , "uart_a_rts_b" , |
769 | "uart_a_rx_c" , "uart_a_tx_c" , "uart_a_rx_x" , "uart_a_tx_x" , |
770 | "uart_a_tx_d" , "uart_a_rx_d" , |
771 | }; |
772 | |
773 | static const char * const uart_b_groups[] = { |
774 | "uart_b_rx_c" , "uart_b_tx_c" , "uart_b_tx_a" , "uart_b_rx_a" , |
775 | }; |
776 | |
777 | static const char * const uart_c_groups[] = { |
778 | "uart_c_rx_c" , "uart_c_tx_c" , |
779 | "uart_c_rx_x" , "uart_c_tx_x" , |
780 | "uart_c_tx_d" , "uart_c_rx_d" , |
781 | }; |
782 | |
783 | static const char * const uart_d_groups[] = { |
784 | "uart_d_tx_b" , "uart_d_rx_b" , "uart_d_tx_d" , "uart_d_rx_d" , |
785 | "uart_d_rx_x" , "uart_d_tx_x" , |
786 | }; |
787 | |
788 | static const char * const uart_e_groups[] = { |
789 | "uart_e_cts" , "uart_e_tx_x" , "uart_e_rx_x" , "uart_e_rts" , |
790 | "uart_e_tx_a" , "uart_e_rx_a" , |
791 | }; |
792 | |
793 | static const char * const i2c0_groups[] = { |
794 | "i2c0_sda_e" , "i2c0_scl_e" , |
795 | "i2c0_sda_d" , "i2c0_scl_d" , |
796 | }; |
797 | |
798 | static const char * const i2c1_groups[] = { |
799 | "i2c1_sda_x" , "i2c1_scl_x" , |
800 | "i2c1_sda_d" , "i2c1_scl_d" , |
801 | "i2c1_sda_a" , "i2c1_scl_a" , |
802 | "i2c1_sda_b" , "i2c1_scl_b" , |
803 | }; |
804 | |
805 | static const char * const i2c2_groups[] = { |
806 | "i2c2_sda" , "i2c2_scl" , |
807 | }; |
808 | |
809 | static const char * const i2c3_groups[] = { |
810 | "i2c3_sda_c" , "i2c3_scl_c" , |
811 | "i2c3_sda_x" , "i2c3_scl_x" , |
812 | "i2c3_sda_d" , "i2c3_scl_d" , |
813 | }; |
814 | |
815 | static const char * const i2c_slave_groups[] = { |
816 | "i2c_slave_scl" , "i2c_slave_sda" , |
817 | }; |
818 | |
819 | static const char * const pwm_a_groups[] = { |
820 | "pwm_a" , |
821 | }; |
822 | |
823 | static const char * const pwm_b_groups[] = { |
824 | "pwm_b" , |
825 | }; |
826 | |
827 | static const char * const pwm_c_groups[] = { |
828 | "pwm_c" , |
829 | }; |
830 | |
831 | static const char * const pwm_d_groups[] = { |
832 | "pwm_d" , |
833 | }; |
834 | |
835 | static const char * const pwm_e_groups[] = { |
836 | "pwm_e" , |
837 | }; |
838 | |
839 | static const char * const pwm_f_groups[] = { |
840 | "pwm_f" , |
841 | }; |
842 | |
843 | static const char * const pwm_g_groups[] = { |
844 | "pwm_g_b" , "pwm_g_c" , "pwm_g_d" , "pwm_g_x0" , "pwm_g_x8" , |
845 | }; |
846 | |
847 | static const char * const pwm_h_groups[] = { |
848 | "pwm_h_b" , "pwm_h_c" , "pwm_h_d" , "pwm_h_x1" , "pwm_h_x9" , |
849 | }; |
850 | |
851 | static const char * const pwm_i_groups[] = { |
852 | "pwm_i_b" , "pwm_i_c" , "pwm_i_d" , "pwm_i_x2" , "pwm_i_x10" , |
853 | }; |
854 | |
855 | static const char * const pwm_j_groups[] = { |
856 | "pwm_j_c" , "pwm_j_d" , "pwm_j_b" , "pwm_j_x3" , "pwm_j_x12" , |
857 | }; |
858 | |
859 | static const char * const pwm_k_groups[] = { |
860 | "pwm_k_c" , "pwm_k_d" , "pwm_k_b" , "pwm_k_x4" , "pwm_k_x13" , |
861 | }; |
862 | |
863 | static const char * const pwm_l_groups[] = { |
864 | "pwm_l_c" , "pwm_l_x" , "pwm_l_b" , "pwm_l_a" , |
865 | }; |
866 | |
867 | static const char * const pwm_m_groups[] = { |
868 | "pwm_m_c" , "pwm_m_x" , "pwm_m_a" , "pwm_m_b" , |
869 | }; |
870 | |
871 | static const char * const pwm_n_groups[] = { |
872 | "pwm_n_x" , "pwm_n_a" , "pwm_n_b" , |
873 | }; |
874 | |
875 | static const char * const pwm_c_hiz_groups[] = { |
876 | "pwm_c_hiz" , |
877 | }; |
878 | |
879 | static const char * const ir_out_groups[] = { |
880 | "ir_out" , |
881 | }; |
882 | |
883 | static const char * const ir_in_groups[] = { |
884 | "ir_in_d0" , "ir_in_d6" , |
885 | }; |
886 | |
887 | static const char * const jtag_a_groups[] = { |
888 | "jtag_a_clk" , "jtag_a_tms" , "jtag_a_tdi" , "jtag_a_tdo" , |
889 | }; |
890 | |
891 | static const char * const jtag_b_groups[] = { |
892 | "jtag_b_tdo" , "jtag_b_tdi" , "jtag_b_clk" , "jtag_b_tms" , |
893 | }; |
894 | |
895 | static const char * const gen_clk_groups[] = { |
896 | "gen_clk_e" , "gen_clk_c" , "gen_clk_a" , "gen_clk_x" , |
897 | "gen_clk_a4" , |
898 | }; |
899 | |
900 | static const char * const clk12_24_groups[] = { |
901 | "clk12_24_e" , "clk12_24_c" , "clk12_24_x" , "clk12_24_a" , |
902 | "clk12_24_x13" , "clk12_24_x11" , |
903 | }; |
904 | |
905 | static const char * const clk_32k_in_groups[] = { |
906 | "clk_32k_in" , |
907 | }; |
908 | |
909 | static const char * const emmc_groups[] = { |
910 | "emmc_nand_d0" , "emmc_nand_d1" , "emmc_nand_d2" , "emmc_nand_d3" , |
911 | "emmc_nand_d4" , "emmc_nand_d5" , "emmc_nand_d6" , "emmc_nand_d7" , |
912 | "emmc_clk" , "emmc_rst" , "emmc_cmd" , "emmc_nand_ds" , |
913 | }; |
914 | |
915 | static const char * const nand_groups[] = { |
916 | "emmc_nand_d0" , "emmc_nand_d1" , "emmc_nand_d2" , "emmc_nand_d3" , |
917 | "emmc_nand_d4" , "emmc_nand_d5" , "emmc_nand_d6" , "emmc_nand_d7" , |
918 | "emmc_clk" , "emmc_rst" , "emmc_cmd" , "emmc_nand_ds" , |
919 | "nand_wen_clk" , "nand_ale" , "nand_ren_wr" , "nand_cle" , |
920 | "nand_ce0" , |
921 | }; |
922 | |
923 | static const char * const spif_groups[] = { |
924 | "spif_mo" , "spif_mi" , "spif_wp" , "spif_cs" , |
925 | "spif_clk" , "spif_hold" , "spif_clk_loop" , |
926 | }; |
927 | |
928 | static const char * const spi_a_groups[] = { |
929 | "spi_a_clk_b" , "spi_a_ss0_b" , "spi_a_ss1_b" , "spi_a_ss2_b" , |
930 | "spi_a_mosi_b" , "spi_a_miso_b" , |
931 | |
932 | "spi_a_clk_c" , "spi_a_ss0_c" , "spi_a_ss1_c" , |
933 | "spi_a_mosi_c" , "spi_a_miso_c" , |
934 | |
935 | "spi_a_clk_x" , "spi_a_ss0_x" , "spi_a_ss1_x" , "spi_a_ss2_x" , |
936 | "spi_a_mosi_x" , "spi_a_miso_x" , |
937 | "spi_a_mosi_a" , |
938 | }; |
939 | |
940 | static const char * const spi_b_groups[] = { |
941 | "spi_b_clk_x" , "spi_b_ss0_x" , "spi_b_ss1_x" , "spi_b_ss2_x6" , |
942 | "spi_b_miso_x" , "spi_b_mosi_x" , "spi_b_ss2_x12" , |
943 | |
944 | "spi_b_clk_d" , "spi_b_ss0_d" , "spi_b_ss1_d" , "spi_b_miso_d" , |
945 | "spi_b_mosi_d" , |
946 | }; |
947 | |
948 | static const char * const sdcard_groups[] = { |
949 | "sdcard_d0" , "sdcard_d1" , "sdcard_d2" , "sdcard_d3" , |
950 | "sdcard_cd" , "sdcard_clk" , "sdcard_cmd" , |
951 | }; |
952 | |
953 | static const char * const sdio_groups[] = { |
954 | "sdio_d0" , "sdio_d1" , "sdio_d2" , "sdio_d3" , |
955 | "sdio_clk" , "sdio_cmd" , |
956 | }; |
957 | |
958 | static const char * const pdm_groups[] = { |
959 | "pdm_dclk_c" , "pdm_din0_c" , "pdm_dclk_d" , "pdm_din0_d" , |
960 | "pdm_dclk_z" , "pdm_din0_a" , "pdm_dclk_b" , "pdm_din0_b" , |
961 | "pdm_dclk_x5" , "pdm_din0_x6" , "pdm_din0_x9" , "pdm_dclk_x10" , |
962 | }; |
963 | |
964 | static const char * const eth_groups[] = { |
965 | "eth_led_act" , "eth_led_link" , |
966 | }; |
967 | |
968 | static const char * const mclk_0_groups[] = { |
969 | "mclk_0_x" , "mclk_0_d" , |
970 | }; |
971 | |
972 | static const char * const mclk_1_groups[] = { |
973 | "mclk_1" , |
974 | }; |
975 | |
976 | static const char * const tdm_groups[] = { |
977 | "tdm_d3" , "tdm_d2" , "tdm_fs1" , "tdm_d1_x" , "tdm_d0_x" , |
978 | "tdm_d1_d" , "tdm_d0_d" , "tdm_sclk1" , "tdm_fs0_x" , "tdm_fs0_d" , |
979 | "tdm_sclk0_x" , "tdm_sclk0_d" , |
980 | }; |
981 | |
982 | static const char * const lcd_groups[] = { |
983 | "lcd_d0" , "lcd_d1" , "lcd_d2" , "lcd_d3" , "lcd_d4" , |
984 | "lcd_d5" , "lcd_d6" , "lcd_d7" , "lcd_d8" , "lcd_d9" , |
985 | "lcd_d10" , "lcd_d11" , "lcd_d12" , "lcd_d13" , "lcd_d14" , |
986 | "lcd_d15" , "lcd_d16" , "lcd_d17" , "lcd_den" , |
987 | "lcd_clk_a" , "lcd_clk_x" , "lcd_hs" , "lcd_vs" , |
988 | }; |
989 | |
990 | static struct meson_pmx_func c3_periphs_functions[] = { |
991 | FUNCTION(gpio_periphs), |
992 | FUNCTION(uart_a), |
993 | FUNCTION(uart_b), |
994 | FUNCTION(uart_c), |
995 | FUNCTION(uart_d), |
996 | FUNCTION(uart_e), |
997 | FUNCTION(i2c0), |
998 | FUNCTION(i2c1), |
999 | FUNCTION(i2c2), |
1000 | FUNCTION(i2c3), |
1001 | FUNCTION(i2c_slave), |
1002 | FUNCTION(pwm_a), |
1003 | FUNCTION(pwm_b), |
1004 | FUNCTION(pwm_c), |
1005 | FUNCTION(pwm_d), |
1006 | FUNCTION(pwm_e), |
1007 | FUNCTION(pwm_f), |
1008 | FUNCTION(pwm_g), |
1009 | FUNCTION(pwm_h), |
1010 | FUNCTION(pwm_i), |
1011 | FUNCTION(pwm_j), |
1012 | FUNCTION(pwm_k), |
1013 | FUNCTION(pwm_l), |
1014 | FUNCTION(pwm_m), |
1015 | FUNCTION(pwm_n), |
1016 | FUNCTION(pwm_c_hiz), |
1017 | FUNCTION(ir_out), |
1018 | FUNCTION(ir_in), |
1019 | FUNCTION(jtag_a), |
1020 | FUNCTION(jtag_b), |
1021 | FUNCTION(gen_clk), |
1022 | FUNCTION(clk12_24), |
1023 | FUNCTION(clk_32k_in), |
1024 | FUNCTION(emmc), |
1025 | FUNCTION(nand), |
1026 | FUNCTION(spif), |
1027 | FUNCTION(spi_a), |
1028 | FUNCTION(spi_b), |
1029 | FUNCTION(sdcard), |
1030 | FUNCTION(sdio), |
1031 | FUNCTION(pdm), |
1032 | FUNCTION(eth), |
1033 | FUNCTION(mclk_0), |
1034 | FUNCTION(mclk_1), |
1035 | FUNCTION(tdm), |
1036 | FUNCTION(lcd), |
1037 | }; |
1038 | |
1039 | static struct meson_bank c3_periphs_banks[] = { |
1040 | /* name first last irq pullen pull dir out in ds */ |
1041 | BANK_DS("X" , GPIOX_0, GPIOX_13, 40, 53, |
1042 | 0x03, 0, 0x04, 0, 0x02, 0, 0x01, 0, 0x00, 0, 0x07, 0), |
1043 | BANK_DS("D" , GPIOD_0, GPIOD_6, 33, 39, |
1044 | 0x23, 0, 0x24, 0, 0x22, 0, 0x21, 0, 0x20, 0, 0x27, 0), |
1045 | BANK_DS("E" , GPIOE_0, GPIOE_4, 22, 26, |
1046 | 0x33, 0, 0x34, 0, 0x32, 0, 0x31, 0, 0x30, 0, 0x37, 0), |
1047 | BANK_DS("C" , GPIOC_0, GPIOC_6, 15, 21, |
1048 | 0x43, 0, 0x44, 0, 0x42, 0, 0x41, 0, 0x40, 0, 0x47, 0), |
1049 | BANK_DS("B" , GPIOB_0, GPIOB_14, 0, 14, |
1050 | 0x53, 0, 0x54, 0, 0x52, 0, 0x51, 0, 0x50, 0, 0x57, 0), |
1051 | BANK_DS("A" , GPIOA_0, GPIOA_5, 27, 32, |
1052 | 0x63, 0, 0x64, 0, 0x62, 0, 0x61, 0, 0x60, 0, 0x67, 0), |
1053 | BANK_DS("TEST_N" , GPIO_TEST_N, GPIO_TEST_N, 54, 54, |
1054 | 0x73, 0, 0x74, 0, 0x72, 0, 0x71, 0, 0x70, 0, 0x77, 0), |
1055 | }; |
1056 | |
1057 | static struct meson_pmx_bank c3_periphs_pmx_banks[] = { |
1058 | /* name first last reg offset */ |
1059 | BANK_PMX("B" , GPIOB_0, GPIOB_14, 0x00, 0), |
1060 | BANK_PMX("X" , GPIOX_0, GPIOX_13, 0x03, 0), |
1061 | BANK_PMX("C" , GPIOC_0, GPIOC_6, 0x09, 0), |
1062 | BANK_PMX("A" , GPIOA_0, GPIOA_5, 0x0b, 0), |
1063 | BANK_PMX("D" , GPIOD_0, GPIOD_6, 0x10, 0), |
1064 | BANK_PMX("E" , GPIOE_0, GPIOE_4, 0x12, 0), |
1065 | BANK_PMX("TEST_N" , GPIO_TEST_N, GPIO_TEST_N, 0x02, 0), |
1066 | }; |
1067 | |
1068 | static struct meson_axg_pmx_data c3_periphs_pmx_banks_data = { |
1069 | .pmx_banks = c3_periphs_pmx_banks, |
1070 | .num_pmx_banks = ARRAY_SIZE(c3_periphs_pmx_banks), |
1071 | }; |
1072 | |
1073 | static struct meson_pinctrl_data c3_periphs_pinctrl_data = { |
1074 | .name = "periphs-banks" , |
1075 | .pins = c3_periphs_pins, |
1076 | .groups = c3_periphs_groups, |
1077 | .funcs = c3_periphs_functions, |
1078 | .banks = c3_periphs_banks, |
1079 | .num_pins = ARRAY_SIZE(c3_periphs_pins), |
1080 | .num_groups = ARRAY_SIZE(c3_periphs_groups), |
1081 | .num_funcs = ARRAY_SIZE(c3_periphs_functions), |
1082 | .num_banks = ARRAY_SIZE(c3_periphs_banks), |
1083 | .pmx_ops = &meson_axg_pmx_ops, |
1084 | .pmx_data = &c3_periphs_pmx_banks_data, |
1085 | .parse_dt = &meson_a1_parse_dt_extra, |
1086 | }; |
1087 | |
1088 | static const struct of_device_id c3_pinctrl_dt_match[] = { |
1089 | { |
1090 | .compatible = "amlogic,c3-periphs-pinctrl" , |
1091 | .data = &c3_periphs_pinctrl_data, |
1092 | }, |
1093 | { } |
1094 | }; |
1095 | MODULE_DEVICE_TABLE(of, c3_pinctrl_dt_match); |
1096 | |
1097 | static struct platform_driver c3_pinctrl_driver = { |
1098 | .probe = meson_pinctrl_probe, |
1099 | .driver = { |
1100 | .name = "amlogic-c3-pinctrl" , |
1101 | .of_match_table = c3_pinctrl_dt_match, |
1102 | }, |
1103 | }; |
1104 | module_platform_driver(c3_pinctrl_driver); |
1105 | |
1106 | MODULE_AUTHOR("Huqiang Qin <huqiang.qin@amlogic.com>" ); |
1107 | MODULE_DESCRIPTION("Pin controller and GPIO driver for Amlogic C3 SoC" ); |
1108 | MODULE_LICENSE("Dual BSD/GPL" ); |
1109 | |