1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) ST-Ericsson SA 2013
4 *
5 * Author: Patrice Chotard <patrice.chotard@st.com>
6 *
7 * Driver allows to use AxB5xx unused pins to be used as GPIO
8 */
9
10#include <linux/bitops.h>
11#include <linux/cleanup.h>
12#include <linux/err.h>
13#include <linux/gpio/driver.h>
14#include <linux/init.h>
15#include <linux/interrupt.h>
16#include <linux/irq.h>
17#include <linux/irqdomain.h>
18#include <linux/kernel.h>
19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/platform_device.h>
22#include <linux/property.h>
23#include <linux/seq_file.h>
24#include <linux/slab.h>
25#include <linux/types.h>
26
27#include <linux/mfd/abx500.h>
28#include <linux/mfd/abx500/ab8500.h>
29
30#include <linux/pinctrl/consumer.h>
31#include <linux/pinctrl/machine.h>
32#include <linux/pinctrl/pinconf-generic.h>
33#include <linux/pinctrl/pinconf.h>
34#include <linux/pinctrl/pinctrl.h>
35#include <linux/pinctrl/pinmux.h>
36
37#include "../core.h"
38#include "../pinconf.h"
39#include "../pinctrl-utils.h"
40
41#include "pinctrl-abx500.h"
42
43/*
44 * GPIO registers offset
45 * Bank: 0x10
46 */
47#define AB8500_GPIO_SEL1_REG 0x00
48#define AB8500_GPIO_SEL2_REG 0x01
49#define AB8500_GPIO_SEL3_REG 0x02
50#define AB8500_GPIO_SEL4_REG 0x03
51#define AB8500_GPIO_SEL5_REG 0x04
52#define AB8500_GPIO_SEL6_REG 0x05
53
54#define AB8500_GPIO_DIR1_REG 0x10
55#define AB8500_GPIO_DIR2_REG 0x11
56#define AB8500_GPIO_DIR3_REG 0x12
57#define AB8500_GPIO_DIR4_REG 0x13
58#define AB8500_GPIO_DIR5_REG 0x14
59#define AB8500_GPIO_DIR6_REG 0x15
60
61#define AB8500_GPIO_OUT1_REG 0x20
62#define AB8500_GPIO_OUT2_REG 0x21
63#define AB8500_GPIO_OUT3_REG 0x22
64#define AB8500_GPIO_OUT4_REG 0x23
65#define AB8500_GPIO_OUT5_REG 0x24
66#define AB8500_GPIO_OUT6_REG 0x25
67
68#define AB8500_GPIO_PUD1_REG 0x30
69#define AB8500_GPIO_PUD2_REG 0x31
70#define AB8500_GPIO_PUD3_REG 0x32
71#define AB8500_GPIO_PUD4_REG 0x33
72#define AB8500_GPIO_PUD5_REG 0x34
73#define AB8500_GPIO_PUD6_REG 0x35
74
75#define AB8500_GPIO_IN1_REG 0x40
76#define AB8500_GPIO_IN2_REG 0x41
77#define AB8500_GPIO_IN3_REG 0x42
78#define AB8500_GPIO_IN4_REG 0x43
79#define AB8500_GPIO_IN5_REG 0x44
80#define AB8500_GPIO_IN6_REG 0x45
81#define AB8500_GPIO_ALTFUN_REG 0x50
82
83#define ABX500_GPIO_INPUT 0
84#define ABX500_GPIO_OUTPUT 1
85
86struct abx500_pinctrl {
87 struct device *dev;
88 struct pinctrl_dev *pctldev;
89 struct abx500_pinctrl_soc_data *soc;
90 struct gpio_chip chip;
91 struct ab8500 *parent;
92 struct abx500_gpio_irq_cluster *irq_cluster;
93 int irq_cluster_size;
94};
95
96static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg,
97 unsigned offset, bool *bit)
98{
99 struct abx500_pinctrl *pct = gpiochip_get_data(gc: chip);
100 u8 pos = offset % 8;
101 u8 val;
102 int ret;
103
104 reg += offset / 8;
105 ret = abx500_get_register_interruptible(dev: pct->dev,
106 AB8500_MISC, reg, value: &val);
107 if (ret < 0) {
108 dev_err(pct->dev,
109 "%s read reg =%x, offset=%x failed (%d)\n",
110 __func__, reg, offset, ret);
111 return ret;
112 }
113
114 *bit = !!(val & BIT(pos));
115
116 return 0;
117}
118
119static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
120 unsigned offset, int val)
121{
122 struct abx500_pinctrl *pct = gpiochip_get_data(gc: chip);
123 u8 pos = offset % 8;
124 int ret;
125
126 reg += offset / 8;
127 ret = abx500_mask_and_set_register_interruptible(dev: pct->dev,
128 AB8500_MISC, reg, BIT(pos), bitvalues: val << pos);
129 if (ret < 0)
130 dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n",
131 __func__, reg, offset, ret);
132
133 return ret;
134}
135
136/**
137 * abx500_gpio_get() - Get the particular GPIO value
138 * @chip: Gpio device
139 * @offset: GPIO number to read
140 */
141static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset)
142{
143 struct abx500_pinctrl *pct = gpiochip_get_data(gc: chip);
144 bool bit;
145 bool is_out;
146 u8 gpio_offset = offset - 1;
147 int ret;
148
149 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
150 offset: gpio_offset, bit: &is_out);
151 if (ret < 0)
152 goto out;
153
154 if (is_out)
155 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG,
156 offset: gpio_offset, bit: &bit);
157 else
158 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG,
159 offset: gpio_offset, bit: &bit);
160out:
161 if (ret < 0) {
162 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
163 return ret;
164 }
165
166 return bit;
167}
168
169static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
170{
171 struct abx500_pinctrl *pct = gpiochip_get_data(gc: chip);
172 int ret;
173
174 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
175 if (ret < 0)
176 dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret);
177}
178
179static int abx500_gpio_direction_output(struct gpio_chip *chip,
180 unsigned offset,
181 int val)
182{
183 struct abx500_pinctrl *pct = gpiochip_get_data(gc: chip);
184 int ret;
185
186 /* set direction as output */
187 ret = abx500_gpio_set_bits(chip,
188 AB8500_GPIO_DIR1_REG,
189 offset,
190 ABX500_GPIO_OUTPUT);
191 if (ret < 0)
192 goto out;
193
194 /* disable pull down */
195 ret = abx500_gpio_set_bits(chip,
196 AB8500_GPIO_PUD1_REG,
197 offset,
198 val: ABX500_GPIO_PULL_NONE);
199
200out:
201 if (ret < 0) {
202 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
203 return ret;
204 }
205
206 /* set the output as 1 or 0 */
207 return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
208}
209
210static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
211{
212 /* set the register as input */
213 return abx500_gpio_set_bits(chip,
214 AB8500_GPIO_DIR1_REG,
215 offset,
216 ABX500_GPIO_INPUT);
217}
218
219static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
220{
221 struct abx500_pinctrl *pct = gpiochip_get_data(gc: chip);
222 /* The AB8500 GPIO numbers are off by one */
223 int gpio = offset + 1;
224 int hwirq;
225 int i;
226
227 for (i = 0; i < pct->irq_cluster_size; i++) {
228 struct abx500_gpio_irq_cluster *cluster =
229 &pct->irq_cluster[i];
230
231 if (gpio >= cluster->start && gpio <= cluster->end) {
232 /*
233 * The ABx500 GPIO's associated IRQs are clustered together
234 * throughout the interrupt numbers at irregular intervals.
235 * To solve this quandry, we have placed the read-in values
236 * into the cluster information table.
237 */
238 hwirq = gpio - cluster->start + cluster->to_irq;
239 return irq_create_mapping(host: pct->parent->domain, hwirq);
240 }
241 }
242
243 return -EINVAL;
244}
245
246static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
247 unsigned gpio, int alt_setting)
248{
249 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
250 struct alternate_functions af = pct->soc->alternate_functions[gpio];
251 int ret;
252 int val;
253 unsigned offset;
254
255 const char *modes[] = {
256 [ABX500_DEFAULT] = "default",
257 [ABX500_ALT_A] = "altA",
258 [ABX500_ALT_B] = "altB",
259 [ABX500_ALT_C] = "altC",
260 };
261
262 /* sanity check */
263 if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) ||
264 ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) ||
265 ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) {
266 dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio,
267 modes[alt_setting]);
268 return -EINVAL;
269 }
270
271 /* on ABx5xx, there is no GPIO0, so adjust the offset */
272 offset = gpio - 1;
273
274 switch (alt_setting) {
275 case ABX500_DEFAULT:
276 /*
277 * for ABx5xx family, default mode is always selected by
278 * writing 0 to GPIOSELx register, except for pins which
279 * support at least ALT_B mode, default mode is selected
280 * by writing 1 to GPIOSELx register
281 */
282 val = 0;
283 if (af.alt_bit1 != UNUSED)
284 val++;
285
286 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
287 offset, val);
288 break;
289
290 case ABX500_ALT_A:
291 /*
292 * for ABx5xx family, alt_a mode is always selected by
293 * writing 1 to GPIOSELx register, except for pins which
294 * support at least ALT_B mode, alt_a mode is selected
295 * by writing 0 to GPIOSELx register and 0 in ALTFUNC
296 * register
297 */
298 if (af.alt_bit1 != UNUSED) {
299 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
300 offset, val: 0);
301 if (ret < 0)
302 goto out;
303
304 ret = abx500_gpio_set_bits(chip,
305 AB8500_GPIO_ALTFUN_REG,
306 offset: af.alt_bit1,
307 val: !!(af.alta_val & BIT(0)));
308 if (ret < 0)
309 goto out;
310
311 if (af.alt_bit2 != UNUSED)
312 ret = abx500_gpio_set_bits(chip,
313 AB8500_GPIO_ALTFUN_REG,
314 offset: af.alt_bit2,
315 val: !!(af.alta_val & BIT(1)));
316 } else
317 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
318 offset, val: 1);
319 break;
320
321 case ABX500_ALT_B:
322 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
323 offset, val: 0);
324 if (ret < 0)
325 goto out;
326
327 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
328 offset: af.alt_bit1, val: !!(af.altb_val & BIT(0)));
329 if (ret < 0)
330 goto out;
331
332 if (af.alt_bit2 != UNUSED)
333 ret = abx500_gpio_set_bits(chip,
334 AB8500_GPIO_ALTFUN_REG,
335 offset: af.alt_bit2,
336 val: !!(af.altb_val & BIT(1)));
337 break;
338
339 case ABX500_ALT_C:
340 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
341 offset, val: 0);
342 if (ret < 0)
343 goto out;
344
345 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
346 offset: af.alt_bit2, val: !!(af.altc_val & BIT(0)));
347 if (ret < 0)
348 goto out;
349
350 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
351 offset: af.alt_bit2, val: !!(af.altc_val & BIT(1)));
352 break;
353
354 default:
355 dev_dbg(pct->dev, "unknown alt_setting %d\n", alt_setting);
356
357 return -EINVAL;
358 }
359out:
360 if (ret < 0)
361 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
362
363 return ret;
364}
365
366#ifdef CONFIG_DEBUG_FS
367static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
368 unsigned gpio)
369{
370 u8 mode;
371 bool bit_mode;
372 bool alt_bit1;
373 bool alt_bit2;
374 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
375 struct alternate_functions af = pct->soc->alternate_functions[gpio];
376 /* on ABx5xx, there is no GPIO0, so adjust the offset */
377 unsigned offset = gpio - 1;
378 int ret;
379
380 /*
381 * if gpiosel_bit is set to unused,
382 * it means no GPIO or special case
383 */
384 if (af.gpiosel_bit == UNUSED)
385 return ABX500_DEFAULT;
386
387 /* read GpioSelx register */
388 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8),
389 offset: af.gpiosel_bit, bit: &bit_mode);
390 if (ret < 0)
391 goto out;
392
393 mode = bit_mode;
394
395 /* sanity check */
396 if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) ||
397 (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) {
398 dev_err(pct->dev,
399 "alt_bitX value not in correct range (-1 to 7)\n");
400 return -EINVAL;
401 }
402
403 /* if alt_bit2 is used, alt_bit1 must be used too */
404 if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) {
405 dev_err(pct->dev,
406 "if alt_bit2 is used, alt_bit1 can't be unused\n");
407 return -EINVAL;
408 }
409
410 /* check if pin use AlternateFunction register */
411 if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED))
412 return mode;
413 /*
414 * if pin GPIOSEL bit is set and pin supports alternate function,
415 * it means DEFAULT mode
416 */
417 if (mode)
418 return ABX500_DEFAULT;
419
420 /*
421 * pin use the AlternatFunction register
422 * read alt_bit1 value
423 */
424 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
425 offset: af.alt_bit1, bit: &alt_bit1);
426 if (ret < 0)
427 goto out;
428
429 if (af.alt_bit2 != UNUSED) {
430 /* read alt_bit2 value */
431 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
432 offset: af.alt_bit2,
433 bit: &alt_bit2);
434 if (ret < 0)
435 goto out;
436 } else
437 alt_bit2 = 0;
438
439 mode = (alt_bit2 << 1) + alt_bit1;
440 if (mode == af.alta_val)
441 return ABX500_ALT_A;
442 else if (mode == af.altb_val)
443 return ABX500_ALT_B;
444 else
445 return ABX500_ALT_C;
446
447out:
448 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
449 return ret;
450}
451
452static void abx500_gpio_dbg_show_one(struct seq_file *s,
453 struct pinctrl_dev *pctldev,
454 struct gpio_chip *chip,
455 unsigned offset, unsigned gpio)
456{
457 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
458 u8 gpio_offset = offset - 1;
459 int mode = -1;
460 bool is_out;
461 bool pd;
462 int ret = -ENOMEM;
463
464 const char *modes[] = {
465 [ABX500_DEFAULT] = "default",
466 [ABX500_ALT_A] = "altA",
467 [ABX500_ALT_B] = "altB",
468 [ABX500_ALT_C] = "altC",
469 };
470
471 const char *pull_up_down[] = {
472 [ABX500_GPIO_PULL_DOWN] = "pull down",
473 [ABX500_GPIO_PULL_NONE] = "pull none",
474 [ABX500_GPIO_PULL_NONE + 1] = "pull none",
475 [ABX500_GPIO_PULL_UP] = "pull up",
476 };
477
478 char *label __free(kfree) = gpiochip_dup_line_label(gc: chip, offset: offset - 1);
479 if (IS_ERR(ptr: label))
480 goto out;
481
482 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
483 offset: gpio_offset, bit: &is_out);
484 if (ret < 0)
485 goto out;
486
487 seq_printf(m: s, fmt: " gpio-%-3d (%-20.20s) %-3s",
488 gpio, label ?: "(none)",
489 is_out ? "out" : "in ");
490
491 if (!is_out) {
492 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG,
493 offset: gpio_offset, bit: &pd);
494 if (ret < 0)
495 goto out;
496
497 seq_printf(m: s, fmt: " %-9s", pull_up_down[pd]);
498 } else
499 seq_printf(m: s, fmt: " %-9s", chip->get(chip, offset) ? "hi" : "lo");
500
501 mode = abx500_get_mode(pctldev, chip, gpio: offset);
502
503 seq_printf(m: s, fmt: " %s", (mode < 0) ? "unknown" : modes[mode]);
504
505out:
506 if (ret < 0)
507 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
508}
509
510static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
511{
512 unsigned i;
513 unsigned gpio = chip->base;
514 struct abx500_pinctrl *pct = gpiochip_get_data(gc: chip);
515 struct pinctrl_dev *pctldev = pct->pctldev;
516
517 for (i = 0; i < chip->ngpio; i++, gpio++) {
518 /* On AB8500, there is no GPIO0, the first is the GPIO 1 */
519 abx500_gpio_dbg_show_one(s, pctldev, chip, offset: i + 1, gpio);
520 seq_putc(m: s, c: '\n');
521 }
522}
523
524#else
525static inline void abx500_gpio_dbg_show_one(struct seq_file *s,
526 struct pinctrl_dev *pctldev,
527 struct gpio_chip *chip,
528 unsigned offset, unsigned gpio)
529{
530}
531#define abx500_gpio_dbg_show NULL
532#endif
533
534static const struct gpio_chip abx500gpio_chip = {
535 .label = "abx500-gpio",
536 .owner = THIS_MODULE,
537 .request = gpiochip_generic_request,
538 .free = gpiochip_generic_free,
539 .direction_input = abx500_gpio_direction_input,
540 .get = abx500_gpio_get,
541 .direction_output = abx500_gpio_direction_output,
542 .set = abx500_gpio_set,
543 .to_irq = abx500_gpio_to_irq,
544 .dbg_show = abx500_gpio_dbg_show,
545};
546
547static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
548{
549 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
550
551 return pct->soc->nfunctions;
552}
553
554static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev,
555 unsigned function)
556{
557 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
558
559 return pct->soc->functions[function].name;
560}
561
562static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev,
563 unsigned function,
564 const char * const **groups,
565 unsigned * const num_groups)
566{
567 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
568
569 *groups = pct->soc->functions[function].groups;
570 *num_groups = pct->soc->functions[function].ngroups;
571
572 return 0;
573}
574
575static int abx500_pmx_set(struct pinctrl_dev *pctldev, unsigned function,
576 unsigned group)
577{
578 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
579 struct gpio_chip *chip = &pct->chip;
580 const struct abx500_pingroup *g;
581 int i;
582 int ret = 0;
583
584 g = &pct->soc->groups[group];
585 if (g->altsetting < 0)
586 return -EINVAL;
587
588 dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins);
589
590 for (i = 0; i < g->npins; i++) {
591 dev_dbg(pct->dev, "setting pin %d to altsetting %d\n",
592 g->pins[i], g->altsetting);
593
594 ret = abx500_set_mode(pctldev, chip, gpio: g->pins[i], alt_setting: g->altsetting);
595 }
596
597 if (ret < 0)
598 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
599
600 return ret;
601}
602
603static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev,
604 struct pinctrl_gpio_range *range,
605 unsigned offset)
606{
607 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
608 const struct abx500_pinrange *p;
609 int ret;
610 int i;
611
612 /*
613 * Different ranges have different ways to enable GPIO function on a
614 * pin, so refer back to our local range type, where we handily define
615 * what altfunc enables GPIO for a certain pin.
616 */
617 for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
618 p = &pct->soc->gpio_ranges[i];
619 if ((offset >= p->offset) &&
620 (offset < (p->offset + p->npins)))
621 break;
622 }
623
624 if (i == pct->soc->gpio_num_ranges) {
625 dev_err(pct->dev, "%s failed to locate range\n", __func__);
626 return -ENODEV;
627 }
628
629 dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n",
630 p->altfunc, offset);
631
632 ret = abx500_set_mode(pctldev: pct->pctldev, chip: &pct->chip,
633 gpio: offset, alt_setting: p->altfunc);
634 if (ret < 0)
635 dev_err(pct->dev, "%s setting altfunc failed\n", __func__);
636
637 return ret;
638}
639
640static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev,
641 struct pinctrl_gpio_range *range,
642 unsigned offset)
643{
644}
645
646static const struct pinmux_ops abx500_pinmux_ops = {
647 .get_functions_count = abx500_pmx_get_funcs_cnt,
648 .get_function_name = abx500_pmx_get_func_name,
649 .get_function_groups = abx500_pmx_get_func_groups,
650 .set_mux = abx500_pmx_set,
651 .gpio_request_enable = abx500_gpio_request_enable,
652 .gpio_disable_free = abx500_gpio_disable_free,
653};
654
655static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev)
656{
657 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
658
659 return pct->soc->ngroups;
660}
661
662static const char *abx500_get_group_name(struct pinctrl_dev *pctldev,
663 unsigned selector)
664{
665 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
666
667 return pct->soc->groups[selector].name;
668}
669
670static int abx500_get_group_pins(struct pinctrl_dev *pctldev,
671 unsigned selector,
672 const unsigned **pins,
673 unsigned *num_pins)
674{
675 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
676
677 *pins = pct->soc->groups[selector].pins;
678 *num_pins = pct->soc->groups[selector].npins;
679
680 return 0;
681}
682
683static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev,
684 struct seq_file *s, unsigned offset)
685{
686 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
687 struct gpio_chip *chip = &pct->chip;
688
689 abx500_gpio_dbg_show_one(s, pctldev, chip, offset,
690 gpio: chip->base + offset - 1);
691}
692
693static int abx500_dt_add_map_mux(struct pinctrl_map **map,
694 unsigned *reserved_maps,
695 unsigned *num_maps, const char *group,
696 const char *function)
697{
698 if (*num_maps == *reserved_maps)
699 return -ENOSPC;
700
701 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
702 (*map)[*num_maps].data.mux.group = group;
703 (*map)[*num_maps].data.mux.function = function;
704 (*num_maps)++;
705
706 return 0;
707}
708
709static int abx500_dt_add_map_configs(struct pinctrl_map **map,
710 unsigned *reserved_maps,
711 unsigned *num_maps, const char *group,
712 unsigned long *configs, unsigned num_configs)
713{
714 unsigned long *dup_configs;
715
716 if (*num_maps == *reserved_maps)
717 return -ENOSPC;
718
719 dup_configs = kmemdup(p: configs, size: num_configs * sizeof(*dup_configs),
720 GFP_KERNEL);
721 if (!dup_configs)
722 return -ENOMEM;
723
724 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN;
725
726 (*map)[*num_maps].data.configs.group_or_pin = group;
727 (*map)[*num_maps].data.configs.configs = dup_configs;
728 (*map)[*num_maps].data.configs.num_configs = num_configs;
729 (*num_maps)++;
730
731 return 0;
732}
733
734static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev,
735 const char *pin_name)
736{
737 int i, pin_number;
738 struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
739
740 if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1)
741 for (i = 0; i < npct->soc->npins; i++)
742 if (npct->soc->pins[i].number == pin_number)
743 return npct->soc->pins[i].name;
744 return NULL;
745}
746
747static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev,
748 struct device_node *np,
749 struct pinctrl_map **map,
750 unsigned *reserved_maps,
751 unsigned *num_maps)
752{
753 int ret;
754 const char *function = NULL;
755 unsigned long *configs;
756 unsigned int nconfigs = 0;
757 struct property *prop;
758
759 ret = of_property_read_string(np, propname: "function", out_string: &function);
760 if (ret >= 0) {
761 const char *group;
762
763 ret = of_property_count_strings(np, propname: "groups");
764 if (ret < 0)
765 goto exit;
766
767 ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps,
768 num_maps, reserve: ret);
769 if (ret < 0)
770 goto exit;
771
772 of_property_for_each_string(np, "groups", prop, group) {
773 ret = abx500_dt_add_map_mux(map, reserved_maps,
774 num_maps, group, function);
775 if (ret < 0)
776 goto exit;
777 }
778 }
779
780 ret = pinconf_generic_parse_dt_config(np, pctldev, configs: &configs, nconfigs: &nconfigs);
781 if (nconfigs) {
782 const char *gpio_name;
783 const char *pin;
784
785 ret = of_property_count_strings(np, propname: "pins");
786 if (ret < 0)
787 goto exit;
788
789 ret = pinctrl_utils_reserve_map(pctldev, map,
790 reserved_maps,
791 num_maps, reserve: ret);
792 if (ret < 0)
793 goto exit;
794
795 of_property_for_each_string(np, "pins", prop, pin) {
796 gpio_name = abx500_find_pin_name(pctldev, pin_name: pin);
797
798 ret = abx500_dt_add_map_configs(map, reserved_maps,
799 num_maps, group: gpio_name, configs, num_configs: 1);
800 if (ret < 0)
801 goto exit;
802 }
803 }
804
805exit:
806 return ret;
807}
808
809static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev,
810 struct device_node *np_config,
811 struct pinctrl_map **map, unsigned *num_maps)
812{
813 unsigned reserved_maps;
814 struct device_node *np;
815 int ret;
816
817 reserved_maps = 0;
818 *map = NULL;
819 *num_maps = 0;
820
821 for_each_child_of_node(np_config, np) {
822 ret = abx500_dt_subnode_to_map(pctldev, np, map,
823 reserved_maps: &reserved_maps, num_maps);
824 if (ret < 0) {
825 pinctrl_utils_free_map(pctldev, map: *map, num_maps: *num_maps);
826 of_node_put(node: np);
827 return ret;
828 }
829 }
830
831 return 0;
832}
833
834static const struct pinctrl_ops abx500_pinctrl_ops = {
835 .get_groups_count = abx500_get_groups_cnt,
836 .get_group_name = abx500_get_group_name,
837 .get_group_pins = abx500_get_group_pins,
838 .pin_dbg_show = abx500_pin_dbg_show,
839 .dt_node_to_map = abx500_dt_node_to_map,
840 .dt_free_map = pinctrl_utils_free_map,
841};
842
843static int abx500_pin_config_get(struct pinctrl_dev *pctldev,
844 unsigned pin,
845 unsigned long *config)
846{
847 return -ENOSYS;
848}
849
850static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
851 unsigned pin,
852 unsigned long *configs,
853 unsigned num_configs)
854{
855 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
856 struct gpio_chip *chip = &pct->chip;
857 unsigned offset;
858 int ret = -EINVAL;
859 int i;
860 enum pin_config_param param;
861 enum pin_config_param argument;
862
863 for (i = 0; i < num_configs; i++) {
864 param = pinconf_to_config_param(config: configs[i]);
865 argument = pinconf_to_config_argument(config: configs[i]);
866
867 dev_dbg(chip->parent, "pin %d [%#lx]: %s %s\n",
868 pin, configs[i],
869 (param == PIN_CONFIG_OUTPUT) ? "output " : "input",
870 (param == PIN_CONFIG_OUTPUT) ?
871 (argument ? "high" : "low") :
872 (argument ? "pull up" : "pull down"));
873
874 /* on ABx500, there is no GPIO0, so adjust the offset */
875 offset = pin - 1;
876
877 switch (param) {
878 case PIN_CONFIG_BIAS_DISABLE:
879 ret = abx500_gpio_direction_input(chip, offset);
880 if (ret < 0)
881 goto out;
882
883 /* Chip only supports pull down */
884 ret = abx500_gpio_set_bits(chip,
885 AB8500_GPIO_PUD1_REG, offset,
886 val: ABX500_GPIO_PULL_NONE);
887 break;
888
889 case PIN_CONFIG_BIAS_PULL_DOWN:
890 ret = abx500_gpio_direction_input(chip, offset);
891 if (ret < 0)
892 goto out;
893 /*
894 * if argument = 1 set the pull down
895 * else clear the pull down
896 * Chip only supports pull down
897 */
898 ret = abx500_gpio_set_bits(chip,
899 AB8500_GPIO_PUD1_REG,
900 offset,
901 val: argument ? ABX500_GPIO_PULL_DOWN :
902 ABX500_GPIO_PULL_NONE);
903 break;
904
905 case PIN_CONFIG_BIAS_PULL_UP:
906 ret = abx500_gpio_direction_input(chip, offset);
907 if (ret < 0)
908 goto out;
909 /*
910 * if argument = 1 set the pull up
911 * else clear the pull up
912 */
913 ret = abx500_gpio_direction_input(chip, offset);
914 break;
915
916 case PIN_CONFIG_OUTPUT:
917 ret = abx500_gpio_direction_output(chip, offset,
918 val: argument);
919 break;
920
921 default:
922 dev_err(chip->parent,
923 "illegal configuration requested\n");
924 }
925 } /* for each config */
926out:
927 if (ret < 0)
928 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
929
930 return ret;
931}
932
933static const struct pinconf_ops abx500_pinconf_ops = {
934 .pin_config_get = abx500_pin_config_get,
935 .pin_config_set = abx500_pin_config_set,
936 .is_generic = true,
937};
938
939static struct pinctrl_desc abx500_pinctrl_desc = {
940 .name = "pinctrl-abx500",
941 .pctlops = &abx500_pinctrl_ops,
942 .pmxops = &abx500_pinmux_ops,
943 .confops = &abx500_pinconf_ops,
944 .owner = THIS_MODULE,
945};
946
947static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc)
948{
949 unsigned int lowest = 0;
950 unsigned int highest = 0;
951 unsigned int npins = 0;
952 int i;
953
954 /*
955 * Compute number of GPIOs from the last SoC gpio range descriptors
956 * These ranges may include "holes" but the GPIO number space shall
957 * still be homogeneous, so we need to detect and account for any
958 * such holes so that these are included in the number of GPIO pins.
959 */
960 for (i = 0; i < soc->gpio_num_ranges; i++) {
961 unsigned gstart;
962 unsigned gend;
963 const struct abx500_pinrange *p;
964
965 p = &soc->gpio_ranges[i];
966 gstart = p->offset;
967 gend = p->offset + p->npins - 1;
968
969 if (i == 0) {
970 /* First iteration, set start values */
971 lowest = gstart;
972 highest = gend;
973 } else {
974 if (gstart < lowest)
975 lowest = gstart;
976 if (gend > highest)
977 highest = gend;
978 }
979 }
980 /* this gives the absolute number of pins */
981 npins = highest - lowest + 1;
982 return npins;
983}
984
985static const struct of_device_id abx500_gpio_match[] = {
986 { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, },
987 { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, },
988 { }
989};
990
991static int abx500_gpio_probe(struct platform_device *pdev)
992{
993 struct device_node *np = pdev->dev.of_node;
994 struct abx500_pinctrl *pct;
995 unsigned int id = -1;
996 int ret;
997 int i;
998
999 if (!np) {
1000 dev_err(&pdev->dev, "gpio dt node missing\n");
1001 return -ENODEV;
1002 }
1003
1004 pct = devm_kzalloc(dev: &pdev->dev, size: sizeof(*pct), GFP_KERNEL);
1005 if (!pct)
1006 return -ENOMEM;
1007
1008 pct->dev = &pdev->dev;
1009 pct->parent = dev_get_drvdata(dev: pdev->dev.parent);
1010 pct->chip = abx500gpio_chip;
1011 pct->chip.parent = &pdev->dev;
1012 pct->chip.base = -1; /* Dynamic allocation */
1013
1014 id = (unsigned long)device_get_match_data(dev: &pdev->dev);
1015
1016 /* Poke in other ASIC variants here */
1017 switch (id) {
1018 case PINCTRL_AB8500:
1019 abx500_pinctrl_ab8500_init(soc: &pct->soc);
1020 break;
1021 case PINCTRL_AB8505:
1022 abx500_pinctrl_ab8505_init(soc: &pct->soc);
1023 break;
1024 default:
1025 dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id);
1026 return -EINVAL;
1027 }
1028
1029 if (!pct->soc) {
1030 dev_err(&pdev->dev, "Invalid SOC data\n");
1031 return -EINVAL;
1032 }
1033
1034 pct->chip.ngpio = abx500_get_gpio_num(soc: pct->soc);
1035 pct->irq_cluster = pct->soc->gpio_irq_cluster;
1036 pct->irq_cluster_size = pct->soc->ngpio_irq_cluster;
1037
1038 ret = gpiochip_add_data(&pct->chip, pct);
1039 if (ret) {
1040 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
1041 return ret;
1042 }
1043 dev_info(&pdev->dev, "added gpiochip\n");
1044
1045 abx500_pinctrl_desc.pins = pct->soc->pins;
1046 abx500_pinctrl_desc.npins = pct->soc->npins;
1047 pct->pctldev = devm_pinctrl_register(dev: &pdev->dev, pctldesc: &abx500_pinctrl_desc,
1048 driver_data: pct);
1049 if (IS_ERR(ptr: pct->pctldev)) {
1050 dev_err(&pdev->dev,
1051 "could not register abx500 pinctrl driver\n");
1052 ret = PTR_ERR(ptr: pct->pctldev);
1053 goto out_rem_chip;
1054 }
1055 dev_info(&pdev->dev, "registered pin controller\n");
1056
1057 /* We will handle a range of GPIO pins */
1058 for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
1059 const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i];
1060
1061 ret = gpiochip_add_pin_range(gc: &pct->chip,
1062 pinctl_name: dev_name(dev: &pdev->dev),
1063 gpio_offset: p->offset - 1, pin_offset: p->offset, npins: p->npins);
1064 if (ret < 0)
1065 goto out_rem_chip;
1066 }
1067
1068 platform_set_drvdata(pdev, data: pct);
1069 dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n");
1070
1071 return 0;
1072
1073out_rem_chip:
1074 gpiochip_remove(gc: &pct->chip);
1075 return ret;
1076}
1077
1078/**
1079 * abx500_gpio_remove() - remove Ab8500-gpio driver
1080 * @pdev: Platform device registered
1081 */
1082static void abx500_gpio_remove(struct platform_device *pdev)
1083{
1084 struct abx500_pinctrl *pct = platform_get_drvdata(pdev);
1085
1086 gpiochip_remove(gc: &pct->chip);
1087}
1088
1089static struct platform_driver abx500_gpio_driver = {
1090 .driver = {
1091 .name = "abx500-gpio",
1092 .of_match_table = abx500_gpio_match,
1093 },
1094 .probe = abx500_gpio_probe,
1095 .remove_new = abx500_gpio_remove,
1096};
1097
1098static int __init abx500_gpio_init(void)
1099{
1100 return platform_driver_register(&abx500_gpio_driver);
1101}
1102core_initcall(abx500_gpio_init);
1103

source code of linux/drivers/pinctrl/nomadik/pinctrl-abx500.c