1 | // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
2 | /* |
3 | * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. |
4 | */ |
5 | |
6 | #include <linux/module.h> |
7 | #include <linux/of.h> |
8 | #include <linux/platform_device.h> |
9 | |
10 | #include "pinctrl-msm.h" |
11 | |
12 | #define REG_SIZE 0x1000 |
13 | #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ |
14 | { \ |
15 | .grp = PINCTRL_PINGROUP("gpio" #id, \ |
16 | gpio##id##_pins, \ |
17 | ARRAY_SIZE(gpio##id##_pins)), \ |
18 | .funcs = (int[]){ \ |
19 | msm_mux_gpio, /* gpio mode */ \ |
20 | msm_mux_##f1, \ |
21 | msm_mux_##f2, \ |
22 | msm_mux_##f3, \ |
23 | msm_mux_##f4, \ |
24 | msm_mux_##f5, \ |
25 | msm_mux_##f6, \ |
26 | msm_mux_##f7, \ |
27 | msm_mux_##f8, \ |
28 | msm_mux_##f9 \ |
29 | }, \ |
30 | .nfuncs = 10, \ |
31 | .ctl_reg = REG_SIZE * id, \ |
32 | .io_reg = 0x4 + REG_SIZE * id, \ |
33 | .intr_cfg_reg = 0x8 + REG_SIZE * id, \ |
34 | .intr_status_reg = 0xc + REG_SIZE * id, \ |
35 | .intr_target_reg = 0x8 + REG_SIZE * id, \ |
36 | .mux_bit = 2, \ |
37 | .pull_bit = 0, \ |
38 | .drv_bit = 6, \ |
39 | .oe_bit = 9, \ |
40 | .in_bit = 0, \ |
41 | .out_bit = 1, \ |
42 | .intr_enable_bit = 0, \ |
43 | .intr_status_bit = 0, \ |
44 | .intr_target_bit = 5, \ |
45 | .intr_target_kpss_val = 3, \ |
46 | .intr_raw_status_bit = 4, \ |
47 | .intr_polarity_bit = 1, \ |
48 | .intr_detection_bit = 2, \ |
49 | .intr_detection_width = 2, \ |
50 | } |
51 | |
52 | static const struct pinctrl_pin_desc ipq5332_pins[] = { |
53 | PINCTRL_PIN(0, "GPIO_0" ), |
54 | PINCTRL_PIN(1, "GPIO_1" ), |
55 | PINCTRL_PIN(2, "GPIO_2" ), |
56 | PINCTRL_PIN(3, "GPIO_3" ), |
57 | PINCTRL_PIN(4, "GPIO_4" ), |
58 | PINCTRL_PIN(5, "GPIO_5" ), |
59 | PINCTRL_PIN(6, "GPIO_6" ), |
60 | PINCTRL_PIN(7, "GPIO_7" ), |
61 | PINCTRL_PIN(8, "GPIO_8" ), |
62 | PINCTRL_PIN(9, "GPIO_9" ), |
63 | PINCTRL_PIN(10, "GPIO_10" ), |
64 | PINCTRL_PIN(11, "GPIO_11" ), |
65 | PINCTRL_PIN(12, "GPIO_12" ), |
66 | PINCTRL_PIN(13, "GPIO_13" ), |
67 | PINCTRL_PIN(14, "GPIO_14" ), |
68 | PINCTRL_PIN(15, "GPIO_15" ), |
69 | PINCTRL_PIN(16, "GPIO_16" ), |
70 | PINCTRL_PIN(17, "GPIO_17" ), |
71 | PINCTRL_PIN(18, "GPIO_18" ), |
72 | PINCTRL_PIN(19, "GPIO_19" ), |
73 | PINCTRL_PIN(20, "GPIO_20" ), |
74 | PINCTRL_PIN(21, "GPIO_21" ), |
75 | PINCTRL_PIN(22, "GPIO_22" ), |
76 | PINCTRL_PIN(23, "GPIO_23" ), |
77 | PINCTRL_PIN(24, "GPIO_24" ), |
78 | PINCTRL_PIN(25, "GPIO_25" ), |
79 | PINCTRL_PIN(26, "GPIO_26" ), |
80 | PINCTRL_PIN(27, "GPIO_27" ), |
81 | PINCTRL_PIN(28, "GPIO_28" ), |
82 | PINCTRL_PIN(29, "GPIO_29" ), |
83 | PINCTRL_PIN(30, "GPIO_30" ), |
84 | PINCTRL_PIN(31, "GPIO_31" ), |
85 | PINCTRL_PIN(32, "GPIO_32" ), |
86 | PINCTRL_PIN(33, "GPIO_33" ), |
87 | PINCTRL_PIN(34, "GPIO_34" ), |
88 | PINCTRL_PIN(35, "GPIO_35" ), |
89 | PINCTRL_PIN(36, "GPIO_36" ), |
90 | PINCTRL_PIN(37, "GPIO_37" ), |
91 | PINCTRL_PIN(38, "GPIO_38" ), |
92 | PINCTRL_PIN(39, "GPIO_39" ), |
93 | PINCTRL_PIN(40, "GPIO_40" ), |
94 | PINCTRL_PIN(41, "GPIO_41" ), |
95 | PINCTRL_PIN(42, "GPIO_42" ), |
96 | PINCTRL_PIN(43, "GPIO_43" ), |
97 | PINCTRL_PIN(44, "GPIO_44" ), |
98 | PINCTRL_PIN(45, "GPIO_45" ), |
99 | PINCTRL_PIN(46, "GPIO_46" ), |
100 | PINCTRL_PIN(47, "GPIO_47" ), |
101 | PINCTRL_PIN(48, "GPIO_48" ), |
102 | PINCTRL_PIN(49, "GPIO_49" ), |
103 | PINCTRL_PIN(50, "GPIO_50" ), |
104 | PINCTRL_PIN(51, "GPIO_51" ), |
105 | PINCTRL_PIN(52, "GPIO_52" ), |
106 | }; |
107 | |
108 | #define DECLARE_MSM_GPIO_PINS(pin) \ |
109 | static const unsigned int gpio##pin##_pins[] = { pin } |
110 | DECLARE_MSM_GPIO_PINS(0); |
111 | DECLARE_MSM_GPIO_PINS(1); |
112 | DECLARE_MSM_GPIO_PINS(2); |
113 | DECLARE_MSM_GPIO_PINS(3); |
114 | DECLARE_MSM_GPIO_PINS(4); |
115 | DECLARE_MSM_GPIO_PINS(5); |
116 | DECLARE_MSM_GPIO_PINS(6); |
117 | DECLARE_MSM_GPIO_PINS(7); |
118 | DECLARE_MSM_GPIO_PINS(8); |
119 | DECLARE_MSM_GPIO_PINS(9); |
120 | DECLARE_MSM_GPIO_PINS(10); |
121 | DECLARE_MSM_GPIO_PINS(11); |
122 | DECLARE_MSM_GPIO_PINS(12); |
123 | DECLARE_MSM_GPIO_PINS(13); |
124 | DECLARE_MSM_GPIO_PINS(14); |
125 | DECLARE_MSM_GPIO_PINS(15); |
126 | DECLARE_MSM_GPIO_PINS(16); |
127 | DECLARE_MSM_GPIO_PINS(17); |
128 | DECLARE_MSM_GPIO_PINS(18); |
129 | DECLARE_MSM_GPIO_PINS(19); |
130 | DECLARE_MSM_GPIO_PINS(20); |
131 | DECLARE_MSM_GPIO_PINS(21); |
132 | DECLARE_MSM_GPIO_PINS(22); |
133 | DECLARE_MSM_GPIO_PINS(23); |
134 | DECLARE_MSM_GPIO_PINS(24); |
135 | DECLARE_MSM_GPIO_PINS(25); |
136 | DECLARE_MSM_GPIO_PINS(26); |
137 | DECLARE_MSM_GPIO_PINS(27); |
138 | DECLARE_MSM_GPIO_PINS(28); |
139 | DECLARE_MSM_GPIO_PINS(29); |
140 | DECLARE_MSM_GPIO_PINS(30); |
141 | DECLARE_MSM_GPIO_PINS(31); |
142 | DECLARE_MSM_GPIO_PINS(32); |
143 | DECLARE_MSM_GPIO_PINS(33); |
144 | DECLARE_MSM_GPIO_PINS(34); |
145 | DECLARE_MSM_GPIO_PINS(35); |
146 | DECLARE_MSM_GPIO_PINS(36); |
147 | DECLARE_MSM_GPIO_PINS(37); |
148 | DECLARE_MSM_GPIO_PINS(38); |
149 | DECLARE_MSM_GPIO_PINS(39); |
150 | DECLARE_MSM_GPIO_PINS(40); |
151 | DECLARE_MSM_GPIO_PINS(41); |
152 | DECLARE_MSM_GPIO_PINS(42); |
153 | DECLARE_MSM_GPIO_PINS(43); |
154 | DECLARE_MSM_GPIO_PINS(44); |
155 | DECLARE_MSM_GPIO_PINS(45); |
156 | DECLARE_MSM_GPIO_PINS(46); |
157 | DECLARE_MSM_GPIO_PINS(47); |
158 | DECLARE_MSM_GPIO_PINS(48); |
159 | DECLARE_MSM_GPIO_PINS(49); |
160 | DECLARE_MSM_GPIO_PINS(50); |
161 | DECLARE_MSM_GPIO_PINS(51); |
162 | DECLARE_MSM_GPIO_PINS(52); |
163 | |
164 | enum ipq5332_functions { |
165 | msm_mux_atest_char, |
166 | msm_mux_atest_char0, |
167 | msm_mux_atest_char1, |
168 | msm_mux_atest_char2, |
169 | msm_mux_atest_char3, |
170 | msm_mux_atest_tic, |
171 | msm_mux_audio_pri, |
172 | msm_mux_audio_pri0, |
173 | msm_mux_audio_pri1, |
174 | msm_mux_audio_sec, |
175 | msm_mux_audio_sec0, |
176 | msm_mux_audio_sec1, |
177 | msm_mux_blsp0_i2c, |
178 | msm_mux_blsp0_spi, |
179 | msm_mux_blsp0_uart0, |
180 | msm_mux_blsp0_uart1, |
181 | msm_mux_blsp1_i2c0, |
182 | msm_mux_blsp1_i2c1, |
183 | msm_mux_blsp1_spi0, |
184 | msm_mux_blsp1_spi1, |
185 | msm_mux_blsp1_uart0, |
186 | msm_mux_blsp1_uart1, |
187 | msm_mux_blsp1_uart2, |
188 | msm_mux_blsp2_i2c0, |
189 | msm_mux_blsp2_i2c1, |
190 | msm_mux_blsp2_spi, |
191 | msm_mux_blsp2_spi0, |
192 | msm_mux_blsp2_spi1, |
193 | msm_mux_core_voltage, |
194 | msm_mux_cri_trng0, |
195 | msm_mux_cri_trng1, |
196 | msm_mux_cri_trng2, |
197 | msm_mux_cri_trng3, |
198 | msm_mux_cxc_clk, |
199 | msm_mux_cxc_data, |
200 | msm_mux_dbg_out, |
201 | msm_mux_gcc_plltest, |
202 | msm_mux_gcc_tlmm, |
203 | msm_mux_gpio, |
204 | msm_mux_lock_det, |
205 | msm_mux_mac0, |
206 | msm_mux_mac1, |
207 | msm_mux_mdc0, |
208 | msm_mux_mdc1, |
209 | msm_mux_mdio0, |
210 | msm_mux_mdio1, |
211 | msm_mux_pc, |
212 | msm_mux_pcie0_clk, |
213 | msm_mux_pcie0_wake, |
214 | msm_mux_pcie1_clk, |
215 | msm_mux_pcie1_wake, |
216 | msm_mux_pcie2_clk, |
217 | msm_mux_pcie2_wake, |
218 | msm_mux_pll_test, |
219 | msm_mux_prng_rosc0, |
220 | msm_mux_prng_rosc1, |
221 | msm_mux_prng_rosc2, |
222 | msm_mux_prng_rosc3, |
223 | msm_mux_pta, |
224 | msm_mux_pwm0, |
225 | msm_mux_pwm1, |
226 | msm_mux_pwm2, |
227 | msm_mux_pwm3, |
228 | msm_mux_qdss_cti_trig_in_a0, |
229 | msm_mux_qdss_cti_trig_in_a1, |
230 | msm_mux_qdss_cti_trig_in_b0, |
231 | msm_mux_qdss_cti_trig_in_b1, |
232 | msm_mux_qdss_cti_trig_out_a0, |
233 | msm_mux_qdss_cti_trig_out_a1, |
234 | msm_mux_qdss_cti_trig_out_b0, |
235 | msm_mux_qdss_cti_trig_out_b1, |
236 | msm_mux_qdss_traceclk_a, |
237 | msm_mux_qdss_traceclk_b, |
238 | msm_mux_qdss_tracectl_a, |
239 | msm_mux_qdss_tracectl_b, |
240 | msm_mux_qdss_tracedata_a, |
241 | msm_mux_qdss_tracedata_b, |
242 | msm_mux_qspi_data, |
243 | msm_mux_qspi_clk, |
244 | msm_mux_qspi_cs, |
245 | msm_mux_resout, |
246 | msm_mux_rx0, |
247 | msm_mux_rx1, |
248 | msm_mux_sdc_data, |
249 | msm_mux_sdc_clk, |
250 | msm_mux_sdc_cmd, |
251 | msm_mux_tsens_max, |
252 | msm_mux_wci_txd, |
253 | msm_mux_wci_rxd, |
254 | msm_mux_wsi_clk, |
255 | msm_mux_wsi_clk3, |
256 | msm_mux_wsi_data, |
257 | msm_mux_wsi_data3, |
258 | msm_mux_wsis_reset, |
259 | msm_mux_xfem, |
260 | msm_mux__, |
261 | }; |
262 | |
263 | static const char * const gpio_groups[] = { |
264 | "gpio0" , "gpio1" , "gpio2" , "gpio3" , "gpio4" , "gpio5" , "gpio6" , "gpio7" , |
265 | "gpio8" , "gpio9" , "gpio10" , "gpio11" , "gpio12" , "gpio13" , "gpio14" , |
266 | "gpio15" , "gpio16" , "gpio17" , "gpio18" , "gpio19" , "gpio20" , "gpio21" , |
267 | "gpio22" , "gpio23" , "gpio24" , "gpio25" , "gpio26" , "gpio27" , "gpio28" , |
268 | "gpio29" , "gpio30" , "gpio31" , "gpio32" , "gpio33" , "gpio34" , "gpio35" , |
269 | "gpio36" , "gpio37" , "gpio38" , "gpio39" , "gpio40" , "gpio41" , "gpio42" , |
270 | "gpio43" , "gpio44" , "gpio45" , "gpio46" , "gpio47" , "gpio48" , "gpio49" , |
271 | "gpio50" , "gpio51" , "gpio52" , |
272 | }; |
273 | |
274 | static const char * const atest_char_groups[] = { |
275 | "gpio46" , |
276 | }; |
277 | |
278 | static const char * const atest_char0_groups[] = { |
279 | "gpio0" , |
280 | }; |
281 | |
282 | static const char * const atest_char1_groups[] = { |
283 | "gpio1" , |
284 | }; |
285 | |
286 | static const char * const atest_char2_groups[] = { |
287 | "gpio2" , |
288 | }; |
289 | |
290 | static const char * const atest_char3_groups[] = { |
291 | "gpio3" , |
292 | }; |
293 | |
294 | static const char * const atest_tic_groups[] = { |
295 | "gpio9" , |
296 | }; |
297 | |
298 | static const char * const audio_pri_groups[] = { |
299 | "gpio29" , "gpio30" , "gpio31" , "gpio32" , |
300 | }; |
301 | |
302 | static const char * const audio_pri0_groups[] = { |
303 | "gpio34" , "gpio34" , |
304 | }; |
305 | |
306 | static const char * const audio_pri1_groups[] = { |
307 | "gpio43" , "gpio43" , |
308 | }; |
309 | |
310 | static const char * const audio_sec_groups[] = { |
311 | "gpio33" , "gpio34" , "gpio35" , "gpio36" , |
312 | }; |
313 | |
314 | static const char * const audio_sec0_groups[] = { |
315 | "gpio30" , "gpio30" , |
316 | }; |
317 | |
318 | static const char * const audio_sec1_groups[] = { |
319 | "gpio45" , "gpio45" , |
320 | }; |
321 | |
322 | static const char * const blsp0_i2c_groups[] = { |
323 | "gpio16" , "gpio17" , |
324 | }; |
325 | |
326 | static const char * const blsp0_spi_groups[] = { |
327 | "gpio14" , "gpio15" , "gpio16" , "gpio17" , |
328 | }; |
329 | |
330 | static const char * const blsp0_uart0_groups[] = { |
331 | "gpio18" , "gpio19" , |
332 | }; |
333 | |
334 | static const char * const blsp0_uart1_groups[] = { |
335 | "gpio27" , "gpio28" , |
336 | }; |
337 | |
338 | static const char * const blsp1_i2c0_groups[] = { |
339 | "gpio29" , "gpio30" , |
340 | }; |
341 | |
342 | static const char * const blsp1_i2c1_groups[] = { |
343 | "gpio40" , "gpio41" , |
344 | }; |
345 | |
346 | static const char * const blsp1_spi0_groups[] = { |
347 | "gpio29" , "gpio30" , "gpio31" , "gpio32" , |
348 | }; |
349 | |
350 | static const char * const blsp1_spi1_groups[] = { |
351 | "gpio25" , "gpio26" , "gpio27" , "gpio28" , |
352 | }; |
353 | |
354 | static const char * const blsp1_uart0_groups[] = { |
355 | "gpio14" , "gpio15" , "gpio16" , "gpio17" , |
356 | }; |
357 | |
358 | static const char * const blsp1_uart1_groups[] = { |
359 | "gpio25" , "gpio26" , "gpio27" , "gpio28" , |
360 | }; |
361 | |
362 | static const char * const blsp1_uart2_groups[] = { |
363 | "gpio33" , "gpio34" , "gpio35" , "gpio36" , |
364 | }; |
365 | |
366 | static const char * const blsp2_i2c0_groups[] = { |
367 | "gpio43" , "gpio45" , |
368 | }; |
369 | |
370 | static const char * const blsp2_i2c1_groups[] = { |
371 | "gpio33" , "gpio34" , |
372 | }; |
373 | |
374 | static const char * const blsp2_spi_groups[] = { |
375 | "gpio37" , |
376 | }; |
377 | |
378 | static const char * const blsp2_spi0_groups[] = { |
379 | "gpio33" , "gpio34" , "gpio35" , "gpio36" , |
380 | }; |
381 | |
382 | static const char * const blsp2_spi1_groups[] = { |
383 | "gpio40" , "gpio41" , "gpio42" , "gpio52" , |
384 | }; |
385 | |
386 | static const char * const core_voltage_groups[] = { |
387 | "gpio21" , "gpio23" , |
388 | }; |
389 | |
390 | static const char * const cri_trng0_groups[] = { |
391 | "gpio17" , |
392 | }; |
393 | |
394 | static const char * const cri_trng1_groups[] = { |
395 | "gpio18" , |
396 | }; |
397 | |
398 | static const char * const cri_trng2_groups[] = { |
399 | "gpio19" , |
400 | }; |
401 | |
402 | static const char * const cri_trng3_groups[] = { |
403 | "gpio20" , |
404 | }; |
405 | |
406 | static const char * const cxc_clk_groups[] = { |
407 | "gpio49" , |
408 | }; |
409 | |
410 | static const char * const cxc_data_groups[] = { |
411 | "gpio50" , |
412 | }; |
413 | |
414 | static const char * const dbg_out_groups[] = { |
415 | "gpio48" , |
416 | }; |
417 | |
418 | static const char * const gcc_plltest_groups[] = { |
419 | "gpio43" , "gpio45" , |
420 | }; |
421 | |
422 | static const char * const gcc_tlmm_groups[] = { |
423 | "gpio44" , |
424 | }; |
425 | |
426 | static const char * const lock_det_groups[] = { |
427 | "gpio51" , |
428 | }; |
429 | |
430 | static const char * const mac0_groups[] = { |
431 | "gpio18" , |
432 | }; |
433 | |
434 | static const char * const mac1_groups[] = { |
435 | "gpio19" , |
436 | }; |
437 | |
438 | static const char * const mdc0_groups[] = { |
439 | "gpio25" , |
440 | }; |
441 | |
442 | static const char * const mdc1_groups[] = { |
443 | "gpio27" , |
444 | }; |
445 | |
446 | static const char * const mdio0_groups[] = { |
447 | "gpio26" , |
448 | }; |
449 | |
450 | static const char * const mdio1_groups[] = { |
451 | "gpio28" , |
452 | }; |
453 | |
454 | static const char * const pc_groups[] = { |
455 | "gpio35" , |
456 | }; |
457 | |
458 | static const char * const pcie0_clk_groups[] = { |
459 | "gpio37" , |
460 | }; |
461 | |
462 | static const char * const pcie0_wake_groups[] = { |
463 | "gpio39" , |
464 | }; |
465 | |
466 | static const char * const pcie1_clk_groups[] = { |
467 | "gpio46" , |
468 | }; |
469 | |
470 | static const char * const pcie1_wake_groups[] = { |
471 | "gpio48" , |
472 | }; |
473 | |
474 | static const char * const pcie2_clk_groups[] = { |
475 | "gpio43" , |
476 | }; |
477 | |
478 | static const char * const pcie2_wake_groups[] = { |
479 | "gpio45" , |
480 | }; |
481 | |
482 | static const char * const pll_test_groups[] = { |
483 | "gpio49" , |
484 | }; |
485 | |
486 | static const char * const prng_rosc0_groups[] = { |
487 | "gpio22" , |
488 | }; |
489 | |
490 | static const char * const prng_rosc1_groups[] = { |
491 | "gpio24" , |
492 | }; |
493 | |
494 | static const char * const prng_rosc2_groups[] = { |
495 | "gpio25" , |
496 | }; |
497 | |
498 | static const char * const prng_rosc3_groups[] = { |
499 | "gpio26" , |
500 | }; |
501 | |
502 | static const char * const pta_groups[] = { |
503 | "gpio49" , "gpio50" , "gpio51" , |
504 | }; |
505 | |
506 | static const char * const pwm0_groups[] = { |
507 | "gpio43" , "gpio44" , "gpio45" , "gpio46" , |
508 | }; |
509 | |
510 | static const char * const pwm1_groups[] = { |
511 | "gpio29" , "gpio30" , "gpio31" , "gpio32" , |
512 | }; |
513 | |
514 | static const char * const pwm2_groups[] = { |
515 | "gpio25" , "gpio26" , "gpio27" , "gpio28" , |
516 | }; |
517 | |
518 | static const char * const pwm3_groups[] = { |
519 | "gpio8" , "gpio9" , "gpio10" , "gpio11" , |
520 | }; |
521 | |
522 | static const char * const qdss_cti_trig_in_a0_groups[] = { |
523 | "gpio5" , |
524 | }; |
525 | |
526 | static const char * const qdss_cti_trig_in_a1_groups[] = { |
527 | "gpio7" , |
528 | }; |
529 | |
530 | static const char * const qdss_cti_trig_in_b0_groups[] = { |
531 | "gpio47" , |
532 | }; |
533 | |
534 | static const char * const qdss_cti_trig_in_b1_groups[] = { |
535 | "gpio49" , |
536 | }; |
537 | |
538 | static const char * const qdss_cti_trig_out_a0_groups[] = { |
539 | "gpio4" , |
540 | }; |
541 | |
542 | static const char * const qdss_cti_trig_out_a1_groups[] = { |
543 | "gpio6" , |
544 | }; |
545 | |
546 | static const char * const qdss_cti_trig_out_b0_groups[] = { |
547 | "gpio46" , |
548 | }; |
549 | |
550 | static const char * const qdss_cti_trig_out_b1_groups[] = { |
551 | "gpio48" , |
552 | }; |
553 | |
554 | static const char * const qdss_traceclk_a_groups[] = { |
555 | "gpio8" , |
556 | }; |
557 | |
558 | static const char * const qdss_traceclk_b_groups[] = { |
559 | "gpio45" , |
560 | }; |
561 | |
562 | static const char * const qdss_tracectl_a_groups[] = { |
563 | "gpio9" , |
564 | }; |
565 | |
566 | static const char * const qdss_tracectl_b_groups[] = { |
567 | "gpio44" , |
568 | }; |
569 | |
570 | static const char * const qdss_tracedata_a_groups[] = { |
571 | "gpio10" , "gpio11" , "gpio12" , "gpio13" , "gpio14" , "gpio15" , "gpio16" , |
572 | "gpio17" , "gpio18" , "gpio19" , "gpio20" , "gpio22" , "gpio24" , "gpio25" , |
573 | "gpio26" , "gpio27" , |
574 | }; |
575 | |
576 | static const char * const qdss_tracedata_b_groups[] = { |
577 | "gpio29" , "gpio30" , "gpio31" , "gpio32" , "gpio33" , "gpio34" , "gpio35" , |
578 | "gpio36" , "gpio37" , "gpio38" , "gpio39" , "gpio40" , "gpio41" , "gpio42" , |
579 | "gpio43" , "gpio52" , |
580 | }; |
581 | |
582 | static const char * const qspi_clk_groups[] = { |
583 | "gpio13" , |
584 | }; |
585 | |
586 | static const char * const qspi_cs_groups[] = { |
587 | "gpio12" , |
588 | }; |
589 | |
590 | static const char * const qspi_data_groups[] = { |
591 | "gpio8" , "gpio9" , "gpio10" , "gpio11" , |
592 | }; |
593 | |
594 | static const char * const resout_groups[] = { |
595 | "gpio20" , |
596 | }; |
597 | |
598 | static const char * const rx0_groups[] = { |
599 | "gpio48" , |
600 | }; |
601 | |
602 | static const char * const rx1_groups[] = { |
603 | "gpio45" , |
604 | }; |
605 | |
606 | static const char * const sdc_clk_groups[] = { |
607 | "gpio13" , |
608 | }; |
609 | |
610 | static const char * const sdc_cmd_groups[] = { |
611 | "gpio12" , |
612 | }; |
613 | |
614 | static const char * const sdc_data_groups[] = { |
615 | "gpio8" , "gpio9" , "gpio10" , "gpio11" , |
616 | }; |
617 | |
618 | static const char * const tsens_max_groups[] = { |
619 | "gpio28" , |
620 | }; |
621 | |
622 | static const char * const wci_txd_groups[] = { |
623 | "gpio0" , "gpio1" , "gpio2" , "gpio3" , "gpio4" , "gpio5" , "gpio6" , "gpio7" , |
624 | "gpio36" , "gpio43" , "gpio45" , |
625 | }; |
626 | |
627 | static const char * const wci_rxd_groups[] = { |
628 | "gpio0" , "gpio1" , "gpio2" , "gpio3" , "gpio4" , "gpio5" , "gpio6" , "gpio7" , |
629 | "gpio35" , "gpio36" , "gpio43" , "gpio45" , |
630 | }; |
631 | |
632 | static const char * const wsi_clk_groups[] = { |
633 | "gpio40" , "gpio42" , |
634 | }; |
635 | |
636 | static const char * const wsi_clk3_groups[] = { |
637 | "gpio43" , |
638 | }; |
639 | |
640 | static const char * const wsi_data_groups[] = { |
641 | "gpio41" , "gpio52" , |
642 | }; |
643 | |
644 | static const char * const wsi_data3_groups[] = { |
645 | "gpio44" , |
646 | }; |
647 | |
648 | static const char * const wsis_reset_groups[] = { |
649 | "gpio41" , |
650 | }; |
651 | |
652 | static const char * const xfem_groups[] = { |
653 | "gpio0" , "gpio1" , "gpio2" , "gpio3" , "gpio4" , "gpio5" , "gpio6" , "gpio7" , |
654 | }; |
655 | |
656 | static const struct pinfunction ipq5332_functions[] = { |
657 | MSM_PIN_FUNCTION(atest_char), |
658 | MSM_PIN_FUNCTION(atest_char0), |
659 | MSM_PIN_FUNCTION(atest_char1), |
660 | MSM_PIN_FUNCTION(atest_char2), |
661 | MSM_PIN_FUNCTION(atest_char3), |
662 | MSM_PIN_FUNCTION(atest_tic), |
663 | MSM_PIN_FUNCTION(audio_pri), |
664 | MSM_PIN_FUNCTION(audio_pri0), |
665 | MSM_PIN_FUNCTION(audio_pri1), |
666 | MSM_PIN_FUNCTION(audio_sec), |
667 | MSM_PIN_FUNCTION(audio_sec0), |
668 | MSM_PIN_FUNCTION(audio_sec1), |
669 | MSM_PIN_FUNCTION(blsp0_i2c), |
670 | MSM_PIN_FUNCTION(blsp0_spi), |
671 | MSM_PIN_FUNCTION(blsp0_uart0), |
672 | MSM_PIN_FUNCTION(blsp0_uart1), |
673 | MSM_PIN_FUNCTION(blsp1_i2c0), |
674 | MSM_PIN_FUNCTION(blsp1_i2c1), |
675 | MSM_PIN_FUNCTION(blsp1_spi0), |
676 | MSM_PIN_FUNCTION(blsp1_spi1), |
677 | MSM_PIN_FUNCTION(blsp1_uart0), |
678 | MSM_PIN_FUNCTION(blsp1_uart1), |
679 | MSM_PIN_FUNCTION(blsp1_uart2), |
680 | MSM_PIN_FUNCTION(blsp2_i2c0), |
681 | MSM_PIN_FUNCTION(blsp2_i2c1), |
682 | MSM_PIN_FUNCTION(blsp2_spi), |
683 | MSM_PIN_FUNCTION(blsp2_spi0), |
684 | MSM_PIN_FUNCTION(blsp2_spi1), |
685 | MSM_PIN_FUNCTION(core_voltage), |
686 | MSM_PIN_FUNCTION(cri_trng0), |
687 | MSM_PIN_FUNCTION(cri_trng1), |
688 | MSM_PIN_FUNCTION(cri_trng2), |
689 | MSM_PIN_FUNCTION(cri_trng3), |
690 | MSM_PIN_FUNCTION(cxc_clk), |
691 | MSM_PIN_FUNCTION(cxc_data), |
692 | MSM_PIN_FUNCTION(dbg_out), |
693 | MSM_PIN_FUNCTION(gcc_plltest), |
694 | MSM_PIN_FUNCTION(gcc_tlmm), |
695 | MSM_PIN_FUNCTION(gpio), |
696 | MSM_PIN_FUNCTION(lock_det), |
697 | MSM_PIN_FUNCTION(mac0), |
698 | MSM_PIN_FUNCTION(mac1), |
699 | MSM_PIN_FUNCTION(mdc0), |
700 | MSM_PIN_FUNCTION(mdc1), |
701 | MSM_PIN_FUNCTION(mdio0), |
702 | MSM_PIN_FUNCTION(mdio1), |
703 | MSM_PIN_FUNCTION(pc), |
704 | MSM_PIN_FUNCTION(pcie0_clk), |
705 | MSM_PIN_FUNCTION(pcie0_wake), |
706 | MSM_PIN_FUNCTION(pcie1_clk), |
707 | MSM_PIN_FUNCTION(pcie1_wake), |
708 | MSM_PIN_FUNCTION(pcie2_clk), |
709 | MSM_PIN_FUNCTION(pcie2_wake), |
710 | MSM_PIN_FUNCTION(pll_test), |
711 | MSM_PIN_FUNCTION(prng_rosc0), |
712 | MSM_PIN_FUNCTION(prng_rosc1), |
713 | MSM_PIN_FUNCTION(prng_rosc2), |
714 | MSM_PIN_FUNCTION(prng_rosc3), |
715 | MSM_PIN_FUNCTION(pta), |
716 | MSM_PIN_FUNCTION(pwm0), |
717 | MSM_PIN_FUNCTION(pwm1), |
718 | MSM_PIN_FUNCTION(pwm2), |
719 | MSM_PIN_FUNCTION(pwm3), |
720 | MSM_PIN_FUNCTION(qdss_cti_trig_in_a0), |
721 | MSM_PIN_FUNCTION(qdss_cti_trig_in_a1), |
722 | MSM_PIN_FUNCTION(qdss_cti_trig_in_b0), |
723 | MSM_PIN_FUNCTION(qdss_cti_trig_in_b1), |
724 | MSM_PIN_FUNCTION(qdss_cti_trig_out_a0), |
725 | MSM_PIN_FUNCTION(qdss_cti_trig_out_a1), |
726 | MSM_PIN_FUNCTION(qdss_cti_trig_out_b0), |
727 | MSM_PIN_FUNCTION(qdss_cti_trig_out_b1), |
728 | MSM_PIN_FUNCTION(qdss_traceclk_a), |
729 | MSM_PIN_FUNCTION(qdss_traceclk_b), |
730 | MSM_PIN_FUNCTION(qdss_tracectl_a), |
731 | MSM_PIN_FUNCTION(qdss_tracectl_b), |
732 | MSM_PIN_FUNCTION(qdss_tracedata_a), |
733 | MSM_PIN_FUNCTION(qdss_tracedata_b), |
734 | MSM_PIN_FUNCTION(qspi_data), |
735 | MSM_PIN_FUNCTION(qspi_clk), |
736 | MSM_PIN_FUNCTION(qspi_cs), |
737 | MSM_PIN_FUNCTION(resout), |
738 | MSM_PIN_FUNCTION(rx0), |
739 | MSM_PIN_FUNCTION(rx1), |
740 | MSM_PIN_FUNCTION(sdc_data), |
741 | MSM_PIN_FUNCTION(sdc_clk), |
742 | MSM_PIN_FUNCTION(sdc_cmd), |
743 | MSM_PIN_FUNCTION(tsens_max), |
744 | MSM_PIN_FUNCTION(wci_txd), |
745 | MSM_PIN_FUNCTION(wci_rxd), |
746 | MSM_PIN_FUNCTION(wsi_clk), |
747 | MSM_PIN_FUNCTION(wsi_clk3), |
748 | MSM_PIN_FUNCTION(wsi_data), |
749 | MSM_PIN_FUNCTION(wsi_data3), |
750 | MSM_PIN_FUNCTION(wsis_reset), |
751 | MSM_PIN_FUNCTION(xfem), |
752 | }; |
753 | |
754 | static const struct msm_pingroup ipq5332_groups[] = { |
755 | PINGROUP(0, atest_char0, wci_txd, wci_rxd, xfem, _, _, _, _, _), |
756 | PINGROUP(1, atest_char1, wci_txd, wci_rxd, xfem, _, _, _, _, _), |
757 | PINGROUP(2, atest_char2, wci_txd, wci_rxd, xfem, _, _, _, _, _), |
758 | PINGROUP(3, atest_char3, wci_txd, wci_rxd, xfem, _, _, _, _, _), |
759 | PINGROUP(4, qdss_cti_trig_out_a0, wci_txd, wci_rxd, xfem, _, _, _, _, _), |
760 | PINGROUP(5, qdss_cti_trig_in_a0, wci_txd, wci_rxd, xfem, _, _, _, _, _), |
761 | PINGROUP(6, qdss_cti_trig_out_a1, wci_txd, wci_rxd, xfem, _, _, _, _, _), |
762 | PINGROUP(7, qdss_cti_trig_in_a1, wci_txd, wci_rxd, xfem, _, _, _, _, _), |
763 | PINGROUP(8, sdc_data, qspi_data, pwm3, qdss_traceclk_a, _, _, _, _, _), |
764 | PINGROUP(9, sdc_data, qspi_data, pwm3, qdss_tracectl_a, _, atest_tic, _, _, _), |
765 | PINGROUP(10, sdc_data, qspi_data, pwm3, qdss_tracedata_a, _, _, _, _, _), |
766 | PINGROUP(11, sdc_data, qspi_data, pwm3, qdss_tracedata_a, _, _, _, _, _), |
767 | PINGROUP(12, sdc_cmd, qspi_cs, qdss_tracedata_a, _, _, _, _, _, _), |
768 | PINGROUP(13, sdc_clk, qspi_clk, qdss_tracedata_a, _, _, _, _, _, _), |
769 | PINGROUP(14, blsp0_spi, blsp1_uart0, qdss_tracedata_a, _, _, _, _, _, _), |
770 | PINGROUP(15, blsp0_spi, blsp1_uart0, qdss_tracedata_a, _, _, _, _, _, _), |
771 | PINGROUP(16, blsp0_spi, blsp0_i2c, blsp1_uart0, _, qdss_tracedata_a, _, _, _, _), |
772 | PINGROUP(17, blsp0_spi, blsp0_i2c, blsp1_uart0, _, cri_trng0, qdss_tracedata_a, _, _, _), |
773 | PINGROUP(18, blsp0_uart0, mac0, _, cri_trng1, qdss_tracedata_a, _, _, _, _), |
774 | PINGROUP(19, blsp0_uart0, mac1, _, cri_trng2, qdss_tracedata_a, _, _, _, _), |
775 | PINGROUP(20, resout, _, cri_trng3, qdss_tracedata_a, _, _, _, _, _), |
776 | PINGROUP(21, core_voltage, _, _, _, _, _, _, _, _), |
777 | PINGROUP(22, _, prng_rosc0, qdss_tracedata_a, _, _, _, _, _, _), |
778 | PINGROUP(23, core_voltage, _, _, _, _, _, _, _, _), |
779 | PINGROUP(24, _, prng_rosc1, qdss_tracedata_a, _, _, _, _, _, _), |
780 | PINGROUP(25, mdc0, blsp1_uart1, blsp1_spi1, pwm2, _, _, prng_rosc2, qdss_tracedata_a, _), |
781 | PINGROUP(26, mdio0, blsp1_uart1, blsp1_spi1, pwm2, _, _, prng_rosc3, qdss_tracedata_a, _), |
782 | PINGROUP(27, mdc1, blsp0_uart1, blsp1_uart1, blsp1_spi1, pwm2, _, _, qdss_tracedata_a, _), |
783 | PINGROUP(28, mdio1, blsp0_uart1, blsp1_uart1, blsp1_spi1, pwm2, _, tsens_max, _, _), |
784 | PINGROUP(29, audio_pri, blsp1_spi0, blsp1_i2c0, pwm1, _, qdss_tracedata_b, _, _, _), |
785 | PINGROUP(30, audio_pri, blsp1_spi0, blsp1_i2c0, pwm1, audio_sec0, audio_sec0, _, qdss_tracedata_b, _), |
786 | PINGROUP(31, audio_pri, blsp1_spi0, pwm1, _, qdss_tracedata_b, _, _, _, _), |
787 | PINGROUP(32, audio_pri, blsp1_spi0, pwm1, _, qdss_tracedata_b, _, _, _, _), |
788 | PINGROUP(33, audio_sec, blsp1_uart2, blsp2_i2c1, blsp2_spi0, _, qdss_tracedata_b, _, _, _), |
789 | PINGROUP(34, audio_sec, blsp1_uart2, blsp2_i2c1, blsp2_spi0, audio_pri0, audio_pri0, _, qdss_tracedata_b, _), |
790 | PINGROUP(35, audio_sec, blsp1_uart2, pc, wci_rxd, blsp2_spi0, _, qdss_tracedata_b, _, _), |
791 | PINGROUP(36, audio_sec, blsp1_uart2, wci_txd, wci_rxd, blsp2_spi0, _, qdss_tracedata_b, _, _), |
792 | PINGROUP(37, pcie0_clk, blsp2_spi, _, qdss_tracedata_b, _, _, _, _, _), |
793 | PINGROUP(38, _, qdss_tracedata_b, _, _, _, _, _, _, _), |
794 | PINGROUP(39, pcie0_wake, _, qdss_tracedata_b, _, _, _, _, _, _), |
795 | PINGROUP(40, wsi_clk, blsp1_i2c1, blsp2_spi1, _, _, qdss_tracedata_b, _, _, _), |
796 | PINGROUP(41, wsi_data, blsp1_i2c1, blsp2_spi1, _, _, qdss_tracedata_b, _, wsis_reset, _), |
797 | PINGROUP(42, wsi_clk, blsp2_spi1, _, qdss_tracedata_b, _, _, _, _, _), |
798 | PINGROUP(43, pcie2_clk, wci_txd, wci_rxd, blsp2_i2c0, pwm0, audio_pri1, audio_pri1, _, gcc_plltest), |
799 | PINGROUP(44, pwm0, _, gcc_tlmm, qdss_tracectl_b, _, wsi_data3, _, _, _), |
800 | PINGROUP(45, pcie2_wake, wci_txd, wci_rxd, blsp2_i2c0, rx1, pwm0, audio_sec1, audio_sec1, _), |
801 | PINGROUP(46, pcie1_clk, atest_char, pwm0, _, qdss_cti_trig_out_b0, _, _, _, _), |
802 | PINGROUP(47, _, qdss_cti_trig_in_b0, _, _, _, _, _, _, _), |
803 | PINGROUP(48, pcie1_wake, rx0, dbg_out, qdss_cti_trig_out_b1, _, _, _, _, _), |
804 | PINGROUP(49, pta, cxc_clk, pll_test, _, qdss_cti_trig_in_b1, _, _, _, _), |
805 | PINGROUP(50, pta, cxc_data, _, _, _, _, _, _, _), |
806 | PINGROUP(51, pta, lock_det, _, _, _, _, _, _, _), |
807 | PINGROUP(52, wsi_data, blsp2_spi1, _, qdss_tracedata_b, _, _, _, _, _), |
808 | }; |
809 | |
810 | static const struct msm_pinctrl_soc_data ipq5332_pinctrl = { |
811 | .pins = ipq5332_pins, |
812 | .npins = ARRAY_SIZE(ipq5332_pins), |
813 | .functions = ipq5332_functions, |
814 | .nfunctions = ARRAY_SIZE(ipq5332_functions), |
815 | .groups = ipq5332_groups, |
816 | .ngroups = ARRAY_SIZE(ipq5332_groups), |
817 | .ngpios = 53, |
818 | }; |
819 | |
820 | static int ipq5332_pinctrl_probe(struct platform_device *pdev) |
821 | { |
822 | return msm_pinctrl_probe(pdev, soc_data: &ipq5332_pinctrl); |
823 | } |
824 | |
825 | static const struct of_device_id ipq5332_pinctrl_of_match[] = { |
826 | { .compatible = "qcom,ipq5332-tlmm" , }, |
827 | { }, |
828 | }; |
829 | MODULE_DEVICE_TABLE(of, ipq5332_pinctrl_of_match); |
830 | |
831 | static struct platform_driver ipq5332_pinctrl_driver = { |
832 | .driver = { |
833 | .name = "ipq5332-tlmm" , |
834 | .of_match_table = ipq5332_pinctrl_of_match, |
835 | }, |
836 | .probe = ipq5332_pinctrl_probe, |
837 | .remove_new = msm_pinctrl_remove, |
838 | }; |
839 | |
840 | static int __init ipq5332_pinctrl_init(void) |
841 | { |
842 | return platform_driver_register(&ipq5332_pinctrl_driver); |
843 | } |
844 | arch_initcall(ipq5332_pinctrl_init); |
845 | |
846 | static void __exit ipq5332_pinctrl_exit(void) |
847 | { |
848 | platform_driver_unregister(&ipq5332_pinctrl_driver); |
849 | } |
850 | module_exit(ipq5332_pinctrl_exit); |
851 | |
852 | MODULE_DESCRIPTION("QTI IPQ5332 TLMM driver" ); |
853 | MODULE_LICENSE("GPL" ); |
854 | |