1 | // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
2 | /* |
3 | * Copyright (c) 2023 The Linux Foundation. All rights reserved. |
4 | */ |
5 | |
6 | #include <linux/module.h> |
7 | #include <linux/of.h> |
8 | #include <linux/platform_device.h> |
9 | |
10 | #include "pinctrl-msm.h" |
11 | |
12 | #define REG_SIZE 0x1000 |
13 | #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ |
14 | { \ |
15 | .grp = PINCTRL_PINGROUP("gpio" #id, \ |
16 | gpio##id##_pins, \ |
17 | ARRAY_SIZE(gpio##id##_pins)), \ |
18 | .funcs = (int[]){ \ |
19 | msm_mux_gpio, /* gpio mode */ \ |
20 | msm_mux_##f1, \ |
21 | msm_mux_##f2, \ |
22 | msm_mux_##f3, \ |
23 | msm_mux_##f4, \ |
24 | msm_mux_##f5, \ |
25 | msm_mux_##f6, \ |
26 | msm_mux_##f7, \ |
27 | msm_mux_##f8, \ |
28 | msm_mux_##f9 \ |
29 | }, \ |
30 | .nfuncs = 10, \ |
31 | .ctl_reg = REG_SIZE * id, \ |
32 | .io_reg = 0x4 + REG_SIZE * id, \ |
33 | .intr_cfg_reg = 0x8 + REG_SIZE * id, \ |
34 | .intr_status_reg = 0xc + REG_SIZE * id, \ |
35 | .intr_target_reg = 0x8 + REG_SIZE * id, \ |
36 | .mux_bit = 2, \ |
37 | .pull_bit = 0, \ |
38 | .drv_bit = 6, \ |
39 | .oe_bit = 9, \ |
40 | .in_bit = 0, \ |
41 | .out_bit = 1, \ |
42 | .intr_enable_bit = 0, \ |
43 | .intr_status_bit = 0, \ |
44 | .intr_target_bit = 5, \ |
45 | .intr_target_kpss_val = 3, \ |
46 | .intr_raw_status_bit = 4, \ |
47 | .intr_polarity_bit = 1, \ |
48 | .intr_detection_bit = 2, \ |
49 | .intr_detection_width = 2, \ |
50 | } |
51 | |
52 | static const struct pinctrl_pin_desc ipq9574_pins[] = { |
53 | PINCTRL_PIN(0, "GPIO_0" ), |
54 | PINCTRL_PIN(1, "GPIO_1" ), |
55 | PINCTRL_PIN(2, "GPIO_2" ), |
56 | PINCTRL_PIN(3, "GPIO_3" ), |
57 | PINCTRL_PIN(4, "GPIO_4" ), |
58 | PINCTRL_PIN(5, "GPIO_5" ), |
59 | PINCTRL_PIN(6, "GPIO_6" ), |
60 | PINCTRL_PIN(7, "GPIO_7" ), |
61 | PINCTRL_PIN(8, "GPIO_8" ), |
62 | PINCTRL_PIN(9, "GPIO_9" ), |
63 | PINCTRL_PIN(10, "GPIO_10" ), |
64 | PINCTRL_PIN(11, "GPIO_11" ), |
65 | PINCTRL_PIN(12, "GPIO_12" ), |
66 | PINCTRL_PIN(13, "GPIO_13" ), |
67 | PINCTRL_PIN(14, "GPIO_14" ), |
68 | PINCTRL_PIN(15, "GPIO_15" ), |
69 | PINCTRL_PIN(16, "GPIO_16" ), |
70 | PINCTRL_PIN(17, "GPIO_17" ), |
71 | PINCTRL_PIN(18, "GPIO_18" ), |
72 | PINCTRL_PIN(19, "GPIO_19" ), |
73 | PINCTRL_PIN(20, "GPIO_20" ), |
74 | PINCTRL_PIN(21, "GPIO_21" ), |
75 | PINCTRL_PIN(22, "GPIO_22" ), |
76 | PINCTRL_PIN(23, "GPIO_23" ), |
77 | PINCTRL_PIN(24, "GPIO_24" ), |
78 | PINCTRL_PIN(25, "GPIO_25" ), |
79 | PINCTRL_PIN(26, "GPIO_26" ), |
80 | PINCTRL_PIN(27, "GPIO_27" ), |
81 | PINCTRL_PIN(28, "GPIO_28" ), |
82 | PINCTRL_PIN(29, "GPIO_29" ), |
83 | PINCTRL_PIN(30, "GPIO_30" ), |
84 | PINCTRL_PIN(31, "GPIO_31" ), |
85 | PINCTRL_PIN(32, "GPIO_32" ), |
86 | PINCTRL_PIN(33, "GPIO_33" ), |
87 | PINCTRL_PIN(34, "GPIO_34" ), |
88 | PINCTRL_PIN(35, "GPIO_35" ), |
89 | PINCTRL_PIN(36, "GPIO_36" ), |
90 | PINCTRL_PIN(37, "GPIO_37" ), |
91 | PINCTRL_PIN(38, "GPIO_38" ), |
92 | PINCTRL_PIN(39, "GPIO_39" ), |
93 | PINCTRL_PIN(40, "GPIO_40" ), |
94 | PINCTRL_PIN(41, "GPIO_41" ), |
95 | PINCTRL_PIN(42, "GPIO_42" ), |
96 | PINCTRL_PIN(43, "GPIO_43" ), |
97 | PINCTRL_PIN(44, "GPIO_44" ), |
98 | PINCTRL_PIN(45, "GPIO_45" ), |
99 | PINCTRL_PIN(46, "GPIO_46" ), |
100 | PINCTRL_PIN(47, "GPIO_47" ), |
101 | PINCTRL_PIN(48, "GPIO_48" ), |
102 | PINCTRL_PIN(49, "GPIO_49" ), |
103 | PINCTRL_PIN(50, "GPIO_50" ), |
104 | PINCTRL_PIN(51, "GPIO_51" ), |
105 | PINCTRL_PIN(52, "GPIO_52" ), |
106 | PINCTRL_PIN(53, "GPIO_53" ), |
107 | PINCTRL_PIN(54, "GPIO_54" ), |
108 | PINCTRL_PIN(55, "GPIO_55" ), |
109 | PINCTRL_PIN(56, "GPIO_56" ), |
110 | PINCTRL_PIN(57, "GPIO_57" ), |
111 | PINCTRL_PIN(58, "GPIO_58" ), |
112 | PINCTRL_PIN(59, "GPIO_59" ), |
113 | PINCTRL_PIN(60, "GPIO_60" ), |
114 | PINCTRL_PIN(61, "GPIO_61" ), |
115 | PINCTRL_PIN(62, "GPIO_62" ), |
116 | PINCTRL_PIN(63, "GPIO_63" ), |
117 | PINCTRL_PIN(64, "GPIO_64" ), |
118 | }; |
119 | |
120 | #define DECLARE_MSM_GPIO_PINS(pin) \ |
121 | static const unsigned int gpio##pin##_pins[] = { pin } |
122 | DECLARE_MSM_GPIO_PINS(0); |
123 | DECLARE_MSM_GPIO_PINS(1); |
124 | DECLARE_MSM_GPIO_PINS(2); |
125 | DECLARE_MSM_GPIO_PINS(3); |
126 | DECLARE_MSM_GPIO_PINS(4); |
127 | DECLARE_MSM_GPIO_PINS(5); |
128 | DECLARE_MSM_GPIO_PINS(6); |
129 | DECLARE_MSM_GPIO_PINS(7); |
130 | DECLARE_MSM_GPIO_PINS(8); |
131 | DECLARE_MSM_GPIO_PINS(9); |
132 | DECLARE_MSM_GPIO_PINS(10); |
133 | DECLARE_MSM_GPIO_PINS(11); |
134 | DECLARE_MSM_GPIO_PINS(12); |
135 | DECLARE_MSM_GPIO_PINS(13); |
136 | DECLARE_MSM_GPIO_PINS(14); |
137 | DECLARE_MSM_GPIO_PINS(15); |
138 | DECLARE_MSM_GPIO_PINS(16); |
139 | DECLARE_MSM_GPIO_PINS(17); |
140 | DECLARE_MSM_GPIO_PINS(18); |
141 | DECLARE_MSM_GPIO_PINS(19); |
142 | DECLARE_MSM_GPIO_PINS(20); |
143 | DECLARE_MSM_GPIO_PINS(21); |
144 | DECLARE_MSM_GPIO_PINS(22); |
145 | DECLARE_MSM_GPIO_PINS(23); |
146 | DECLARE_MSM_GPIO_PINS(24); |
147 | DECLARE_MSM_GPIO_PINS(25); |
148 | DECLARE_MSM_GPIO_PINS(26); |
149 | DECLARE_MSM_GPIO_PINS(27); |
150 | DECLARE_MSM_GPIO_PINS(28); |
151 | DECLARE_MSM_GPIO_PINS(29); |
152 | DECLARE_MSM_GPIO_PINS(30); |
153 | DECLARE_MSM_GPIO_PINS(31); |
154 | DECLARE_MSM_GPIO_PINS(32); |
155 | DECLARE_MSM_GPIO_PINS(33); |
156 | DECLARE_MSM_GPIO_PINS(34); |
157 | DECLARE_MSM_GPIO_PINS(35); |
158 | DECLARE_MSM_GPIO_PINS(36); |
159 | DECLARE_MSM_GPIO_PINS(37); |
160 | DECLARE_MSM_GPIO_PINS(38); |
161 | DECLARE_MSM_GPIO_PINS(39); |
162 | DECLARE_MSM_GPIO_PINS(40); |
163 | DECLARE_MSM_GPIO_PINS(41); |
164 | DECLARE_MSM_GPIO_PINS(42); |
165 | DECLARE_MSM_GPIO_PINS(43); |
166 | DECLARE_MSM_GPIO_PINS(44); |
167 | DECLARE_MSM_GPIO_PINS(45); |
168 | DECLARE_MSM_GPIO_PINS(46); |
169 | DECLARE_MSM_GPIO_PINS(47); |
170 | DECLARE_MSM_GPIO_PINS(48); |
171 | DECLARE_MSM_GPIO_PINS(49); |
172 | DECLARE_MSM_GPIO_PINS(50); |
173 | DECLARE_MSM_GPIO_PINS(51); |
174 | DECLARE_MSM_GPIO_PINS(52); |
175 | DECLARE_MSM_GPIO_PINS(53); |
176 | DECLARE_MSM_GPIO_PINS(54); |
177 | DECLARE_MSM_GPIO_PINS(55); |
178 | DECLARE_MSM_GPIO_PINS(56); |
179 | DECLARE_MSM_GPIO_PINS(57); |
180 | DECLARE_MSM_GPIO_PINS(58); |
181 | DECLARE_MSM_GPIO_PINS(59); |
182 | DECLARE_MSM_GPIO_PINS(60); |
183 | DECLARE_MSM_GPIO_PINS(61); |
184 | DECLARE_MSM_GPIO_PINS(62); |
185 | DECLARE_MSM_GPIO_PINS(63); |
186 | DECLARE_MSM_GPIO_PINS(64); |
187 | |
188 | enum ipq9574_functions { |
189 | msm_mux_atest_char, |
190 | msm_mux_atest_char0, |
191 | msm_mux_atest_char1, |
192 | msm_mux_atest_char2, |
193 | msm_mux_atest_char3, |
194 | msm_mux_audio_pdm0, |
195 | msm_mux_audio_pdm1, |
196 | msm_mux_audio_pri, |
197 | msm_mux_audio_sec, |
198 | msm_mux_blsp0_spi, |
199 | msm_mux_blsp0_uart, |
200 | msm_mux_blsp1_i2c, |
201 | msm_mux_blsp1_spi, |
202 | msm_mux_blsp1_uart, |
203 | msm_mux_blsp2_i2c, |
204 | msm_mux_blsp2_spi, |
205 | msm_mux_blsp2_uart, |
206 | msm_mux_blsp3_i2c, |
207 | msm_mux_blsp3_spi, |
208 | msm_mux_blsp3_uart, |
209 | msm_mux_blsp4_i2c, |
210 | msm_mux_blsp4_spi, |
211 | msm_mux_blsp4_uart, |
212 | msm_mux_blsp5_i2c, |
213 | msm_mux_blsp5_uart, |
214 | msm_mux_cri_trng0, |
215 | msm_mux_cri_trng1, |
216 | msm_mux_cri_trng2, |
217 | msm_mux_cri_trng3, |
218 | msm_mux_cxc0, |
219 | msm_mux_cxc1, |
220 | msm_mux_dbg_out, |
221 | msm_mux_dwc_ddrphy, |
222 | msm_mux_gcc_plltest, |
223 | msm_mux_gcc_tlmm, |
224 | msm_mux_gpio, |
225 | msm_mux_mac, |
226 | msm_mux_mdc, |
227 | msm_mux_mdio, |
228 | msm_mux_pcie0_clk, |
229 | msm_mux_pcie0_wake, |
230 | msm_mux_pcie1_clk, |
231 | msm_mux_pcie1_wake, |
232 | msm_mux_pcie2_clk, |
233 | msm_mux_pcie2_wake, |
234 | msm_mux_pcie3_clk, |
235 | msm_mux_pcie3_wake, |
236 | msm_mux_prng_rosc0, |
237 | msm_mux_prng_rosc1, |
238 | msm_mux_prng_rosc2, |
239 | msm_mux_prng_rosc3, |
240 | msm_mux_pta, |
241 | msm_mux_pwm, |
242 | msm_mux_qdss_cti_trig_in_a0, |
243 | msm_mux_qdss_cti_trig_in_a1, |
244 | msm_mux_qdss_cti_trig_in_b0, |
245 | msm_mux_qdss_cti_trig_in_b1, |
246 | msm_mux_qdss_cti_trig_out_a0, |
247 | msm_mux_qdss_cti_trig_out_a1, |
248 | msm_mux_qdss_cti_trig_out_b0, |
249 | msm_mux_qdss_cti_trig_out_b1, |
250 | msm_mux_qdss_traceclk_a, |
251 | msm_mux_qdss_traceclk_b, |
252 | msm_mux_qdss_tracectl_a, |
253 | msm_mux_qdss_tracectl_b, |
254 | msm_mux_qdss_tracedata_a, |
255 | msm_mux_qdss_tracedata_b, |
256 | msm_mux_qspi_data, |
257 | msm_mux_qspi_clk, |
258 | msm_mux_qspi_cs, |
259 | msm_mux_rx0, |
260 | msm_mux_rx1, |
261 | msm_mux_sdc_data, |
262 | msm_mux_sdc_clk, |
263 | msm_mux_sdc_cmd, |
264 | msm_mux_sdc_rclk, |
265 | msm_mux_tsens_max, |
266 | msm_mux_wci20, |
267 | msm_mux_wci21, |
268 | msm_mux_wsa_swrm, |
269 | msm_mux__, |
270 | }; |
271 | |
272 | static const char * const gpio_groups[] = { |
273 | "gpio0" , "gpio1" , "gpio2" , "gpio3" , "gpio4" , "gpio5" , "gpio6" , "gpio7" , |
274 | "gpio8" , "gpio9" , "gpio10" , "gpio11" , "gpio12" , "gpio13" , "gpio14" , |
275 | "gpio15" , "gpio16" , "gpio17" , "gpio18" , "gpio19" , "gpio20" , "gpio21" , |
276 | "gpio22" , "gpio23" , "gpio24" , "gpio25" , "gpio26" , "gpio27" , "gpio28" , |
277 | "gpio29" , "gpio30" , "gpio31" , "gpio32" , "gpio33" , "gpio34" , "gpio35" , |
278 | "gpio36" , "gpio37" , "gpio38" , "gpio39" , "gpio40" , "gpio41" , "gpio42" , |
279 | "gpio43" , "gpio44" , "gpio45" , "gpio46" , "gpio47" , "gpio48" , "gpio49" , |
280 | "gpio50" , "gpio51" , "gpio52" , "gpio53" , "gpio54" , "gpio55" , "gpio56" , |
281 | "gpio57" , "gpio58" , "gpio59" , "gpio60" , "gpio61" , "gpio62" , "gpio63" , |
282 | "gpio64" , |
283 | }; |
284 | |
285 | static const char * const sdc_data_groups[] = { |
286 | "gpio0" , |
287 | "gpio1" , |
288 | "gpio2" , |
289 | "gpio3" , |
290 | "gpio6" , |
291 | "gpio7" , |
292 | "gpio8" , |
293 | "gpio9" , |
294 | }; |
295 | |
296 | static const char * const qspi_data_groups[] = { |
297 | "gpio0" , |
298 | "gpio1" , |
299 | "gpio2" , |
300 | "gpio3" , |
301 | }; |
302 | |
303 | static const char * const qdss_traceclk_b_groups[] = { |
304 | "gpio0" , |
305 | }; |
306 | |
307 | static const char * const qdss_tracectl_b_groups[] = { |
308 | "gpio1" , |
309 | }; |
310 | |
311 | static const char * const qdss_tracedata_b_groups[] = { |
312 | "gpio2" , "gpio3" , "gpio4" , "gpio5" , "gpio6" , "gpio7" , "gpio8" , "gpio9" , |
313 | "gpio10" , "gpio11" , "gpio12" , "gpio13" , "gpio14" , "gpio15" , "gpio16" , |
314 | "gpio17" , |
315 | }; |
316 | |
317 | static const char * const sdc_cmd_groups[] = { |
318 | "gpio4" , |
319 | }; |
320 | |
321 | static const char * const qspi_cs_groups[] = { |
322 | "gpio4" , |
323 | }; |
324 | |
325 | static const char * const sdc_clk_groups[] = { |
326 | "gpio5" , |
327 | }; |
328 | |
329 | static const char * const qspi_clk_groups[] = { |
330 | "gpio5" , |
331 | }; |
332 | |
333 | static const char * const sdc_rclk_groups[] = { |
334 | "gpio10" , |
335 | }; |
336 | |
337 | static const char * const blsp0_spi_groups[] = { |
338 | "gpio11" , "gpio12" , "gpio13" , "gpio14" , |
339 | }; |
340 | |
341 | static const char * const blsp0_uart_groups[] = { |
342 | "gpio11" , "gpio12" , "gpio13" , "gpio14" , |
343 | }; |
344 | |
345 | static const char * const blsp3_spi_groups[] = { |
346 | "gpio15" , "gpio16" , "gpio17" , "gpio18" , "gpio19" , "gpio20" , "gpio21" , |
347 | }; |
348 | |
349 | static const char * const blsp3_i2c_groups[] = { |
350 | "gpio15" , "gpio16" , |
351 | }; |
352 | |
353 | static const char * const blsp3_uart_groups[] = { |
354 | "gpio15" , "gpio16" , "gpio17" , "gpio18" , |
355 | }; |
356 | |
357 | static const char * const dbg_out_groups[] = { |
358 | "gpio17" , |
359 | }; |
360 | |
361 | static const char * const cri_trng0_groups[] = { |
362 | "gpio20" , "gpio38" , |
363 | }; |
364 | |
365 | static const char * const cri_trng1_groups[] = { |
366 | "gpio21" , "gpio34" , |
367 | }; |
368 | |
369 | static const char * const pcie0_clk_groups[] = { |
370 | "gpio22" , |
371 | }; |
372 | |
373 | static const char * const pta_groups[] = { |
374 | "gpio22" , "gpio23" , "gpio24" , "gpio54" , "gpio55" , "gpio56" , "gpio61" , |
375 | "gpio62" , "gpio63" , |
376 | }; |
377 | |
378 | static const char * const wci21_groups[] = { |
379 | "gpio23" , "gpio24" , |
380 | }; |
381 | |
382 | static const char * const cxc0_groups[] = { |
383 | "gpio23" , "gpio24" , |
384 | }; |
385 | |
386 | static const char * const pcie0_wake_groups[] = { |
387 | "gpio24" , |
388 | }; |
389 | |
390 | static const char * const qdss_cti_trig_out_b0_groups[] = { |
391 | "gpio24" , |
392 | }; |
393 | |
394 | static const char * const pcie1_clk_groups[] = { |
395 | "gpio25" , |
396 | }; |
397 | |
398 | static const char * const qdss_cti_trig_in_b0_groups[] = { |
399 | "gpio25" , |
400 | }; |
401 | |
402 | static const char * const atest_char0_groups[] = { |
403 | "gpio26" , |
404 | }; |
405 | |
406 | static const char * const qdss_cti_trig_out_b1_groups[] = { |
407 | "gpio26" , |
408 | }; |
409 | |
410 | static const char * const pcie1_wake_groups[] = { |
411 | "gpio27" , |
412 | }; |
413 | |
414 | static const char * const atest_char1_groups[] = { |
415 | "gpio27" , |
416 | }; |
417 | |
418 | static const char * const qdss_cti_trig_in_b1_groups[] = { |
419 | "gpio27" , |
420 | }; |
421 | |
422 | static const char * const pcie2_clk_groups[] = { |
423 | "gpio28" , |
424 | }; |
425 | |
426 | static const char * const atest_char2_groups[] = { |
427 | "gpio28" , |
428 | }; |
429 | |
430 | static const char * const atest_char3_groups[] = { |
431 | "gpio29" , |
432 | }; |
433 | |
434 | static const char * const pcie2_wake_groups[] = { |
435 | "gpio30" , |
436 | }; |
437 | |
438 | static const char * const pwm_groups[] = { |
439 | "gpio30" , "gpio31" , "gpio32" , "gpio33" , "gpio44" , "gpio45" , "gpio46" , |
440 | "gpio47" , "gpio50" , "gpio51" , "gpio52" , "gpio53" , "gpio54" , "gpio55" , |
441 | "gpio56" , "gpio57" , "gpio58" , "gpio59" , "gpio60" , |
442 | }; |
443 | |
444 | static const char * const atest_char_groups[] = { |
445 | "gpio30" , |
446 | }; |
447 | |
448 | static const char * const pcie3_clk_groups[] = { |
449 | "gpio31" , |
450 | }; |
451 | |
452 | static const char * const qdss_cti_trig_in_a1_groups[] = { |
453 | "gpio31" , |
454 | }; |
455 | |
456 | static const char * const qdss_cti_trig_out_a1_groups[] = { |
457 | "gpio32" , |
458 | }; |
459 | |
460 | static const char * const pcie3_wake_groups[] = { |
461 | "gpio33" , |
462 | }; |
463 | |
464 | static const char * const qdss_cti_trig_in_a0_groups[] = { |
465 | "gpio33" , |
466 | }; |
467 | |
468 | static const char * const blsp2_uart_groups[] = { |
469 | "gpio34" , "gpio35" , |
470 | }; |
471 | |
472 | static const char * const blsp2_i2c_groups[] = { |
473 | "gpio34" , "gpio35" , |
474 | }; |
475 | |
476 | static const char * const blsp2_spi_groups[] = { |
477 | "gpio34" , "gpio35" , "gpio36" , "gpio37" , |
478 | }; |
479 | |
480 | static const char * const blsp1_uart_groups[] = { |
481 | "gpio34" , "gpio35" , "gpio36" , "gpio37" , |
482 | }; |
483 | |
484 | static const char * const qdss_cti_trig_out_a0_groups[] = { |
485 | "gpio34" , |
486 | }; |
487 | |
488 | static const char * const cri_trng2_groups[] = { |
489 | "gpio35" , |
490 | }; |
491 | |
492 | static const char * const blsp1_i2c_groups[] = { |
493 | "gpio36" , "gpio37" , |
494 | }; |
495 | |
496 | static const char * const cri_trng3_groups[] = { |
497 | "gpio36" , |
498 | }; |
499 | |
500 | static const char * const dwc_ddrphy_groups[] = { |
501 | "gpio37" , |
502 | }; |
503 | |
504 | static const char * const mdc_groups[] = { |
505 | "gpio38" , |
506 | }; |
507 | |
508 | static const char * const mdio_groups[] = { |
509 | "gpio39" , |
510 | }; |
511 | |
512 | static const char * const audio_pri_groups[] = { |
513 | "gpio40" , "gpio41" , "gpio42" , "gpio43" , "gpio61" , "gpio61" , |
514 | }; |
515 | |
516 | static const char * const audio_pdm0_groups[] = { |
517 | "gpio40" , "gpio41" , "gpio42" , "gpio43" , |
518 | }; |
519 | |
520 | static const char * const qdss_traceclk_a_groups[] = { |
521 | "gpio43" , |
522 | }; |
523 | |
524 | static const char * const audio_sec_groups[] = { |
525 | "gpio44" , "gpio45" , "gpio46" , "gpio47" , "gpio62" , "gpio62" , |
526 | }; |
527 | |
528 | static const char * const wsa_swrm_groups[] = { |
529 | "gpio44" , "gpio45" , |
530 | }; |
531 | |
532 | static const char * const qdss_tracectl_a_groups[] = { |
533 | "gpio44" , |
534 | }; |
535 | |
536 | static const char * const qdss_tracedata_a_groups[] = { |
537 | "gpio45" , "gpio46" , "gpio47" , "gpio48" , "gpio49" , "gpio50" , "gpio51" , |
538 | "gpio52" , "gpio53" , "gpio54" , "gpio55" , "gpio56" , "gpio57" , "gpio58" , |
539 | "gpio59" , "gpio60" , |
540 | }; |
541 | |
542 | static const char * const rx1_groups[] = { |
543 | "gpio46" , |
544 | }; |
545 | |
546 | static const char * const mac_groups[] = { |
547 | "gpio46" , "gpio47" , "gpio57" , "gpio58" , |
548 | }; |
549 | |
550 | static const char * const blsp5_i2c_groups[] = { |
551 | "gpio48" , "gpio49" , |
552 | }; |
553 | |
554 | static const char * const blsp5_uart_groups[] = { |
555 | "gpio48" , "gpio49" , |
556 | }; |
557 | |
558 | static const char * const blsp4_uart_groups[] = { |
559 | "gpio50" , "gpio51" , "gpio52" , "gpio53" , |
560 | }; |
561 | |
562 | static const char * const blsp4_i2c_groups[] = { |
563 | "gpio50" , "gpio51" , |
564 | }; |
565 | |
566 | static const char * const blsp4_spi_groups[] = { |
567 | "gpio50" , "gpio51" , "gpio52" , "gpio53" , |
568 | }; |
569 | |
570 | static const char * const wci20_groups[] = { |
571 | "gpio57" , "gpio58" , |
572 | }; |
573 | |
574 | static const char * const cxc1_groups[] = { |
575 | "gpio57" , "gpio58" , |
576 | }; |
577 | |
578 | static const char * const rx0_groups[] = { |
579 | "gpio59" , |
580 | }; |
581 | |
582 | static const char * const prng_rosc0_groups[] = { |
583 | "gpio60" , |
584 | }; |
585 | |
586 | static const char * const gcc_plltest_groups[] = { |
587 | "gpio60" , "gpio62" , |
588 | }; |
589 | |
590 | static const char * const blsp1_spi_groups[] = { |
591 | "gpio61" , "gpio62" , "gpio63" , "gpio64" , |
592 | }; |
593 | |
594 | static const char * const audio_pdm1_groups[] = { |
595 | "gpio61" , "gpio62" , "gpio63" , "gpio64" , |
596 | }; |
597 | |
598 | static const char * const prng_rosc1_groups[] = { |
599 | "gpio61" , |
600 | }; |
601 | |
602 | static const char * const gcc_tlmm_groups[] = { |
603 | "gpio61" , |
604 | }; |
605 | |
606 | static const char * const prng_rosc2_groups[] = { |
607 | "gpio62" , |
608 | }; |
609 | |
610 | static const char * const prng_rosc3_groups[] = { |
611 | "gpio63" , |
612 | }; |
613 | |
614 | static const char * const tsens_max_groups[] = { |
615 | "gpio64" , |
616 | }; |
617 | |
618 | static const struct pinfunction ipq9574_functions[] = { |
619 | MSM_PIN_FUNCTION(atest_char), |
620 | MSM_PIN_FUNCTION(atest_char0), |
621 | MSM_PIN_FUNCTION(atest_char1), |
622 | MSM_PIN_FUNCTION(atest_char2), |
623 | MSM_PIN_FUNCTION(atest_char3), |
624 | MSM_PIN_FUNCTION(audio_pdm0), |
625 | MSM_PIN_FUNCTION(audio_pdm1), |
626 | MSM_PIN_FUNCTION(audio_pri), |
627 | MSM_PIN_FUNCTION(audio_sec), |
628 | MSM_PIN_FUNCTION(blsp0_spi), |
629 | MSM_PIN_FUNCTION(blsp0_uart), |
630 | MSM_PIN_FUNCTION(blsp1_i2c), |
631 | MSM_PIN_FUNCTION(blsp1_spi), |
632 | MSM_PIN_FUNCTION(blsp1_uart), |
633 | MSM_PIN_FUNCTION(blsp2_i2c), |
634 | MSM_PIN_FUNCTION(blsp2_spi), |
635 | MSM_PIN_FUNCTION(blsp2_uart), |
636 | MSM_PIN_FUNCTION(blsp3_i2c), |
637 | MSM_PIN_FUNCTION(blsp3_spi), |
638 | MSM_PIN_FUNCTION(blsp3_uart), |
639 | MSM_PIN_FUNCTION(blsp4_i2c), |
640 | MSM_PIN_FUNCTION(blsp4_spi), |
641 | MSM_PIN_FUNCTION(blsp4_uart), |
642 | MSM_PIN_FUNCTION(blsp5_i2c), |
643 | MSM_PIN_FUNCTION(blsp5_uart), |
644 | MSM_PIN_FUNCTION(cri_trng0), |
645 | MSM_PIN_FUNCTION(cri_trng1), |
646 | MSM_PIN_FUNCTION(cri_trng2), |
647 | MSM_PIN_FUNCTION(cri_trng3), |
648 | MSM_PIN_FUNCTION(cxc0), |
649 | MSM_PIN_FUNCTION(cxc1), |
650 | MSM_PIN_FUNCTION(dbg_out), |
651 | MSM_PIN_FUNCTION(dwc_ddrphy), |
652 | MSM_PIN_FUNCTION(gcc_plltest), |
653 | MSM_PIN_FUNCTION(gcc_tlmm), |
654 | MSM_PIN_FUNCTION(gpio), |
655 | MSM_PIN_FUNCTION(mac), |
656 | MSM_PIN_FUNCTION(mdc), |
657 | MSM_PIN_FUNCTION(mdio), |
658 | MSM_PIN_FUNCTION(pcie0_clk), |
659 | MSM_PIN_FUNCTION(pcie0_wake), |
660 | MSM_PIN_FUNCTION(pcie1_clk), |
661 | MSM_PIN_FUNCTION(pcie1_wake), |
662 | MSM_PIN_FUNCTION(pcie2_clk), |
663 | MSM_PIN_FUNCTION(pcie2_wake), |
664 | MSM_PIN_FUNCTION(pcie3_clk), |
665 | MSM_PIN_FUNCTION(pcie3_wake), |
666 | MSM_PIN_FUNCTION(prng_rosc0), |
667 | MSM_PIN_FUNCTION(prng_rosc1), |
668 | MSM_PIN_FUNCTION(prng_rosc2), |
669 | MSM_PIN_FUNCTION(prng_rosc3), |
670 | MSM_PIN_FUNCTION(pta), |
671 | MSM_PIN_FUNCTION(pwm), |
672 | MSM_PIN_FUNCTION(qdss_cti_trig_in_a0), |
673 | MSM_PIN_FUNCTION(qdss_cti_trig_in_a1), |
674 | MSM_PIN_FUNCTION(qdss_cti_trig_in_b0), |
675 | MSM_PIN_FUNCTION(qdss_cti_trig_in_b1), |
676 | MSM_PIN_FUNCTION(qdss_cti_trig_out_a0), |
677 | MSM_PIN_FUNCTION(qdss_cti_trig_out_a1), |
678 | MSM_PIN_FUNCTION(qdss_cti_trig_out_b0), |
679 | MSM_PIN_FUNCTION(qdss_cti_trig_out_b1), |
680 | MSM_PIN_FUNCTION(qdss_traceclk_a), |
681 | MSM_PIN_FUNCTION(qdss_traceclk_b), |
682 | MSM_PIN_FUNCTION(qdss_tracectl_a), |
683 | MSM_PIN_FUNCTION(qdss_tracectl_b), |
684 | MSM_PIN_FUNCTION(qdss_tracedata_a), |
685 | MSM_PIN_FUNCTION(qdss_tracedata_b), |
686 | MSM_PIN_FUNCTION(qspi_data), |
687 | MSM_PIN_FUNCTION(qspi_clk), |
688 | MSM_PIN_FUNCTION(qspi_cs), |
689 | MSM_PIN_FUNCTION(rx0), |
690 | MSM_PIN_FUNCTION(rx1), |
691 | MSM_PIN_FUNCTION(sdc_data), |
692 | MSM_PIN_FUNCTION(sdc_clk), |
693 | MSM_PIN_FUNCTION(sdc_cmd), |
694 | MSM_PIN_FUNCTION(sdc_rclk), |
695 | MSM_PIN_FUNCTION(tsens_max), |
696 | MSM_PIN_FUNCTION(wci20), |
697 | MSM_PIN_FUNCTION(wci21), |
698 | MSM_PIN_FUNCTION(wsa_swrm), |
699 | }; |
700 | |
701 | static const struct msm_pingroup ipq9574_groups[] = { |
702 | PINGROUP(0, sdc_data, qspi_data, qdss_traceclk_b, _, _, _, _, _, _), |
703 | PINGROUP(1, sdc_data, qspi_data, qdss_tracectl_b, _, _, _, _, _, _), |
704 | PINGROUP(2, sdc_data, qspi_data, qdss_tracedata_b, _, _, _, _, _, _), |
705 | PINGROUP(3, sdc_data, qspi_data, qdss_tracedata_b, _, _, _, _, _, _), |
706 | PINGROUP(4, sdc_cmd, qspi_cs, qdss_tracedata_b, _, _, _, _, _, _), |
707 | PINGROUP(5, sdc_clk, qspi_clk, qdss_tracedata_b, _, _, _, _, _, _), |
708 | PINGROUP(6, sdc_data, qdss_tracedata_b, _, _, _, _, _, _, _), |
709 | PINGROUP(7, sdc_data, qdss_tracedata_b, _, _, _, _, _, _, _), |
710 | PINGROUP(8, sdc_data, qdss_tracedata_b, _, _, _, _, _, _, _), |
711 | PINGROUP(9, sdc_data, qdss_tracedata_b, _, _, _, _, _, _, _), |
712 | PINGROUP(10, sdc_rclk, qdss_tracedata_b, _, _, _, _, _, _, _), |
713 | PINGROUP(11, blsp0_spi, blsp0_uart, qdss_tracedata_b, _, _, _, _, _, _), |
714 | PINGROUP(12, blsp0_spi, blsp0_uart, qdss_tracedata_b, _, _, _, _, _, _), |
715 | PINGROUP(13, blsp0_spi, blsp0_uart, qdss_tracedata_b, _, _, _, _, _, _), |
716 | PINGROUP(14, blsp0_spi, blsp0_uart, qdss_tracedata_b, _, _, _, _, _, _), |
717 | PINGROUP(15, blsp3_spi, blsp3_i2c, blsp3_uart, qdss_tracedata_b, _, _, _, _, _), |
718 | PINGROUP(16, blsp3_spi, blsp3_i2c, blsp3_uart, qdss_tracedata_b, _, _, _, _, _), |
719 | PINGROUP(17, blsp3_spi, blsp3_uart, dbg_out, qdss_tracedata_b, _, _, _, _, _), |
720 | PINGROUP(18, blsp3_spi, blsp3_uart, _, _, _, _, _, _, _), |
721 | PINGROUP(19, blsp3_spi, _, _, _, _, _, _, _, _), |
722 | PINGROUP(20, blsp3_spi, _, cri_trng0, _, _, _, _, _, _), |
723 | PINGROUP(21, blsp3_spi, _, cri_trng1, _, _, _, _, _, _), |
724 | PINGROUP(22, pcie0_clk, _, pta, _, _, _, _, _, _), |
725 | PINGROUP(23, _, pta, wci21, cxc0, _, _, _, _, _), |
726 | PINGROUP(24, pcie0_wake, _, pta, wci21, cxc0, _, qdss_cti_trig_out_b0, _, _), |
727 | PINGROUP(25, pcie1_clk, _, _, qdss_cti_trig_in_b0, _, _, _, _, _), |
728 | PINGROUP(26, _, atest_char0, _, qdss_cti_trig_out_b1, _, _, _, _, _), |
729 | PINGROUP(27, pcie1_wake, _, atest_char1, qdss_cti_trig_in_b1, _, _, _, _, _), |
730 | PINGROUP(28, pcie2_clk, atest_char2, _, _, _, _, _, _, _), |
731 | PINGROUP(29, atest_char3, _, _, _, _, _, _, _, _), |
732 | PINGROUP(30, pcie2_wake, pwm, atest_char, _, _, _, _, _, _), |
733 | PINGROUP(31, pcie3_clk, pwm, _, qdss_cti_trig_in_a1, _, _, _, _, _), |
734 | PINGROUP(32, pwm, _, qdss_cti_trig_out_a1, _, _, _, _, _, _), |
735 | PINGROUP(33, pcie3_wake, pwm, _, qdss_cti_trig_in_a0, _, _, _, _, _), |
736 | PINGROUP(34, blsp2_uart, blsp2_i2c, blsp2_spi, blsp1_uart, _, cri_trng1, qdss_cti_trig_out_a0, _, _), |
737 | PINGROUP(35, blsp2_uart, blsp2_i2c, blsp2_spi, blsp1_uart, _, cri_trng2, _, _, _), |
738 | PINGROUP(36, blsp1_uart, blsp1_i2c, blsp2_spi, _, cri_trng3, _, _, _, _), |
739 | PINGROUP(37, blsp1_uart, blsp1_i2c, blsp2_spi, _, dwc_ddrphy, _, _, _, _), |
740 | PINGROUP(38, mdc, _, cri_trng0, _, _, _, _, _, _), |
741 | PINGROUP(39, mdio, _, _, _, _, _, _, _, _), |
742 | PINGROUP(40, audio_pri, audio_pdm0, _, _, _, _, _, _, _), |
743 | PINGROUP(41, audio_pri, audio_pdm0, _, _, _, _, _, _, _), |
744 | PINGROUP(42, audio_pri, audio_pdm0, _, _, _, _, _, _, _), |
745 | PINGROUP(43, audio_pri, audio_pdm0, _, qdss_traceclk_a, _, _, _, _, _), |
746 | PINGROUP(44, pwm, audio_sec, wsa_swrm, _, qdss_tracectl_a, _, _, _, _), |
747 | PINGROUP(45, pwm, audio_sec, wsa_swrm, _, qdss_tracedata_a, _, _, _, _), |
748 | PINGROUP(46, pwm, audio_sec, rx1, mac, _, qdss_tracedata_a, _, _, _), |
749 | PINGROUP(47, pwm, audio_sec, mac, _, qdss_tracedata_a, _, _, _, _), |
750 | PINGROUP(48, blsp5_i2c, blsp5_uart, _, qdss_tracedata_a, _, _, _, _, _), |
751 | PINGROUP(49, blsp5_i2c, blsp5_uart, _, qdss_tracedata_a, _, _, _, _, _), |
752 | PINGROUP(50, blsp4_uart, blsp4_i2c, blsp4_spi, pwm, qdss_tracedata_a, _, _, _, _), |
753 | PINGROUP(51, blsp4_uart, blsp4_i2c, blsp4_spi, pwm, qdss_tracedata_a, _, _, _, _), |
754 | PINGROUP(52, blsp4_uart, blsp4_spi, pwm, qdss_tracedata_a, _, _, _, _, _), |
755 | PINGROUP(53, blsp4_uart, blsp4_spi, pwm, qdss_tracedata_a, _, _, _, _, _), |
756 | PINGROUP(54, pta, pwm, qdss_tracedata_a, _, _, _, _, _, _), |
757 | PINGROUP(55, pta, pwm, qdss_tracedata_a, _, _, _, _, _, _), |
758 | PINGROUP(56, pta, pwm, qdss_tracedata_a, _, _, _, _, _, _), |
759 | PINGROUP(57, wci20, cxc1, mac, pwm, qdss_tracedata_a, _, _, _, _), |
760 | PINGROUP(58, wci20, cxc1, mac, pwm, qdss_tracedata_a, _, _, _, _), |
761 | PINGROUP(59, rx0, pwm, qdss_tracedata_a, _, _, _, _, _, _), |
762 | PINGROUP(60, pwm, prng_rosc0, qdss_tracedata_a, _, gcc_plltest, _, _, _, _), |
763 | PINGROUP(61, blsp1_spi, audio_pri, audio_pdm1, audio_pri, pta, prng_rosc1, gcc_tlmm, _, _), |
764 | PINGROUP(62, blsp1_spi, audio_sec, audio_pdm1, audio_sec, pta, prng_rosc2, gcc_plltest, _, _), |
765 | PINGROUP(63, blsp1_spi, audio_pdm1, pta, prng_rosc3, _, _, _, _, _), |
766 | PINGROUP(64, blsp1_spi, audio_pdm1, tsens_max, _, _, _, _, _, _), |
767 | }; |
768 | |
769 | /* Reserving GPIO59 for controlling the QFPROM LDO regulator */ |
770 | static const int ipq9574_reserved_gpios[] = { |
771 | 59, -1 |
772 | }; |
773 | |
774 | static const struct msm_pinctrl_soc_data ipq9574_pinctrl = { |
775 | .pins = ipq9574_pins, |
776 | .npins = ARRAY_SIZE(ipq9574_pins), |
777 | .functions = ipq9574_functions, |
778 | .nfunctions = ARRAY_SIZE(ipq9574_functions), |
779 | .groups = ipq9574_groups, |
780 | .ngroups = ARRAY_SIZE(ipq9574_groups), |
781 | .reserved_gpios = ipq9574_reserved_gpios, |
782 | .ngpios = 65, |
783 | }; |
784 | |
785 | static int ipq9574_pinctrl_probe(struct platform_device *pdev) |
786 | { |
787 | return msm_pinctrl_probe(pdev, soc_data: &ipq9574_pinctrl); |
788 | } |
789 | |
790 | static const struct of_device_id ipq9574_pinctrl_of_match[] = { |
791 | { .compatible = "qcom,ipq9574-tlmm" , }, |
792 | { } |
793 | }; |
794 | MODULE_DEVICE_TABLE(of, ipq9574_pinctrl_of_match); |
795 | |
796 | static struct platform_driver ipq9574_pinctrl_driver = { |
797 | .driver = { |
798 | .name = "ipq9574-tlmm" , |
799 | .of_match_table = ipq9574_pinctrl_of_match, |
800 | }, |
801 | .probe = ipq9574_pinctrl_probe, |
802 | .remove_new = msm_pinctrl_remove, |
803 | }; |
804 | |
805 | static int __init ipq9574_pinctrl_init(void) |
806 | { |
807 | return platform_driver_register(&ipq9574_pinctrl_driver); |
808 | } |
809 | arch_initcall(ipq9574_pinctrl_init); |
810 | |
811 | static void __exit ipq9574_pinctrl_exit(void) |
812 | { |
813 | platform_driver_unregister(&ipq9574_pinctrl_driver); |
814 | } |
815 | module_exit(ipq9574_pinctrl_exit); |
816 | |
817 | MODULE_DESCRIPTION("QTI IPQ9574 TLMM driver" ); |
818 | MODULE_LICENSE("GPL" ); |
819 | |