1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * Copyright (c) 2020, The Linux Foundation. All rights reserved. |
4 | */ |
5 | |
6 | #include <linux/module.h> |
7 | #include <linux/of.h> |
8 | #include <linux/platform_device.h> |
9 | |
10 | #include "pinctrl-msm.h" |
11 | |
12 | static const struct pinctrl_pin_desc msm8226_pins[] = { |
13 | PINCTRL_PIN(0, "GPIO_0" ), |
14 | PINCTRL_PIN(1, "GPIO_1" ), |
15 | PINCTRL_PIN(2, "GPIO_2" ), |
16 | PINCTRL_PIN(3, "GPIO_3" ), |
17 | PINCTRL_PIN(4, "GPIO_4" ), |
18 | PINCTRL_PIN(5, "GPIO_5" ), |
19 | PINCTRL_PIN(6, "GPIO_6" ), |
20 | PINCTRL_PIN(7, "GPIO_7" ), |
21 | PINCTRL_PIN(8, "GPIO_8" ), |
22 | PINCTRL_PIN(9, "GPIO_9" ), |
23 | PINCTRL_PIN(10, "GPIO_10" ), |
24 | PINCTRL_PIN(11, "GPIO_11" ), |
25 | PINCTRL_PIN(12, "GPIO_12" ), |
26 | PINCTRL_PIN(13, "GPIO_13" ), |
27 | PINCTRL_PIN(14, "GPIO_14" ), |
28 | PINCTRL_PIN(15, "GPIO_15" ), |
29 | PINCTRL_PIN(16, "GPIO_16" ), |
30 | PINCTRL_PIN(17, "GPIO_17" ), |
31 | PINCTRL_PIN(18, "GPIO_18" ), |
32 | PINCTRL_PIN(19, "GPIO_19" ), |
33 | PINCTRL_PIN(20, "GPIO_20" ), |
34 | PINCTRL_PIN(21, "GPIO_21" ), |
35 | PINCTRL_PIN(22, "GPIO_22" ), |
36 | PINCTRL_PIN(23, "GPIO_23" ), |
37 | PINCTRL_PIN(24, "GPIO_24" ), |
38 | PINCTRL_PIN(25, "GPIO_25" ), |
39 | PINCTRL_PIN(26, "GPIO_26" ), |
40 | PINCTRL_PIN(27, "GPIO_27" ), |
41 | PINCTRL_PIN(28, "GPIO_28" ), |
42 | PINCTRL_PIN(29, "GPIO_29" ), |
43 | PINCTRL_PIN(30, "GPIO_30" ), |
44 | PINCTRL_PIN(31, "GPIO_31" ), |
45 | PINCTRL_PIN(32, "GPIO_32" ), |
46 | PINCTRL_PIN(33, "GPIO_33" ), |
47 | PINCTRL_PIN(34, "GPIO_34" ), |
48 | PINCTRL_PIN(35, "GPIO_35" ), |
49 | PINCTRL_PIN(36, "GPIO_36" ), |
50 | PINCTRL_PIN(37, "GPIO_37" ), |
51 | PINCTRL_PIN(38, "GPIO_38" ), |
52 | PINCTRL_PIN(39, "GPIO_39" ), |
53 | PINCTRL_PIN(40, "GPIO_40" ), |
54 | PINCTRL_PIN(41, "GPIO_41" ), |
55 | PINCTRL_PIN(42, "GPIO_42" ), |
56 | PINCTRL_PIN(43, "GPIO_43" ), |
57 | PINCTRL_PIN(44, "GPIO_44" ), |
58 | PINCTRL_PIN(45, "GPIO_45" ), |
59 | PINCTRL_PIN(46, "GPIO_46" ), |
60 | PINCTRL_PIN(47, "GPIO_47" ), |
61 | PINCTRL_PIN(48, "GPIO_48" ), |
62 | PINCTRL_PIN(49, "GPIO_49" ), |
63 | PINCTRL_PIN(50, "GPIO_50" ), |
64 | PINCTRL_PIN(51, "GPIO_51" ), |
65 | PINCTRL_PIN(52, "GPIO_52" ), |
66 | PINCTRL_PIN(53, "GPIO_53" ), |
67 | PINCTRL_PIN(54, "GPIO_54" ), |
68 | PINCTRL_PIN(55, "GPIO_55" ), |
69 | PINCTRL_PIN(56, "GPIO_56" ), |
70 | PINCTRL_PIN(57, "GPIO_57" ), |
71 | PINCTRL_PIN(58, "GPIO_58" ), |
72 | PINCTRL_PIN(59, "GPIO_59" ), |
73 | PINCTRL_PIN(60, "GPIO_60" ), |
74 | PINCTRL_PIN(61, "GPIO_61" ), |
75 | PINCTRL_PIN(62, "GPIO_62" ), |
76 | PINCTRL_PIN(63, "GPIO_63" ), |
77 | PINCTRL_PIN(64, "GPIO_64" ), |
78 | PINCTRL_PIN(65, "GPIO_65" ), |
79 | PINCTRL_PIN(66, "GPIO_66" ), |
80 | PINCTRL_PIN(67, "GPIO_67" ), |
81 | PINCTRL_PIN(68, "GPIO_68" ), |
82 | PINCTRL_PIN(69, "GPIO_69" ), |
83 | PINCTRL_PIN(70, "GPIO_70" ), |
84 | PINCTRL_PIN(71, "GPIO_71" ), |
85 | PINCTRL_PIN(72, "GPIO_72" ), |
86 | PINCTRL_PIN(73, "GPIO_73" ), |
87 | PINCTRL_PIN(74, "GPIO_74" ), |
88 | PINCTRL_PIN(75, "GPIO_75" ), |
89 | PINCTRL_PIN(76, "GPIO_76" ), |
90 | PINCTRL_PIN(77, "GPIO_77" ), |
91 | PINCTRL_PIN(78, "GPIO_78" ), |
92 | PINCTRL_PIN(79, "GPIO_79" ), |
93 | PINCTRL_PIN(80, "GPIO_80" ), |
94 | PINCTRL_PIN(81, "GPIO_81" ), |
95 | PINCTRL_PIN(82, "GPIO_82" ), |
96 | PINCTRL_PIN(83, "GPIO_83" ), |
97 | PINCTRL_PIN(84, "GPIO_84" ), |
98 | PINCTRL_PIN(85, "GPIO_85" ), |
99 | PINCTRL_PIN(86, "GPIO_86" ), |
100 | PINCTRL_PIN(87, "GPIO_87" ), |
101 | PINCTRL_PIN(88, "GPIO_88" ), |
102 | PINCTRL_PIN(89, "GPIO_89" ), |
103 | PINCTRL_PIN(90, "GPIO_90" ), |
104 | PINCTRL_PIN(91, "GPIO_91" ), |
105 | PINCTRL_PIN(92, "GPIO_92" ), |
106 | PINCTRL_PIN(93, "GPIO_93" ), |
107 | PINCTRL_PIN(94, "GPIO_94" ), |
108 | PINCTRL_PIN(95, "GPIO_95" ), |
109 | PINCTRL_PIN(96, "GPIO_96" ), |
110 | PINCTRL_PIN(97, "GPIO_97" ), |
111 | PINCTRL_PIN(98, "GPIO_98" ), |
112 | PINCTRL_PIN(99, "GPIO_99" ), |
113 | PINCTRL_PIN(100, "GPIO_100" ), |
114 | PINCTRL_PIN(101, "GPIO_101" ), |
115 | PINCTRL_PIN(102, "GPIO_102" ), |
116 | PINCTRL_PIN(103, "GPIO_103" ), |
117 | PINCTRL_PIN(104, "GPIO_104" ), |
118 | PINCTRL_PIN(105, "GPIO_105" ), |
119 | PINCTRL_PIN(106, "GPIO_106" ), |
120 | PINCTRL_PIN(107, "GPIO_107" ), |
121 | PINCTRL_PIN(108, "GPIO_108" ), |
122 | PINCTRL_PIN(109, "GPIO_109" ), |
123 | PINCTRL_PIN(110, "GPIO_110" ), |
124 | PINCTRL_PIN(111, "GPIO_111" ), |
125 | PINCTRL_PIN(112, "GPIO_112" ), |
126 | PINCTRL_PIN(113, "GPIO_113" ), |
127 | PINCTRL_PIN(114, "GPIO_114" ), |
128 | PINCTRL_PIN(115, "GPIO_115" ), |
129 | PINCTRL_PIN(116, "GPIO_116" ), |
130 | |
131 | PINCTRL_PIN(117, "SDC1_CLK" ), |
132 | PINCTRL_PIN(118, "SDC1_CMD" ), |
133 | PINCTRL_PIN(119, "SDC1_DATA" ), |
134 | PINCTRL_PIN(120, "SDC2_CLK" ), |
135 | PINCTRL_PIN(121, "SDC2_CMD" ), |
136 | PINCTRL_PIN(122, "SDC2_DATA" ), |
137 | }; |
138 | |
139 | #define DECLARE_MSM_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin } |
140 | DECLARE_MSM_GPIO_PINS(0); |
141 | DECLARE_MSM_GPIO_PINS(1); |
142 | DECLARE_MSM_GPIO_PINS(2); |
143 | DECLARE_MSM_GPIO_PINS(3); |
144 | DECLARE_MSM_GPIO_PINS(4); |
145 | DECLARE_MSM_GPIO_PINS(5); |
146 | DECLARE_MSM_GPIO_PINS(6); |
147 | DECLARE_MSM_GPIO_PINS(7); |
148 | DECLARE_MSM_GPIO_PINS(8); |
149 | DECLARE_MSM_GPIO_PINS(9); |
150 | DECLARE_MSM_GPIO_PINS(10); |
151 | DECLARE_MSM_GPIO_PINS(11); |
152 | DECLARE_MSM_GPIO_PINS(12); |
153 | DECLARE_MSM_GPIO_PINS(13); |
154 | DECLARE_MSM_GPIO_PINS(14); |
155 | DECLARE_MSM_GPIO_PINS(15); |
156 | DECLARE_MSM_GPIO_PINS(16); |
157 | DECLARE_MSM_GPIO_PINS(17); |
158 | DECLARE_MSM_GPIO_PINS(18); |
159 | DECLARE_MSM_GPIO_PINS(19); |
160 | DECLARE_MSM_GPIO_PINS(20); |
161 | DECLARE_MSM_GPIO_PINS(21); |
162 | DECLARE_MSM_GPIO_PINS(22); |
163 | DECLARE_MSM_GPIO_PINS(23); |
164 | DECLARE_MSM_GPIO_PINS(24); |
165 | DECLARE_MSM_GPIO_PINS(25); |
166 | DECLARE_MSM_GPIO_PINS(26); |
167 | DECLARE_MSM_GPIO_PINS(27); |
168 | DECLARE_MSM_GPIO_PINS(28); |
169 | DECLARE_MSM_GPIO_PINS(29); |
170 | DECLARE_MSM_GPIO_PINS(30); |
171 | DECLARE_MSM_GPIO_PINS(31); |
172 | DECLARE_MSM_GPIO_PINS(32); |
173 | DECLARE_MSM_GPIO_PINS(33); |
174 | DECLARE_MSM_GPIO_PINS(34); |
175 | DECLARE_MSM_GPIO_PINS(35); |
176 | DECLARE_MSM_GPIO_PINS(36); |
177 | DECLARE_MSM_GPIO_PINS(37); |
178 | DECLARE_MSM_GPIO_PINS(38); |
179 | DECLARE_MSM_GPIO_PINS(39); |
180 | DECLARE_MSM_GPIO_PINS(40); |
181 | DECLARE_MSM_GPIO_PINS(41); |
182 | DECLARE_MSM_GPIO_PINS(42); |
183 | DECLARE_MSM_GPIO_PINS(43); |
184 | DECLARE_MSM_GPIO_PINS(44); |
185 | DECLARE_MSM_GPIO_PINS(45); |
186 | DECLARE_MSM_GPIO_PINS(46); |
187 | DECLARE_MSM_GPIO_PINS(47); |
188 | DECLARE_MSM_GPIO_PINS(48); |
189 | DECLARE_MSM_GPIO_PINS(49); |
190 | DECLARE_MSM_GPIO_PINS(50); |
191 | DECLARE_MSM_GPIO_PINS(51); |
192 | DECLARE_MSM_GPIO_PINS(52); |
193 | DECLARE_MSM_GPIO_PINS(53); |
194 | DECLARE_MSM_GPIO_PINS(54); |
195 | DECLARE_MSM_GPIO_PINS(55); |
196 | DECLARE_MSM_GPIO_PINS(56); |
197 | DECLARE_MSM_GPIO_PINS(57); |
198 | DECLARE_MSM_GPIO_PINS(58); |
199 | DECLARE_MSM_GPIO_PINS(59); |
200 | DECLARE_MSM_GPIO_PINS(60); |
201 | DECLARE_MSM_GPIO_PINS(61); |
202 | DECLARE_MSM_GPIO_PINS(62); |
203 | DECLARE_MSM_GPIO_PINS(63); |
204 | DECLARE_MSM_GPIO_PINS(64); |
205 | DECLARE_MSM_GPIO_PINS(65); |
206 | DECLARE_MSM_GPIO_PINS(66); |
207 | DECLARE_MSM_GPIO_PINS(67); |
208 | DECLARE_MSM_GPIO_PINS(68); |
209 | DECLARE_MSM_GPIO_PINS(69); |
210 | DECLARE_MSM_GPIO_PINS(70); |
211 | DECLARE_MSM_GPIO_PINS(71); |
212 | DECLARE_MSM_GPIO_PINS(72); |
213 | DECLARE_MSM_GPIO_PINS(73); |
214 | DECLARE_MSM_GPIO_PINS(74); |
215 | DECLARE_MSM_GPIO_PINS(75); |
216 | DECLARE_MSM_GPIO_PINS(76); |
217 | DECLARE_MSM_GPIO_PINS(77); |
218 | DECLARE_MSM_GPIO_PINS(78); |
219 | DECLARE_MSM_GPIO_PINS(79); |
220 | DECLARE_MSM_GPIO_PINS(80); |
221 | DECLARE_MSM_GPIO_PINS(81); |
222 | DECLARE_MSM_GPIO_PINS(82); |
223 | DECLARE_MSM_GPIO_PINS(83); |
224 | DECLARE_MSM_GPIO_PINS(84); |
225 | DECLARE_MSM_GPIO_PINS(85); |
226 | DECLARE_MSM_GPIO_PINS(86); |
227 | DECLARE_MSM_GPIO_PINS(87); |
228 | DECLARE_MSM_GPIO_PINS(88); |
229 | DECLARE_MSM_GPIO_PINS(89); |
230 | DECLARE_MSM_GPIO_PINS(90); |
231 | DECLARE_MSM_GPIO_PINS(91); |
232 | DECLARE_MSM_GPIO_PINS(92); |
233 | DECLARE_MSM_GPIO_PINS(93); |
234 | DECLARE_MSM_GPIO_PINS(94); |
235 | DECLARE_MSM_GPIO_PINS(95); |
236 | DECLARE_MSM_GPIO_PINS(96); |
237 | DECLARE_MSM_GPIO_PINS(97); |
238 | DECLARE_MSM_GPIO_PINS(98); |
239 | DECLARE_MSM_GPIO_PINS(99); |
240 | DECLARE_MSM_GPIO_PINS(100); |
241 | DECLARE_MSM_GPIO_PINS(101); |
242 | DECLARE_MSM_GPIO_PINS(102); |
243 | DECLARE_MSM_GPIO_PINS(103); |
244 | DECLARE_MSM_GPIO_PINS(104); |
245 | DECLARE_MSM_GPIO_PINS(105); |
246 | DECLARE_MSM_GPIO_PINS(106); |
247 | DECLARE_MSM_GPIO_PINS(107); |
248 | DECLARE_MSM_GPIO_PINS(108); |
249 | DECLARE_MSM_GPIO_PINS(109); |
250 | DECLARE_MSM_GPIO_PINS(110); |
251 | DECLARE_MSM_GPIO_PINS(111); |
252 | DECLARE_MSM_GPIO_PINS(112); |
253 | DECLARE_MSM_GPIO_PINS(113); |
254 | DECLARE_MSM_GPIO_PINS(114); |
255 | DECLARE_MSM_GPIO_PINS(115); |
256 | DECLARE_MSM_GPIO_PINS(116); |
257 | |
258 | static const unsigned int sdc1_clk_pins[] = { 117 }; |
259 | static const unsigned int sdc1_cmd_pins[] = { 118 }; |
260 | static const unsigned int sdc1_data_pins[] = { 119 }; |
261 | static const unsigned int sdc2_clk_pins[] = { 120 }; |
262 | static const unsigned int sdc2_cmd_pins[] = { 121 }; |
263 | static const unsigned int sdc2_data_pins[] = { 122 }; |
264 | |
265 | #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \ |
266 | { \ |
267 | .grp = PINCTRL_PINGROUP("gpio" #id, \ |
268 | gpio##id##_pins, \ |
269 | ARRAY_SIZE(gpio##id##_pins)), \ |
270 | .funcs = (int[]){ \ |
271 | msm_mux_gpio, \ |
272 | msm_mux_##f1, \ |
273 | msm_mux_##f2, \ |
274 | msm_mux_##f3, \ |
275 | msm_mux_##f4, \ |
276 | msm_mux_##f5, \ |
277 | msm_mux_##f6, \ |
278 | msm_mux_##f7 \ |
279 | }, \ |
280 | .nfuncs = 8, \ |
281 | .ctl_reg = 0x1000 + 0x10 * id, \ |
282 | .io_reg = 0x1004 + 0x10 * id, \ |
283 | .intr_cfg_reg = 0x1008 + 0x10 * id, \ |
284 | .intr_status_reg = 0x100c + 0x10 * id, \ |
285 | .intr_target_reg = 0x1008 + 0x10 * id, \ |
286 | .mux_bit = 2, \ |
287 | .pull_bit = 0, \ |
288 | .drv_bit = 6, \ |
289 | .oe_bit = 9, \ |
290 | .in_bit = 0, \ |
291 | .out_bit = 1, \ |
292 | .intr_enable_bit = 0, \ |
293 | .intr_status_bit = 0, \ |
294 | .intr_target_bit = 5, \ |
295 | .intr_target_kpss_val = 4, \ |
296 | .intr_raw_status_bit = 4, \ |
297 | .intr_polarity_bit = 1, \ |
298 | .intr_detection_bit = 2, \ |
299 | .intr_detection_width = 2, \ |
300 | } |
301 | |
302 | #define SDC_PINGROUP(pg_name, ctl, pull, drv) \ |
303 | { \ |
304 | .grp = PINCTRL_PINGROUP(#pg_name, \ |
305 | pg_name##_pins, \ |
306 | ARRAY_SIZE(pg_name##_pins)), \ |
307 | .ctl_reg = ctl, \ |
308 | .io_reg = 0, \ |
309 | .intr_cfg_reg = 0, \ |
310 | .intr_status_reg = 0, \ |
311 | .intr_target_reg = 0, \ |
312 | .mux_bit = -1, \ |
313 | .pull_bit = pull, \ |
314 | .drv_bit = drv, \ |
315 | .oe_bit = -1, \ |
316 | .in_bit = -1, \ |
317 | .out_bit = -1, \ |
318 | .intr_enable_bit = -1, \ |
319 | .intr_status_bit = -1, \ |
320 | .intr_target_bit = -1, \ |
321 | .intr_target_kpss_val = -1, \ |
322 | .intr_raw_status_bit = -1, \ |
323 | .intr_polarity_bit = -1, \ |
324 | .intr_detection_bit = -1, \ |
325 | .intr_detection_width = -1, \ |
326 | } |
327 | |
328 | /* |
329 | * TODO: Add the rest of the possible functions and fill out |
330 | * the pingroup table below. |
331 | */ |
332 | enum msm8226_functions { |
333 | msm_mux_audio_pcm, |
334 | msm_mux_blsp_i2c1, |
335 | msm_mux_blsp_i2c2, |
336 | msm_mux_blsp_i2c3, |
337 | msm_mux_blsp_i2c4, |
338 | msm_mux_blsp_i2c5, |
339 | msm_mux_blsp_i2c6, |
340 | msm_mux_blsp_spi1, |
341 | msm_mux_blsp_spi2, |
342 | msm_mux_blsp_spi3, |
343 | msm_mux_blsp_spi4, |
344 | msm_mux_blsp_spi5, |
345 | msm_mux_blsp_uart1, |
346 | msm_mux_blsp_uart2, |
347 | msm_mux_blsp_uart3, |
348 | msm_mux_blsp_uart4, |
349 | msm_mux_blsp_uart5, |
350 | msm_mux_blsp_uim1, |
351 | msm_mux_blsp_uim2, |
352 | msm_mux_blsp_uim3, |
353 | msm_mux_blsp_uim4, |
354 | msm_mux_blsp_uim5, |
355 | msm_mux_cam_mclk0, |
356 | msm_mux_cam_mclk1, |
357 | msm_mux_cci_i2c0, |
358 | msm_mux_gp0_clk, |
359 | msm_mux_gp1_clk, |
360 | msm_mux_gpio, |
361 | msm_mux_sdc3, |
362 | msm_mux_wlan, |
363 | msm_mux_NA, |
364 | }; |
365 | |
366 | static const char * const gpio_groups[] = { |
367 | "gpio0" , "gpio1" , "gpio2" , "gpio3" , "gpio4" , "gpio5" , "gpio6" , "gpio7" , |
368 | "gpio8" , "gpio9" , "gpio10" , "gpio11" , "gpio12" , "gpio13" , "gpio14" , |
369 | "gpio15" , "gpio16" , "gpio17" , "gpio18" , "gpio19" , "gpio20" , "gpio21" , |
370 | "gpio22" , "gpio23" , "gpio24" , "gpio25" , "gpio26" , "gpio27" , "gpio28" , |
371 | "gpio29" , "gpio30" , "gpio31" , "gpio32" , "gpio33" , "gpio34" , "gpio35" , |
372 | "gpio36" , "gpio37" , "gpio38" , "gpio39" , "gpio40" , "gpio41" , "gpio42" , |
373 | "gpio43" , "gpio44" , "gpio45" , "gpio46" , "gpio47" , "gpio48" , "gpio49" , |
374 | "gpio50" , "gpio51" , "gpio52" , "gpio53" , "gpio54" , "gpio55" , "gpio56" , |
375 | "gpio57" , "gpio58" , "gpio59" , "gpio60" , "gpio61" , "gpio62" , "gpio63" , |
376 | "gpio64" , "gpio65" , "gpio66" , "gpio67" , "gpio68" , "gpio69" , "gpio70" , |
377 | "gpio71" , "gpio72" , "gpio73" , "gpio74" , "gpio75" , "gpio76" , "gpio77" , |
378 | "gpio78" , "gpio79" , "gpio80" , "gpio81" , "gpio82" , "gpio83" , "gpio84" , |
379 | "gpio85" , "gpio86" , "gpio87" , "gpio88" , "gpio89" , "gpio90" , "gpio91" , |
380 | "gpio92" , "gpio93" , "gpio94" , "gpio95" , "gpio96" , "gpio97" , "gpio98" , |
381 | "gpio99" , "gpio100" , "gpio101" , "gpio102" , "gpio103" , "gpio104" , |
382 | "gpio105" , "gpio106" , "gpio107" , "gpio108" , "gpio109" , "gpio110" , |
383 | "gpio111" , "gpio112" , "gpio113" , "gpio114" , "gpio115" , "gpio116" , |
384 | }; |
385 | |
386 | static const char * const audio_pcm_groups[] = { |
387 | "gpio63" , "gpio64" , "gpio65" , "gpio66" |
388 | }; |
389 | |
390 | static const char * const blsp_uart1_groups[] = { |
391 | "gpio0" , "gpio1" , "gpio2" , "gpio3" |
392 | }; |
393 | |
394 | static const char * const blsp_uim1_groups[] = { "gpio0" , "gpio1" }; |
395 | static const char * const blsp_i2c1_groups[] = { "gpio2" , "gpio3" }; |
396 | static const char * const blsp_spi1_groups[] = { |
397 | "gpio0" , "gpio1" , "gpio2" , "gpio3" |
398 | }; |
399 | |
400 | static const char * const blsp_uart2_groups[] = { |
401 | "gpio4" , "gpio5" , "gpio6" , "gpio7" |
402 | }; |
403 | |
404 | static const char * const blsp_uim2_groups[] = { "gpio4" , "gpio5" }; |
405 | static const char * const blsp_i2c2_groups[] = { "gpio6" , "gpio7" }; |
406 | static const char * const blsp_spi2_groups[] = { |
407 | "gpio4" , "gpio5" , "gpio6" , "gpio7" |
408 | }; |
409 | |
410 | static const char * const blsp_uart3_groups[] = { |
411 | "gpio8" , "gpio9" , "gpio10" , "gpio11" |
412 | }; |
413 | |
414 | static const char * const blsp_uim3_groups[] = { "gpio8" , "gpio9" }; |
415 | static const char * const blsp_i2c3_groups[] = { "gpio10" , "gpio11" }; |
416 | static const char * const blsp_spi3_groups[] = { |
417 | "gpio8" , "gpio9" , "gpio10" , "gpio11" |
418 | }; |
419 | |
420 | static const char * const blsp_uart4_groups[] = { |
421 | "gpio12" , "gpio13" , "gpio14" , "gpio15" |
422 | }; |
423 | |
424 | static const char * const blsp_uim4_groups[] = { "gpio12" , "gpio13" }; |
425 | static const char * const blsp_i2c4_groups[] = { "gpio14" , "gpio15" }; |
426 | static const char * const blsp_spi4_groups[] = { |
427 | "gpio12" , "gpio13" , "gpio14" , "gpio15" |
428 | }; |
429 | |
430 | static const char * const blsp_uart5_groups[] = { |
431 | "gpio16" , "gpio17" , "gpio18" , "gpio19" |
432 | }; |
433 | |
434 | static const char * const blsp_uim5_groups[] = { "gpio16" , "gpio17" }; |
435 | static const char * const blsp_i2c5_groups[] = { "gpio18" , "gpio19" }; |
436 | static const char * const blsp_spi5_groups[] = { |
437 | "gpio16" , "gpio17" , "gpio18" , "gpio19" |
438 | }; |
439 | |
440 | static const char * const blsp_i2c6_groups[] = { "gpio22" , "gpio23" }; |
441 | |
442 | static const char * const cci_i2c0_groups[] = { "gpio29" , "gpio30" }; |
443 | |
444 | static const char * const cam_mclk0_groups[] = { "gpio26" }; |
445 | static const char * const cam_mclk1_groups[] = { "gpio27" }; |
446 | |
447 | static const char * const gp0_clk_groups[] = { "gpio33" }; |
448 | static const char * const gp1_clk_groups[] = { "gpio34" }; |
449 | |
450 | static const char * const sdc3_groups[] = { |
451 | "gpio39" , "gpio40" , "gpio41" , "gpio42" , "gpio43" , "gpio44" |
452 | }; |
453 | |
454 | static const char * const wlan_groups[] = { |
455 | "gpio40" , "gpio41" , "gpio42" , "gpio43" , "gpio44" |
456 | }; |
457 | |
458 | static const struct pinfunction msm8226_functions[] = { |
459 | MSM_PIN_FUNCTION(audio_pcm), |
460 | MSM_PIN_FUNCTION(blsp_i2c1), |
461 | MSM_PIN_FUNCTION(blsp_i2c2), |
462 | MSM_PIN_FUNCTION(blsp_i2c3), |
463 | MSM_PIN_FUNCTION(blsp_i2c4), |
464 | MSM_PIN_FUNCTION(blsp_i2c5), |
465 | MSM_PIN_FUNCTION(blsp_i2c6), |
466 | MSM_PIN_FUNCTION(blsp_spi1), |
467 | MSM_PIN_FUNCTION(blsp_spi2), |
468 | MSM_PIN_FUNCTION(blsp_spi3), |
469 | MSM_PIN_FUNCTION(blsp_spi4), |
470 | MSM_PIN_FUNCTION(blsp_spi5), |
471 | MSM_PIN_FUNCTION(blsp_uart1), |
472 | MSM_PIN_FUNCTION(blsp_uart2), |
473 | MSM_PIN_FUNCTION(blsp_uart3), |
474 | MSM_PIN_FUNCTION(blsp_uart4), |
475 | MSM_PIN_FUNCTION(blsp_uart5), |
476 | MSM_PIN_FUNCTION(blsp_uim1), |
477 | MSM_PIN_FUNCTION(blsp_uim2), |
478 | MSM_PIN_FUNCTION(blsp_uim3), |
479 | MSM_PIN_FUNCTION(blsp_uim4), |
480 | MSM_PIN_FUNCTION(blsp_uim5), |
481 | MSM_PIN_FUNCTION(cam_mclk0), |
482 | MSM_PIN_FUNCTION(cam_mclk1), |
483 | MSM_PIN_FUNCTION(cci_i2c0), |
484 | MSM_PIN_FUNCTION(gp0_clk), |
485 | MSM_PIN_FUNCTION(gp1_clk), |
486 | MSM_PIN_FUNCTION(gpio), |
487 | MSM_PIN_FUNCTION(sdc3), |
488 | MSM_PIN_FUNCTION(wlan), |
489 | }; |
490 | |
491 | static const struct msm_pingroup msm8226_groups[] = { |
492 | PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA), |
493 | PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA), |
494 | PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA), |
495 | PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA), |
496 | PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA), |
497 | PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA), |
498 | PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA), |
499 | PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA), |
500 | PINGROUP(8, blsp_spi3, blsp_uart3, blsp_uim3, NA, NA, NA, NA), |
501 | PINGROUP(9, blsp_spi3, blsp_uart3, blsp_uim3, NA, NA, NA, NA), |
502 | PINGROUP(10, blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA), |
503 | PINGROUP(11, blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA), |
504 | PINGROUP(12, blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA, NA), |
505 | PINGROUP(13, blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA, NA), |
506 | PINGROUP(14, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA, NA), |
507 | PINGROUP(15, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA, NA), |
508 | PINGROUP(16, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA), |
509 | PINGROUP(17, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA), |
510 | PINGROUP(18, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA), |
511 | PINGROUP(19, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA), |
512 | PINGROUP(20, NA, NA, NA, NA, NA, NA, NA), |
513 | PINGROUP(21, NA, NA, NA, NA, NA, NA, NA), |
514 | PINGROUP(22, NA, NA, blsp_i2c6, NA, NA, NA, NA), |
515 | PINGROUP(23, NA, NA, blsp_i2c6, NA, NA, NA, NA), |
516 | PINGROUP(24, NA, NA, NA, NA, NA, NA, NA), |
517 | PINGROUP(25, NA, NA, NA, NA, NA, NA, NA), |
518 | PINGROUP(26, cam_mclk0, NA, NA, NA, NA, NA, NA), |
519 | PINGROUP(27, cam_mclk1, NA, NA, NA, NA, NA, NA), |
520 | PINGROUP(28, NA, NA, NA, NA, NA, NA, NA), |
521 | PINGROUP(29, cci_i2c0, NA, NA, NA, NA, NA, NA), |
522 | PINGROUP(30, cci_i2c0, NA, NA, NA, NA, NA, NA), |
523 | PINGROUP(31, NA, NA, NA, NA, NA, NA, NA), |
524 | PINGROUP(32, NA, NA, NA, NA, NA, NA, NA), |
525 | PINGROUP(33, NA, NA, gp0_clk, NA, NA, NA, NA), |
526 | PINGROUP(34, NA, NA, gp1_clk, NA, NA, NA, NA), |
527 | PINGROUP(35, NA, NA, NA, NA, NA, NA, NA), |
528 | PINGROUP(36, NA, NA, NA, NA, NA, NA, NA), |
529 | PINGROUP(37, NA, NA, NA, NA, NA, NA, NA), |
530 | PINGROUP(38, NA, NA, NA, NA, NA, NA, NA), |
531 | PINGROUP(39, NA, sdc3, NA, NA, NA, NA, NA), |
532 | PINGROUP(40, wlan, sdc3, NA, NA, NA, NA, NA), |
533 | PINGROUP(41, wlan, sdc3, NA, NA, NA, NA, NA), |
534 | PINGROUP(42, wlan, sdc3, NA, NA, NA, NA, NA), |
535 | PINGROUP(43, wlan, sdc3, NA, NA, NA, NA, NA), |
536 | PINGROUP(44, wlan, sdc3, NA, NA, NA, NA, NA), |
537 | PINGROUP(45, NA, NA, NA, NA, NA, NA, NA), |
538 | PINGROUP(46, NA, NA, NA, NA, NA, NA, NA), |
539 | PINGROUP(47, NA, NA, NA, NA, NA, NA, NA), |
540 | PINGROUP(48, NA, NA, NA, NA, NA, NA, NA), |
541 | PINGROUP(49, NA, NA, NA, NA, NA, NA, NA), |
542 | PINGROUP(50, NA, NA, NA, NA, NA, NA, NA), |
543 | PINGROUP(51, NA, NA, NA, NA, NA, NA, NA), |
544 | PINGROUP(52, NA, NA, NA, NA, NA, NA, NA), |
545 | PINGROUP(53, NA, NA, NA, NA, NA, NA, NA), |
546 | PINGROUP(54, NA, NA, NA, NA, NA, NA, NA), |
547 | PINGROUP(55, NA, NA, NA, NA, NA, NA, NA), |
548 | PINGROUP(56, NA, NA, NA, NA, NA, NA, NA), |
549 | PINGROUP(57, NA, NA, NA, NA, NA, NA, NA), |
550 | PINGROUP(58, NA, NA, NA, NA, NA, NA, NA), |
551 | PINGROUP(59, NA, NA, NA, NA, NA, NA, NA), |
552 | PINGROUP(60, NA, NA, NA, NA, NA, NA, NA), |
553 | PINGROUP(61, NA, NA, NA, NA, NA, NA, NA), |
554 | PINGROUP(62, NA, NA, NA, NA, NA, NA, NA), |
555 | PINGROUP(63, audio_pcm, NA, NA, NA, NA, NA, NA), |
556 | PINGROUP(64, audio_pcm, NA, NA, NA, NA, NA, NA), |
557 | PINGROUP(65, audio_pcm, NA, NA, NA, NA, NA, NA), |
558 | PINGROUP(66, audio_pcm, NA, NA, NA, NA, NA, NA), |
559 | PINGROUP(67, NA, NA, NA, NA, NA, NA, NA), |
560 | PINGROUP(68, NA, NA, NA, NA, NA, NA, NA), |
561 | PINGROUP(69, NA, NA, NA, NA, NA, NA, NA), |
562 | PINGROUP(70, NA, NA, NA, NA, NA, NA, NA), |
563 | PINGROUP(71, NA, NA, NA, NA, NA, NA, NA), |
564 | PINGROUP(72, NA, NA, NA, NA, NA, NA, NA), |
565 | PINGROUP(73, NA, NA, NA, NA, NA, NA, NA), |
566 | PINGROUP(74, NA, NA, NA, NA, NA, NA, NA), |
567 | PINGROUP(75, NA, NA, NA, NA, NA, NA, NA), |
568 | PINGROUP(76, NA, NA, NA, NA, NA, NA, NA), |
569 | PINGROUP(77, NA, NA, NA, NA, NA, NA, NA), |
570 | PINGROUP(78, NA, NA, NA, NA, NA, NA, NA), |
571 | PINGROUP(79, NA, NA, NA, NA, NA, NA, NA), |
572 | PINGROUP(80, NA, NA, NA, NA, NA, NA, NA), |
573 | PINGROUP(81, NA, NA, NA, NA, NA, NA, NA), |
574 | PINGROUP(82, NA, NA, NA, NA, NA, NA, NA), |
575 | PINGROUP(83, NA, NA, NA, NA, NA, NA, NA), |
576 | PINGROUP(84, NA, NA, NA, NA, NA, NA, NA), |
577 | PINGROUP(85, NA, NA, NA, NA, NA, NA, NA), |
578 | PINGROUP(86, NA, NA, NA, NA, NA, NA, NA), |
579 | PINGROUP(87, NA, NA, NA, NA, NA, NA, NA), |
580 | PINGROUP(88, NA, NA, NA, NA, NA, NA, NA), |
581 | PINGROUP(89, NA, NA, NA, NA, NA, NA, NA), |
582 | PINGROUP(90, NA, NA, NA, NA, NA, NA, NA), |
583 | PINGROUP(91, NA, NA, NA, NA, NA, NA, NA), |
584 | PINGROUP(92, NA, NA, NA, NA, NA, NA, NA), |
585 | PINGROUP(93, NA, NA, NA, NA, NA, NA, NA), |
586 | PINGROUP(94, NA, NA, NA, NA, NA, NA, NA), |
587 | PINGROUP(95, NA, NA, NA, NA, NA, NA, NA), |
588 | PINGROUP(96, NA, NA, NA, NA, NA, NA, NA), |
589 | PINGROUP(97, NA, NA, NA, NA, NA, NA, NA), |
590 | PINGROUP(98, NA, NA, NA, NA, NA, NA, NA), |
591 | PINGROUP(99, NA, NA, NA, NA, NA, NA, NA), |
592 | PINGROUP(100, NA, NA, NA, NA, NA, NA, NA), |
593 | PINGROUP(101, NA, NA, NA, NA, NA, NA, NA), |
594 | PINGROUP(102, NA, NA, NA, NA, NA, NA, NA), |
595 | PINGROUP(103, NA, NA, NA, NA, NA, NA, NA), |
596 | PINGROUP(104, NA, NA, NA, NA, NA, NA, NA), |
597 | PINGROUP(105, NA, NA, NA, NA, NA, NA, NA), |
598 | PINGROUP(106, NA, NA, NA, NA, NA, NA, NA), |
599 | PINGROUP(107, NA, NA, NA, NA, NA, NA, NA), |
600 | PINGROUP(108, NA, NA, NA, NA, NA, NA, NA), |
601 | PINGROUP(109, NA, NA, NA, NA, NA, NA, NA), |
602 | PINGROUP(110, NA, NA, NA, NA, NA, NA, NA), |
603 | PINGROUP(111, NA, NA, NA, NA, NA, NA, NA), |
604 | PINGROUP(112, NA, NA, NA, NA, NA, NA, NA), |
605 | PINGROUP(113, NA, NA, NA, NA, NA, NA, NA), |
606 | PINGROUP(114, NA, NA, NA, NA, NA, NA, NA), |
607 | PINGROUP(115, NA, NA, NA, NA, NA, NA, NA), |
608 | PINGROUP(116, NA, NA, NA, NA, NA, NA, NA), |
609 | SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6), |
610 | SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3), |
611 | SDC_PINGROUP(sdc1_data, 0x2044, 9, 0), |
612 | SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6), |
613 | SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3), |
614 | SDC_PINGROUP(sdc2_data, 0x2048, 9, 0), |
615 | }; |
616 | |
617 | #define NUM_GPIO_PINGROUPS 117 |
618 | |
619 | static const struct msm_gpio_wakeirq_map msm8226_mpm_map[] = { |
620 | { 1, 3 }, { 4, 4 }, { 5, 5 }, { 9, 6 }, { 13, 7 }, { 17, 8 }, |
621 | { 21, 9 }, { 27, 10 }, { 29, 11 }, { 31, 12 }, { 33, 13 }, { 35, 14 }, |
622 | { 37, 15 }, { 38, 16 }, { 39, 17 }, { 41, 18 }, { 46, 19 }, { 48, 20 }, |
623 | { 49, 21 }, { 50, 22 }, { 51, 23 }, { 52, 24 }, { 54, 25 }, { 62, 26 }, |
624 | { 63, 27 }, { 64, 28 }, { 65, 29 }, { 66, 30 }, { 67, 31 }, { 68, 32 }, |
625 | { 69, 33 }, { 71, 34 }, { 72, 35 }, { 106, 36 }, { 107, 37 }, { 108, 38 }, |
626 | { 109, 39 }, { 110, 40 }, { 111, 54 }, { 113, 55 }, { 115, 41 }, |
627 | }; |
628 | |
629 | static const struct msm_pinctrl_soc_data msm8226_pinctrl = { |
630 | .pins = msm8226_pins, |
631 | .npins = ARRAY_SIZE(msm8226_pins), |
632 | .functions = msm8226_functions, |
633 | .nfunctions = ARRAY_SIZE(msm8226_functions), |
634 | .groups = msm8226_groups, |
635 | .ngroups = ARRAY_SIZE(msm8226_groups), |
636 | .ngpios = NUM_GPIO_PINGROUPS, |
637 | .wakeirq_map = msm8226_mpm_map, |
638 | .nwakeirq_map = ARRAY_SIZE(msm8226_mpm_map), |
639 | }; |
640 | |
641 | static int msm8226_pinctrl_probe(struct platform_device *pdev) |
642 | { |
643 | return msm_pinctrl_probe(pdev, soc_data: &msm8226_pinctrl); |
644 | } |
645 | |
646 | static const struct of_device_id msm8226_pinctrl_of_match[] = { |
647 | { .compatible = "qcom,msm8226-pinctrl" , }, |
648 | { }, |
649 | }; |
650 | |
651 | static struct platform_driver msm8226_pinctrl_driver = { |
652 | .driver = { |
653 | .name = "msm8226-pinctrl" , |
654 | .of_match_table = msm8226_pinctrl_of_match, |
655 | }, |
656 | .probe = msm8226_pinctrl_probe, |
657 | .remove_new = msm_pinctrl_remove, |
658 | }; |
659 | |
660 | static int __init msm8226_pinctrl_init(void) |
661 | { |
662 | return platform_driver_register(&msm8226_pinctrl_driver); |
663 | } |
664 | arch_initcall(msm8226_pinctrl_init); |
665 | |
666 | static void __exit msm8226_pinctrl_exit(void) |
667 | { |
668 | platform_driver_unregister(&msm8226_pinctrl_driver); |
669 | } |
670 | module_exit(msm8226_pinctrl_exit); |
671 | |
672 | MODULE_AUTHOR("Bartosz Dudziak <bartosz.dudziak@snejp.pl>" ); |
673 | MODULE_DESCRIPTION("Qualcomm MSM8226 pinctrl driver" ); |
674 | MODULE_LICENSE("GPL v2" ); |
675 | MODULE_DEVICE_TABLE(of, msm8226_pinctrl_of_match); |
676 | |