1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. |
4 | * Copyright (C) 2022, Kernkonzept GmbH. |
5 | */ |
6 | |
7 | #include <linux/module.h> |
8 | #include <linux/of.h> |
9 | #include <linux/platform_device.h> |
10 | |
11 | #include "pinctrl-msm.h" |
12 | |
13 | #define REG_SIZE 0x1000 |
14 | #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ |
15 | { \ |
16 | .grp = PINCTRL_PINGROUP("gpio" #id, \ |
17 | gpio##id##_pins, \ |
18 | ARRAY_SIZE(gpio##id##_pins)), \ |
19 | .funcs = (int[]){ \ |
20 | msm_mux_gpio, \ |
21 | msm_mux_##f1, \ |
22 | msm_mux_##f2, \ |
23 | msm_mux_##f3, \ |
24 | msm_mux_##f4, \ |
25 | msm_mux_##f5, \ |
26 | msm_mux_##f6, \ |
27 | msm_mux_##f7, \ |
28 | msm_mux_##f8, \ |
29 | msm_mux_##f9, \ |
30 | }, \ |
31 | .nfuncs = 10, \ |
32 | .ctl_reg = REG_SIZE * id, \ |
33 | .io_reg = 0x4 + REG_SIZE * id, \ |
34 | .intr_cfg_reg = 0x8 + REG_SIZE * id, \ |
35 | .intr_status_reg = 0xc + REG_SIZE * id, \ |
36 | .intr_target_reg = 0x8 + REG_SIZE * id, \ |
37 | .mux_bit = 2, \ |
38 | .pull_bit = 0, \ |
39 | .drv_bit = 6, \ |
40 | .oe_bit = 9, \ |
41 | .in_bit = 0, \ |
42 | .out_bit = 1, \ |
43 | .intr_enable_bit = 0, \ |
44 | .intr_status_bit = 0, \ |
45 | .intr_target_bit = 5, \ |
46 | .intr_target_kpss_val = 4, \ |
47 | .intr_raw_status_bit = 4, \ |
48 | .intr_polarity_bit = 1, \ |
49 | .intr_detection_bit = 2, \ |
50 | .intr_detection_width = 2, \ |
51 | } |
52 | |
53 | #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ |
54 | { \ |
55 | .grp = PINCTRL_PINGROUP(#pg_name, \ |
56 | pg_name##_pins, \ |
57 | ARRAY_SIZE(pg_name##_pins)), \ |
58 | .ctl_reg = ctl, \ |
59 | .io_reg = 0, \ |
60 | .intr_cfg_reg = 0, \ |
61 | .intr_status_reg = 0, \ |
62 | .intr_target_reg = 0, \ |
63 | .mux_bit = -1, \ |
64 | .pull_bit = pull, \ |
65 | .drv_bit = drv, \ |
66 | .oe_bit = -1, \ |
67 | .in_bit = -1, \ |
68 | .out_bit = -1, \ |
69 | .intr_enable_bit = -1, \ |
70 | .intr_status_bit = -1, \ |
71 | .intr_target_bit = -1, \ |
72 | .intr_raw_status_bit = -1, \ |
73 | .intr_polarity_bit = -1, \ |
74 | .intr_detection_bit = -1, \ |
75 | .intr_detection_width = -1, \ |
76 | } |
77 | static const struct pinctrl_pin_desc msm8909_pins[] = { |
78 | PINCTRL_PIN(0, "GPIO_0" ), |
79 | PINCTRL_PIN(1, "GPIO_1" ), |
80 | PINCTRL_PIN(2, "GPIO_2" ), |
81 | PINCTRL_PIN(3, "GPIO_3" ), |
82 | PINCTRL_PIN(4, "GPIO_4" ), |
83 | PINCTRL_PIN(5, "GPIO_5" ), |
84 | PINCTRL_PIN(6, "GPIO_6" ), |
85 | PINCTRL_PIN(7, "GPIO_7" ), |
86 | PINCTRL_PIN(8, "GPIO_8" ), |
87 | PINCTRL_PIN(9, "GPIO_9" ), |
88 | PINCTRL_PIN(10, "GPIO_10" ), |
89 | PINCTRL_PIN(11, "GPIO_11" ), |
90 | PINCTRL_PIN(12, "GPIO_12" ), |
91 | PINCTRL_PIN(13, "GPIO_13" ), |
92 | PINCTRL_PIN(14, "GPIO_14" ), |
93 | PINCTRL_PIN(15, "GPIO_15" ), |
94 | PINCTRL_PIN(16, "GPIO_16" ), |
95 | PINCTRL_PIN(17, "GPIO_17" ), |
96 | PINCTRL_PIN(18, "GPIO_18" ), |
97 | PINCTRL_PIN(19, "GPIO_19" ), |
98 | PINCTRL_PIN(20, "GPIO_20" ), |
99 | PINCTRL_PIN(21, "GPIO_21" ), |
100 | PINCTRL_PIN(22, "GPIO_22" ), |
101 | PINCTRL_PIN(23, "GPIO_23" ), |
102 | PINCTRL_PIN(24, "GPIO_24" ), |
103 | PINCTRL_PIN(25, "GPIO_25" ), |
104 | PINCTRL_PIN(26, "GPIO_26" ), |
105 | PINCTRL_PIN(27, "GPIO_27" ), |
106 | PINCTRL_PIN(28, "GPIO_28" ), |
107 | PINCTRL_PIN(29, "GPIO_29" ), |
108 | PINCTRL_PIN(30, "GPIO_30" ), |
109 | PINCTRL_PIN(31, "GPIO_31" ), |
110 | PINCTRL_PIN(32, "GPIO_32" ), |
111 | PINCTRL_PIN(33, "GPIO_33" ), |
112 | PINCTRL_PIN(34, "GPIO_34" ), |
113 | PINCTRL_PIN(35, "GPIO_35" ), |
114 | PINCTRL_PIN(36, "GPIO_36" ), |
115 | PINCTRL_PIN(37, "GPIO_37" ), |
116 | PINCTRL_PIN(38, "GPIO_38" ), |
117 | PINCTRL_PIN(39, "GPIO_39" ), |
118 | PINCTRL_PIN(40, "GPIO_40" ), |
119 | PINCTRL_PIN(41, "GPIO_41" ), |
120 | PINCTRL_PIN(42, "GPIO_42" ), |
121 | PINCTRL_PIN(43, "GPIO_43" ), |
122 | PINCTRL_PIN(44, "GPIO_44" ), |
123 | PINCTRL_PIN(45, "GPIO_45" ), |
124 | PINCTRL_PIN(46, "GPIO_46" ), |
125 | PINCTRL_PIN(47, "GPIO_47" ), |
126 | PINCTRL_PIN(48, "GPIO_48" ), |
127 | PINCTRL_PIN(49, "GPIO_49" ), |
128 | PINCTRL_PIN(50, "GPIO_50" ), |
129 | PINCTRL_PIN(51, "GPIO_51" ), |
130 | PINCTRL_PIN(52, "GPIO_52" ), |
131 | PINCTRL_PIN(53, "GPIO_53" ), |
132 | PINCTRL_PIN(54, "GPIO_54" ), |
133 | PINCTRL_PIN(55, "GPIO_55" ), |
134 | PINCTRL_PIN(56, "GPIO_56" ), |
135 | PINCTRL_PIN(57, "GPIO_57" ), |
136 | PINCTRL_PIN(58, "GPIO_58" ), |
137 | PINCTRL_PIN(59, "GPIO_59" ), |
138 | PINCTRL_PIN(60, "GPIO_60" ), |
139 | PINCTRL_PIN(61, "GPIO_61" ), |
140 | PINCTRL_PIN(62, "GPIO_62" ), |
141 | PINCTRL_PIN(63, "GPIO_63" ), |
142 | PINCTRL_PIN(64, "GPIO_64" ), |
143 | PINCTRL_PIN(65, "GPIO_65" ), |
144 | PINCTRL_PIN(66, "GPIO_66" ), |
145 | PINCTRL_PIN(67, "GPIO_67" ), |
146 | PINCTRL_PIN(68, "GPIO_68" ), |
147 | PINCTRL_PIN(69, "GPIO_69" ), |
148 | PINCTRL_PIN(70, "GPIO_70" ), |
149 | PINCTRL_PIN(71, "GPIO_71" ), |
150 | PINCTRL_PIN(72, "GPIO_72" ), |
151 | PINCTRL_PIN(73, "GPIO_73" ), |
152 | PINCTRL_PIN(74, "GPIO_74" ), |
153 | PINCTRL_PIN(75, "GPIO_75" ), |
154 | PINCTRL_PIN(76, "GPIO_76" ), |
155 | PINCTRL_PIN(77, "GPIO_77" ), |
156 | PINCTRL_PIN(78, "GPIO_78" ), |
157 | PINCTRL_PIN(79, "GPIO_79" ), |
158 | PINCTRL_PIN(80, "GPIO_80" ), |
159 | PINCTRL_PIN(81, "GPIO_81" ), |
160 | PINCTRL_PIN(82, "GPIO_82" ), |
161 | PINCTRL_PIN(83, "GPIO_83" ), |
162 | PINCTRL_PIN(84, "GPIO_84" ), |
163 | PINCTRL_PIN(85, "GPIO_85" ), |
164 | PINCTRL_PIN(86, "GPIO_86" ), |
165 | PINCTRL_PIN(87, "GPIO_87" ), |
166 | PINCTRL_PIN(88, "GPIO_88" ), |
167 | PINCTRL_PIN(89, "GPIO_89" ), |
168 | PINCTRL_PIN(90, "GPIO_90" ), |
169 | PINCTRL_PIN(91, "GPIO_91" ), |
170 | PINCTRL_PIN(92, "GPIO_92" ), |
171 | PINCTRL_PIN(93, "GPIO_93" ), |
172 | PINCTRL_PIN(94, "GPIO_94" ), |
173 | PINCTRL_PIN(95, "GPIO_95" ), |
174 | PINCTRL_PIN(96, "GPIO_96" ), |
175 | PINCTRL_PIN(97, "GPIO_97" ), |
176 | PINCTRL_PIN(98, "GPIO_98" ), |
177 | PINCTRL_PIN(99, "GPIO_99" ), |
178 | PINCTRL_PIN(100, "GPIO_100" ), |
179 | PINCTRL_PIN(101, "GPIO_101" ), |
180 | PINCTRL_PIN(102, "GPIO_102" ), |
181 | PINCTRL_PIN(103, "GPIO_103" ), |
182 | PINCTRL_PIN(104, "GPIO_104" ), |
183 | PINCTRL_PIN(105, "GPIO_105" ), |
184 | PINCTRL_PIN(106, "GPIO_106" ), |
185 | PINCTRL_PIN(107, "GPIO_107" ), |
186 | PINCTRL_PIN(108, "GPIO_108" ), |
187 | PINCTRL_PIN(109, "GPIO_109" ), |
188 | PINCTRL_PIN(110, "GPIO_110" ), |
189 | PINCTRL_PIN(111, "GPIO_111" ), |
190 | PINCTRL_PIN(112, "GPIO_112" ), |
191 | PINCTRL_PIN(113, "SDC1_CLK" ), |
192 | PINCTRL_PIN(114, "SDC1_CMD" ), |
193 | PINCTRL_PIN(115, "SDC1_DATA" ), |
194 | PINCTRL_PIN(116, "SDC2_CLK" ), |
195 | PINCTRL_PIN(117, "SDC2_CMD" ), |
196 | PINCTRL_PIN(118, "SDC2_DATA" ), |
197 | PINCTRL_PIN(119, "QDSD_CLK" ), |
198 | PINCTRL_PIN(120, "QDSD_CMD" ), |
199 | PINCTRL_PIN(121, "QDSD_DATA0" ), |
200 | PINCTRL_PIN(122, "QDSD_DATA1" ), |
201 | PINCTRL_PIN(123, "QDSD_DATA2" ), |
202 | PINCTRL_PIN(124, "QDSD_DATA3" ), |
203 | }; |
204 | |
205 | #define DECLARE_MSM_GPIO_PINS(pin) \ |
206 | static const unsigned int gpio##pin##_pins[] = { pin } |
207 | DECLARE_MSM_GPIO_PINS(0); |
208 | DECLARE_MSM_GPIO_PINS(1); |
209 | DECLARE_MSM_GPIO_PINS(2); |
210 | DECLARE_MSM_GPIO_PINS(3); |
211 | DECLARE_MSM_GPIO_PINS(4); |
212 | DECLARE_MSM_GPIO_PINS(5); |
213 | DECLARE_MSM_GPIO_PINS(6); |
214 | DECLARE_MSM_GPIO_PINS(7); |
215 | DECLARE_MSM_GPIO_PINS(8); |
216 | DECLARE_MSM_GPIO_PINS(9); |
217 | DECLARE_MSM_GPIO_PINS(10); |
218 | DECLARE_MSM_GPIO_PINS(11); |
219 | DECLARE_MSM_GPIO_PINS(12); |
220 | DECLARE_MSM_GPIO_PINS(13); |
221 | DECLARE_MSM_GPIO_PINS(14); |
222 | DECLARE_MSM_GPIO_PINS(15); |
223 | DECLARE_MSM_GPIO_PINS(16); |
224 | DECLARE_MSM_GPIO_PINS(17); |
225 | DECLARE_MSM_GPIO_PINS(18); |
226 | DECLARE_MSM_GPIO_PINS(19); |
227 | DECLARE_MSM_GPIO_PINS(20); |
228 | DECLARE_MSM_GPIO_PINS(21); |
229 | DECLARE_MSM_GPIO_PINS(22); |
230 | DECLARE_MSM_GPIO_PINS(23); |
231 | DECLARE_MSM_GPIO_PINS(24); |
232 | DECLARE_MSM_GPIO_PINS(25); |
233 | DECLARE_MSM_GPIO_PINS(26); |
234 | DECLARE_MSM_GPIO_PINS(27); |
235 | DECLARE_MSM_GPIO_PINS(28); |
236 | DECLARE_MSM_GPIO_PINS(29); |
237 | DECLARE_MSM_GPIO_PINS(30); |
238 | DECLARE_MSM_GPIO_PINS(31); |
239 | DECLARE_MSM_GPIO_PINS(32); |
240 | DECLARE_MSM_GPIO_PINS(33); |
241 | DECLARE_MSM_GPIO_PINS(34); |
242 | DECLARE_MSM_GPIO_PINS(35); |
243 | DECLARE_MSM_GPIO_PINS(36); |
244 | DECLARE_MSM_GPIO_PINS(37); |
245 | DECLARE_MSM_GPIO_PINS(38); |
246 | DECLARE_MSM_GPIO_PINS(39); |
247 | DECLARE_MSM_GPIO_PINS(40); |
248 | DECLARE_MSM_GPIO_PINS(41); |
249 | DECLARE_MSM_GPIO_PINS(42); |
250 | DECLARE_MSM_GPIO_PINS(43); |
251 | DECLARE_MSM_GPIO_PINS(44); |
252 | DECLARE_MSM_GPIO_PINS(45); |
253 | DECLARE_MSM_GPIO_PINS(46); |
254 | DECLARE_MSM_GPIO_PINS(47); |
255 | DECLARE_MSM_GPIO_PINS(48); |
256 | DECLARE_MSM_GPIO_PINS(49); |
257 | DECLARE_MSM_GPIO_PINS(50); |
258 | DECLARE_MSM_GPIO_PINS(51); |
259 | DECLARE_MSM_GPIO_PINS(52); |
260 | DECLARE_MSM_GPIO_PINS(53); |
261 | DECLARE_MSM_GPIO_PINS(54); |
262 | DECLARE_MSM_GPIO_PINS(55); |
263 | DECLARE_MSM_GPIO_PINS(56); |
264 | DECLARE_MSM_GPIO_PINS(57); |
265 | DECLARE_MSM_GPIO_PINS(58); |
266 | DECLARE_MSM_GPIO_PINS(59); |
267 | DECLARE_MSM_GPIO_PINS(60); |
268 | DECLARE_MSM_GPIO_PINS(61); |
269 | DECLARE_MSM_GPIO_PINS(62); |
270 | DECLARE_MSM_GPIO_PINS(63); |
271 | DECLARE_MSM_GPIO_PINS(64); |
272 | DECLARE_MSM_GPIO_PINS(65); |
273 | DECLARE_MSM_GPIO_PINS(66); |
274 | DECLARE_MSM_GPIO_PINS(67); |
275 | DECLARE_MSM_GPIO_PINS(68); |
276 | DECLARE_MSM_GPIO_PINS(69); |
277 | DECLARE_MSM_GPIO_PINS(70); |
278 | DECLARE_MSM_GPIO_PINS(71); |
279 | DECLARE_MSM_GPIO_PINS(72); |
280 | DECLARE_MSM_GPIO_PINS(73); |
281 | DECLARE_MSM_GPIO_PINS(74); |
282 | DECLARE_MSM_GPIO_PINS(75); |
283 | DECLARE_MSM_GPIO_PINS(76); |
284 | DECLARE_MSM_GPIO_PINS(77); |
285 | DECLARE_MSM_GPIO_PINS(78); |
286 | DECLARE_MSM_GPIO_PINS(79); |
287 | DECLARE_MSM_GPIO_PINS(80); |
288 | DECLARE_MSM_GPIO_PINS(81); |
289 | DECLARE_MSM_GPIO_PINS(82); |
290 | DECLARE_MSM_GPIO_PINS(83); |
291 | DECLARE_MSM_GPIO_PINS(84); |
292 | DECLARE_MSM_GPIO_PINS(85); |
293 | DECLARE_MSM_GPIO_PINS(86); |
294 | DECLARE_MSM_GPIO_PINS(87); |
295 | DECLARE_MSM_GPIO_PINS(88); |
296 | DECLARE_MSM_GPIO_PINS(89); |
297 | DECLARE_MSM_GPIO_PINS(90); |
298 | DECLARE_MSM_GPIO_PINS(91); |
299 | DECLARE_MSM_GPIO_PINS(92); |
300 | DECLARE_MSM_GPIO_PINS(93); |
301 | DECLARE_MSM_GPIO_PINS(94); |
302 | DECLARE_MSM_GPIO_PINS(95); |
303 | DECLARE_MSM_GPIO_PINS(96); |
304 | DECLARE_MSM_GPIO_PINS(97); |
305 | DECLARE_MSM_GPIO_PINS(98); |
306 | DECLARE_MSM_GPIO_PINS(99); |
307 | DECLARE_MSM_GPIO_PINS(100); |
308 | DECLARE_MSM_GPIO_PINS(101); |
309 | DECLARE_MSM_GPIO_PINS(102); |
310 | DECLARE_MSM_GPIO_PINS(103); |
311 | DECLARE_MSM_GPIO_PINS(104); |
312 | DECLARE_MSM_GPIO_PINS(105); |
313 | DECLARE_MSM_GPIO_PINS(106); |
314 | DECLARE_MSM_GPIO_PINS(107); |
315 | DECLARE_MSM_GPIO_PINS(108); |
316 | DECLARE_MSM_GPIO_PINS(109); |
317 | DECLARE_MSM_GPIO_PINS(110); |
318 | DECLARE_MSM_GPIO_PINS(111); |
319 | DECLARE_MSM_GPIO_PINS(112); |
320 | |
321 | static const unsigned int sdc1_clk_pins[] = { 113 }; |
322 | static const unsigned int sdc1_cmd_pins[] = { 114 }; |
323 | static const unsigned int sdc1_data_pins[] = { 115 }; |
324 | static const unsigned int sdc2_clk_pins[] = { 116 }; |
325 | static const unsigned int sdc2_cmd_pins[] = { 117 }; |
326 | static const unsigned int sdc2_data_pins[] = { 118 }; |
327 | static const unsigned int qdsd_clk_pins[] = { 119 }; |
328 | static const unsigned int qdsd_cmd_pins[] = { 120 }; |
329 | static const unsigned int qdsd_data0_pins[] = { 121 }; |
330 | static const unsigned int qdsd_data1_pins[] = { 122 }; |
331 | static const unsigned int qdsd_data2_pins[] = { 123 }; |
332 | static const unsigned int qdsd_data3_pins[] = { 124 }; |
333 | |
334 | enum msm8909_functions { |
335 | msm_mux_gpio, |
336 | msm_mux_adsp_ext, |
337 | msm_mux_atest_bbrx0, |
338 | msm_mux_atest_bbrx1, |
339 | msm_mux_atest_char, |
340 | msm_mux_atest_char0, |
341 | msm_mux_atest_char1, |
342 | msm_mux_atest_char2, |
343 | msm_mux_atest_char3, |
344 | msm_mux_atest_combodac, |
345 | msm_mux_atest_gpsadc0, |
346 | msm_mux_atest_gpsadc1, |
347 | msm_mux_atest_wlan0, |
348 | msm_mux_atest_wlan1, |
349 | msm_mux_bimc_dte0, |
350 | msm_mux_bimc_dte1, |
351 | msm_mux_blsp_i2c1, |
352 | msm_mux_blsp_i2c2, |
353 | msm_mux_blsp_i2c3, |
354 | msm_mux_blsp_i2c4, |
355 | msm_mux_blsp_i2c5, |
356 | msm_mux_blsp_i2c6, |
357 | msm_mux_blsp_spi1, |
358 | msm_mux_blsp_spi1_cs1, |
359 | msm_mux_blsp_spi1_cs2, |
360 | msm_mux_blsp_spi1_cs3, |
361 | msm_mux_blsp_spi2, |
362 | msm_mux_blsp_spi2_cs1, |
363 | msm_mux_blsp_spi2_cs2, |
364 | msm_mux_blsp_spi2_cs3, |
365 | msm_mux_blsp_spi3, |
366 | msm_mux_blsp_spi3_cs1, |
367 | msm_mux_blsp_spi3_cs2, |
368 | msm_mux_blsp_spi3_cs3, |
369 | msm_mux_blsp_spi4, |
370 | msm_mux_blsp_spi5, |
371 | msm_mux_blsp_spi6, |
372 | msm_mux_blsp_uart1, |
373 | msm_mux_blsp_uart2, |
374 | msm_mux_blsp_uim1, |
375 | msm_mux_blsp_uim2, |
376 | msm_mux_cam_mclk, |
377 | msm_mux_cci_async, |
378 | msm_mux_cci_timer0, |
379 | msm_mux_cci_timer1, |
380 | msm_mux_cci_timer2, |
381 | msm_mux_cdc_pdm0, |
382 | msm_mux_dbg_out, |
383 | msm_mux_dmic0_clk, |
384 | msm_mux_dmic0_data, |
385 | msm_mux_ebi0_wrcdc, |
386 | msm_mux_ebi2_a, |
387 | msm_mux_ebi2_lcd, |
388 | msm_mux_ext_lpass, |
389 | msm_mux_gcc_gp1_clk_a, |
390 | msm_mux_gcc_gp1_clk_b, |
391 | msm_mux_gcc_gp2_clk_a, |
392 | msm_mux_gcc_gp2_clk_b, |
393 | msm_mux_gcc_gp3_clk_a, |
394 | msm_mux_gcc_gp3_clk_b, |
395 | msm_mux_gcc_plltest, |
396 | msm_mux_gsm0_tx, |
397 | msm_mux_ldo_en, |
398 | msm_mux_ldo_update, |
399 | msm_mux_m_voc, |
400 | msm_mux_mdp_vsync, |
401 | msm_mux_modem_tsync, |
402 | msm_mux_nav_pps, |
403 | msm_mux_nav_tsync, |
404 | msm_mux_pa_indicator, |
405 | msm_mux_pbs0, |
406 | msm_mux_pbs1, |
407 | msm_mux_pbs2, |
408 | msm_mux_pri_mi2s_data0_a, |
409 | msm_mux_pri_mi2s_data0_b, |
410 | msm_mux_pri_mi2s_data1_a, |
411 | msm_mux_pri_mi2s_data1_b, |
412 | msm_mux_pri_mi2s_mclk_a, |
413 | msm_mux_pri_mi2s_mclk_b, |
414 | msm_mux_pri_mi2s_sck_a, |
415 | msm_mux_pri_mi2s_sck_b, |
416 | msm_mux_pri_mi2s_ws_a, |
417 | msm_mux_pri_mi2s_ws_b, |
418 | msm_mux_prng_rosc, |
419 | msm_mux_pwr_crypto_enabled_a, |
420 | msm_mux_pwr_crypto_enabled_b, |
421 | msm_mux_pwr_modem_enabled_a, |
422 | msm_mux_pwr_modem_enabled_b, |
423 | msm_mux_pwr_nav_enabled_a, |
424 | msm_mux_pwr_nav_enabled_b, |
425 | msm_mux_qdss_cti_trig_in_a0, |
426 | msm_mux_qdss_cti_trig_in_a1, |
427 | msm_mux_qdss_cti_trig_in_b0, |
428 | msm_mux_qdss_cti_trig_in_b1, |
429 | msm_mux_qdss_cti_trig_out_a0, |
430 | msm_mux_qdss_cti_trig_out_a1, |
431 | msm_mux_qdss_cti_trig_out_b0, |
432 | msm_mux_qdss_cti_trig_out_b1, |
433 | msm_mux_qdss_traceclk_a, |
434 | msm_mux_qdss_tracectl_a, |
435 | msm_mux_qdss_tracedata_a, |
436 | msm_mux_qdss_tracedata_b, |
437 | msm_mux_sd_write, |
438 | msm_mux_sec_mi2s, |
439 | msm_mux_smb_int, |
440 | msm_mux_ssbi0, |
441 | msm_mux_ssbi1, |
442 | msm_mux_uim1_clk, |
443 | msm_mux_uim1_data, |
444 | msm_mux_uim1_present, |
445 | msm_mux_uim1_reset, |
446 | msm_mux_uim2_clk, |
447 | msm_mux_uim2_data, |
448 | msm_mux_uim2_present, |
449 | msm_mux_uim2_reset, |
450 | msm_mux_uim3_clk, |
451 | msm_mux_uim3_data, |
452 | msm_mux_uim3_present, |
453 | msm_mux_uim3_reset, |
454 | msm_mux_uim_batt, |
455 | msm_mux_wcss_bt, |
456 | msm_mux_wcss_fm, |
457 | msm_mux_wcss_wlan, |
458 | msm_mux__, |
459 | }; |
460 | |
461 | static const char * const adsp_ext_groups[] = { "gpio38" }; |
462 | static const char * const atest_bbrx0_groups[] = { "gpio37" }; |
463 | static const char * const atest_bbrx1_groups[] = { "gpio36" }; |
464 | static const char * const atest_char0_groups[] = { "gpio62" }; |
465 | static const char * const atest_char1_groups[] = { "gpio61" }; |
466 | static const char * const atest_char2_groups[] = { "gpio60" }; |
467 | static const char * const atest_char3_groups[] = { "gpio59" }; |
468 | static const char * const atest_char_groups[] = { "gpio63" }; |
469 | static const char * const atest_combodac_groups[] = { |
470 | "gpio32" , "gpio38" , "gpio39" , "gpio40" , "gpio41" , "gpio42" , "gpio43" , |
471 | "gpio44" , "gpio45" , "gpio47" , "gpio48" , "gpio66" , "gpio81" , "gpio83" , |
472 | "gpio84" , "gpio85" , "gpio86" , "gpio94" , "gpio95" , "gpio110" |
473 | }; |
474 | static const char * const atest_gpsadc0_groups[] = { "gpio65" }; |
475 | static const char * const atest_gpsadc1_groups[] = { "gpio79" }; |
476 | static const char * const atest_wlan0_groups[] = { "gpio96" }; |
477 | static const char * const atest_wlan1_groups[] = { "gpio97" }; |
478 | static const char * const bimc_dte0_groups[] = { "gpio6" , "gpio59" }; |
479 | static const char * const bimc_dte1_groups[] = { "gpio7" , "gpio60" }; |
480 | static const char * const blsp_i2c1_groups[] = { "gpio6" , "gpio7" }; |
481 | static const char * const blsp_i2c2_groups[] = { "gpio111" , "gpio112" }; |
482 | static const char * const blsp_i2c3_groups[] = { "gpio29" , "gpio30" }; |
483 | static const char * const blsp_i2c4_groups[] = { "gpio14" , "gpio15" }; |
484 | static const char * const blsp_i2c5_groups[] = { "gpio18" , "gpio19" }; |
485 | static const char * const blsp_i2c6_groups[] = { "gpio10" , "gpio11" }; |
486 | static const char * const blsp_spi1_cs1_groups[] = { "gpio97" }; |
487 | static const char * const blsp_spi1_cs2_groups[] = { "gpio37" }; |
488 | static const char * const blsp_spi1_cs3_groups[] = { "gpio65" }; |
489 | static const char * const blsp_spi1_groups[] = { |
490 | "gpio4" , "gpio5" , "gpio6" , "gpio7" |
491 | }; |
492 | static const char * const blsp_spi2_cs1_groups[] = { "gpio98" }; |
493 | static const char * const blsp_spi2_cs2_groups[] = { "gpio17" }; |
494 | static const char * const blsp_spi2_cs3_groups[] = { "gpio5" }; |
495 | static const char * const blsp_spi2_groups[] = { |
496 | "gpio20" , "gpio21" , "gpio111" , "gpio112" |
497 | }; |
498 | static const char * const blsp_spi3_cs1_groups[] = { "gpio95" }; |
499 | static const char * const blsp_spi3_cs2_groups[] = { "gpio65" }; |
500 | static const char * const blsp_spi3_cs3_groups[] = { "gpio4" }; |
501 | static const char * const blsp_spi3_groups[] = { |
502 | "gpio0" , "gpio1" , "gpio2" , "gpio3" |
503 | }; |
504 | static const char * const blsp_spi4_groups[] = { |
505 | "gpio12" , "gpio13" , "gpio14" , "gpio15" |
506 | }; |
507 | static const char * const blsp_spi5_groups[] = { |
508 | "gpio16" , "gpio17" , "gpio18" , "gpio19" |
509 | }; |
510 | static const char * const blsp_spi6_groups[] = { |
511 | "gpio8" , "gpio9" , "gpio10" , "gpio11" |
512 | }; |
513 | static const char * const blsp_uart1_groups[] = { |
514 | "gpio4" , "gpio5" , "gpio6" , "gpio7" |
515 | }; |
516 | static const char * const blsp_uart2_groups[] = { |
517 | "gpio20" , "gpio21" , "gpio111" , "gpio112" |
518 | }; |
519 | static const char * const blsp_uim1_groups[] = { "gpio4" , "gpio5" }; |
520 | static const char * const blsp_uim2_groups[] = { "gpio20" , "gpio21" }; |
521 | static const char * const cam_mclk_groups[] = { "gpio26" , "gpio27" }; |
522 | static const char * const cci_async_groups[] = { "gpio33" }; |
523 | static const char * const cci_timer0_groups[] = { "gpio31" }; |
524 | static const char * const cci_timer1_groups[] = { "gpio32" }; |
525 | static const char * const cci_timer2_groups[] = { "gpio38" }; |
526 | static const char * const cdc_pdm0_groups[] = { |
527 | "gpio59" , "gpio60" , "gpio61" , "gpio62" , "gpio63" , "gpio64" |
528 | }; |
529 | static const char * const dbg_out_groups[] = { "gpio10" }; |
530 | static const char * const dmic0_clk_groups[] = { "gpio4" }; |
531 | static const char * const dmic0_data_groups[] = { "gpio5" }; |
532 | static const char * const ebi0_wrcdc_groups[] = { "gpio64" }; |
533 | static const char * const ebi2_a_groups[] = { "gpio99" }; |
534 | static const char * const ebi2_lcd_groups[] = { |
535 | "gpio24" , "gpio24" , "gpio25" , "gpio95" |
536 | }; |
537 | static const char * const ext_lpass_groups[] = { "gpio45" }; |
538 | static const char * const gcc_gp1_clk_a_groups[] = { "gpio49" }; |
539 | static const char * const gcc_gp1_clk_b_groups[] = { "gpio14" }; |
540 | static const char * const gcc_gp2_clk_a_groups[] = { "gpio50" }; |
541 | static const char * const gcc_gp2_clk_b_groups[] = { "gpio12" }; |
542 | static const char * const gcc_gp3_clk_a_groups[] = { "gpio51" }; |
543 | static const char * const gcc_gp3_clk_b_groups[] = { "gpio13" }; |
544 | static const char * const gcc_plltest_groups[] = { "gpio66" , "gpio67" }; |
545 | static const char * const gpio_groups[] = { |
546 | "gpio0" , "gpio1" , "gpio2" , "gpio3" , "gpio4" , "gpio5" , "gpio6" , "gpio7" , |
547 | "gpio8" , "gpio9" , "gpio10" , "gpio11" , "gpio12" , "gpio13" , "gpio14" , |
548 | "gpio15" , "gpio16" , "gpio17" , "gpio18" , "gpio19" , "gpio20" , "gpio21" , |
549 | "gpio22" , "gpio23" , "gpio24" , "gpio25" , "gpio26" , "gpio27" , "gpio28" , |
550 | "gpio29" , "gpio30" , "gpio31" , "gpio32" , "gpio33" , "gpio34" , "gpio35" , |
551 | "gpio36" , "gpio37" , "gpio38" , "gpio39" , "gpio40" , "gpio41" , "gpio42" , |
552 | "gpio43" , "gpio44" , "gpio45" , "gpio46" , "gpio47" , "gpio48" , "gpio49" , |
553 | "gpio50" , "gpio51" , "gpio52" , "gpio53" , "gpio54" , "gpio55" , "gpio56" , |
554 | "gpio57" , "gpio58" , "gpio59" , "gpio60" , "gpio61" , "gpio62" , "gpio63" , |
555 | "gpio64" , "gpio65" , "gpio66" , "gpio67" , "gpio68" , "gpio69" , "gpio70" , |
556 | "gpio71" , "gpio72" , "gpio73" , "gpio74" , "gpio75" , "gpio76" , "gpio77" , |
557 | "gpio78" , "gpio79" , "gpio80" , "gpio81" , "gpio82" , "gpio83" , "gpio84" , |
558 | "gpio85" , "gpio86" , "gpio87" , "gpio88" , "gpio89" , "gpio90" , "gpio91" , |
559 | "gpio92" , "gpio93" , "gpio94" , "gpio95" , "gpio96" , "gpio97" , "gpio98" , |
560 | "gpio99" , "gpio100" , "gpio101" , "gpio102" , "gpio103" , "gpio104" , |
561 | "gpio105" , "gpio106" , "gpio107" , "gpio108" , "gpio109" , "gpio110" , |
562 | "gpio111" , "gpio112" |
563 | }; |
564 | static const char * const gsm0_tx_groups[] = { "gpio85" }; |
565 | static const char * const ldo_en_groups[] = { "gpio99" }; |
566 | static const char * const ldo_update_groups[] = { "gpio98" }; |
567 | static const char * const m_voc_groups[] = { "gpio8" , "gpio95" }; |
568 | static const char * const mdp_vsync_groups[] = { "gpio24" , "gpio25" }; |
569 | static const char * const modem_tsync_groups[] = { "gpio83" }; |
570 | static const char * const nav_pps_groups[] = { "gpio83" }; |
571 | static const char * const nav_tsync_groups[] = { "gpio83" }; |
572 | static const char * const pa_indicator_groups[] = { "gpio82" }; |
573 | static const char * const pbs0_groups[] = { "gpio90" }; |
574 | static const char * const pbs1_groups[] = { "gpio91" }; |
575 | static const char * const pbs2_groups[] = { "gpio92" }; |
576 | static const char * const pri_mi2s_data0_a_groups[] = { "gpio62" }; |
577 | static const char * const pri_mi2s_data0_b_groups[] = { "gpio95" }; |
578 | static const char * const pri_mi2s_data1_a_groups[] = { "gpio63" }; |
579 | static const char * const pri_mi2s_data1_b_groups[] = { "gpio96" }; |
580 | static const char * const pri_mi2s_mclk_a_groups[] = { "gpio59" }; |
581 | static const char * const pri_mi2s_mclk_b_groups[] = { "gpio98" }; |
582 | static const char * const pri_mi2s_sck_a_groups[] = { "gpio60" }; |
583 | static const char * const pri_mi2s_sck_b_groups[] = { "gpio94" }; |
584 | static const char * const pri_mi2s_ws_a_groups[] = { "gpio61" }; |
585 | static const char * const pri_mi2s_ws_b_groups[] = { "gpio110" }; |
586 | static const char * const prng_rosc_groups[] = { "gpio43" }; |
587 | static const char * const pwr_crypto_enabled_a_groups[] = { "gpio35" }; |
588 | static const char * const pwr_crypto_enabled_b_groups[] = { "gpio96" }; |
589 | static const char * const pwr_modem_enabled_a_groups[] = { "gpio28" }; |
590 | static const char * const pwr_modem_enabled_b_groups[] = { "gpio94" }; |
591 | static const char * const pwr_nav_enabled_a_groups[] = { "gpio34" }; |
592 | static const char * const pwr_nav_enabled_b_groups[] = { "gpio95" }; |
593 | static const char * const qdss_cti_trig_in_a0_groups[] = { "gpio20" }; |
594 | static const char * const qdss_cti_trig_in_a1_groups[] = { "gpio49" }; |
595 | static const char * const qdss_cti_trig_in_b0_groups[] = { "gpio21" }; |
596 | static const char * const qdss_cti_trig_in_b1_groups[] = { "gpio50" }; |
597 | static const char * const qdss_cti_trig_out_a0_groups[] = { "gpio23" }; |
598 | static const char * const qdss_cti_trig_out_a1_groups[] = { "gpio52" }; |
599 | static const char * const qdss_cti_trig_out_b0_groups[] = { "gpio22" }; |
600 | static const char * const qdss_cti_trig_out_b1_groups[] = { "gpio51" }; |
601 | static const char * const qdss_traceclk_a_groups[] = { "gpio46" }; |
602 | static const char * const qdss_tracectl_a_groups[] = { "gpio45" }; |
603 | static const char * const qdss_tracedata_a_groups[] = { |
604 | "gpio8" , "gpio9" , "gpio10" , "gpio39" , "gpio40" , "gpio41" , "gpio42" , |
605 | "gpio43" , "gpio47" , "gpio48" , "gpio58" , "gpio65" , "gpio94" , "gpio96" , |
606 | "gpio97" |
607 | }; |
608 | static const char * const qdss_tracedata_b_groups[] = { |
609 | "gpio14" , "gpio16" , "gpio17" , "gpio29" , "gpio30" , "gpio31" , "gpio32" , |
610 | "gpio33" , "gpio34" , "gpio35" , "gpio36" , "gpio37" , "gpio93" |
611 | }; |
612 | static const char * const sd_write_groups[] = { "gpio99" }; |
613 | static const char * const sec_mi2s_groups[] = { |
614 | "gpio0" , "gpio1" , "gpio2" , "gpio3" , "gpio98" |
615 | }; |
616 | static const char * const smb_int_groups[] = { "gpio58" }; |
617 | static const char * const ssbi0_groups[] = { "gpio88" }; |
618 | static const char * const ssbi1_groups[] = { "gpio89" }; |
619 | static const char * const uim1_clk_groups[] = { "gpio54" }; |
620 | static const char * const uim1_data_groups[] = { "gpio53" }; |
621 | static const char * const uim1_present_groups[] = { "gpio56" }; |
622 | static const char * const uim1_reset_groups[] = { "gpio55" }; |
623 | static const char * const uim2_clk_groups[] = { "gpio50" }; |
624 | static const char * const uim2_data_groups[] = { "gpio49" }; |
625 | static const char * const uim2_present_groups[] = { "gpio52" }; |
626 | static const char * const uim2_reset_groups[] = { "gpio51" }; |
627 | static const char * const uim3_clk_groups[] = { "gpio23" }; |
628 | static const char * const uim3_data_groups[] = { "gpio20" }; |
629 | static const char * const uim3_present_groups[] = { "gpio21" }; |
630 | static const char * const uim3_reset_groups[] = { "gpio22" }; |
631 | static const char * const uim_batt_groups[] = { "gpio57" }; |
632 | static const char * const wcss_bt_groups[] = { "gpio39" , "gpio47" , "gpio48" }; |
633 | static const char * const wcss_fm_groups[] = { "gpio45" , "gpio46" }; |
634 | static const char * const wcss_wlan_groups[] = { |
635 | "gpio40" , "gpio41" , "gpio42" , "gpio43" , "gpio44" |
636 | }; |
637 | |
638 | static const struct pinfunction msm8909_functions[] = { |
639 | MSM_PIN_FUNCTION(adsp_ext), |
640 | MSM_PIN_FUNCTION(atest_bbrx0), |
641 | MSM_PIN_FUNCTION(atest_bbrx1), |
642 | MSM_PIN_FUNCTION(atest_char), |
643 | MSM_PIN_FUNCTION(atest_char0), |
644 | MSM_PIN_FUNCTION(atest_char1), |
645 | MSM_PIN_FUNCTION(atest_char2), |
646 | MSM_PIN_FUNCTION(atest_char3), |
647 | MSM_PIN_FUNCTION(atest_combodac), |
648 | MSM_PIN_FUNCTION(atest_gpsadc0), |
649 | MSM_PIN_FUNCTION(atest_gpsadc1), |
650 | MSM_PIN_FUNCTION(atest_wlan0), |
651 | MSM_PIN_FUNCTION(atest_wlan1), |
652 | MSM_PIN_FUNCTION(bimc_dte0), |
653 | MSM_PIN_FUNCTION(bimc_dte1), |
654 | MSM_PIN_FUNCTION(blsp_i2c1), |
655 | MSM_PIN_FUNCTION(blsp_i2c2), |
656 | MSM_PIN_FUNCTION(blsp_i2c3), |
657 | MSM_PIN_FUNCTION(blsp_i2c4), |
658 | MSM_PIN_FUNCTION(blsp_i2c5), |
659 | MSM_PIN_FUNCTION(blsp_i2c6), |
660 | MSM_PIN_FUNCTION(blsp_spi1), |
661 | MSM_PIN_FUNCTION(blsp_spi1_cs1), |
662 | MSM_PIN_FUNCTION(blsp_spi1_cs2), |
663 | MSM_PIN_FUNCTION(blsp_spi1_cs3), |
664 | MSM_PIN_FUNCTION(blsp_spi2), |
665 | MSM_PIN_FUNCTION(blsp_spi2_cs1), |
666 | MSM_PIN_FUNCTION(blsp_spi2_cs2), |
667 | MSM_PIN_FUNCTION(blsp_spi2_cs3), |
668 | MSM_PIN_FUNCTION(blsp_spi3), |
669 | MSM_PIN_FUNCTION(blsp_spi3_cs1), |
670 | MSM_PIN_FUNCTION(blsp_spi3_cs2), |
671 | MSM_PIN_FUNCTION(blsp_spi3_cs3), |
672 | MSM_PIN_FUNCTION(blsp_spi4), |
673 | MSM_PIN_FUNCTION(blsp_spi5), |
674 | MSM_PIN_FUNCTION(blsp_spi6), |
675 | MSM_PIN_FUNCTION(blsp_uart1), |
676 | MSM_PIN_FUNCTION(blsp_uart2), |
677 | MSM_PIN_FUNCTION(blsp_uim1), |
678 | MSM_PIN_FUNCTION(blsp_uim2), |
679 | MSM_PIN_FUNCTION(cam_mclk), |
680 | MSM_PIN_FUNCTION(cci_async), |
681 | MSM_PIN_FUNCTION(cci_timer0), |
682 | MSM_PIN_FUNCTION(cci_timer1), |
683 | MSM_PIN_FUNCTION(cci_timer2), |
684 | MSM_PIN_FUNCTION(cdc_pdm0), |
685 | MSM_PIN_FUNCTION(dbg_out), |
686 | MSM_PIN_FUNCTION(dmic0_clk), |
687 | MSM_PIN_FUNCTION(dmic0_data), |
688 | MSM_PIN_FUNCTION(ebi0_wrcdc), |
689 | MSM_PIN_FUNCTION(ebi2_a), |
690 | MSM_PIN_FUNCTION(ebi2_lcd), |
691 | MSM_PIN_FUNCTION(ext_lpass), |
692 | MSM_PIN_FUNCTION(gcc_gp1_clk_a), |
693 | MSM_PIN_FUNCTION(gcc_gp1_clk_b), |
694 | MSM_PIN_FUNCTION(gcc_gp2_clk_a), |
695 | MSM_PIN_FUNCTION(gcc_gp2_clk_b), |
696 | MSM_PIN_FUNCTION(gcc_gp3_clk_a), |
697 | MSM_PIN_FUNCTION(gcc_gp3_clk_b), |
698 | MSM_PIN_FUNCTION(gcc_plltest), |
699 | MSM_PIN_FUNCTION(gpio), |
700 | MSM_PIN_FUNCTION(gsm0_tx), |
701 | MSM_PIN_FUNCTION(ldo_en), |
702 | MSM_PIN_FUNCTION(ldo_update), |
703 | MSM_PIN_FUNCTION(m_voc), |
704 | MSM_PIN_FUNCTION(mdp_vsync), |
705 | MSM_PIN_FUNCTION(modem_tsync), |
706 | MSM_PIN_FUNCTION(nav_pps), |
707 | MSM_PIN_FUNCTION(nav_tsync), |
708 | MSM_PIN_FUNCTION(pa_indicator), |
709 | MSM_PIN_FUNCTION(pbs0), |
710 | MSM_PIN_FUNCTION(pbs1), |
711 | MSM_PIN_FUNCTION(pbs2), |
712 | MSM_PIN_FUNCTION(pri_mi2s_data0_a), |
713 | MSM_PIN_FUNCTION(pri_mi2s_data0_b), |
714 | MSM_PIN_FUNCTION(pri_mi2s_data1_a), |
715 | MSM_PIN_FUNCTION(pri_mi2s_data1_b), |
716 | MSM_PIN_FUNCTION(pri_mi2s_mclk_a), |
717 | MSM_PIN_FUNCTION(pri_mi2s_mclk_b), |
718 | MSM_PIN_FUNCTION(pri_mi2s_sck_a), |
719 | MSM_PIN_FUNCTION(pri_mi2s_sck_b), |
720 | MSM_PIN_FUNCTION(pri_mi2s_ws_a), |
721 | MSM_PIN_FUNCTION(pri_mi2s_ws_b), |
722 | MSM_PIN_FUNCTION(prng_rosc), |
723 | MSM_PIN_FUNCTION(pwr_crypto_enabled_a), |
724 | MSM_PIN_FUNCTION(pwr_crypto_enabled_b), |
725 | MSM_PIN_FUNCTION(pwr_modem_enabled_a), |
726 | MSM_PIN_FUNCTION(pwr_modem_enabled_b), |
727 | MSM_PIN_FUNCTION(pwr_nav_enabled_a), |
728 | MSM_PIN_FUNCTION(pwr_nav_enabled_b), |
729 | MSM_PIN_FUNCTION(qdss_cti_trig_in_a0), |
730 | MSM_PIN_FUNCTION(qdss_cti_trig_in_a1), |
731 | MSM_PIN_FUNCTION(qdss_cti_trig_in_b0), |
732 | MSM_PIN_FUNCTION(qdss_cti_trig_in_b1), |
733 | MSM_PIN_FUNCTION(qdss_cti_trig_out_a0), |
734 | MSM_PIN_FUNCTION(qdss_cti_trig_out_a1), |
735 | MSM_PIN_FUNCTION(qdss_cti_trig_out_b0), |
736 | MSM_PIN_FUNCTION(qdss_cti_trig_out_b1), |
737 | MSM_PIN_FUNCTION(qdss_traceclk_a), |
738 | MSM_PIN_FUNCTION(qdss_tracectl_a), |
739 | MSM_PIN_FUNCTION(qdss_tracedata_a), |
740 | MSM_PIN_FUNCTION(qdss_tracedata_b), |
741 | MSM_PIN_FUNCTION(sd_write), |
742 | MSM_PIN_FUNCTION(sec_mi2s), |
743 | MSM_PIN_FUNCTION(smb_int), |
744 | MSM_PIN_FUNCTION(ssbi0), |
745 | MSM_PIN_FUNCTION(ssbi1), |
746 | MSM_PIN_FUNCTION(uim1_clk), |
747 | MSM_PIN_FUNCTION(uim1_data), |
748 | MSM_PIN_FUNCTION(uim1_present), |
749 | MSM_PIN_FUNCTION(uim1_reset), |
750 | MSM_PIN_FUNCTION(uim2_clk), |
751 | MSM_PIN_FUNCTION(uim2_data), |
752 | MSM_PIN_FUNCTION(uim2_present), |
753 | MSM_PIN_FUNCTION(uim2_reset), |
754 | MSM_PIN_FUNCTION(uim3_clk), |
755 | MSM_PIN_FUNCTION(uim3_data), |
756 | MSM_PIN_FUNCTION(uim3_present), |
757 | MSM_PIN_FUNCTION(uim3_reset), |
758 | MSM_PIN_FUNCTION(uim_batt), |
759 | MSM_PIN_FUNCTION(wcss_bt), |
760 | MSM_PIN_FUNCTION(wcss_fm), |
761 | MSM_PIN_FUNCTION(wcss_wlan), |
762 | }; |
763 | |
764 | static const struct msm_pingroup msm8909_groups[] = { |
765 | PINGROUP(0, blsp_spi3, sec_mi2s, _, _, _, _, _, _, _), |
766 | PINGROUP(1, blsp_spi3, sec_mi2s, _, _, _, _, _, _, _), |
767 | PINGROUP(2, blsp_spi3, sec_mi2s, _, _, _, _, _, _, _), |
768 | PINGROUP(3, blsp_spi3, sec_mi2s, _, _, _, _, _, _, _), |
769 | PINGROUP(4, blsp_spi1, blsp_uart1, blsp_uim1, blsp_spi3_cs3, dmic0_clk, _, _, _, _), |
770 | PINGROUP(5, blsp_spi1, blsp_uart1, blsp_uim1, blsp_spi2_cs3, dmic0_data, _, _, _, _), |
771 | PINGROUP(6, blsp_spi1, blsp_uart1, blsp_i2c1, _, _, _, _, _, bimc_dte0), |
772 | PINGROUP(7, blsp_spi1, blsp_uart1, blsp_i2c1, _, _, _, _, _, bimc_dte1), |
773 | PINGROUP(8, blsp_spi6, m_voc, _, _, _, _, _, qdss_tracedata_a, _), |
774 | PINGROUP(9, blsp_spi6, _, _, _, _, _, qdss_tracedata_a, _, _), |
775 | PINGROUP(10, blsp_spi6, blsp_i2c6, dbg_out, qdss_tracedata_a, _, _, _, _, _), |
776 | PINGROUP(11, blsp_spi6, blsp_i2c6, _, _, _, _, _, _, _), |
777 | PINGROUP(12, blsp_spi4, gcc_gp2_clk_b, _, _, _, _, _, _, _), |
778 | PINGROUP(13, blsp_spi4, gcc_gp3_clk_b, _, _, _, _, _, _, _), |
779 | PINGROUP(14, blsp_spi4, blsp_i2c4, gcc_gp1_clk_b, _, _, _, _, _, qdss_tracedata_b), |
780 | PINGROUP(15, blsp_spi4, blsp_i2c4, _, _, _, _, _, _, _), |
781 | PINGROUP(16, blsp_spi5, _, _, _, _, _, qdss_tracedata_b, _, _), |
782 | PINGROUP(17, blsp_spi5, blsp_spi2_cs2, _, _, _, _, _, qdss_tracedata_b, _), |
783 | PINGROUP(18, blsp_spi5, blsp_i2c5, _, _, _, _, _, _, _), |
784 | PINGROUP(19, blsp_spi5, blsp_i2c5, _, _, _, _, _, _, _), |
785 | PINGROUP(20, uim3_data, blsp_spi2, blsp_uart2, blsp_uim2, _, qdss_cti_trig_in_a0, _, _, _), |
786 | PINGROUP(21, uim3_present, blsp_spi2, blsp_uart2, blsp_uim2, _, qdss_cti_trig_in_b0, _, _, _), |
787 | PINGROUP(22, uim3_reset, _, qdss_cti_trig_out_b0, _, _, _, _, _, _), |
788 | PINGROUP(23, uim3_clk, qdss_cti_trig_out_a0, _, _, _, _, _, _, _), |
789 | PINGROUP(24, mdp_vsync, ebi2_lcd, ebi2_lcd, _, _, _, _, _, _), |
790 | PINGROUP(25, mdp_vsync, ebi2_lcd, _, _, _, _, _, _, _), |
791 | PINGROUP(26, cam_mclk, _, _, _, _, _, _, _, _), |
792 | PINGROUP(27, cam_mclk, _, _, _, _, _, _, _, _), |
793 | PINGROUP(28, _, pwr_modem_enabled_a, _, _, _, _, _, _, _), |
794 | PINGROUP(29, blsp_i2c3, _, _, _, _, _, qdss_tracedata_b, _, _), |
795 | PINGROUP(30, blsp_i2c3, _, _, _, _, _, qdss_tracedata_b, _, _), |
796 | PINGROUP(31, cci_timer0, _, _, _, _, _, _, qdss_tracedata_b, _), |
797 | PINGROUP(32, cci_timer1, _, qdss_tracedata_b, _, atest_combodac, _, _, _, _), |
798 | PINGROUP(33, cci_async, qdss_tracedata_b, _, _, _, _, _, _, _), |
799 | PINGROUP(34, pwr_nav_enabled_a, qdss_tracedata_b, _, _, _, _, _, _, _), |
800 | PINGROUP(35, pwr_crypto_enabled_a, qdss_tracedata_b, _, _, _, _, _, _, _), |
801 | PINGROUP(36, qdss_tracedata_b, _, atest_bbrx1, _, _, _, _, _, _), |
802 | PINGROUP(37, blsp_spi1_cs2, qdss_tracedata_b, _, atest_bbrx0, _, _, _, _, _), |
803 | PINGROUP(38, cci_timer2, adsp_ext, _, atest_combodac, _, _, _, _, _), |
804 | PINGROUP(39, wcss_bt, qdss_tracedata_a, _, atest_combodac, _, _, _, _, _), |
805 | PINGROUP(40, wcss_wlan, qdss_tracedata_a, _, atest_combodac, _, _, _, _, _), |
806 | PINGROUP(41, wcss_wlan, qdss_tracedata_a, _, atest_combodac, _, _, _, _, _), |
807 | PINGROUP(42, wcss_wlan, qdss_tracedata_a, _, atest_combodac, _, _, _, _, _), |
808 | PINGROUP(43, wcss_wlan, prng_rosc, qdss_tracedata_a, _, atest_combodac, _, _, _, _), |
809 | PINGROUP(44, wcss_wlan, _, atest_combodac, _, _, _, _, _, _), |
810 | PINGROUP(45, wcss_fm, ext_lpass, qdss_tracectl_a, _, atest_combodac, _, _, _, _), |
811 | PINGROUP(46, wcss_fm, qdss_traceclk_a, _, _, _, _, _, _, _), |
812 | PINGROUP(47, wcss_bt, qdss_tracedata_a, _, atest_combodac, _, _, _, _, _), |
813 | PINGROUP(48, wcss_bt, qdss_tracedata_a, _, atest_combodac, _, _, _, _, _), |
814 | PINGROUP(49, uim2_data, gcc_gp1_clk_a, qdss_cti_trig_in_a1, _, _, _, _, _, _), |
815 | PINGROUP(50, uim2_clk, gcc_gp2_clk_a, qdss_cti_trig_in_b1, _, _, _, _, _, _), |
816 | PINGROUP(51, uim2_reset, gcc_gp3_clk_a, qdss_cti_trig_out_b1, _, _, _, _, _, _), |
817 | PINGROUP(52, uim2_present, qdss_cti_trig_out_a1, _, _, _, _, _, _, _), |
818 | PINGROUP(53, uim1_data, _, _, _, _, _, _, _, _), |
819 | PINGROUP(54, uim1_clk, _, _, _, _, _, _, _, _), |
820 | PINGROUP(55, uim1_reset, _, _, _, _, _, _, _, _), |
821 | PINGROUP(56, uim1_present, _, _, _, _, _, _, _, _), |
822 | PINGROUP(57, uim_batt, _, _, _, _, _, _, _, _), |
823 | PINGROUP(58, qdss_tracedata_a, smb_int, _, _, _, _, _, _, _), |
824 | PINGROUP(59, cdc_pdm0, pri_mi2s_mclk_a, atest_char3, _, _, _, _, _, bimc_dte0), |
825 | PINGROUP(60, cdc_pdm0, pri_mi2s_sck_a, atest_char2, _, _, _, _, _, bimc_dte1), |
826 | PINGROUP(61, cdc_pdm0, pri_mi2s_ws_a, atest_char1, _, _, _, _, _, _), |
827 | PINGROUP(62, cdc_pdm0, pri_mi2s_data0_a, atest_char0, _, _, _, _, _, _), |
828 | PINGROUP(63, cdc_pdm0, pri_mi2s_data1_a, atest_char, _, _, _, _, _, _), |
829 | PINGROUP(64, cdc_pdm0, _, _, _, _, _, ebi0_wrcdc, _, _), |
830 | PINGROUP(65, blsp_spi3_cs2, blsp_spi1_cs3, qdss_tracedata_a, _, atest_gpsadc0, _, _, _, _), |
831 | PINGROUP(66, _, gcc_plltest, _, atest_combodac, _, _, _, _, _), |
832 | PINGROUP(67, _, gcc_plltest, _, _, _, _, _, _, _), |
833 | PINGROUP(68, _, _, _, _, _, _, _, _, _), |
834 | PINGROUP(69, _, _, _, _, _, _, _, _, _), |
835 | PINGROUP(70, _, _, _, _, _, _, _, _, _), |
836 | PINGROUP(71, _, _, _, _, _, _, _, _, _), |
837 | PINGROUP(72, _, _, _, _, _, _, _, _, _), |
838 | PINGROUP(73, _, _, _, _, _, _, _, _, _), |
839 | PINGROUP(74, _, _, _, _, _, _, _, _, _), |
840 | PINGROUP(75, _, _, _, _, _, _, _, _, _), |
841 | PINGROUP(76, _, _, _, _, _, _, _, _, _), |
842 | PINGROUP(77, _, _, _, _, _, _, _, _, _), |
843 | PINGROUP(78, _, _, _, _, _, _, _, _, _), |
844 | PINGROUP(79, _, _, atest_gpsadc1, _, _, _, _, _, _), |
845 | PINGROUP(80, _, _, _, _, _, _, _, _, _), |
846 | PINGROUP(81, _, _, _, atest_combodac, _, _, _, _, _), |
847 | PINGROUP(82, _, pa_indicator, _, _, _, _, _, _, _), |
848 | PINGROUP(83, _, modem_tsync, nav_tsync, nav_pps, _, atest_combodac, _, _, _), |
849 | PINGROUP(84, _, _, atest_combodac, _, _, _, _, _, _), |
850 | PINGROUP(85, gsm0_tx, _, _, atest_combodac, _, _, _, _, _), |
851 | PINGROUP(86, _, _, atest_combodac, _, _, _, _, _, _), |
852 | PINGROUP(87, _, _, _, _, _, _, _, _, _), |
853 | PINGROUP(88, _, ssbi0, _, _, _, _, _, _, _), |
854 | PINGROUP(89, _, ssbi1, _, _, _, _, _, _, _), |
855 | PINGROUP(90, pbs0, _, _, _, _, _, _, _, _), |
856 | PINGROUP(91, pbs1, _, _, _, _, _, _, _, _), |
857 | PINGROUP(92, pbs2, _, _, _, _, _, _, _, _), |
858 | PINGROUP(93, qdss_tracedata_b, _, _, _, _, _, _, _, _), |
859 | PINGROUP(94, pri_mi2s_sck_b, pwr_modem_enabled_b, qdss_tracedata_a, _, atest_combodac, _, _, _, _), |
860 | PINGROUP(95, blsp_spi3_cs1, pri_mi2s_data0_b, ebi2_lcd, m_voc, pwr_nav_enabled_b, _, atest_combodac, _, _), |
861 | PINGROUP(96, pri_mi2s_data1_b, _, pwr_crypto_enabled_b, qdss_tracedata_a, _, atest_wlan0, _, _, _), |
862 | PINGROUP(97, blsp_spi1_cs1, qdss_tracedata_a, _, atest_wlan1, _, _, _, _, _), |
863 | PINGROUP(98, sec_mi2s, pri_mi2s_mclk_b, blsp_spi2_cs1, ldo_update, _, _, _, _, _), |
864 | PINGROUP(99, ebi2_a, sd_write, ldo_en, _, _, _, _, _, _), |
865 | PINGROUP(100, _, _, _, _, _, _, _, _, _), |
866 | PINGROUP(101, _, _, _, _, _, _, _, _, _), |
867 | PINGROUP(102, _, _, _, _, _, _, _, _, _), |
868 | PINGROUP(103, _, _, _, _, _, _, _, _, _), |
869 | PINGROUP(104, _, _, _, _, _, _, _, _, _), |
870 | PINGROUP(105, _, _, _, _, _, _, _, _, _), |
871 | PINGROUP(106, _, _, _, _, _, _, _, _, _), |
872 | PINGROUP(107, _, _, _, _, _, _, _, _, _), |
873 | PINGROUP(108, _, _, _, _, _, _, _, _, _), |
874 | PINGROUP(109, _, _, _, _, _, _, _, _, _), |
875 | PINGROUP(110, pri_mi2s_ws_b, _, atest_combodac, _, _, _, _, _, _), |
876 | PINGROUP(111, blsp_spi2, blsp_uart2, blsp_i2c2, _, _, _, _, _, _), |
877 | PINGROUP(112, blsp_spi2, blsp_uart2, blsp_i2c2, _, _, _, _, _, _), |
878 | SDC_QDSD_PINGROUP(sdc1_clk, 0x10a000, 13, 6), |
879 | SDC_QDSD_PINGROUP(sdc1_cmd, 0x10a000, 11, 3), |
880 | SDC_QDSD_PINGROUP(sdc1_data, 0x10a000, 9, 0), |
881 | SDC_QDSD_PINGROUP(sdc2_clk, 0x109000, 14, 6), |
882 | SDC_QDSD_PINGROUP(sdc2_cmd, 0x109000, 11, 3), |
883 | SDC_QDSD_PINGROUP(sdc2_data, 0x109000, 9, 0), |
884 | SDC_QDSD_PINGROUP(qdsd_clk, 0x19c000, 3, 0), |
885 | SDC_QDSD_PINGROUP(qdsd_cmd, 0x19c000, 8, 5), |
886 | SDC_QDSD_PINGROUP(qdsd_data0, 0x19c000, 13, 10), |
887 | SDC_QDSD_PINGROUP(qdsd_data1, 0x19c000, 18, 15), |
888 | SDC_QDSD_PINGROUP(qdsd_data2, 0x19c000, 23, 20), |
889 | SDC_QDSD_PINGROUP(qdsd_data3, 0x19c000, 28, 25), |
890 | }; |
891 | |
892 | static const struct msm_gpio_wakeirq_map msm8909_mpm_map[] = { |
893 | { 65, 3 }, { 5, 4 }, { 11, 5 }, { 12, 6 }, { 64, 7 }, { 58, 8 }, |
894 | { 50, 9 }, { 13, 10 }, { 49, 11 }, { 20, 12 }, { 21, 13 }, { 25, 14 }, |
895 | { 46, 15 }, { 45, 16 }, { 28, 17 }, { 44, 18 }, { 31, 19 }, { 43, 20 }, |
896 | { 42, 21 }, { 34, 22 }, { 35, 23 }, { 36, 24 }, { 37, 25 }, { 38, 26 }, |
897 | { 39, 27 }, { 40, 28 }, { 41, 29 }, { 90, 30 }, { 91, 32 }, { 92, 33 }, |
898 | { 94, 34 }, { 95, 35 }, { 96, 36 }, { 97, 37 }, { 98, 38 }, |
899 | { 110, 39 }, { 111, 40 }, { 112, 41 }, { 105, 42 }, { 107, 43 }, |
900 | { 47, 50 }, { 48, 51 }, |
901 | }; |
902 | |
903 | static const struct msm_pinctrl_soc_data msm8909_pinctrl = { |
904 | .pins = msm8909_pins, |
905 | .npins = ARRAY_SIZE(msm8909_pins), |
906 | .functions = msm8909_functions, |
907 | .nfunctions = ARRAY_SIZE(msm8909_functions), |
908 | .groups = msm8909_groups, |
909 | .ngroups = ARRAY_SIZE(msm8909_groups), |
910 | .ngpios = 113, |
911 | .wakeirq_map = msm8909_mpm_map, |
912 | .nwakeirq_map = ARRAY_SIZE(msm8909_mpm_map), |
913 | }; |
914 | |
915 | static int msm8909_pinctrl_probe(struct platform_device *pdev) |
916 | { |
917 | return msm_pinctrl_probe(pdev, soc_data: &msm8909_pinctrl); |
918 | } |
919 | |
920 | static const struct of_device_id msm8909_pinctrl_of_match[] = { |
921 | { .compatible = "qcom,msm8909-tlmm" , }, |
922 | { }, |
923 | }; |
924 | MODULE_DEVICE_TABLE(of, msm8909_pinctrl_of_match); |
925 | |
926 | static struct platform_driver msm8909_pinctrl_driver = { |
927 | .driver = { |
928 | .name = "msm8909-pinctrl" , |
929 | .of_match_table = msm8909_pinctrl_of_match, |
930 | }, |
931 | .probe = msm8909_pinctrl_probe, |
932 | .remove_new = msm_pinctrl_remove, |
933 | }; |
934 | |
935 | static int __init msm8909_pinctrl_init(void) |
936 | { |
937 | return platform_driver_register(&msm8909_pinctrl_driver); |
938 | } |
939 | arch_initcall(msm8909_pinctrl_init); |
940 | |
941 | static void __exit msm8909_pinctrl_exit(void) |
942 | { |
943 | platform_driver_unregister(&msm8909_pinctrl_driver); |
944 | } |
945 | module_exit(msm8909_pinctrl_exit); |
946 | |
947 | MODULE_DESCRIPTION("Qualcomm MSM8909 TLMM pinctrl driver" ); |
948 | MODULE_LICENSE("GPL" ); |
949 | |