1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. |
4 | */ |
5 | |
6 | #include <linux/module.h> |
7 | #include <linux/of.h> |
8 | #include <linux/platform_device.h> |
9 | |
10 | #include "pinctrl-msm.h" |
11 | |
12 | #define NORTH 0x500000 |
13 | #define WEST 0x100000 |
14 | #define EAST 0x900000 |
15 | |
16 | #define PINGROUP(id, base, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ |
17 | { \ |
18 | .grp = PINCTRL_PINGROUP("gpio" #id, \ |
19 | gpio##id##_pins, \ |
20 | ARRAY_SIZE(gpio##id##_pins)), \ |
21 | .funcs = (int[]){ \ |
22 | msm_mux_gpio, /* gpio mode */ \ |
23 | msm_mux_##f1, \ |
24 | msm_mux_##f2, \ |
25 | msm_mux_##f3, \ |
26 | msm_mux_##f4, \ |
27 | msm_mux_##f5, \ |
28 | msm_mux_##f6, \ |
29 | msm_mux_##f7, \ |
30 | msm_mux_##f8, \ |
31 | msm_mux_##f9 \ |
32 | }, \ |
33 | .nfuncs = 10, \ |
34 | .ctl_reg = base + 0x1000 * id, \ |
35 | .io_reg = base + 0x4 + 0x1000 * id, \ |
36 | .intr_cfg_reg = base + 0x8 + 0x1000 * id, \ |
37 | .intr_status_reg = base + 0xc + 0x1000 * id, \ |
38 | .intr_target_reg = base + 0x8 + 0x1000 * id, \ |
39 | .mux_bit = 2, \ |
40 | .pull_bit = 0, \ |
41 | .drv_bit = 6, \ |
42 | .oe_bit = 9, \ |
43 | .in_bit = 0, \ |
44 | .out_bit = 1, \ |
45 | .intr_enable_bit = 0, \ |
46 | .intr_status_bit = 0, \ |
47 | .intr_target_bit = 5, \ |
48 | .intr_target_kpss_val = 3, \ |
49 | .intr_raw_status_bit = 4, \ |
50 | .intr_polarity_bit = 1, \ |
51 | .intr_detection_bit = 2, \ |
52 | .intr_detection_width = 2, \ |
53 | } |
54 | |
55 | #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ |
56 | { \ |
57 | .grp = PINCTRL_PINGROUP(#pg_name, \ |
58 | pg_name##_pins, \ |
59 | ARRAY_SIZE(pg_name##_pins)), \ |
60 | .ctl_reg = ctl, \ |
61 | .io_reg = 0, \ |
62 | .intr_cfg_reg = 0, \ |
63 | .intr_status_reg = 0, \ |
64 | .intr_target_reg = 0, \ |
65 | .mux_bit = -1, \ |
66 | .pull_bit = pull, \ |
67 | .drv_bit = drv, \ |
68 | .oe_bit = -1, \ |
69 | .in_bit = -1, \ |
70 | .out_bit = -1, \ |
71 | .intr_enable_bit = -1, \ |
72 | .intr_status_bit = -1, \ |
73 | .intr_target_bit = -1, \ |
74 | .intr_raw_status_bit = -1, \ |
75 | .intr_polarity_bit = -1, \ |
76 | .intr_detection_bit = -1, \ |
77 | .intr_detection_width = -1, \ |
78 | } |
79 | |
80 | #define UFS_RESET(pg_name, offset) \ |
81 | { \ |
82 | .grp = PINCTRL_PINGROUP(#pg_name, \ |
83 | pg_name##_pins, \ |
84 | ARRAY_SIZE(pg_name##_pins)), \ |
85 | .ctl_reg = offset, \ |
86 | .io_reg = offset + 0x4, \ |
87 | .intr_cfg_reg = 0, \ |
88 | .intr_status_reg = 0, \ |
89 | .intr_target_reg = 0, \ |
90 | .mux_bit = -1, \ |
91 | .pull_bit = 3, \ |
92 | .drv_bit = 0, \ |
93 | .oe_bit = -1, \ |
94 | .in_bit = -1, \ |
95 | .out_bit = 0, \ |
96 | .intr_enable_bit = -1, \ |
97 | .intr_status_bit = -1, \ |
98 | .intr_target_bit = -1, \ |
99 | .intr_raw_status_bit = -1, \ |
100 | .intr_polarity_bit = -1, \ |
101 | .intr_detection_bit = -1, \ |
102 | .intr_detection_width = -1, \ |
103 | } |
104 | |
105 | static const struct pinctrl_pin_desc msm8998_pins[] = { |
106 | PINCTRL_PIN(0, "GPIO_0" ), |
107 | PINCTRL_PIN(1, "GPIO_1" ), |
108 | PINCTRL_PIN(2, "GPIO_2" ), |
109 | PINCTRL_PIN(3, "GPIO_3" ), |
110 | PINCTRL_PIN(4, "GPIO_4" ), |
111 | PINCTRL_PIN(5, "GPIO_5" ), |
112 | PINCTRL_PIN(6, "GPIO_6" ), |
113 | PINCTRL_PIN(7, "GPIO_7" ), |
114 | PINCTRL_PIN(8, "GPIO_8" ), |
115 | PINCTRL_PIN(9, "GPIO_9" ), |
116 | PINCTRL_PIN(10, "GPIO_10" ), |
117 | PINCTRL_PIN(11, "GPIO_11" ), |
118 | PINCTRL_PIN(12, "GPIO_12" ), |
119 | PINCTRL_PIN(13, "GPIO_13" ), |
120 | PINCTRL_PIN(14, "GPIO_14" ), |
121 | PINCTRL_PIN(15, "GPIO_15" ), |
122 | PINCTRL_PIN(16, "GPIO_16" ), |
123 | PINCTRL_PIN(17, "GPIO_17" ), |
124 | PINCTRL_PIN(18, "GPIO_18" ), |
125 | PINCTRL_PIN(19, "GPIO_19" ), |
126 | PINCTRL_PIN(20, "GPIO_20" ), |
127 | PINCTRL_PIN(21, "GPIO_21" ), |
128 | PINCTRL_PIN(22, "GPIO_22" ), |
129 | PINCTRL_PIN(23, "GPIO_23" ), |
130 | PINCTRL_PIN(24, "GPIO_24" ), |
131 | PINCTRL_PIN(25, "GPIO_25" ), |
132 | PINCTRL_PIN(26, "GPIO_26" ), |
133 | PINCTRL_PIN(27, "GPIO_27" ), |
134 | PINCTRL_PIN(28, "GPIO_28" ), |
135 | PINCTRL_PIN(29, "GPIO_29" ), |
136 | PINCTRL_PIN(30, "GPIO_30" ), |
137 | PINCTRL_PIN(31, "GPIO_31" ), |
138 | PINCTRL_PIN(32, "GPIO_32" ), |
139 | PINCTRL_PIN(33, "GPIO_33" ), |
140 | PINCTRL_PIN(34, "GPIO_34" ), |
141 | PINCTRL_PIN(35, "GPIO_35" ), |
142 | PINCTRL_PIN(36, "GPIO_36" ), |
143 | PINCTRL_PIN(37, "GPIO_37" ), |
144 | PINCTRL_PIN(38, "GPIO_38" ), |
145 | PINCTRL_PIN(39, "GPIO_39" ), |
146 | PINCTRL_PIN(40, "GPIO_40" ), |
147 | PINCTRL_PIN(41, "GPIO_41" ), |
148 | PINCTRL_PIN(42, "GPIO_42" ), |
149 | PINCTRL_PIN(43, "GPIO_43" ), |
150 | PINCTRL_PIN(44, "GPIO_44" ), |
151 | PINCTRL_PIN(45, "GPIO_45" ), |
152 | PINCTRL_PIN(46, "GPIO_46" ), |
153 | PINCTRL_PIN(47, "GPIO_47" ), |
154 | PINCTRL_PIN(48, "GPIO_48" ), |
155 | PINCTRL_PIN(49, "GPIO_49" ), |
156 | PINCTRL_PIN(50, "GPIO_50" ), |
157 | PINCTRL_PIN(51, "GPIO_51" ), |
158 | PINCTRL_PIN(52, "GPIO_52" ), |
159 | PINCTRL_PIN(53, "GPIO_53" ), |
160 | PINCTRL_PIN(54, "GPIO_54" ), |
161 | PINCTRL_PIN(55, "GPIO_55" ), |
162 | PINCTRL_PIN(56, "GPIO_56" ), |
163 | PINCTRL_PIN(57, "GPIO_57" ), |
164 | PINCTRL_PIN(58, "GPIO_58" ), |
165 | PINCTRL_PIN(59, "GPIO_59" ), |
166 | PINCTRL_PIN(60, "GPIO_60" ), |
167 | PINCTRL_PIN(61, "GPIO_61" ), |
168 | PINCTRL_PIN(62, "GPIO_62" ), |
169 | PINCTRL_PIN(63, "GPIO_63" ), |
170 | PINCTRL_PIN(64, "GPIO_64" ), |
171 | PINCTRL_PIN(65, "GPIO_65" ), |
172 | PINCTRL_PIN(66, "GPIO_66" ), |
173 | PINCTRL_PIN(67, "GPIO_67" ), |
174 | PINCTRL_PIN(68, "GPIO_68" ), |
175 | PINCTRL_PIN(69, "GPIO_69" ), |
176 | PINCTRL_PIN(70, "GPIO_70" ), |
177 | PINCTRL_PIN(71, "GPIO_71" ), |
178 | PINCTRL_PIN(72, "GPIO_72" ), |
179 | PINCTRL_PIN(73, "GPIO_73" ), |
180 | PINCTRL_PIN(74, "GPIO_74" ), |
181 | PINCTRL_PIN(75, "GPIO_75" ), |
182 | PINCTRL_PIN(76, "GPIO_76" ), |
183 | PINCTRL_PIN(77, "GPIO_77" ), |
184 | PINCTRL_PIN(78, "GPIO_78" ), |
185 | PINCTRL_PIN(79, "GPIO_79" ), |
186 | PINCTRL_PIN(80, "GPIO_80" ), |
187 | PINCTRL_PIN(81, "GPIO_81" ), |
188 | PINCTRL_PIN(82, "GPIO_82" ), |
189 | PINCTRL_PIN(83, "GPIO_83" ), |
190 | PINCTRL_PIN(84, "GPIO_84" ), |
191 | PINCTRL_PIN(85, "GPIO_85" ), |
192 | PINCTRL_PIN(86, "GPIO_86" ), |
193 | PINCTRL_PIN(87, "GPIO_87" ), |
194 | PINCTRL_PIN(88, "GPIO_88" ), |
195 | PINCTRL_PIN(89, "GPIO_89" ), |
196 | PINCTRL_PIN(90, "GPIO_90" ), |
197 | PINCTRL_PIN(91, "GPIO_91" ), |
198 | PINCTRL_PIN(92, "GPIO_92" ), |
199 | PINCTRL_PIN(93, "GPIO_93" ), |
200 | PINCTRL_PIN(94, "GPIO_94" ), |
201 | PINCTRL_PIN(95, "GPIO_95" ), |
202 | PINCTRL_PIN(96, "GPIO_96" ), |
203 | PINCTRL_PIN(97, "GPIO_97" ), |
204 | PINCTRL_PIN(98, "GPIO_98" ), |
205 | PINCTRL_PIN(99, "GPIO_99" ), |
206 | PINCTRL_PIN(100, "GPIO_100" ), |
207 | PINCTRL_PIN(101, "GPIO_101" ), |
208 | PINCTRL_PIN(102, "GPIO_102" ), |
209 | PINCTRL_PIN(103, "GPIO_103" ), |
210 | PINCTRL_PIN(104, "GPIO_104" ), |
211 | PINCTRL_PIN(105, "GPIO_105" ), |
212 | PINCTRL_PIN(106, "GPIO_106" ), |
213 | PINCTRL_PIN(107, "GPIO_107" ), |
214 | PINCTRL_PIN(108, "GPIO_108" ), |
215 | PINCTRL_PIN(109, "GPIO_109" ), |
216 | PINCTRL_PIN(110, "GPIO_110" ), |
217 | PINCTRL_PIN(111, "GPIO_111" ), |
218 | PINCTRL_PIN(112, "GPIO_112" ), |
219 | PINCTRL_PIN(113, "GPIO_113" ), |
220 | PINCTRL_PIN(114, "GPIO_114" ), |
221 | PINCTRL_PIN(115, "GPIO_115" ), |
222 | PINCTRL_PIN(116, "GPIO_116" ), |
223 | PINCTRL_PIN(117, "GPIO_117" ), |
224 | PINCTRL_PIN(118, "GPIO_118" ), |
225 | PINCTRL_PIN(119, "GPIO_119" ), |
226 | PINCTRL_PIN(120, "GPIO_120" ), |
227 | PINCTRL_PIN(121, "GPIO_121" ), |
228 | PINCTRL_PIN(122, "GPIO_122" ), |
229 | PINCTRL_PIN(123, "GPIO_123" ), |
230 | PINCTRL_PIN(124, "GPIO_124" ), |
231 | PINCTRL_PIN(125, "GPIO_125" ), |
232 | PINCTRL_PIN(126, "GPIO_126" ), |
233 | PINCTRL_PIN(127, "GPIO_127" ), |
234 | PINCTRL_PIN(128, "GPIO_128" ), |
235 | PINCTRL_PIN(129, "GPIO_129" ), |
236 | PINCTRL_PIN(130, "GPIO_130" ), |
237 | PINCTRL_PIN(131, "GPIO_131" ), |
238 | PINCTRL_PIN(132, "GPIO_132" ), |
239 | PINCTRL_PIN(133, "GPIO_133" ), |
240 | PINCTRL_PIN(134, "GPIO_134" ), |
241 | PINCTRL_PIN(135, "GPIO_135" ), |
242 | PINCTRL_PIN(136, "GPIO_136" ), |
243 | PINCTRL_PIN(137, "GPIO_137" ), |
244 | PINCTRL_PIN(138, "GPIO_138" ), |
245 | PINCTRL_PIN(139, "GPIO_139" ), |
246 | PINCTRL_PIN(140, "GPIO_140" ), |
247 | PINCTRL_PIN(141, "GPIO_141" ), |
248 | PINCTRL_PIN(142, "GPIO_142" ), |
249 | PINCTRL_PIN(143, "GPIO_143" ), |
250 | PINCTRL_PIN(144, "GPIO_144" ), |
251 | PINCTRL_PIN(145, "GPIO_145" ), |
252 | PINCTRL_PIN(146, "GPIO_146" ), |
253 | PINCTRL_PIN(147, "GPIO_147" ), |
254 | PINCTRL_PIN(148, "GPIO_148" ), |
255 | PINCTRL_PIN(149, "GPIO_149" ), |
256 | PINCTRL_PIN(150, "SDC2_CLK" ), |
257 | PINCTRL_PIN(151, "SDC2_CMD" ), |
258 | PINCTRL_PIN(152, "SDC2_DATA" ), |
259 | PINCTRL_PIN(153, "UFS_RESET" ), |
260 | }; |
261 | |
262 | #define DECLARE_MSM_GPIO_PINS(pin) \ |
263 | static const unsigned int gpio##pin##_pins[] = { pin } |
264 | DECLARE_MSM_GPIO_PINS(0); |
265 | DECLARE_MSM_GPIO_PINS(1); |
266 | DECLARE_MSM_GPIO_PINS(2); |
267 | DECLARE_MSM_GPIO_PINS(3); |
268 | DECLARE_MSM_GPIO_PINS(4); |
269 | DECLARE_MSM_GPIO_PINS(5); |
270 | DECLARE_MSM_GPIO_PINS(6); |
271 | DECLARE_MSM_GPIO_PINS(7); |
272 | DECLARE_MSM_GPIO_PINS(8); |
273 | DECLARE_MSM_GPIO_PINS(9); |
274 | DECLARE_MSM_GPIO_PINS(10); |
275 | DECLARE_MSM_GPIO_PINS(11); |
276 | DECLARE_MSM_GPIO_PINS(12); |
277 | DECLARE_MSM_GPIO_PINS(13); |
278 | DECLARE_MSM_GPIO_PINS(14); |
279 | DECLARE_MSM_GPIO_PINS(15); |
280 | DECLARE_MSM_GPIO_PINS(16); |
281 | DECLARE_MSM_GPIO_PINS(17); |
282 | DECLARE_MSM_GPIO_PINS(18); |
283 | DECLARE_MSM_GPIO_PINS(19); |
284 | DECLARE_MSM_GPIO_PINS(20); |
285 | DECLARE_MSM_GPIO_PINS(21); |
286 | DECLARE_MSM_GPIO_PINS(22); |
287 | DECLARE_MSM_GPIO_PINS(23); |
288 | DECLARE_MSM_GPIO_PINS(24); |
289 | DECLARE_MSM_GPIO_PINS(25); |
290 | DECLARE_MSM_GPIO_PINS(26); |
291 | DECLARE_MSM_GPIO_PINS(27); |
292 | DECLARE_MSM_GPIO_PINS(28); |
293 | DECLARE_MSM_GPIO_PINS(29); |
294 | DECLARE_MSM_GPIO_PINS(30); |
295 | DECLARE_MSM_GPIO_PINS(31); |
296 | DECLARE_MSM_GPIO_PINS(32); |
297 | DECLARE_MSM_GPIO_PINS(33); |
298 | DECLARE_MSM_GPIO_PINS(34); |
299 | DECLARE_MSM_GPIO_PINS(35); |
300 | DECLARE_MSM_GPIO_PINS(36); |
301 | DECLARE_MSM_GPIO_PINS(37); |
302 | DECLARE_MSM_GPIO_PINS(38); |
303 | DECLARE_MSM_GPIO_PINS(39); |
304 | DECLARE_MSM_GPIO_PINS(40); |
305 | DECLARE_MSM_GPIO_PINS(41); |
306 | DECLARE_MSM_GPIO_PINS(42); |
307 | DECLARE_MSM_GPIO_PINS(43); |
308 | DECLARE_MSM_GPIO_PINS(44); |
309 | DECLARE_MSM_GPIO_PINS(45); |
310 | DECLARE_MSM_GPIO_PINS(46); |
311 | DECLARE_MSM_GPIO_PINS(47); |
312 | DECLARE_MSM_GPIO_PINS(48); |
313 | DECLARE_MSM_GPIO_PINS(49); |
314 | DECLARE_MSM_GPIO_PINS(50); |
315 | DECLARE_MSM_GPIO_PINS(51); |
316 | DECLARE_MSM_GPIO_PINS(52); |
317 | DECLARE_MSM_GPIO_PINS(53); |
318 | DECLARE_MSM_GPIO_PINS(54); |
319 | DECLARE_MSM_GPIO_PINS(55); |
320 | DECLARE_MSM_GPIO_PINS(56); |
321 | DECLARE_MSM_GPIO_PINS(57); |
322 | DECLARE_MSM_GPIO_PINS(58); |
323 | DECLARE_MSM_GPIO_PINS(59); |
324 | DECLARE_MSM_GPIO_PINS(60); |
325 | DECLARE_MSM_GPIO_PINS(61); |
326 | DECLARE_MSM_GPIO_PINS(62); |
327 | DECLARE_MSM_GPIO_PINS(63); |
328 | DECLARE_MSM_GPIO_PINS(64); |
329 | DECLARE_MSM_GPIO_PINS(65); |
330 | DECLARE_MSM_GPIO_PINS(66); |
331 | DECLARE_MSM_GPIO_PINS(67); |
332 | DECLARE_MSM_GPIO_PINS(68); |
333 | DECLARE_MSM_GPIO_PINS(69); |
334 | DECLARE_MSM_GPIO_PINS(70); |
335 | DECLARE_MSM_GPIO_PINS(71); |
336 | DECLARE_MSM_GPIO_PINS(72); |
337 | DECLARE_MSM_GPIO_PINS(73); |
338 | DECLARE_MSM_GPIO_PINS(74); |
339 | DECLARE_MSM_GPIO_PINS(75); |
340 | DECLARE_MSM_GPIO_PINS(76); |
341 | DECLARE_MSM_GPIO_PINS(77); |
342 | DECLARE_MSM_GPIO_PINS(78); |
343 | DECLARE_MSM_GPIO_PINS(79); |
344 | DECLARE_MSM_GPIO_PINS(80); |
345 | DECLARE_MSM_GPIO_PINS(81); |
346 | DECLARE_MSM_GPIO_PINS(82); |
347 | DECLARE_MSM_GPIO_PINS(83); |
348 | DECLARE_MSM_GPIO_PINS(84); |
349 | DECLARE_MSM_GPIO_PINS(85); |
350 | DECLARE_MSM_GPIO_PINS(86); |
351 | DECLARE_MSM_GPIO_PINS(87); |
352 | DECLARE_MSM_GPIO_PINS(88); |
353 | DECLARE_MSM_GPIO_PINS(89); |
354 | DECLARE_MSM_GPIO_PINS(90); |
355 | DECLARE_MSM_GPIO_PINS(91); |
356 | DECLARE_MSM_GPIO_PINS(92); |
357 | DECLARE_MSM_GPIO_PINS(93); |
358 | DECLARE_MSM_GPIO_PINS(94); |
359 | DECLARE_MSM_GPIO_PINS(95); |
360 | DECLARE_MSM_GPIO_PINS(96); |
361 | DECLARE_MSM_GPIO_PINS(97); |
362 | DECLARE_MSM_GPIO_PINS(98); |
363 | DECLARE_MSM_GPIO_PINS(99); |
364 | DECLARE_MSM_GPIO_PINS(100); |
365 | DECLARE_MSM_GPIO_PINS(101); |
366 | DECLARE_MSM_GPIO_PINS(102); |
367 | DECLARE_MSM_GPIO_PINS(103); |
368 | DECLARE_MSM_GPIO_PINS(104); |
369 | DECLARE_MSM_GPIO_PINS(105); |
370 | DECLARE_MSM_GPIO_PINS(106); |
371 | DECLARE_MSM_GPIO_PINS(107); |
372 | DECLARE_MSM_GPIO_PINS(108); |
373 | DECLARE_MSM_GPIO_PINS(109); |
374 | DECLARE_MSM_GPIO_PINS(110); |
375 | DECLARE_MSM_GPIO_PINS(111); |
376 | DECLARE_MSM_GPIO_PINS(112); |
377 | DECLARE_MSM_GPIO_PINS(113); |
378 | DECLARE_MSM_GPIO_PINS(114); |
379 | DECLARE_MSM_GPIO_PINS(115); |
380 | DECLARE_MSM_GPIO_PINS(116); |
381 | DECLARE_MSM_GPIO_PINS(117); |
382 | DECLARE_MSM_GPIO_PINS(118); |
383 | DECLARE_MSM_GPIO_PINS(119); |
384 | DECLARE_MSM_GPIO_PINS(120); |
385 | DECLARE_MSM_GPIO_PINS(121); |
386 | DECLARE_MSM_GPIO_PINS(122); |
387 | DECLARE_MSM_GPIO_PINS(123); |
388 | DECLARE_MSM_GPIO_PINS(124); |
389 | DECLARE_MSM_GPIO_PINS(125); |
390 | DECLARE_MSM_GPIO_PINS(126); |
391 | DECLARE_MSM_GPIO_PINS(127); |
392 | DECLARE_MSM_GPIO_PINS(128); |
393 | DECLARE_MSM_GPIO_PINS(129); |
394 | DECLARE_MSM_GPIO_PINS(130); |
395 | DECLARE_MSM_GPIO_PINS(131); |
396 | DECLARE_MSM_GPIO_PINS(132); |
397 | DECLARE_MSM_GPIO_PINS(133); |
398 | DECLARE_MSM_GPIO_PINS(134); |
399 | DECLARE_MSM_GPIO_PINS(135); |
400 | DECLARE_MSM_GPIO_PINS(136); |
401 | DECLARE_MSM_GPIO_PINS(137); |
402 | DECLARE_MSM_GPIO_PINS(138); |
403 | DECLARE_MSM_GPIO_PINS(139); |
404 | DECLARE_MSM_GPIO_PINS(140); |
405 | DECLARE_MSM_GPIO_PINS(141); |
406 | DECLARE_MSM_GPIO_PINS(142); |
407 | DECLARE_MSM_GPIO_PINS(143); |
408 | DECLARE_MSM_GPIO_PINS(144); |
409 | DECLARE_MSM_GPIO_PINS(145); |
410 | DECLARE_MSM_GPIO_PINS(146); |
411 | DECLARE_MSM_GPIO_PINS(147); |
412 | DECLARE_MSM_GPIO_PINS(148); |
413 | DECLARE_MSM_GPIO_PINS(149); |
414 | |
415 | static const unsigned int sdc2_clk_pins[] = { 150 }; |
416 | static const unsigned int sdc2_cmd_pins[] = { 151 }; |
417 | static const unsigned int sdc2_data_pins[] = { 152 }; |
418 | static const unsigned int ufs_reset_pins[] = { 153 }; |
419 | |
420 | enum msm8998_functions { |
421 | msm_mux_adsp_ext, |
422 | msm_mux_agera_pll, |
423 | msm_mux_atest_char, |
424 | msm_mux_atest_gpsadc0, |
425 | msm_mux_atest_gpsadc1, |
426 | msm_mux_atest_tsens, |
427 | msm_mux_atest_tsens2, |
428 | msm_mux_atest_usb1, |
429 | msm_mux_atest_usb10, |
430 | msm_mux_atest_usb11, |
431 | msm_mux_atest_usb12, |
432 | msm_mux_atest_usb13, |
433 | msm_mux_audio_ref, |
434 | msm_mux_bimc_dte0, |
435 | msm_mux_bimc_dte1, |
436 | msm_mux_blsp10_spi, |
437 | msm_mux_blsp10_spi_a, |
438 | msm_mux_blsp10_spi_b, |
439 | msm_mux_blsp11_i2c, |
440 | msm_mux_blsp1_spi, |
441 | msm_mux_blsp1_spi_a, |
442 | msm_mux_blsp1_spi_b, |
443 | msm_mux_blsp2_spi, |
444 | msm_mux_blsp9_spi, |
445 | msm_mux_blsp_i2c1, |
446 | msm_mux_blsp_i2c10, |
447 | msm_mux_blsp_i2c11, |
448 | msm_mux_blsp_i2c12, |
449 | msm_mux_blsp_i2c2, |
450 | msm_mux_blsp_i2c3, |
451 | msm_mux_blsp_i2c4, |
452 | msm_mux_blsp_i2c5, |
453 | msm_mux_blsp_i2c6, |
454 | msm_mux_blsp_i2c7, |
455 | msm_mux_blsp_i2c8, |
456 | msm_mux_blsp_i2c9, |
457 | msm_mux_blsp_spi1, |
458 | msm_mux_blsp_spi10, |
459 | msm_mux_blsp_spi11, |
460 | msm_mux_blsp_spi12, |
461 | msm_mux_blsp_spi2, |
462 | msm_mux_blsp_spi3, |
463 | msm_mux_blsp_spi4, |
464 | msm_mux_blsp_spi5, |
465 | msm_mux_blsp_spi6, |
466 | msm_mux_blsp_spi7, |
467 | msm_mux_blsp_spi8, |
468 | msm_mux_blsp_spi9, |
469 | msm_mux_blsp_uart1_a, |
470 | msm_mux_blsp_uart1_b, |
471 | msm_mux_blsp_uart2_a, |
472 | msm_mux_blsp_uart2_b, |
473 | msm_mux_blsp_uart3_a, |
474 | msm_mux_blsp_uart3_b, |
475 | msm_mux_blsp_uart7_a, |
476 | msm_mux_blsp_uart7_b, |
477 | msm_mux_blsp_uart8, |
478 | msm_mux_blsp_uart8_a, |
479 | msm_mux_blsp_uart8_b, |
480 | msm_mux_blsp_uart9_a, |
481 | msm_mux_blsp_uart9_b, |
482 | msm_mux_blsp_uim1_a, |
483 | msm_mux_blsp_uim1_b, |
484 | msm_mux_blsp_uim2_a, |
485 | msm_mux_blsp_uim2_b, |
486 | msm_mux_blsp_uim3_a, |
487 | msm_mux_blsp_uim3_b, |
488 | msm_mux_blsp_uim7_a, |
489 | msm_mux_blsp_uim7_b, |
490 | msm_mux_blsp_uim8_a, |
491 | msm_mux_blsp_uim8_b, |
492 | msm_mux_blsp_uim9_a, |
493 | msm_mux_blsp_uim9_b, |
494 | msm_mux_bt_reset, |
495 | msm_mux_btfm_slimbus, |
496 | msm_mux_cam_mclk, |
497 | msm_mux_cci_async, |
498 | msm_mux_cci_i2c, |
499 | msm_mux_cci_timer0, |
500 | msm_mux_cci_timer1, |
501 | msm_mux_cci_timer2, |
502 | msm_mux_cci_timer3, |
503 | msm_mux_cci_timer4, |
504 | msm_mux_cri_trng, |
505 | msm_mux_cri_trng0, |
506 | msm_mux_cri_trng1, |
507 | msm_mux_dbg_out, |
508 | msm_mux_ddr_bist, |
509 | msm_mux_edp_hot, |
510 | msm_mux_edp_lcd, |
511 | msm_mux_gcc_gp1_a, |
512 | msm_mux_gcc_gp1_b, |
513 | msm_mux_gcc_gp2_a, |
514 | msm_mux_gcc_gp2_b, |
515 | msm_mux_gcc_gp3_a, |
516 | msm_mux_gcc_gp3_b, |
517 | msm_mux_gpio, |
518 | msm_mux_hdmi_cec, |
519 | msm_mux_hdmi_ddc, |
520 | msm_mux_hdmi_hot, |
521 | msm_mux_hdmi_rcv, |
522 | msm_mux_isense_dbg, |
523 | msm_mux_jitter_bist, |
524 | msm_mux_ldo_en, |
525 | msm_mux_ldo_update, |
526 | msm_mux_lpass_slimbus, |
527 | msm_mux_m_voc, |
528 | msm_mux_mdp_vsync, |
529 | msm_mux_mdp_vsync0, |
530 | msm_mux_mdp_vsync1, |
531 | msm_mux_mdp_vsync2, |
532 | msm_mux_mdp_vsync3, |
533 | msm_mux_mdp_vsync_a, |
534 | msm_mux_mdp_vsync_b, |
535 | msm_mux_modem_tsync, |
536 | msm_mux_mss_lte, |
537 | msm_mux_nav_dr, |
538 | msm_mux_nav_pps, |
539 | msm_mux_pa_indicator, |
540 | msm_mux_pci_e0, |
541 | msm_mux_phase_flag, |
542 | msm_mux_pll_bypassnl, |
543 | msm_mux_pll_reset, |
544 | msm_mux_pri_mi2s, |
545 | msm_mux_pri_mi2s_ws, |
546 | msm_mux_prng_rosc, |
547 | msm_mux_pwr_crypto, |
548 | msm_mux_pwr_modem, |
549 | msm_mux_pwr_nav, |
550 | msm_mux_qdss_cti0_a, |
551 | msm_mux_qdss_cti0_b, |
552 | msm_mux_qdss_cti1_a, |
553 | msm_mux_qdss_cti1_b, |
554 | msm_mux_qdss, |
555 | msm_mux_qlink_enable, |
556 | msm_mux_qlink_request, |
557 | msm_mux_qua_mi2s, |
558 | msm_mux_sd_card, |
559 | msm_mux_sd_write, |
560 | msm_mux_sdc40, |
561 | msm_mux_sdc41, |
562 | msm_mux_sdc42, |
563 | msm_mux_sdc43, |
564 | msm_mux_sdc4_clk, |
565 | msm_mux_sdc4_cmd, |
566 | msm_mux_sec_mi2s, |
567 | msm_mux_sp_cmu, |
568 | msm_mux_spkr_i2s, |
569 | msm_mux_ssbi1, |
570 | msm_mux_ssc_irq, |
571 | msm_mux_ter_mi2s, |
572 | msm_mux_tgu_ch0, |
573 | msm_mux_tgu_ch1, |
574 | msm_mux_tsense_pwm1, |
575 | msm_mux_tsense_pwm2, |
576 | msm_mux_tsif0, |
577 | msm_mux_tsif1, |
578 | msm_mux_uim1_clk, |
579 | msm_mux_uim1_data, |
580 | msm_mux_uim1_present, |
581 | msm_mux_uim1_reset, |
582 | msm_mux_uim2_clk, |
583 | msm_mux_uim2_data, |
584 | msm_mux_uim2_present, |
585 | msm_mux_uim2_reset, |
586 | msm_mux_uim_batt, |
587 | msm_mux_usb_phy, |
588 | msm_mux_vfr_1, |
589 | msm_mux_vsense_clkout, |
590 | msm_mux_vsense_data0, |
591 | msm_mux_vsense_data1, |
592 | msm_mux_vsense_mode, |
593 | msm_mux_wlan1_adc0, |
594 | msm_mux_wlan1_adc1, |
595 | msm_mux_wlan2_adc0, |
596 | msm_mux_wlan2_adc1, |
597 | msm_mux__, |
598 | }; |
599 | |
600 | static const char * const gpio_groups[] = { |
601 | "gpio0" , "gpio1" , "gpio2" , "gpio3" , "gpio4" , "gpio5" , "gpio6" , "gpio7" , |
602 | "gpio8" , "gpio9" , "gpio10" , "gpio11" , "gpio12" , "gpio13" , "gpio14" , |
603 | "gpio15" , "gpio16" , "gpio17" , "gpio18" , "gpio19" , "gpio20" , "gpio21" , |
604 | "gpio22" , "gpio23" , "gpio24" , "gpio25" , "gpio26" , "gpio27" , "gpio28" , |
605 | "gpio29" , "gpio30" , "gpio31" , "gpio32" , "gpio33" , "gpio34" , "gpio35" , |
606 | "gpio36" , "gpio37" , "gpio38" , "gpio39" , "gpio40" , "gpio41" , "gpio42" , |
607 | "gpio43" , "gpio44" , "gpio45" , "gpio46" , "gpio47" , "gpio48" , "gpio49" , |
608 | "gpio50" , "gpio51" , "gpio52" , "gpio53" , "gpio54" , "gpio55" , "gpio56" , |
609 | "gpio57" , "gpio58" , "gpio59" , "gpio60" , "gpio61" , "gpio62" , "gpio63" , |
610 | "gpio64" , "gpio65" , "gpio66" , "gpio67" , "gpio68" , "gpio69" , "gpio70" , |
611 | "gpio71" , "gpio72" , "gpio73" , "gpio74" , "gpio75" , "gpio76" , "gpio77" , |
612 | "gpio78" , "gpio79" , "gpio80" , "gpio81" , "gpio82" , "gpio83" , "gpio84" , |
613 | "gpio85" , "gpio86" , "gpio87" , "gpio88" , "gpio89" , "gpio90" , "gpio91" , |
614 | "gpio92" , "gpio93" , "gpio94" , "gpio95" , "gpio96" , "gpio97" , "gpio98" , |
615 | "gpio99" , "gpio100" , "gpio101" , "gpio102" , "gpio103" , "gpio104" , |
616 | "gpio105" , "gpio106" , "gpio107" , "gpio108" , "gpio109" , "gpio110" , |
617 | "gpio111" , "gpio112" , "gpio113" , "gpio114" , "gpio115" , "gpio116" , |
618 | "gpio117" , "gpio118" , "gpio119" , "gpio120" , "gpio121" , "gpio122" , |
619 | "gpio123" , "gpio124" , "gpio125" , "gpio126" , "gpio127" , "gpio128" , |
620 | "gpio129" , "gpio130" , "gpio131" , "gpio132" , "gpio133" , "gpio134" , |
621 | "gpio135" , "gpio136" , "gpio137" , "gpio138" , "gpio139" , "gpio140" , |
622 | "gpio141" , "gpio142" , "gpio143" , "gpio144" , "gpio145" , "gpio146" , |
623 | "gpio147" , "gpio148" , "gpio149" , |
624 | }; |
625 | static const char * const blsp_spi1_groups[] = { |
626 | "gpio0" , "gpio1" , "gpio2" , "gpio3" , |
627 | }; |
628 | static const char * const blsp_uim1_a_groups[] = { |
629 | "gpio0" , "gpio1" , |
630 | }; |
631 | static const char * const blsp_uart1_a_groups[] = { |
632 | "gpio0" , "gpio1" , "gpio2" , "gpio3" , |
633 | }; |
634 | static const char * const blsp_i2c1_groups[] = { |
635 | "gpio2" , "gpio3" , |
636 | }; |
637 | static const char * const blsp_spi8_groups[] = { |
638 | "gpio4" , "gpio5" , "gpio6" , "gpio7" , |
639 | }; |
640 | static const char * const blsp_uart8_a_groups[] = { |
641 | "gpio4" , "gpio5" , "gpio6" , "gpio7" , |
642 | }; |
643 | static const char * const blsp_uim8_a_groups[] = { |
644 | "gpio4" , "gpio5" , |
645 | }; |
646 | static const char * const qdss_cti0_b_groups[] = { |
647 | "gpio4" , "gpio5" , |
648 | }; |
649 | static const char * const blsp_i2c8_groups[] = { |
650 | "gpio6" , "gpio7" , |
651 | }; |
652 | static const char * const ddr_bist_groups[] = { |
653 | "gpio7" , "gpio8" , "gpio9" , "gpio10" , |
654 | }; |
655 | static const char * const atest_tsens2_groups[] = { |
656 | "gpio7" , |
657 | }; |
658 | static const char * const atest_usb1_groups[] = { |
659 | "gpio7" , |
660 | }; |
661 | static const char * const blsp_spi4_groups[] = { |
662 | "gpio8" , "gpio9" , "gpio10" , "gpio11" , |
663 | }; |
664 | static const char * const blsp_uart1_b_groups[] = { |
665 | "gpio8" , "gpio9" , "gpio10" , "gpio11" , |
666 | }; |
667 | static const char * const blsp_uim1_b_groups[] = { |
668 | "gpio8" , "gpio9" , |
669 | }; |
670 | static const char * const wlan1_adc1_groups[] = { |
671 | "gpio8" , |
672 | }; |
673 | static const char * const atest_usb13_groups[] = { |
674 | "gpio8" , |
675 | }; |
676 | static const char * const bimc_dte1_groups[] = { |
677 | "gpio8" , "gpio10" , |
678 | }; |
679 | static const char * const wlan1_adc0_groups[] = { |
680 | "gpio9" , |
681 | }; |
682 | static const char * const atest_usb12_groups[] = { |
683 | "gpio9" , |
684 | }; |
685 | static const char * const bimc_dte0_groups[] = { |
686 | "gpio9" , "gpio11" , |
687 | }; |
688 | static const char * const mdp_vsync_a_groups[] = { |
689 | "gpio10" , "gpio11" , |
690 | }; |
691 | static const char * const blsp_i2c4_groups[] = { |
692 | "gpio10" , "gpio11" , |
693 | }; |
694 | static const char * const atest_gpsadc1_groups[] = { |
695 | "gpio10" , |
696 | }; |
697 | static const char * const wlan2_adc1_groups[] = { |
698 | "gpio10" , |
699 | }; |
700 | static const char * const atest_usb11_groups[] = { |
701 | "gpio10" , |
702 | }; |
703 | static const char * const edp_lcd_groups[] = { |
704 | "gpio11" , |
705 | }; |
706 | static const char * const dbg_out_groups[] = { |
707 | "gpio11" , |
708 | }; |
709 | static const char * const atest_gpsadc0_groups[] = { |
710 | "gpio11" , |
711 | }; |
712 | static const char * const wlan2_adc0_groups[] = { |
713 | "gpio11" , |
714 | }; |
715 | static const char * const atest_usb10_groups[] = { |
716 | "gpio11" , |
717 | }; |
718 | static const char * const mdp_vsync_groups[] = { |
719 | "gpio12" , |
720 | }; |
721 | static const char * const m_voc_groups[] = { |
722 | "gpio12" , |
723 | }; |
724 | static const char * const cam_mclk_groups[] = { |
725 | "gpio13" , "gpio14" , "gpio15" , "gpio16" , |
726 | }; |
727 | static const char * const pll_bypassnl_groups[] = { |
728 | "gpio13" , |
729 | }; |
730 | static const char * const qdss_groups[] = { |
731 | "gpio13" , "gpio14" , "gpio15" , "gpio16" , "gpio17" , "gpio18" , "gpio19" , |
732 | "gpio20" , "gpio21" , "gpio22" , "gpio23" , "gpio24" , "gpio25" , "gpio26" , |
733 | "gpio27" , "gpio28" , "gpio29" , "gpio30" , "gpio41" , "gpio42" , "gpio43" , |
734 | "gpio44" , "gpio75" , "gpio76" , "gpio77" , "gpio79" , "gpio80" , "gpio93" , |
735 | "gpio117" , "gpio118" , "gpio119" , "gpio120" , "gpio121" , "gpio122" , |
736 | "gpio123" , "gpio124" , |
737 | }; |
738 | static const char * const pll_reset_groups[] = { |
739 | "gpio14" , |
740 | }; |
741 | static const char * const cci_i2c_groups[] = { |
742 | "gpio17" , "gpio18" , "gpio19" , "gpio20" , |
743 | }; |
744 | static const char * const phase_flag_groups[] = { |
745 | "gpio18" , "gpio19" , "gpio73" , "gpio74" , "gpio75" , "gpio76" , "gpio77" , |
746 | "gpio89" , "gpio91" , "gpio92" , "gpio96" , "gpio114" , "gpio115" , |
747 | "gpio116" , "gpio117" , "gpio118" , "gpio119" , "gpio120" , "gpio121" , |
748 | "gpio122" , "gpio123" , "gpio124" , "gpio125" , "gpio126" , "gpio128" , |
749 | "gpio129" , "gpio130" , "gpio131" , "gpio132" , "gpio133" , "gpio134" , |
750 | }; |
751 | static const char * const cci_timer4_groups[] = { |
752 | "gpio25" , |
753 | }; |
754 | static const char * const blsp2_spi_groups[] = { |
755 | "gpio25" , "gpio29" , "gpio30" , |
756 | }; |
757 | static const char * const cci_timer0_groups[] = { |
758 | "gpio21" , |
759 | }; |
760 | static const char * const vsense_data0_groups[] = { |
761 | "gpio21" , |
762 | }; |
763 | static const char * const cci_timer1_groups[] = { |
764 | "gpio22" , |
765 | }; |
766 | static const char * const vsense_data1_groups[] = { |
767 | "gpio22" , |
768 | }; |
769 | static const char * const cci_timer2_groups[] = { |
770 | "gpio23" , |
771 | }; |
772 | static const char * const blsp1_spi_b_groups[] = { |
773 | "gpio23" , "gpio28" , |
774 | }; |
775 | static const char * const vsense_mode_groups[] = { |
776 | "gpio23" , |
777 | }; |
778 | static const char * const cci_timer3_groups[] = { |
779 | "gpio24" , |
780 | }; |
781 | static const char * const cci_async_groups[] = { |
782 | "gpio24" , "gpio25" , "gpio26" , |
783 | }; |
784 | static const char * const blsp1_spi_a_groups[] = { |
785 | "gpio24" , "gpio27" , |
786 | }; |
787 | static const char * const vsense_clkout_groups[] = { |
788 | "gpio24" , |
789 | }; |
790 | static const char * const hdmi_rcv_groups[] = { |
791 | "gpio30" , |
792 | }; |
793 | static const char * const hdmi_cec_groups[] = { |
794 | "gpio31" , |
795 | }; |
796 | static const char * const blsp_spi2_groups[] = { |
797 | "gpio31" , "gpio32" , "gpio33" , "gpio34" , |
798 | }; |
799 | static const char * const blsp_uart2_a_groups[] = { |
800 | "gpio31" , "gpio32" , "gpio33" , "gpio34" , |
801 | }; |
802 | static const char * const blsp_uim2_a_groups[] = { |
803 | "gpio31" , "gpio34" , |
804 | }; |
805 | static const char * const pwr_modem_groups[] = { |
806 | "gpio31" , |
807 | }; |
808 | static const char * const hdmi_ddc_groups[] = { |
809 | "gpio32" , "gpio33" , |
810 | }; |
811 | static const char * const blsp_i2c2_groups[] = { |
812 | "gpio32" , "gpio33" , |
813 | }; |
814 | static const char * const pwr_nav_groups[] = { |
815 | "gpio32" , |
816 | }; |
817 | static const char * const pwr_crypto_groups[] = { |
818 | "gpio33" , |
819 | }; |
820 | static const char * const hdmi_hot_groups[] = { |
821 | "gpio34" , |
822 | }; |
823 | static const char * const edp_hot_groups[] = { |
824 | "gpio34" , |
825 | }; |
826 | static const char * const pci_e0_groups[] = { |
827 | "gpio35" , "gpio36" , "gpio37" , |
828 | }; |
829 | static const char * const jitter_bist_groups[] = { |
830 | "gpio35" , |
831 | }; |
832 | static const char * const agera_pll_groups[] = { |
833 | "gpio36" , "gpio37" , |
834 | }; |
835 | static const char * const atest_tsens_groups[] = { |
836 | "gpio36" , |
837 | }; |
838 | static const char * const usb_phy_groups[] = { |
839 | "gpio38" , |
840 | }; |
841 | static const char * const lpass_slimbus_groups[] = { |
842 | "gpio39" , "gpio70" , "gpio71" , "gpio72" , |
843 | }; |
844 | static const char * const sd_write_groups[] = { |
845 | "gpio40" , |
846 | }; |
847 | static const char * const blsp_spi6_groups[] = { |
848 | "gpio41" , "gpio42" , "gpio43" , "gpio44" , |
849 | }; |
850 | static const char * const blsp_uart3_b_groups[] = { |
851 | "gpio41" , "gpio42" , "gpio43" , "gpio44" , |
852 | }; |
853 | static const char * const blsp_uim3_b_groups[] = { |
854 | "gpio41" , "gpio42" , |
855 | }; |
856 | static const char * const blsp_i2c6_groups[] = { |
857 | "gpio43" , "gpio44" , |
858 | }; |
859 | static const char * const bt_reset_groups[] = { |
860 | "gpio45" , |
861 | }; |
862 | static const char * const blsp_spi3_groups[] = { |
863 | "gpio45" , "gpio46" , "gpio47" , "gpio48" , |
864 | }; |
865 | static const char * const blsp_uart3_a_groups[] = { |
866 | "gpio45" , "gpio46" , "gpio47" , "gpio48" , |
867 | }; |
868 | static const char * const blsp_uim3_a_groups[] = { |
869 | "gpio45" , "gpio46" , |
870 | }; |
871 | static const char * const blsp_i2c3_groups[] = { |
872 | "gpio47" , "gpio48" , |
873 | }; |
874 | static const char * const blsp_spi9_groups[] = { |
875 | "gpio49" , "gpio50" , "gpio51" , "gpio52" , |
876 | }; |
877 | static const char * const blsp_uart9_a_groups[] = { |
878 | "gpio49" , "gpio50" , "gpio51" , "gpio52" , |
879 | }; |
880 | static const char * const blsp_uim9_a_groups[] = { |
881 | "gpio49" , "gpio50" , |
882 | }; |
883 | static const char * const blsp10_spi_b_groups[] = { |
884 | "gpio49" , "gpio50" , |
885 | }; |
886 | static const char * const qdss_cti0_a_groups[] = { |
887 | "gpio49" , "gpio50" , |
888 | }; |
889 | static const char * const blsp_i2c9_groups[] = { |
890 | "gpio51" , "gpio52" , |
891 | }; |
892 | static const char * const blsp10_spi_a_groups[] = { |
893 | "gpio51" , "gpio52" , |
894 | }; |
895 | static const char * const blsp_spi7_groups[] = { |
896 | "gpio53" , "gpio54" , "gpio55" , "gpio56" , |
897 | }; |
898 | static const char * const blsp_uart7_a_groups[] = { |
899 | "gpio53" , "gpio54" , "gpio55" , "gpio56" , |
900 | }; |
901 | static const char * const blsp_uim7_a_groups[] = { |
902 | "gpio53" , "gpio54" , |
903 | }; |
904 | static const char * const blsp_i2c7_groups[] = { |
905 | "gpio55" , "gpio56" , |
906 | }; |
907 | static const char * const qua_mi2s_groups[] = { |
908 | "gpio57" , "gpio58" , "gpio59" , "gpio60" , "gpio61" , "gpio62" , "gpio63" , |
909 | }; |
910 | static const char * const blsp10_spi_groups[] = { |
911 | "gpio57" , |
912 | }; |
913 | static const char * const gcc_gp1_a_groups[] = { |
914 | "gpio57" , |
915 | }; |
916 | static const char * const ssc_irq_groups[] = { |
917 | "gpio58" , "gpio59" , "gpio60" , "gpio61" , "gpio62" , "gpio63" , "gpio78" , |
918 | "gpio79" , "gpio80" , "gpio117" , "gpio118" , "gpio119" , "gpio120" , |
919 | "gpio121" , "gpio122" , "gpio123" , "gpio124" , "gpio125" , |
920 | }; |
921 | static const char * const blsp_spi11_groups[] = { |
922 | "gpio58" , "gpio59" , "gpio60" , "gpio61" , |
923 | }; |
924 | static const char * const blsp_uart8_b_groups[] = { |
925 | "gpio58" , "gpio59" , "gpio60" , "gpio61" , |
926 | }; |
927 | static const char * const blsp_uim8_b_groups[] = { |
928 | "gpio58" , "gpio59" , |
929 | }; |
930 | static const char * const gcc_gp2_a_groups[] = { |
931 | "gpio58" , |
932 | }; |
933 | static const char * const qdss_cti1_a_groups[] = { |
934 | "gpio58" , "gpio59" , |
935 | }; |
936 | static const char * const gcc_gp3_a_groups[] = { |
937 | "gpio59" , |
938 | }; |
939 | static const char * const blsp_i2c11_groups[] = { |
940 | "gpio60" , "gpio61" , |
941 | }; |
942 | static const char * const cri_trng0_groups[] = { |
943 | "gpio60" , |
944 | }; |
945 | static const char * const cri_trng1_groups[] = { |
946 | "gpio61" , |
947 | }; |
948 | static const char * const cri_trng_groups[] = { |
949 | "gpio62" , |
950 | }; |
951 | static const char * const pri_mi2s_groups[] = { |
952 | "gpio64" , "gpio65" , "gpio67" , "gpio68" , |
953 | }; |
954 | static const char * const sp_cmu_groups[] = { |
955 | "gpio64" , |
956 | }; |
957 | static const char * const blsp_spi10_groups[] = { |
958 | "gpio65" , "gpio66" , "gpio67" , "gpio68" , |
959 | }; |
960 | static const char * const blsp_uart7_b_groups[] = { |
961 | "gpio65" , "gpio66" , "gpio67" , "gpio68" , |
962 | }; |
963 | static const char * const blsp_uim7_b_groups[] = { |
964 | "gpio65" , "gpio66" , |
965 | }; |
966 | static const char * const pri_mi2s_ws_groups[] = { |
967 | "gpio66" , |
968 | }; |
969 | static const char * const blsp_i2c10_groups[] = { |
970 | "gpio67" , "gpio68" , |
971 | }; |
972 | static const char * const spkr_i2s_groups[] = { |
973 | "gpio69" , "gpio70" , "gpio71" , "gpio72" , |
974 | }; |
975 | static const char * const audio_ref_groups[] = { |
976 | "gpio69" , |
977 | }; |
978 | static const char * const blsp9_spi_groups[] = { |
979 | "gpio70" , "gpio71" , "gpio72" , |
980 | }; |
981 | static const char * const tsense_pwm1_groups[] = { |
982 | "gpio71" , |
983 | }; |
984 | static const char * const tsense_pwm2_groups[] = { |
985 | "gpio71" , |
986 | }; |
987 | static const char * const btfm_slimbus_groups[] = { |
988 | "gpio73" , "gpio74" , |
989 | }; |
990 | static const char * const ter_mi2s_groups[] = { |
991 | "gpio74" , "gpio75" , "gpio76" , "gpio77" , "gpio78" , |
992 | }; |
993 | static const char * const gcc_gp1_b_groups[] = { |
994 | "gpio78" , |
995 | }; |
996 | static const char * const sec_mi2s_groups[] = { |
997 | "gpio79" , "gpio80" , "gpio81" , "gpio82" , "gpio83" , |
998 | }; |
999 | static const char * const blsp_spi12_groups[] = { |
1000 | "gpio81" , "gpio82" , "gpio83" , "gpio84" , |
1001 | }; |
1002 | static const char * const blsp_uart9_b_groups[] = { |
1003 | "gpio81" , "gpio82" , "gpio83" , "gpio84" , |
1004 | }; |
1005 | static const char * const blsp_uim9_b_groups[] = { |
1006 | "gpio81" , "gpio82" , |
1007 | }; |
1008 | static const char * const gcc_gp2_b_groups[] = { |
1009 | "gpio81" , |
1010 | }; |
1011 | static const char * const gcc_gp3_b_groups[] = { |
1012 | "gpio82" , |
1013 | }; |
1014 | static const char * const blsp_i2c12_groups[] = { |
1015 | "gpio83" , "gpio84" , |
1016 | }; |
1017 | static const char * const blsp_spi5_groups[] = { |
1018 | "gpio85" , "gpio86" , "gpio87" , "gpio88" , |
1019 | }; |
1020 | static const char * const blsp_uart2_b_groups[] = { |
1021 | "gpio85" , "gpio86" , "gpio87" , "gpio88" , |
1022 | }; |
1023 | static const char * const blsp_uim2_b_groups[] = { |
1024 | "gpio85" , "gpio86" , |
1025 | }; |
1026 | static const char * const blsp_i2c5_groups[] = { |
1027 | "gpio87" , "gpio88" , |
1028 | }; |
1029 | static const char * const tsif0_groups[] = { |
1030 | "gpio9" , "gpio40" , "gpio89" , "gpio90" , "gpio91" , |
1031 | }; |
1032 | static const char * const mdp_vsync0_groups[] = { |
1033 | "gpio90" , |
1034 | }; |
1035 | static const char * const mdp_vsync1_groups[] = { |
1036 | "gpio90" , |
1037 | }; |
1038 | static const char * const mdp_vsync2_groups[] = { |
1039 | "gpio90" , |
1040 | }; |
1041 | static const char * const mdp_vsync3_groups[] = { |
1042 | "gpio90" , |
1043 | }; |
1044 | static const char * const blsp1_spi_groups[] = { |
1045 | "gpio90" , |
1046 | }; |
1047 | static const char * const tgu_ch0_groups[] = { |
1048 | "gpio90" , |
1049 | }; |
1050 | static const char * const qdss_cti1_b_groups[] = { |
1051 | "gpio90" , "gpio91" , |
1052 | }; |
1053 | static const char * const sdc4_cmd_groups[] = { |
1054 | "gpio91" , |
1055 | }; |
1056 | static const char * const tgu_ch1_groups[] = { |
1057 | "gpio91" , |
1058 | }; |
1059 | static const char * const tsif1_groups[] = { |
1060 | "gpio92" , "gpio93" , "gpio94" , "gpio95" , "gpio96" , |
1061 | }; |
1062 | static const char * const sdc43_groups[] = { |
1063 | "gpio92" , |
1064 | }; |
1065 | static const char * const vfr_1_groups[] = { |
1066 | "gpio92" , |
1067 | }; |
1068 | static const char * const sdc4_clk_groups[] = { |
1069 | "gpio93" , |
1070 | }; |
1071 | static const char * const sdc42_groups[] = { |
1072 | "gpio94" , |
1073 | }; |
1074 | static const char * const sd_card_groups[] = { |
1075 | "gpio95" , |
1076 | }; |
1077 | static const char * const sdc41_groups[] = { |
1078 | "gpio95" , |
1079 | }; |
1080 | static const char * const sdc40_groups[] = { |
1081 | "gpio96" , |
1082 | }; |
1083 | static const char * const mdp_vsync_b_groups[] = { |
1084 | "gpio97" , "gpio98" , |
1085 | }; |
1086 | static const char * const ldo_en_groups[] = { |
1087 | "gpio97" , |
1088 | }; |
1089 | static const char * const ldo_update_groups[] = { |
1090 | "gpio98" , |
1091 | }; |
1092 | static const char * const blsp_uart8_groups[] = { |
1093 | "gpio100" , "gpio101" , |
1094 | }; |
1095 | static const char * const blsp11_i2c_groups[] = { |
1096 | "gpio102" , "gpio103" , |
1097 | }; |
1098 | static const char * const prng_rosc_groups[] = { |
1099 | "gpio102" , |
1100 | }; |
1101 | static const char * const uim2_data_groups[] = { |
1102 | "gpio105" , |
1103 | }; |
1104 | static const char * const uim2_clk_groups[] = { |
1105 | "gpio106" , |
1106 | }; |
1107 | static const char * const uim2_reset_groups[] = { |
1108 | "gpio107" , |
1109 | }; |
1110 | static const char * const uim2_present_groups[] = { |
1111 | "gpio108" , |
1112 | }; |
1113 | static const char * const uim1_data_groups[] = { |
1114 | "gpio109" , |
1115 | }; |
1116 | static const char * const uim1_clk_groups[] = { |
1117 | "gpio110" , |
1118 | }; |
1119 | static const char * const uim1_reset_groups[] = { |
1120 | "gpio111" , |
1121 | }; |
1122 | static const char * const uim1_present_groups[] = { |
1123 | "gpio112" , |
1124 | }; |
1125 | static const char * const uim_batt_groups[] = { |
1126 | "gpio113" , |
1127 | }; |
1128 | static const char * const nav_dr_groups[] = { |
1129 | "gpio115" , |
1130 | }; |
1131 | static const char * const atest_char_groups[] = { |
1132 | "gpio117" , "gpio118" , "gpio119" , "gpio120" , "gpio121" , |
1133 | }; |
1134 | static const char * const adsp_ext_groups[] = { |
1135 | "gpio118" , |
1136 | }; |
1137 | static const char * const modem_tsync_groups[] = { |
1138 | "gpio128" , |
1139 | }; |
1140 | static const char * const nav_pps_groups[] = { |
1141 | "gpio128" , |
1142 | }; |
1143 | static const char * const qlink_request_groups[] = { |
1144 | "gpio130" , |
1145 | }; |
1146 | static const char * const qlink_enable_groups[] = { |
1147 | "gpio131" , |
1148 | }; |
1149 | static const char * const pa_indicator_groups[] = { |
1150 | "gpio135" , |
1151 | }; |
1152 | static const char * const ssbi1_groups[] = { |
1153 | "gpio142" , |
1154 | }; |
1155 | static const char * const isense_dbg_groups[] = { |
1156 | "gpio143" , |
1157 | }; |
1158 | static const char * const mss_lte_groups[] = { |
1159 | "gpio144" , "gpio145" , |
1160 | }; |
1161 | |
1162 | static const struct pinfunction msm8998_functions[] = { |
1163 | MSM_PIN_FUNCTION(gpio), |
1164 | MSM_PIN_FUNCTION(adsp_ext), |
1165 | MSM_PIN_FUNCTION(agera_pll), |
1166 | MSM_PIN_FUNCTION(atest_char), |
1167 | MSM_PIN_FUNCTION(atest_gpsadc0), |
1168 | MSM_PIN_FUNCTION(atest_gpsadc1), |
1169 | MSM_PIN_FUNCTION(atest_tsens), |
1170 | MSM_PIN_FUNCTION(atest_tsens2), |
1171 | MSM_PIN_FUNCTION(atest_usb1), |
1172 | MSM_PIN_FUNCTION(atest_usb10), |
1173 | MSM_PIN_FUNCTION(atest_usb11), |
1174 | MSM_PIN_FUNCTION(atest_usb12), |
1175 | MSM_PIN_FUNCTION(atest_usb13), |
1176 | MSM_PIN_FUNCTION(audio_ref), |
1177 | MSM_PIN_FUNCTION(bimc_dte0), |
1178 | MSM_PIN_FUNCTION(bimc_dte1), |
1179 | MSM_PIN_FUNCTION(blsp10_spi), |
1180 | MSM_PIN_FUNCTION(blsp10_spi_a), |
1181 | MSM_PIN_FUNCTION(blsp10_spi_b), |
1182 | MSM_PIN_FUNCTION(blsp11_i2c), |
1183 | MSM_PIN_FUNCTION(blsp1_spi), |
1184 | MSM_PIN_FUNCTION(blsp1_spi_a), |
1185 | MSM_PIN_FUNCTION(blsp1_spi_b), |
1186 | MSM_PIN_FUNCTION(blsp2_spi), |
1187 | MSM_PIN_FUNCTION(blsp9_spi), |
1188 | MSM_PIN_FUNCTION(blsp_i2c1), |
1189 | MSM_PIN_FUNCTION(blsp_i2c2), |
1190 | MSM_PIN_FUNCTION(blsp_i2c3), |
1191 | MSM_PIN_FUNCTION(blsp_i2c4), |
1192 | MSM_PIN_FUNCTION(blsp_i2c5), |
1193 | MSM_PIN_FUNCTION(blsp_i2c6), |
1194 | MSM_PIN_FUNCTION(blsp_i2c7), |
1195 | MSM_PIN_FUNCTION(blsp_i2c8), |
1196 | MSM_PIN_FUNCTION(blsp_i2c9), |
1197 | MSM_PIN_FUNCTION(blsp_i2c10), |
1198 | MSM_PIN_FUNCTION(blsp_i2c11), |
1199 | MSM_PIN_FUNCTION(blsp_i2c12), |
1200 | MSM_PIN_FUNCTION(blsp_spi1), |
1201 | MSM_PIN_FUNCTION(blsp_spi2), |
1202 | MSM_PIN_FUNCTION(blsp_spi3), |
1203 | MSM_PIN_FUNCTION(blsp_spi4), |
1204 | MSM_PIN_FUNCTION(blsp_spi5), |
1205 | MSM_PIN_FUNCTION(blsp_spi6), |
1206 | MSM_PIN_FUNCTION(blsp_spi7), |
1207 | MSM_PIN_FUNCTION(blsp_spi8), |
1208 | MSM_PIN_FUNCTION(blsp_spi9), |
1209 | MSM_PIN_FUNCTION(blsp_spi10), |
1210 | MSM_PIN_FUNCTION(blsp_spi11), |
1211 | MSM_PIN_FUNCTION(blsp_spi12), |
1212 | MSM_PIN_FUNCTION(blsp_uart1_a), |
1213 | MSM_PIN_FUNCTION(blsp_uart1_b), |
1214 | MSM_PIN_FUNCTION(blsp_uart2_a), |
1215 | MSM_PIN_FUNCTION(blsp_uart2_b), |
1216 | MSM_PIN_FUNCTION(blsp_uart3_a), |
1217 | MSM_PIN_FUNCTION(blsp_uart3_b), |
1218 | MSM_PIN_FUNCTION(blsp_uart7_a), |
1219 | MSM_PIN_FUNCTION(blsp_uart7_b), |
1220 | MSM_PIN_FUNCTION(blsp_uart8), |
1221 | MSM_PIN_FUNCTION(blsp_uart8_a), |
1222 | MSM_PIN_FUNCTION(blsp_uart8_b), |
1223 | MSM_PIN_FUNCTION(blsp_uart9_a), |
1224 | MSM_PIN_FUNCTION(blsp_uart9_b), |
1225 | MSM_PIN_FUNCTION(blsp_uim1_a), |
1226 | MSM_PIN_FUNCTION(blsp_uim1_b), |
1227 | MSM_PIN_FUNCTION(blsp_uim2_a), |
1228 | MSM_PIN_FUNCTION(blsp_uim2_b), |
1229 | MSM_PIN_FUNCTION(blsp_uim3_a), |
1230 | MSM_PIN_FUNCTION(blsp_uim3_b), |
1231 | MSM_PIN_FUNCTION(blsp_uim7_a), |
1232 | MSM_PIN_FUNCTION(blsp_uim7_b), |
1233 | MSM_PIN_FUNCTION(blsp_uim8_a), |
1234 | MSM_PIN_FUNCTION(blsp_uim8_b), |
1235 | MSM_PIN_FUNCTION(blsp_uim9_a), |
1236 | MSM_PIN_FUNCTION(blsp_uim9_b), |
1237 | MSM_PIN_FUNCTION(bt_reset), |
1238 | MSM_PIN_FUNCTION(btfm_slimbus), |
1239 | MSM_PIN_FUNCTION(cam_mclk), |
1240 | MSM_PIN_FUNCTION(cci_async), |
1241 | MSM_PIN_FUNCTION(cci_i2c), |
1242 | MSM_PIN_FUNCTION(cci_timer0), |
1243 | MSM_PIN_FUNCTION(cci_timer1), |
1244 | MSM_PIN_FUNCTION(cci_timer2), |
1245 | MSM_PIN_FUNCTION(cci_timer3), |
1246 | MSM_PIN_FUNCTION(cci_timer4), |
1247 | MSM_PIN_FUNCTION(cri_trng), |
1248 | MSM_PIN_FUNCTION(cri_trng0), |
1249 | MSM_PIN_FUNCTION(cri_trng1), |
1250 | MSM_PIN_FUNCTION(dbg_out), |
1251 | MSM_PIN_FUNCTION(ddr_bist), |
1252 | MSM_PIN_FUNCTION(edp_hot), |
1253 | MSM_PIN_FUNCTION(edp_lcd), |
1254 | MSM_PIN_FUNCTION(gcc_gp1_a), |
1255 | MSM_PIN_FUNCTION(gcc_gp1_b), |
1256 | MSM_PIN_FUNCTION(gcc_gp2_a), |
1257 | MSM_PIN_FUNCTION(gcc_gp2_b), |
1258 | MSM_PIN_FUNCTION(gcc_gp3_a), |
1259 | MSM_PIN_FUNCTION(gcc_gp3_b), |
1260 | MSM_PIN_FUNCTION(hdmi_cec), |
1261 | MSM_PIN_FUNCTION(hdmi_ddc), |
1262 | MSM_PIN_FUNCTION(hdmi_hot), |
1263 | MSM_PIN_FUNCTION(hdmi_rcv), |
1264 | MSM_PIN_FUNCTION(isense_dbg), |
1265 | MSM_PIN_FUNCTION(jitter_bist), |
1266 | MSM_PIN_FUNCTION(ldo_en), |
1267 | MSM_PIN_FUNCTION(ldo_update), |
1268 | MSM_PIN_FUNCTION(lpass_slimbus), |
1269 | MSM_PIN_FUNCTION(m_voc), |
1270 | MSM_PIN_FUNCTION(mdp_vsync), |
1271 | MSM_PIN_FUNCTION(mdp_vsync0), |
1272 | MSM_PIN_FUNCTION(mdp_vsync1), |
1273 | MSM_PIN_FUNCTION(mdp_vsync2), |
1274 | MSM_PIN_FUNCTION(mdp_vsync3), |
1275 | MSM_PIN_FUNCTION(mdp_vsync_a), |
1276 | MSM_PIN_FUNCTION(mdp_vsync_b), |
1277 | MSM_PIN_FUNCTION(modem_tsync), |
1278 | MSM_PIN_FUNCTION(mss_lte), |
1279 | MSM_PIN_FUNCTION(nav_dr), |
1280 | MSM_PIN_FUNCTION(nav_pps), |
1281 | MSM_PIN_FUNCTION(pa_indicator), |
1282 | MSM_PIN_FUNCTION(pci_e0), |
1283 | MSM_PIN_FUNCTION(phase_flag), |
1284 | MSM_PIN_FUNCTION(pll_bypassnl), |
1285 | MSM_PIN_FUNCTION(pll_reset), |
1286 | MSM_PIN_FUNCTION(pri_mi2s), |
1287 | MSM_PIN_FUNCTION(pri_mi2s_ws), |
1288 | MSM_PIN_FUNCTION(prng_rosc), |
1289 | MSM_PIN_FUNCTION(pwr_crypto), |
1290 | MSM_PIN_FUNCTION(pwr_modem), |
1291 | MSM_PIN_FUNCTION(pwr_nav), |
1292 | MSM_PIN_FUNCTION(qdss_cti0_a), |
1293 | MSM_PIN_FUNCTION(qdss_cti0_b), |
1294 | MSM_PIN_FUNCTION(qdss_cti1_a), |
1295 | MSM_PIN_FUNCTION(qdss_cti1_b), |
1296 | MSM_PIN_FUNCTION(qdss), |
1297 | MSM_PIN_FUNCTION(qlink_enable), |
1298 | MSM_PIN_FUNCTION(qlink_request), |
1299 | MSM_PIN_FUNCTION(qua_mi2s), |
1300 | MSM_PIN_FUNCTION(sd_card), |
1301 | MSM_PIN_FUNCTION(sd_write), |
1302 | MSM_PIN_FUNCTION(sdc40), |
1303 | MSM_PIN_FUNCTION(sdc41), |
1304 | MSM_PIN_FUNCTION(sdc42), |
1305 | MSM_PIN_FUNCTION(sdc43), |
1306 | MSM_PIN_FUNCTION(sdc4_clk), |
1307 | MSM_PIN_FUNCTION(sdc4_cmd), |
1308 | MSM_PIN_FUNCTION(sec_mi2s), |
1309 | MSM_PIN_FUNCTION(sp_cmu), |
1310 | MSM_PIN_FUNCTION(spkr_i2s), |
1311 | MSM_PIN_FUNCTION(ssbi1), |
1312 | MSM_PIN_FUNCTION(ssc_irq), |
1313 | MSM_PIN_FUNCTION(ter_mi2s), |
1314 | MSM_PIN_FUNCTION(tgu_ch0), |
1315 | MSM_PIN_FUNCTION(tgu_ch1), |
1316 | MSM_PIN_FUNCTION(tsense_pwm1), |
1317 | MSM_PIN_FUNCTION(tsense_pwm2), |
1318 | MSM_PIN_FUNCTION(tsif0), |
1319 | MSM_PIN_FUNCTION(tsif1), |
1320 | MSM_PIN_FUNCTION(uim1_clk), |
1321 | MSM_PIN_FUNCTION(uim1_data), |
1322 | MSM_PIN_FUNCTION(uim1_present), |
1323 | MSM_PIN_FUNCTION(uim1_reset), |
1324 | MSM_PIN_FUNCTION(uim2_clk), |
1325 | MSM_PIN_FUNCTION(uim2_data), |
1326 | MSM_PIN_FUNCTION(uim2_present), |
1327 | MSM_PIN_FUNCTION(uim2_reset), |
1328 | MSM_PIN_FUNCTION(uim_batt), |
1329 | MSM_PIN_FUNCTION(usb_phy), |
1330 | MSM_PIN_FUNCTION(vfr_1), |
1331 | MSM_PIN_FUNCTION(vsense_clkout), |
1332 | MSM_PIN_FUNCTION(vsense_data0), |
1333 | MSM_PIN_FUNCTION(vsense_data1), |
1334 | MSM_PIN_FUNCTION(vsense_mode), |
1335 | MSM_PIN_FUNCTION(wlan1_adc0), |
1336 | MSM_PIN_FUNCTION(wlan1_adc1), |
1337 | MSM_PIN_FUNCTION(wlan2_adc0), |
1338 | MSM_PIN_FUNCTION(wlan2_adc1), |
1339 | }; |
1340 | |
1341 | static const struct msm_pingroup msm8998_groups[] = { |
1342 | PINGROUP(0, EAST, blsp_spi1, blsp_uart1_a, blsp_uim1_a, _, _, _, _, _, _), |
1343 | PINGROUP(1, EAST, blsp_spi1, blsp_uart1_a, blsp_uim1_a, _, _, _, _, _, _), |
1344 | PINGROUP(2, EAST, blsp_spi1, blsp_uart1_a, blsp_i2c1, _, _, _, _, _, _), |
1345 | PINGROUP(3, EAST, blsp_spi1, blsp_uart1_a, blsp_i2c1, _, _, _, _, _, _), |
1346 | PINGROUP(4, WEST, blsp_spi8, blsp_uart8_a, blsp_uim8_a, _, qdss_cti0_b, _, _, _, _), |
1347 | PINGROUP(5, WEST, blsp_spi8, blsp_uart8_a, blsp_uim8_a, _, qdss_cti0_b, _, _, _, _), |
1348 | PINGROUP(6, WEST, blsp_spi8, blsp_uart8_a, blsp_i2c8, _, _, _, _, _, _), |
1349 | PINGROUP(7, WEST, blsp_spi8, blsp_uart8_a, blsp_i2c8, ddr_bist, _, atest_tsens2, atest_usb1, _, _), |
1350 | PINGROUP(8, EAST, blsp_spi4, blsp_uart1_b, blsp_uim1_b, _, ddr_bist, _, wlan1_adc1, atest_usb13, bimc_dte1), |
1351 | PINGROUP(9, EAST, blsp_spi4, blsp_uart1_b, blsp_uim1_b, tsif0, ddr_bist, _, wlan1_adc0, atest_usb12, bimc_dte0), |
1352 | PINGROUP(10, EAST, mdp_vsync_a, blsp_spi4, blsp_uart1_b, blsp_i2c4, ddr_bist, atest_gpsadc1, wlan2_adc1, atest_usb11, bimc_dte1), |
1353 | PINGROUP(11, EAST, mdp_vsync_a, edp_lcd, blsp_spi4, blsp_uart1_b, blsp_i2c4, dbg_out, atest_gpsadc0, wlan2_adc0, atest_usb10), |
1354 | PINGROUP(12, EAST, mdp_vsync, m_voc, _, _, _, _, _, _, _), |
1355 | PINGROUP(13, EAST, cam_mclk, pll_bypassnl, qdss, _, _, _, _, _, _), |
1356 | PINGROUP(14, EAST, cam_mclk, pll_reset, qdss, _, _, _, _, _, _), |
1357 | PINGROUP(15, EAST, cam_mclk, qdss, _, _, _, _, _, _, _), |
1358 | PINGROUP(16, EAST, cam_mclk, qdss, _, _, _, _, _, _, _), |
1359 | PINGROUP(17, EAST, cci_i2c, qdss, _, _, _, _, _, _, _), |
1360 | PINGROUP(18, EAST, cci_i2c, phase_flag, qdss, _, _, _, _, _, _), |
1361 | PINGROUP(19, EAST, cci_i2c, phase_flag, qdss, _, _, _, _, _, _), |
1362 | PINGROUP(20, EAST, cci_i2c, qdss, _, _, _, _, _, _, _), |
1363 | PINGROUP(21, EAST, cci_timer0, _, qdss, vsense_data0, _, _, _, _, _), |
1364 | PINGROUP(22, EAST, cci_timer1, _, qdss, vsense_data1, _, _, _, _, _), |
1365 | PINGROUP(23, EAST, cci_timer2, blsp1_spi_b, qdss, vsense_mode, _, _, _, _, _), |
1366 | PINGROUP(24, EAST, cci_timer3, cci_async, blsp1_spi_a, _, qdss, vsense_clkout, _, _, _), |
1367 | PINGROUP(25, EAST, cci_timer4, cci_async, blsp2_spi, _, qdss, _, _, _, _), |
1368 | PINGROUP(26, EAST, cci_async, qdss, _, _, _, _, _, _, _), |
1369 | PINGROUP(27, EAST, blsp1_spi_a, qdss, _, _, _, _, _, _, _), |
1370 | PINGROUP(28, EAST, blsp1_spi_b, qdss, _, _, _, _, _, _, _), |
1371 | PINGROUP(29, EAST, blsp2_spi, _, qdss, _, _, _, _, _, _), |
1372 | PINGROUP(30, EAST, hdmi_rcv, blsp2_spi, qdss, _, _, _, _, _, _), |
1373 | PINGROUP(31, EAST, hdmi_cec, blsp_spi2, blsp_uart2_a, blsp_uim2_a, pwr_modem, _, _, _, _), |
1374 | PINGROUP(32, EAST, hdmi_ddc, blsp_spi2, blsp_uart2_a, blsp_i2c2, pwr_nav, _, _, _, _), |
1375 | PINGROUP(33, EAST, hdmi_ddc, blsp_spi2, blsp_uart2_a, blsp_i2c2, pwr_crypto, _, _, _, _), |
1376 | PINGROUP(34, EAST, hdmi_hot, edp_hot, blsp_spi2, blsp_uart2_a, blsp_uim2_a, _, _, _, _), |
1377 | PINGROUP(35, NORTH, pci_e0, jitter_bist, _, _, _, _, _, _, _), |
1378 | PINGROUP(36, NORTH, pci_e0, agera_pll, _, atest_tsens, _, _, _, _, _), |
1379 | PINGROUP(37, NORTH, agera_pll, _, _, _, _, _, _, _, _), |
1380 | PINGROUP(38, WEST, usb_phy, _, _, _, _, _, _, _, _), |
1381 | PINGROUP(39, WEST, lpass_slimbus, _, _, _, _, _, _, _, _), |
1382 | PINGROUP(40, EAST, sd_write, tsif0, _, _, _, _, _, _, _), |
1383 | PINGROUP(41, EAST, blsp_spi6, blsp_uart3_b, blsp_uim3_b, _, qdss, _, _, _, _), |
1384 | PINGROUP(42, EAST, blsp_spi6, blsp_uart3_b, blsp_uim3_b, _, qdss, _, _, _, _), |
1385 | PINGROUP(43, EAST, blsp_spi6, blsp_uart3_b, blsp_i2c6, _, qdss, _, _, _, _), |
1386 | PINGROUP(44, EAST, blsp_spi6, blsp_uart3_b, blsp_i2c6, _, qdss, _, _, _, _), |
1387 | PINGROUP(45, EAST, blsp_spi3, blsp_uart3_a, blsp_uim3_a, _, _, _, _, _, _), |
1388 | PINGROUP(46, EAST, blsp_spi3, blsp_uart3_a, blsp_uim3_a, _, _, _, _, _, _), |
1389 | PINGROUP(47, EAST, blsp_spi3, blsp_uart3_a, blsp_i2c3, _, _, _, _, _, _), |
1390 | PINGROUP(48, EAST, blsp_spi3, blsp_uart3_a, blsp_i2c3, _, _, _, _, _, _), |
1391 | PINGROUP(49, NORTH, blsp_spi9, blsp_uart9_a, blsp_uim9_a, blsp10_spi_b, qdss_cti0_a, _, _, _, _), |
1392 | PINGROUP(50, NORTH, blsp_spi9, blsp_uart9_a, blsp_uim9_a, blsp10_spi_b, qdss_cti0_a, _, _, _, _), |
1393 | PINGROUP(51, NORTH, blsp_spi9, blsp_uart9_a, blsp_i2c9, blsp10_spi_a, _, _, _, _, _), |
1394 | PINGROUP(52, NORTH, blsp_spi9, blsp_uart9_a, blsp_i2c9, blsp10_spi_a, _, _, _, _, _), |
1395 | PINGROUP(53, WEST, blsp_spi7, blsp_uart7_a, blsp_uim7_a, _, _, _, _, _, _), |
1396 | PINGROUP(54, WEST, blsp_spi7, blsp_uart7_a, blsp_uim7_a, _, _, _, _, _, _), |
1397 | PINGROUP(55, WEST, blsp_spi7, blsp_uart7_a, blsp_i2c7, _, _, _, _, _, _), |
1398 | PINGROUP(56, WEST, blsp_spi7, blsp_uart7_a, blsp_i2c7, _, _, _, _, _, _), |
1399 | PINGROUP(57, WEST, qua_mi2s, blsp10_spi, gcc_gp1_a, _, _, _, _, _, _), |
1400 | PINGROUP(58, WEST, qua_mi2s, blsp_spi11, blsp_uart8_b, blsp_uim8_b, gcc_gp2_a, _, qdss_cti1_a, _, _), |
1401 | PINGROUP(59, WEST, qua_mi2s, blsp_spi11, blsp_uart8_b, blsp_uim8_b, gcc_gp3_a, _, qdss_cti1_a, _, _), |
1402 | PINGROUP(60, WEST, qua_mi2s, blsp_spi11, blsp_uart8_b, blsp_i2c11, cri_trng0, _, _, _, _), |
1403 | PINGROUP(61, WEST, qua_mi2s, blsp_spi11, blsp_uart8_b, blsp_i2c11, cri_trng1, _, _, _, _), |
1404 | PINGROUP(62, WEST, qua_mi2s, cri_trng, _, _, _, _, _, _, _), |
1405 | PINGROUP(63, WEST, qua_mi2s, _, _, _, _, _, _, _, _), |
1406 | PINGROUP(64, WEST, pri_mi2s, sp_cmu, _, _, _, _, _, _, _), |
1407 | PINGROUP(65, WEST, pri_mi2s, blsp_spi10, blsp_uart7_b, blsp_uim7_b, _, _, _, _, _), |
1408 | PINGROUP(66, WEST, pri_mi2s_ws, blsp_spi10, blsp_uart7_b, blsp_uim7_b, _, _, _, _, _), |
1409 | PINGROUP(67, WEST, pri_mi2s, blsp_spi10, blsp_uart7_b, blsp_i2c10, _, _, _, _, _), |
1410 | PINGROUP(68, WEST, pri_mi2s, blsp_spi10, blsp_uart7_b, blsp_i2c10, _, _, _, _, _), |
1411 | PINGROUP(69, WEST, spkr_i2s, audio_ref, _, _, _, _, _, _, _), |
1412 | PINGROUP(70, WEST, lpass_slimbus, spkr_i2s, blsp9_spi, _, _, _, _, _, _), |
1413 | PINGROUP(71, WEST, lpass_slimbus, spkr_i2s, blsp9_spi, tsense_pwm1, tsense_pwm2, _, _, _, _), |
1414 | PINGROUP(72, WEST, lpass_slimbus, spkr_i2s, blsp9_spi, _, _, _, _, _, _), |
1415 | PINGROUP(73, WEST, btfm_slimbus, phase_flag, _, _, _, _, _, _, _), |
1416 | PINGROUP(74, WEST, btfm_slimbus, ter_mi2s, phase_flag, _, _, _, _, _, _), |
1417 | PINGROUP(75, WEST, ter_mi2s, phase_flag, qdss, _, _, _, _, _, _), |
1418 | PINGROUP(76, WEST, ter_mi2s, phase_flag, qdss, _, _, _, _, _, _), |
1419 | PINGROUP(77, WEST, ter_mi2s, phase_flag, qdss, _, _, _, _, _, _), |
1420 | PINGROUP(78, WEST, ter_mi2s, gcc_gp1_b, _, _, _, _, _, _, _), |
1421 | PINGROUP(79, WEST, sec_mi2s, _, qdss, _, _, _, _, _, _), |
1422 | PINGROUP(80, WEST, sec_mi2s, _, qdss, _, _, _, _, _, _), |
1423 | PINGROUP(81, WEST, sec_mi2s, blsp_spi12, blsp_uart9_b, blsp_uim9_b, gcc_gp2_b, _, _, _, _), |
1424 | PINGROUP(82, WEST, sec_mi2s, blsp_spi12, blsp_uart9_b, blsp_uim9_b, gcc_gp3_b, _, _, _, _), |
1425 | PINGROUP(83, WEST, sec_mi2s, blsp_spi12, blsp_uart9_b, blsp_i2c12, _, _, _, _, _), |
1426 | PINGROUP(84, WEST, blsp_spi12, blsp_uart9_b, blsp_i2c12, _, _, _, _, _, _), |
1427 | PINGROUP(85, EAST, blsp_spi5, blsp_uart2_b, blsp_uim2_b, _, _, _, _, _, _), |
1428 | PINGROUP(86, EAST, blsp_spi5, blsp_uart2_b, blsp_uim2_b, _, _, _, _, _, _), |
1429 | PINGROUP(87, EAST, blsp_spi5, blsp_uart2_b, blsp_i2c5, _, _, _, _, _, _), |
1430 | PINGROUP(88, EAST, blsp_spi5, blsp_uart2_b, blsp_i2c5, _, _, _, _, _, _), |
1431 | PINGROUP(89, EAST, tsif0, phase_flag, _, _, _, _, _, _, _), |
1432 | PINGROUP(90, EAST, tsif0, mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, blsp1_spi, tgu_ch0, qdss_cti1_b, _), |
1433 | PINGROUP(91, EAST, tsif0, sdc4_cmd, tgu_ch1, phase_flag, qdss_cti1_b, _, _, _, _), |
1434 | PINGROUP(92, EAST, tsif1, sdc43, vfr_1, phase_flag, _, _, _, _, _), |
1435 | PINGROUP(93, EAST, tsif1, sdc4_clk, _, qdss, _, _, _, _, _), |
1436 | PINGROUP(94, EAST, tsif1, sdc42, _, _, _, _, _, _, _), |
1437 | PINGROUP(95, EAST, tsif1, sdc41, _, _, _, _, _, _, _), |
1438 | PINGROUP(96, EAST, tsif1, sdc40, phase_flag, _, _, _, _, _, _), |
1439 | PINGROUP(97, WEST, _, mdp_vsync_b, ldo_en, _, _, _, _, _, _), |
1440 | PINGROUP(98, WEST, _, mdp_vsync_b, ldo_update, _, _, _, _, _, _), |
1441 | PINGROUP(99, WEST, _, _, _, _, _, _, _, _, _), |
1442 | PINGROUP(100, WEST, _, _, blsp_uart8, _, _, _, _, _, _), |
1443 | PINGROUP(101, WEST, _, blsp_uart8, _, _, _, _, _, _, _), |
1444 | PINGROUP(102, WEST, _, blsp11_i2c, prng_rosc, _, _, _, _, _, _), |
1445 | PINGROUP(103, WEST, _, blsp11_i2c, phase_flag, _, _, _, _, _, _), |
1446 | PINGROUP(104, WEST, _, _, _, _, _, _, _, _, _), |
1447 | PINGROUP(105, NORTH, uim2_data, _, _, _, _, _, _, _, _), |
1448 | PINGROUP(106, NORTH, uim2_clk, _, _, _, _, _, _, _, _), |
1449 | PINGROUP(107, NORTH, uim2_reset, _, _, _, _, _, _, _, _), |
1450 | PINGROUP(108, NORTH, uim2_present, _, _, _, _, _, _, _, _), |
1451 | PINGROUP(109, NORTH, uim1_data, _, _, _, _, _, _, _, _), |
1452 | PINGROUP(110, NORTH, uim1_clk, _, _, _, _, _, _, _, _), |
1453 | PINGROUP(111, NORTH, uim1_reset, _, _, _, _, _, _, _, _), |
1454 | PINGROUP(112, NORTH, uim1_present, _, _, _, _, _, _, _, _), |
1455 | PINGROUP(113, NORTH, uim_batt, _, _, _, _, _, _, _, _), |
1456 | PINGROUP(114, WEST, _, _, phase_flag, _, _, _, _, _, _), |
1457 | PINGROUP(115, WEST, _, nav_dr, phase_flag, _, _, _, _, _, _), |
1458 | PINGROUP(116, WEST, phase_flag, _, _, _, _, _, _, _, _), |
1459 | PINGROUP(117, EAST, phase_flag, qdss, atest_char, _, _, _, _, _, _), |
1460 | PINGROUP(118, EAST, adsp_ext, phase_flag, qdss, atest_char, _, _, _, _, _), |
1461 | PINGROUP(119, EAST, phase_flag, qdss, atest_char, _, _, _, _, _, _), |
1462 | PINGROUP(120, EAST, phase_flag, qdss, atest_char, _, _, _, _, _, _), |
1463 | PINGROUP(121, EAST, phase_flag, qdss, atest_char, _, _, _, _, _, _), |
1464 | PINGROUP(122, EAST, phase_flag, qdss, _, _, _, _, _, _, _), |
1465 | PINGROUP(123, EAST, phase_flag, qdss, _, _, _, _, _, _, _), |
1466 | PINGROUP(124, EAST, phase_flag, qdss, _, _, _, _, _, _, _), |
1467 | PINGROUP(125, EAST, phase_flag, _, _, _, _, _, _, _, _), |
1468 | PINGROUP(126, EAST, phase_flag, _, _, _, _, _, _, _, _), |
1469 | PINGROUP(127, WEST, _, _, _, _, _, _, _, _, _), |
1470 | PINGROUP(128, WEST, modem_tsync, nav_pps, phase_flag, _, _, _, _, _, _), |
1471 | PINGROUP(129, WEST, phase_flag, _, _, _, _, _, _, _, _), |
1472 | PINGROUP(130, NORTH, qlink_request, phase_flag, _, _, _, _, _, _, _), |
1473 | PINGROUP(131, NORTH, qlink_enable, phase_flag, _, _, _, _, _, _, _), |
1474 | PINGROUP(132, WEST, _, phase_flag, _, _, _, _, _, _, _), |
1475 | PINGROUP(133, WEST, phase_flag, _, _, _, _, _, _, _, _), |
1476 | PINGROUP(134, WEST, phase_flag, _, _, _, _, _, _, _, _), |
1477 | PINGROUP(135, WEST, _, pa_indicator, _, _, _, _, _, _, _), |
1478 | PINGROUP(136, WEST, _, _, _, _, _, _, _, _, _), |
1479 | PINGROUP(137, WEST, _, _, _, _, _, _, _, _, _), |
1480 | PINGROUP(138, WEST, _, _, _, _, _, _, _, _, _), |
1481 | PINGROUP(139, WEST, _, _, _, _, _, _, _, _, _), |
1482 | PINGROUP(140, WEST, _, _, _, _, _, _, _, _, _), |
1483 | PINGROUP(141, WEST, _, _, _, _, _, _, _, _, _), |
1484 | PINGROUP(142, WEST, _, ssbi1, _, _, _, _, _, _, _), |
1485 | PINGROUP(143, WEST, isense_dbg, _, _, _, _, _, _, _, _), |
1486 | PINGROUP(144, WEST, mss_lte, _, _, _, _, _, _, _, _), |
1487 | PINGROUP(145, WEST, mss_lte, _, _, _, _, _, _, _, _), |
1488 | PINGROUP(146, WEST, _, _, _, _, _, _, _, _, _), |
1489 | PINGROUP(147, WEST, _, _, _, _, _, _, _, _, _), |
1490 | PINGROUP(148, WEST, _, _, _, _, _, _, _, _, _), |
1491 | PINGROUP(149, WEST, _, _, _, _, _, _, _, _, _), |
1492 | SDC_QDSD_PINGROUP(sdc2_clk, 0x999000, 14, 6), |
1493 | SDC_QDSD_PINGROUP(sdc2_cmd, 0x999000, 11, 3), |
1494 | SDC_QDSD_PINGROUP(sdc2_data, 0x999000, 9, 0), |
1495 | UFS_RESET(ufs_reset, 0x19d000), |
1496 | }; |
1497 | |
1498 | static const struct msm_gpio_wakeirq_map msm8998_mpm_map[] = { |
1499 | { 1, 3 }, { 5, 4 }, { 9, 5 }, { 11, 6 }, { 22, 8 }, { 24, 9 }, { 26, 10 }, |
1500 | { 34, 11 }, { 36, 12 }, { 37, 13 }, { 38, 14 }, { 40, 15 }, { 42, 16 }, { 46, 17 }, |
1501 | { 50, 18 }, { 53, 19 }, { 54, 20 }, { 56, 21 }, { 57, 22 }, { 58, 23 }, { 59, 24 }, |
1502 | { 60, 25 }, { 61, 26 }, { 62, 27 }, { 63, 28 }, { 64, 29 }, { 66, 7 }, { 71, 30 }, |
1503 | { 73, 31 }, { 77, 32 }, { 78, 33 }, { 79, 34 }, { 80, 35 }, { 82, 36 }, { 86, 37 }, |
1504 | { 91, 38 }, { 92, 39 }, { 95, 40 }, { 97, 41 }, { 101, 42 }, { 104, 43 }, { 106, 44 }, |
1505 | { 108, 45 }, { 110, 48 }, { 112, 46 }, { 113, 47 }, { 115, 51 }, { 116, 54 }, { 117, 55 }, |
1506 | { 118, 56 }, { 119, 57 }, { 120, 58 }, { 121, 59 }, { 122, 60 }, { 123, 61 }, { 124, 62 }, |
1507 | { 125, 63 }, { 126, 64 }, { 127, 50 }, { 129, 65 }, { 131, 66 }, { 132, 67 }, { 133, 68 }, |
1508 | }; |
1509 | |
1510 | static const struct msm_pinctrl_soc_data msm8998_pinctrl = { |
1511 | .pins = msm8998_pins, |
1512 | .npins = ARRAY_SIZE(msm8998_pins), |
1513 | .functions = msm8998_functions, |
1514 | .nfunctions = ARRAY_SIZE(msm8998_functions), |
1515 | .groups = msm8998_groups, |
1516 | .ngroups = ARRAY_SIZE(msm8998_groups), |
1517 | .ngpios = 150, |
1518 | .wakeirq_map = msm8998_mpm_map, |
1519 | .nwakeirq_map = ARRAY_SIZE(msm8998_mpm_map), |
1520 | }; |
1521 | |
1522 | static int msm8998_pinctrl_probe(struct platform_device *pdev) |
1523 | { |
1524 | return msm_pinctrl_probe(pdev, soc_data: &msm8998_pinctrl); |
1525 | } |
1526 | |
1527 | static const struct of_device_id msm8998_pinctrl_of_match[] = { |
1528 | { .compatible = "qcom,msm8998-pinctrl" , }, |
1529 | { }, |
1530 | }; |
1531 | |
1532 | static struct platform_driver msm8998_pinctrl_driver = { |
1533 | .driver = { |
1534 | .name = "msm8998-pinctrl" , |
1535 | .of_match_table = msm8998_pinctrl_of_match, |
1536 | }, |
1537 | .probe = msm8998_pinctrl_probe, |
1538 | .remove_new = msm_pinctrl_remove, |
1539 | }; |
1540 | |
1541 | static int __init msm8998_pinctrl_init(void) |
1542 | { |
1543 | return platform_driver_register(&msm8998_pinctrl_driver); |
1544 | } |
1545 | arch_initcall(msm8998_pinctrl_init); |
1546 | |
1547 | static void __exit msm8998_pinctrl_exit(void) |
1548 | { |
1549 | platform_driver_unregister(&msm8998_pinctrl_driver); |
1550 | } |
1551 | module_exit(msm8998_pinctrl_exit); |
1552 | |
1553 | MODULE_DESCRIPTION("QTI msm8998 pinctrl driver" ); |
1554 | MODULE_LICENSE("GPL v2" ); |
1555 | MODULE_DEVICE_TABLE(of, msm8998_pinctrl_of_match); |
1556 | |