1 | // SPDX-License-Identifier: GPL-2.0 |
2 | // Copyright (c) 2019, The Linux Foundation. All rights reserved. |
3 | |
4 | #include <linux/module.h> |
5 | #include <linux/of.h> |
6 | #include <linux/platform_device.h> |
7 | |
8 | #include "pinctrl-msm.h" |
9 | |
10 | static const char * const sc7180_tiles[] = { |
11 | "north" , |
12 | "south" , |
13 | "west" , |
14 | }; |
15 | |
16 | enum { |
17 | NORTH, |
18 | SOUTH, |
19 | WEST |
20 | }; |
21 | |
22 | #define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ |
23 | { \ |
24 | .grp = PINCTRL_PINGROUP("gpio" #id, \ |
25 | gpio##id##_pins, \ |
26 | ARRAY_SIZE(gpio##id##_pins)), \ |
27 | .funcs = (int[]){ \ |
28 | msm_mux_gpio, /* gpio mode */ \ |
29 | msm_mux_##f1, \ |
30 | msm_mux_##f2, \ |
31 | msm_mux_##f3, \ |
32 | msm_mux_##f4, \ |
33 | msm_mux_##f5, \ |
34 | msm_mux_##f6, \ |
35 | msm_mux_##f7, \ |
36 | msm_mux_##f8, \ |
37 | msm_mux_##f9 \ |
38 | }, \ |
39 | .nfuncs = 10, \ |
40 | .ctl_reg = 0x1000 * id, \ |
41 | .io_reg = 0x1000 * id + 0x4, \ |
42 | .intr_cfg_reg = 0x1000 * id + 0x8, \ |
43 | .intr_status_reg = 0x1000 * id + 0xc, \ |
44 | .intr_target_reg = 0x1000 * id + 0x8, \ |
45 | .tile = _tile, \ |
46 | .mux_bit = 2, \ |
47 | .pull_bit = 0, \ |
48 | .drv_bit = 6, \ |
49 | .oe_bit = 9, \ |
50 | .in_bit = 0, \ |
51 | .out_bit = 1, \ |
52 | .intr_enable_bit = 0, \ |
53 | .intr_status_bit = 0, \ |
54 | .intr_target_bit = 5, \ |
55 | .intr_target_kpss_val = 3, \ |
56 | .intr_raw_status_bit = 4, \ |
57 | .intr_polarity_bit = 1, \ |
58 | .intr_detection_bit = 2, \ |
59 | .intr_detection_width = 2, \ |
60 | } |
61 | |
62 | #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ |
63 | { \ |
64 | .grp = PINCTRL_PINGROUP(#pg_name, \ |
65 | pg_name##_pins, \ |
66 | ARRAY_SIZE(pg_name##_pins)), \ |
67 | .ctl_reg = ctl, \ |
68 | .io_reg = 0, \ |
69 | .intr_cfg_reg = 0, \ |
70 | .intr_status_reg = 0, \ |
71 | .intr_target_reg = 0, \ |
72 | .tile = SOUTH, \ |
73 | .mux_bit = -1, \ |
74 | .pull_bit = pull, \ |
75 | .drv_bit = drv, \ |
76 | .oe_bit = -1, \ |
77 | .in_bit = -1, \ |
78 | .out_bit = -1, \ |
79 | .intr_enable_bit = -1, \ |
80 | .intr_status_bit = -1, \ |
81 | .intr_target_bit = -1, \ |
82 | .intr_raw_status_bit = -1, \ |
83 | .intr_polarity_bit = -1, \ |
84 | .intr_detection_bit = -1, \ |
85 | .intr_detection_width = -1, \ |
86 | } |
87 | |
88 | #define UFS_RESET(pg_name, offset) \ |
89 | { \ |
90 | .grp = PINCTRL_PINGROUP(#pg_name, \ |
91 | pg_name##_pins, \ |
92 | ARRAY_SIZE(pg_name##_pins)), \ |
93 | .ctl_reg = offset, \ |
94 | .io_reg = offset + 0x4, \ |
95 | .intr_cfg_reg = 0, \ |
96 | .intr_status_reg = 0, \ |
97 | .intr_target_reg = 0, \ |
98 | .tile = SOUTH, \ |
99 | .mux_bit = -1, \ |
100 | .pull_bit = 3, \ |
101 | .drv_bit = 0, \ |
102 | .oe_bit = -1, \ |
103 | .in_bit = -1, \ |
104 | .out_bit = 0, \ |
105 | .intr_enable_bit = -1, \ |
106 | .intr_status_bit = -1, \ |
107 | .intr_target_bit = -1, \ |
108 | .intr_raw_status_bit = -1, \ |
109 | .intr_polarity_bit = -1, \ |
110 | .intr_detection_bit = -1, \ |
111 | .intr_detection_width = -1, \ |
112 | } |
113 | static const struct pinctrl_pin_desc sc7180_pins[] = { |
114 | PINCTRL_PIN(0, "GPIO_0" ), |
115 | PINCTRL_PIN(1, "GPIO_1" ), |
116 | PINCTRL_PIN(2, "GPIO_2" ), |
117 | PINCTRL_PIN(3, "GPIO_3" ), |
118 | PINCTRL_PIN(4, "GPIO_4" ), |
119 | PINCTRL_PIN(5, "GPIO_5" ), |
120 | PINCTRL_PIN(6, "GPIO_6" ), |
121 | PINCTRL_PIN(7, "GPIO_7" ), |
122 | PINCTRL_PIN(8, "GPIO_8" ), |
123 | PINCTRL_PIN(9, "GPIO_9" ), |
124 | PINCTRL_PIN(10, "GPIO_10" ), |
125 | PINCTRL_PIN(11, "GPIO_11" ), |
126 | PINCTRL_PIN(12, "GPIO_12" ), |
127 | PINCTRL_PIN(13, "GPIO_13" ), |
128 | PINCTRL_PIN(14, "GPIO_14" ), |
129 | PINCTRL_PIN(15, "GPIO_15" ), |
130 | PINCTRL_PIN(16, "GPIO_16" ), |
131 | PINCTRL_PIN(17, "GPIO_17" ), |
132 | PINCTRL_PIN(18, "GPIO_18" ), |
133 | PINCTRL_PIN(19, "GPIO_19" ), |
134 | PINCTRL_PIN(20, "GPIO_20" ), |
135 | PINCTRL_PIN(21, "GPIO_21" ), |
136 | PINCTRL_PIN(22, "GPIO_22" ), |
137 | PINCTRL_PIN(23, "GPIO_23" ), |
138 | PINCTRL_PIN(24, "GPIO_24" ), |
139 | PINCTRL_PIN(25, "GPIO_25" ), |
140 | PINCTRL_PIN(26, "GPIO_26" ), |
141 | PINCTRL_PIN(27, "GPIO_27" ), |
142 | PINCTRL_PIN(28, "GPIO_28" ), |
143 | PINCTRL_PIN(29, "GPIO_29" ), |
144 | PINCTRL_PIN(30, "GPIO_30" ), |
145 | PINCTRL_PIN(31, "GPIO_31" ), |
146 | PINCTRL_PIN(32, "GPIO_32" ), |
147 | PINCTRL_PIN(33, "GPIO_33" ), |
148 | PINCTRL_PIN(34, "GPIO_34" ), |
149 | PINCTRL_PIN(35, "GPIO_35" ), |
150 | PINCTRL_PIN(36, "GPIO_36" ), |
151 | PINCTRL_PIN(37, "GPIO_37" ), |
152 | PINCTRL_PIN(38, "GPIO_38" ), |
153 | PINCTRL_PIN(39, "GPIO_39" ), |
154 | PINCTRL_PIN(40, "GPIO_40" ), |
155 | PINCTRL_PIN(41, "GPIO_41" ), |
156 | PINCTRL_PIN(42, "GPIO_42" ), |
157 | PINCTRL_PIN(43, "GPIO_43" ), |
158 | PINCTRL_PIN(44, "GPIO_44" ), |
159 | PINCTRL_PIN(45, "GPIO_45" ), |
160 | PINCTRL_PIN(46, "GPIO_46" ), |
161 | PINCTRL_PIN(47, "GPIO_47" ), |
162 | PINCTRL_PIN(48, "GPIO_48" ), |
163 | PINCTRL_PIN(49, "GPIO_49" ), |
164 | PINCTRL_PIN(50, "GPIO_50" ), |
165 | PINCTRL_PIN(51, "GPIO_51" ), |
166 | PINCTRL_PIN(52, "GPIO_52" ), |
167 | PINCTRL_PIN(53, "GPIO_53" ), |
168 | PINCTRL_PIN(54, "GPIO_54" ), |
169 | PINCTRL_PIN(55, "GPIO_55" ), |
170 | PINCTRL_PIN(56, "GPIO_56" ), |
171 | PINCTRL_PIN(57, "GPIO_57" ), |
172 | PINCTRL_PIN(58, "GPIO_58" ), |
173 | PINCTRL_PIN(59, "GPIO_59" ), |
174 | PINCTRL_PIN(60, "GPIO_60" ), |
175 | PINCTRL_PIN(61, "GPIO_61" ), |
176 | PINCTRL_PIN(62, "GPIO_62" ), |
177 | PINCTRL_PIN(63, "GPIO_63" ), |
178 | PINCTRL_PIN(64, "GPIO_64" ), |
179 | PINCTRL_PIN(65, "GPIO_65" ), |
180 | PINCTRL_PIN(66, "GPIO_66" ), |
181 | PINCTRL_PIN(67, "GPIO_67" ), |
182 | PINCTRL_PIN(68, "GPIO_68" ), |
183 | PINCTRL_PIN(69, "GPIO_69" ), |
184 | PINCTRL_PIN(70, "GPIO_70" ), |
185 | PINCTRL_PIN(71, "GPIO_71" ), |
186 | PINCTRL_PIN(72, "GPIO_72" ), |
187 | PINCTRL_PIN(73, "GPIO_73" ), |
188 | PINCTRL_PIN(74, "GPIO_74" ), |
189 | PINCTRL_PIN(75, "GPIO_75" ), |
190 | PINCTRL_PIN(76, "GPIO_76" ), |
191 | PINCTRL_PIN(77, "GPIO_77" ), |
192 | PINCTRL_PIN(78, "GPIO_78" ), |
193 | PINCTRL_PIN(79, "GPIO_79" ), |
194 | PINCTRL_PIN(80, "GPIO_80" ), |
195 | PINCTRL_PIN(81, "GPIO_81" ), |
196 | PINCTRL_PIN(82, "GPIO_82" ), |
197 | PINCTRL_PIN(83, "GPIO_83" ), |
198 | PINCTRL_PIN(84, "GPIO_84" ), |
199 | PINCTRL_PIN(85, "GPIO_85" ), |
200 | PINCTRL_PIN(86, "GPIO_86" ), |
201 | PINCTRL_PIN(87, "GPIO_87" ), |
202 | PINCTRL_PIN(88, "GPIO_88" ), |
203 | PINCTRL_PIN(89, "GPIO_89" ), |
204 | PINCTRL_PIN(90, "GPIO_90" ), |
205 | PINCTRL_PIN(91, "GPIO_91" ), |
206 | PINCTRL_PIN(92, "GPIO_92" ), |
207 | PINCTRL_PIN(93, "GPIO_93" ), |
208 | PINCTRL_PIN(94, "GPIO_94" ), |
209 | PINCTRL_PIN(95, "GPIO_95" ), |
210 | PINCTRL_PIN(96, "GPIO_96" ), |
211 | PINCTRL_PIN(97, "GPIO_97" ), |
212 | PINCTRL_PIN(98, "GPIO_98" ), |
213 | PINCTRL_PIN(99, "GPIO_99" ), |
214 | PINCTRL_PIN(100, "GPIO_100" ), |
215 | PINCTRL_PIN(101, "GPIO_101" ), |
216 | PINCTRL_PIN(102, "GPIO_102" ), |
217 | PINCTRL_PIN(103, "GPIO_103" ), |
218 | PINCTRL_PIN(104, "GPIO_104" ), |
219 | PINCTRL_PIN(105, "GPIO_105" ), |
220 | PINCTRL_PIN(106, "GPIO_106" ), |
221 | PINCTRL_PIN(107, "GPIO_107" ), |
222 | PINCTRL_PIN(108, "GPIO_108" ), |
223 | PINCTRL_PIN(109, "GPIO_109" ), |
224 | PINCTRL_PIN(110, "GPIO_110" ), |
225 | PINCTRL_PIN(111, "GPIO_111" ), |
226 | PINCTRL_PIN(112, "GPIO_112" ), |
227 | PINCTRL_PIN(113, "GPIO_113" ), |
228 | PINCTRL_PIN(114, "GPIO_114" ), |
229 | PINCTRL_PIN(115, "GPIO_115" ), |
230 | PINCTRL_PIN(116, "GPIO_116" ), |
231 | PINCTRL_PIN(117, "GPIO_117" ), |
232 | PINCTRL_PIN(118, "GPIO_118" ), |
233 | PINCTRL_PIN(119, "UFS_RESET" ), |
234 | PINCTRL_PIN(120, "SDC1_RCLK" ), |
235 | PINCTRL_PIN(121, "SDC1_CLK" ), |
236 | PINCTRL_PIN(122, "SDC1_CMD" ), |
237 | PINCTRL_PIN(123, "SDC1_DATA" ), |
238 | PINCTRL_PIN(124, "SDC2_CLK" ), |
239 | PINCTRL_PIN(125, "SDC2_CMD" ), |
240 | PINCTRL_PIN(126, "SDC2_DATA" ), |
241 | }; |
242 | |
243 | #define DECLARE_MSM_GPIO_PINS(pin) \ |
244 | static const unsigned int gpio##pin##_pins[] = { pin } |
245 | DECLARE_MSM_GPIO_PINS(0); |
246 | DECLARE_MSM_GPIO_PINS(1); |
247 | DECLARE_MSM_GPIO_PINS(2); |
248 | DECLARE_MSM_GPIO_PINS(3); |
249 | DECLARE_MSM_GPIO_PINS(4); |
250 | DECLARE_MSM_GPIO_PINS(5); |
251 | DECLARE_MSM_GPIO_PINS(6); |
252 | DECLARE_MSM_GPIO_PINS(7); |
253 | DECLARE_MSM_GPIO_PINS(8); |
254 | DECLARE_MSM_GPIO_PINS(9); |
255 | DECLARE_MSM_GPIO_PINS(10); |
256 | DECLARE_MSM_GPIO_PINS(11); |
257 | DECLARE_MSM_GPIO_PINS(12); |
258 | DECLARE_MSM_GPIO_PINS(13); |
259 | DECLARE_MSM_GPIO_PINS(14); |
260 | DECLARE_MSM_GPIO_PINS(15); |
261 | DECLARE_MSM_GPIO_PINS(16); |
262 | DECLARE_MSM_GPIO_PINS(17); |
263 | DECLARE_MSM_GPIO_PINS(18); |
264 | DECLARE_MSM_GPIO_PINS(19); |
265 | DECLARE_MSM_GPIO_PINS(20); |
266 | DECLARE_MSM_GPIO_PINS(21); |
267 | DECLARE_MSM_GPIO_PINS(22); |
268 | DECLARE_MSM_GPIO_PINS(23); |
269 | DECLARE_MSM_GPIO_PINS(24); |
270 | DECLARE_MSM_GPIO_PINS(25); |
271 | DECLARE_MSM_GPIO_PINS(26); |
272 | DECLARE_MSM_GPIO_PINS(27); |
273 | DECLARE_MSM_GPIO_PINS(28); |
274 | DECLARE_MSM_GPIO_PINS(29); |
275 | DECLARE_MSM_GPIO_PINS(30); |
276 | DECLARE_MSM_GPIO_PINS(31); |
277 | DECLARE_MSM_GPIO_PINS(32); |
278 | DECLARE_MSM_GPIO_PINS(33); |
279 | DECLARE_MSM_GPIO_PINS(34); |
280 | DECLARE_MSM_GPIO_PINS(35); |
281 | DECLARE_MSM_GPIO_PINS(36); |
282 | DECLARE_MSM_GPIO_PINS(37); |
283 | DECLARE_MSM_GPIO_PINS(38); |
284 | DECLARE_MSM_GPIO_PINS(39); |
285 | DECLARE_MSM_GPIO_PINS(40); |
286 | DECLARE_MSM_GPIO_PINS(41); |
287 | DECLARE_MSM_GPIO_PINS(42); |
288 | DECLARE_MSM_GPIO_PINS(43); |
289 | DECLARE_MSM_GPIO_PINS(44); |
290 | DECLARE_MSM_GPIO_PINS(45); |
291 | DECLARE_MSM_GPIO_PINS(46); |
292 | DECLARE_MSM_GPIO_PINS(47); |
293 | DECLARE_MSM_GPIO_PINS(48); |
294 | DECLARE_MSM_GPIO_PINS(49); |
295 | DECLARE_MSM_GPIO_PINS(50); |
296 | DECLARE_MSM_GPIO_PINS(51); |
297 | DECLARE_MSM_GPIO_PINS(52); |
298 | DECLARE_MSM_GPIO_PINS(53); |
299 | DECLARE_MSM_GPIO_PINS(54); |
300 | DECLARE_MSM_GPIO_PINS(55); |
301 | DECLARE_MSM_GPIO_PINS(56); |
302 | DECLARE_MSM_GPIO_PINS(57); |
303 | DECLARE_MSM_GPIO_PINS(58); |
304 | DECLARE_MSM_GPIO_PINS(59); |
305 | DECLARE_MSM_GPIO_PINS(60); |
306 | DECLARE_MSM_GPIO_PINS(61); |
307 | DECLARE_MSM_GPIO_PINS(62); |
308 | DECLARE_MSM_GPIO_PINS(63); |
309 | DECLARE_MSM_GPIO_PINS(64); |
310 | DECLARE_MSM_GPIO_PINS(65); |
311 | DECLARE_MSM_GPIO_PINS(66); |
312 | DECLARE_MSM_GPIO_PINS(67); |
313 | DECLARE_MSM_GPIO_PINS(68); |
314 | DECLARE_MSM_GPIO_PINS(69); |
315 | DECLARE_MSM_GPIO_PINS(70); |
316 | DECLARE_MSM_GPIO_PINS(71); |
317 | DECLARE_MSM_GPIO_PINS(72); |
318 | DECLARE_MSM_GPIO_PINS(73); |
319 | DECLARE_MSM_GPIO_PINS(74); |
320 | DECLARE_MSM_GPIO_PINS(75); |
321 | DECLARE_MSM_GPIO_PINS(76); |
322 | DECLARE_MSM_GPIO_PINS(77); |
323 | DECLARE_MSM_GPIO_PINS(78); |
324 | DECLARE_MSM_GPIO_PINS(79); |
325 | DECLARE_MSM_GPIO_PINS(80); |
326 | DECLARE_MSM_GPIO_PINS(81); |
327 | DECLARE_MSM_GPIO_PINS(82); |
328 | DECLARE_MSM_GPIO_PINS(83); |
329 | DECLARE_MSM_GPIO_PINS(84); |
330 | DECLARE_MSM_GPIO_PINS(85); |
331 | DECLARE_MSM_GPIO_PINS(86); |
332 | DECLARE_MSM_GPIO_PINS(87); |
333 | DECLARE_MSM_GPIO_PINS(88); |
334 | DECLARE_MSM_GPIO_PINS(89); |
335 | DECLARE_MSM_GPIO_PINS(90); |
336 | DECLARE_MSM_GPIO_PINS(91); |
337 | DECLARE_MSM_GPIO_PINS(92); |
338 | DECLARE_MSM_GPIO_PINS(93); |
339 | DECLARE_MSM_GPIO_PINS(94); |
340 | DECLARE_MSM_GPIO_PINS(95); |
341 | DECLARE_MSM_GPIO_PINS(96); |
342 | DECLARE_MSM_GPIO_PINS(97); |
343 | DECLARE_MSM_GPIO_PINS(98); |
344 | DECLARE_MSM_GPIO_PINS(99); |
345 | DECLARE_MSM_GPIO_PINS(100); |
346 | DECLARE_MSM_GPIO_PINS(101); |
347 | DECLARE_MSM_GPIO_PINS(102); |
348 | DECLARE_MSM_GPIO_PINS(103); |
349 | DECLARE_MSM_GPIO_PINS(104); |
350 | DECLARE_MSM_GPIO_PINS(105); |
351 | DECLARE_MSM_GPIO_PINS(106); |
352 | DECLARE_MSM_GPIO_PINS(107); |
353 | DECLARE_MSM_GPIO_PINS(108); |
354 | DECLARE_MSM_GPIO_PINS(109); |
355 | DECLARE_MSM_GPIO_PINS(110); |
356 | DECLARE_MSM_GPIO_PINS(111); |
357 | DECLARE_MSM_GPIO_PINS(112); |
358 | DECLARE_MSM_GPIO_PINS(113); |
359 | DECLARE_MSM_GPIO_PINS(114); |
360 | DECLARE_MSM_GPIO_PINS(115); |
361 | DECLARE_MSM_GPIO_PINS(116); |
362 | DECLARE_MSM_GPIO_PINS(117); |
363 | DECLARE_MSM_GPIO_PINS(118); |
364 | |
365 | static const unsigned int ufs_reset_pins[] = { 119 }; |
366 | static const unsigned int sdc1_rclk_pins[] = { 120 }; |
367 | static const unsigned int sdc1_clk_pins[] = { 121 }; |
368 | static const unsigned int sdc1_cmd_pins[] = { 122 }; |
369 | static const unsigned int sdc1_data_pins[] = { 123 }; |
370 | static const unsigned int sdc2_clk_pins[] = { 124 }; |
371 | static const unsigned int sdc2_cmd_pins[] = { 125 }; |
372 | static const unsigned int sdc2_data_pins[] = { 126 }; |
373 | |
374 | enum sc7180_functions { |
375 | msm_mux_adsp_ext, |
376 | msm_mux_agera_pll, |
377 | msm_mux_aoss_cti, |
378 | msm_mux_atest_char, |
379 | msm_mux_atest_char0, |
380 | msm_mux_atest_char1, |
381 | msm_mux_atest_char2, |
382 | msm_mux_atest_char3, |
383 | msm_mux_atest_tsens, |
384 | msm_mux_atest_tsens2, |
385 | msm_mux_atest_usb1, |
386 | msm_mux_atest_usb2, |
387 | msm_mux_atest_usb10, |
388 | msm_mux_atest_usb11, |
389 | msm_mux_atest_usb12, |
390 | msm_mux_atest_usb13, |
391 | msm_mux_atest_usb20, |
392 | msm_mux_atest_usb21, |
393 | msm_mux_atest_usb22, |
394 | msm_mux_atest_usb23, |
395 | msm_mux_audio_ref, |
396 | msm_mux_btfm_slimbus, |
397 | msm_mux_cam_mclk, |
398 | msm_mux_cci_async, |
399 | msm_mux_cci_i2c, |
400 | msm_mux_cci_timer0, |
401 | msm_mux_cci_timer1, |
402 | msm_mux_cci_timer2, |
403 | msm_mux_cci_timer3, |
404 | msm_mux_cci_timer4, |
405 | msm_mux_cri_trng, |
406 | msm_mux_dbg_out, |
407 | msm_mux_ddr_bist, |
408 | msm_mux_ddr_pxi0, |
409 | msm_mux_ddr_pxi1, |
410 | msm_mux_ddr_pxi2, |
411 | msm_mux_ddr_pxi3, |
412 | msm_mux_dp_hot, |
413 | msm_mux_edp_lcd, |
414 | msm_mux_gcc_gp1, |
415 | msm_mux_gcc_gp2, |
416 | msm_mux_gcc_gp3, |
417 | msm_mux_gpio, |
418 | msm_mux_gp_pdm0, |
419 | msm_mux_gp_pdm1, |
420 | msm_mux_gp_pdm2, |
421 | msm_mux_gps_tx, |
422 | msm_mux_jitter_bist, |
423 | msm_mux_ldo_en, |
424 | msm_mux_ldo_update, |
425 | msm_mux_lpass_ext, |
426 | msm_mux_mdp_vsync, |
427 | msm_mux_mdp_vsync0, |
428 | msm_mux_mdp_vsync1, |
429 | msm_mux_mdp_vsync2, |
430 | msm_mux_mdp_vsync3, |
431 | msm_mux_mi2s_1, |
432 | msm_mux_mi2s_0, |
433 | msm_mux_mi2s_2, |
434 | msm_mux_mss_lte, |
435 | msm_mux_m_voc, |
436 | msm_mux_pa_indicator, |
437 | msm_mux_phase_flag, |
438 | msm_mux_PLL_BIST, |
439 | msm_mux_pll_bypassnl, |
440 | msm_mux_pll_reset, |
441 | msm_mux_prng_rosc, |
442 | msm_mux_qdss, |
443 | msm_mux_qdss_cti, |
444 | msm_mux_qlink_enable, |
445 | msm_mux_qlink_request, |
446 | msm_mux_qspi_clk, |
447 | msm_mux_qspi_cs, |
448 | msm_mux_qspi_data, |
449 | msm_mux_qup00, |
450 | msm_mux_qup01, |
451 | msm_mux_qup02_i2c, |
452 | msm_mux_qup02_uart, |
453 | msm_mux_qup03, |
454 | msm_mux_qup04_i2c, |
455 | msm_mux_qup04_uart, |
456 | msm_mux_qup05, |
457 | msm_mux_qup10, |
458 | msm_mux_qup11_i2c, |
459 | msm_mux_qup11_uart, |
460 | msm_mux_qup12, |
461 | msm_mux_qup13_i2c, |
462 | msm_mux_qup13_uart, |
463 | msm_mux_qup14, |
464 | msm_mux_qup15, |
465 | msm_mux_sdc1_tb, |
466 | msm_mux_sdc2_tb, |
467 | msm_mux_sd_write, |
468 | msm_mux_sp_cmu, |
469 | msm_mux_tgu_ch0, |
470 | msm_mux_tgu_ch1, |
471 | msm_mux_tgu_ch2, |
472 | msm_mux_tgu_ch3, |
473 | msm_mux_tsense_pwm1, |
474 | msm_mux_tsense_pwm2, |
475 | msm_mux_uim1, |
476 | msm_mux_uim2, |
477 | msm_mux_uim_batt, |
478 | msm_mux_usb_phy, |
479 | msm_mux_vfr_1, |
480 | msm_mux__V_GPIO, |
481 | msm_mux__V_PPS_IN, |
482 | msm_mux__V_PPS_OUT, |
483 | msm_mux_vsense_trigger, |
484 | msm_mux_wlan1_adc0, |
485 | msm_mux_wlan1_adc1, |
486 | msm_mux_wlan2_adc0, |
487 | msm_mux_wlan2_adc1, |
488 | msm_mux__, |
489 | }; |
490 | |
491 | static const char * const qup01_groups[] = { |
492 | "gpio0" , "gpio1" , "gpio2" , "gpio3" , "gpio12" , "gpio94" , |
493 | }; |
494 | static const char * const gpio_groups[] = { |
495 | "gpio0" , "gpio1" , "gpio2" , "gpio3" , "gpio4" , "gpio5" , "gpio6" , "gpio7" , |
496 | "gpio8" , "gpio9" , "gpio10" , "gpio11" , "gpio12" , "gpio13" , "gpio14" , |
497 | "gpio15" , "gpio16" , "gpio17" , "gpio18" , "gpio19" , "gpio20" , "gpio21" , |
498 | "gpio22" , "gpio23" , "gpio24" , "gpio25" , "gpio26" , "gpio27" , "gpio28" , |
499 | "gpio29" , "gpio30" , "gpio31" , "gpio32" , "gpio33" , "gpio34" , "gpio35" , |
500 | "gpio36" , "gpio37" , "gpio38" , "gpio39" , "gpio40" , "gpio41" , "gpio42" , |
501 | "gpio43" , "gpio44" , "gpio45" , "gpio46" , "gpio47" , "gpio48" , "gpio49" , |
502 | "gpio50" , "gpio51" , "gpio52" , "gpio53" , "gpio54" , "gpio55" , "gpio56" , |
503 | "gpio57" , "gpio58" , "gpio59" , "gpio60" , "gpio61" , "gpio62" , "gpio63" , |
504 | "gpio64" , "gpio65" , "gpio66" , "gpio67" , "gpio68" , "gpio69" , "gpio70" , |
505 | "gpio71" , "gpio72" , "gpio73" , "gpio74" , "gpio75" , "gpio76" , "gpio77" , |
506 | "gpio78" , "gpio79" , "gpio80" , "gpio81" , "gpio82" , "gpio83" , "gpio84" , |
507 | "gpio85" , "gpio86" , "gpio87" , "gpio88" , "gpio89" , "gpio90" , "gpio91" , |
508 | "gpio92" , "gpio93" , "gpio94" , "gpio95" , "gpio96" , "gpio97" , "gpio98" , |
509 | "gpio99" , "gpio100" , "gpio101" , "gpio102" , "gpio103" , "gpio104" , |
510 | "gpio105" , "gpio106" , "gpio107" , "gpio108" , "gpio109" , "gpio110" , |
511 | "gpio111" , "gpio112" , "gpio113" , "gpio114" , "gpio115" , "gpio116" , |
512 | "gpio117" , "gpio118" , |
513 | }; |
514 | static const char * const phase_flag_groups[] = { |
515 | "gpio0" , "gpio1" , "gpio2" , "gpio8" , "gpio9" , |
516 | "gpio11" , "gpio12" , "gpio17" , "gpio18" , "gpio19" , |
517 | "gpio20" , "gpio25" , "gpio26" , "gpio27" , "gpio28" , |
518 | "gpio32" , "gpio33" , "gpio34" , "gpio35" , "gpio36" , |
519 | "gpio37" , "gpio38" , "gpio39" , "gpio42" , "gpio44" , |
520 | "gpio56" , "gpio57" , "gpio58" , "gpio63" , "gpio64" , |
521 | "gpio108" , "gpio109" , |
522 | }; |
523 | static const char * const cri_trng_groups[] = { |
524 | "gpio0" , "gpio1" , "gpio2" , |
525 | }; |
526 | static const char * const sp_cmu_groups[] = { |
527 | "gpio3" , |
528 | }; |
529 | static const char * const dbg_out_groups[] = { |
530 | "gpio3" , |
531 | }; |
532 | static const char * const qdss_cti_groups[] = { |
533 | "gpio3" , "gpio4" , "gpio8" , "gpio9" , "gpio33" , "gpio44" , "gpio45" , |
534 | "gpio72" , |
535 | }; |
536 | static const char * const sdc1_tb_groups[] = { |
537 | "gpio4" , |
538 | }; |
539 | static const char * const sdc2_tb_groups[] = { |
540 | "gpio5" , |
541 | }; |
542 | static const char * const qup11_i2c_groups[] = { |
543 | "gpio6" , "gpio7" , |
544 | }; |
545 | static const char * const qup11_uart_groups[] = { |
546 | "gpio6" , "gpio7" , |
547 | }; |
548 | static const char * const ddr_bist_groups[] = { |
549 | "gpio7" , "gpio8" , "gpio9" , "gpio10" , |
550 | }; |
551 | static const char * const gp_pdm1_groups[] = { |
552 | "gpio8" , "gpio50" , |
553 | }; |
554 | static const char * const mdp_vsync_groups[] = { |
555 | "gpio10" , "gpio11" , "gpio12" , "gpio70" , "gpio71" , |
556 | }; |
557 | static const char * const edp_lcd_groups[] = { |
558 | "gpio11" , |
559 | }; |
560 | static const char * const ddr_pxi2_groups[] = { |
561 | "gpio11" , "gpio26" , |
562 | }; |
563 | static const char * const m_voc_groups[] = { |
564 | "gpio12" , |
565 | }; |
566 | static const char * const wlan2_adc0_groups[] = { |
567 | "gpio12" , |
568 | }; |
569 | static const char * const atest_usb10_groups[] = { |
570 | "gpio12" , |
571 | }; |
572 | static const char * const ddr_pxi3_groups[] = { |
573 | "gpio12" , "gpio108" , |
574 | }; |
575 | static const char * const cam_mclk_groups[] = { |
576 | "gpio13" , "gpio14" , "gpio15" , "gpio16" , "gpio23" , |
577 | }; |
578 | static const char * const pll_bypassnl_groups[] = { |
579 | "gpio13" , |
580 | }; |
581 | static const char * const qdss_groups[] = { |
582 | "gpio13" , "gpio86" , "gpio14" , "gpio87" , |
583 | "gpio15" , "gpio88" , "gpio16" , "gpio89" , |
584 | "gpio17" , "gpio90" , "gpio18" , "gpio91" , |
585 | "gpio19" , "gpio21" , "gpio20" , "gpio22" , |
586 | "gpio23" , "gpio54" , "gpio24" , "gpio36" , |
587 | "gpio25" , "gpio57" , "gpio26" , "gpio31" , |
588 | "gpio27" , "gpio56" , "gpio28" , "gpio29" , |
589 | "gpio30" , "gpio35" , "gpio93" , "gpio104" , |
590 | "gpio34" , "gpio53" , "gpio37" , "gpio55" , |
591 | }; |
592 | static const char * const pll_reset_groups[] = { |
593 | "gpio14" , |
594 | }; |
595 | static const char * const qup02_i2c_groups[] = { |
596 | "gpio15" , "gpio16" , |
597 | }; |
598 | static const char * const qup02_uart_groups[] = { |
599 | "gpio15" , "gpio16" , |
600 | }; |
601 | static const char * const cci_i2c_groups[] = { |
602 | "gpio17" , "gpio18" , "gpio19" , "gpio20" , "gpio27" , "gpio28" , |
603 | }; |
604 | static const char * const wlan1_adc0_groups[] = { |
605 | "gpio17" , |
606 | }; |
607 | static const char * const atest_usb12_groups[] = { |
608 | "gpio17" , |
609 | }; |
610 | static const char * const ddr_pxi1_groups[] = { |
611 | "gpio17" , "gpio44" , |
612 | }; |
613 | static const char * const atest_char_groups[] = { |
614 | "gpio17" , |
615 | }; |
616 | static const char * const agera_pll_groups[] = { |
617 | "gpio18" , |
618 | }; |
619 | static const char * const vsense_trigger_groups[] = { |
620 | "gpio18" , |
621 | }; |
622 | static const char * const ddr_pxi0_groups[] = { |
623 | "gpio18" , "gpio27" , |
624 | }; |
625 | static const char * const atest_char3_groups[] = { |
626 | "gpio18" , |
627 | }; |
628 | static const char * const atest_char2_groups[] = { |
629 | "gpio19" , |
630 | }; |
631 | static const char * const atest_char1_groups[] = { |
632 | "gpio20" , |
633 | }; |
634 | static const char * const cci_timer0_groups[] = { |
635 | "gpio21" , |
636 | }; |
637 | static const char * const gcc_gp2_groups[] = { |
638 | "gpio21" , |
639 | }; |
640 | static const char * const atest_char0_groups[] = { |
641 | "gpio21" , |
642 | }; |
643 | static const char * const cci_timer1_groups[] = { |
644 | "gpio22" , |
645 | }; |
646 | static const char * const gcc_gp3_groups[] = { |
647 | "gpio22" , |
648 | }; |
649 | static const char * const cci_timer2_groups[] = { |
650 | "gpio23" , |
651 | }; |
652 | static const char * const cci_timer3_groups[] = { |
653 | "gpio24" , |
654 | }; |
655 | static const char * const cci_async_groups[] = { |
656 | "gpio24" , "gpio25" , "gpio26" , |
657 | }; |
658 | static const char * const cci_timer4_groups[] = { |
659 | "gpio25" , |
660 | }; |
661 | static const char * const qup05_groups[] = { |
662 | "gpio25" , "gpio26" , "gpio27" , "gpio28" , |
663 | }; |
664 | static const char * const atest_tsens_groups[] = { |
665 | "gpio26" , |
666 | }; |
667 | static const char * const atest_usb11_groups[] = { |
668 | "gpio26" , |
669 | }; |
670 | static const char * const PLL_BIST_groups[] = { |
671 | "gpio27" , |
672 | }; |
673 | static const char * const sd_write_groups[] = { |
674 | "gpio33" , |
675 | }; |
676 | static const char * const qup00_groups[] = { |
677 | "gpio34" , "gpio35" , "gpio36" , "gpio37" , |
678 | }; |
679 | static const char * const gp_pdm0_groups[] = { |
680 | "gpio37" , "gpio68" , |
681 | }; |
682 | static const char * const qup03_groups[] = { |
683 | "gpio38" , "gpio39" , "gpio40" , "gpio41" , |
684 | }; |
685 | static const char * const atest_tsens2_groups[] = { |
686 | "gpio39" , |
687 | }; |
688 | static const char * const wlan2_adc1_groups[] = { |
689 | "gpio39" , |
690 | }; |
691 | static const char * const atest_usb1_groups[] = { |
692 | "gpio39" , |
693 | }; |
694 | static const char * const qup12_groups[] = { |
695 | "gpio42" , "gpio43" , "gpio44" , "gpio45" , |
696 | }; |
697 | static const char * const wlan1_adc1_groups[] = { |
698 | "gpio44" , |
699 | }; |
700 | static const char * const atest_usb13_groups[] = { |
701 | "gpio44" , |
702 | }; |
703 | static const char * const qup13_i2c_groups[] = { |
704 | "gpio46" , "gpio47" , |
705 | }; |
706 | static const char * const qup13_uart_groups[] = { |
707 | "gpio46" , "gpio47" , |
708 | }; |
709 | static const char * const gcc_gp1_groups[] = { |
710 | "gpio48" , "gpio56" , |
711 | }; |
712 | static const char * const mi2s_1_groups[] = { |
713 | "gpio49" , "gpio50" , "gpio51" , "gpio52" , |
714 | }; |
715 | static const char * const btfm_slimbus_groups[] = { |
716 | "gpio49" , "gpio50" , "gpio51" , "gpio52" , |
717 | }; |
718 | static const char * const atest_usb2_groups[] = { |
719 | "gpio51" , |
720 | }; |
721 | static const char * const atest_usb23_groups[] = { |
722 | "gpio52" , |
723 | }; |
724 | static const char * const mi2s_0_groups[] = { |
725 | "gpio53" , "gpio54" , "gpio55" , "gpio56" , |
726 | }; |
727 | static const char * const qup15_groups[] = { |
728 | "gpio53" , "gpio54" , "gpio55" , "gpio56" , |
729 | }; |
730 | static const char * const atest_usb22_groups[] = { |
731 | "gpio53" , |
732 | }; |
733 | static const char * const atest_usb21_groups[] = { |
734 | "gpio54" , |
735 | }; |
736 | static const char * const atest_usb20_groups[] = { |
737 | "gpio55" , |
738 | }; |
739 | static const char * const lpass_ext_groups[] = { |
740 | "gpio57" , "gpio58" , |
741 | }; |
742 | static const char * const audio_ref_groups[] = { |
743 | "gpio57" , |
744 | }; |
745 | static const char * const jitter_bist_groups[] = { |
746 | "gpio57" , |
747 | }; |
748 | static const char * const gp_pdm2_groups[] = { |
749 | "gpio57" , |
750 | }; |
751 | static const char * const qup10_groups[] = { |
752 | "gpio59" , "gpio60" , "gpio61" , "gpio62" , "gpio68" , "gpio72" , |
753 | }; |
754 | static const char * const tgu_ch3_groups[] = { |
755 | "gpio62" , |
756 | }; |
757 | static const char * const qspi_clk_groups[] = { |
758 | "gpio63" , |
759 | }; |
760 | static const char * const mdp_vsync0_groups[] = { |
761 | "gpio63" , |
762 | }; |
763 | static const char * const mi2s_2_groups[] = { |
764 | "gpio63" , "gpio64" , "gpio65" , "gpio66" , |
765 | }; |
766 | static const char * const mdp_vsync1_groups[] = { |
767 | "gpio63" , |
768 | }; |
769 | static const char * const mdp_vsync2_groups[] = { |
770 | "gpio63" , |
771 | }; |
772 | static const char * const mdp_vsync3_groups[] = { |
773 | "gpio63" , |
774 | }; |
775 | static const char * const tgu_ch0_groups[] = { |
776 | "gpio63" , |
777 | }; |
778 | static const char * const qspi_data_groups[] = { |
779 | "gpio64" , "gpio65" , "gpio66" , "gpio67" , |
780 | }; |
781 | static const char * const tgu_ch1_groups[] = { |
782 | "gpio64" , |
783 | }; |
784 | static const char * const vfr_1_groups[] = { |
785 | "gpio65" , |
786 | }; |
787 | static const char * const tgu_ch2_groups[] = { |
788 | "gpio65" , |
789 | }; |
790 | static const char * const qspi_cs_groups[] = { |
791 | "gpio68" , "gpio72" , |
792 | }; |
793 | static const char * const ldo_en_groups[] = { |
794 | "gpio70" , |
795 | }; |
796 | static const char * const ldo_update_groups[] = { |
797 | "gpio71" , |
798 | }; |
799 | static const char * const prng_rosc_groups[] = { |
800 | "gpio72" , |
801 | }; |
802 | static const char * const uim2_groups[] = { |
803 | "gpio75" , "gpio76" , "gpio77" , "gpio78" , |
804 | }; |
805 | static const char * const uim1_groups[] = { |
806 | "gpio79" , "gpio80" , "gpio81" , "gpio82" , |
807 | }; |
808 | static const char * const _V_GPIO_groups[] = { |
809 | "gpio83" , "gpio84" , "gpio107" , |
810 | }; |
811 | static const char * const _V_PPS_IN_groups[] = { |
812 | "gpio83" , "gpio84" , "gpio107" , |
813 | }; |
814 | static const char * const _V_PPS_OUT_groups[] = { |
815 | "gpio83" , "gpio84" , "gpio107" , |
816 | }; |
817 | static const char * const gps_tx_groups[] = { |
818 | "gpio83" , "gpio84" , "gpio107" , "gpio109" , |
819 | }; |
820 | static const char * const uim_batt_groups[] = { |
821 | "gpio85" , |
822 | }; |
823 | static const char * const dp_hot_groups[] = { |
824 | "gpio85" , "gpio117" , |
825 | }; |
826 | static const char * const aoss_cti_groups[] = { |
827 | "gpio85" , |
828 | }; |
829 | static const char * const qup14_groups[] = { |
830 | "gpio86" , "gpio87" , "gpio88" , "gpio89" , "gpio90" , "gpio91" , |
831 | }; |
832 | static const char * const adsp_ext_groups[] = { |
833 | "gpio87" , |
834 | }; |
835 | static const char * const tsense_pwm1_groups[] = { |
836 | "gpio88" , |
837 | }; |
838 | static const char * const tsense_pwm2_groups[] = { |
839 | "gpio88" , |
840 | }; |
841 | static const char * const qlink_request_groups[] = { |
842 | "gpio96" , |
843 | }; |
844 | static const char * const qlink_enable_groups[] = { |
845 | "gpio97" , |
846 | }; |
847 | static const char * const pa_indicator_groups[] = { |
848 | "gpio99" , |
849 | }; |
850 | static const char * const usb_phy_groups[] = { |
851 | "gpio104" , |
852 | }; |
853 | static const char * const mss_lte_groups[] = { |
854 | "gpio108" , "gpio109" , |
855 | }; |
856 | static const char * const qup04_i2c_groups[] = { |
857 | "gpio115" , "gpio116" , |
858 | }; |
859 | static const char * const qup04_uart_groups[] = { |
860 | "gpio115" , "gpio116" , |
861 | }; |
862 | |
863 | static const struct pinfunction sc7180_functions[] = { |
864 | MSM_PIN_FUNCTION(adsp_ext), |
865 | MSM_PIN_FUNCTION(agera_pll), |
866 | MSM_PIN_FUNCTION(aoss_cti), |
867 | MSM_PIN_FUNCTION(atest_char), |
868 | MSM_PIN_FUNCTION(atest_char0), |
869 | MSM_PIN_FUNCTION(atest_char1), |
870 | MSM_PIN_FUNCTION(atest_char2), |
871 | MSM_PIN_FUNCTION(atest_char3), |
872 | MSM_PIN_FUNCTION(atest_tsens), |
873 | MSM_PIN_FUNCTION(atest_tsens2), |
874 | MSM_PIN_FUNCTION(atest_usb1), |
875 | MSM_PIN_FUNCTION(atest_usb2), |
876 | MSM_PIN_FUNCTION(atest_usb10), |
877 | MSM_PIN_FUNCTION(atest_usb11), |
878 | MSM_PIN_FUNCTION(atest_usb12), |
879 | MSM_PIN_FUNCTION(atest_usb13), |
880 | MSM_PIN_FUNCTION(atest_usb20), |
881 | MSM_PIN_FUNCTION(atest_usb21), |
882 | MSM_PIN_FUNCTION(atest_usb22), |
883 | MSM_PIN_FUNCTION(atest_usb23), |
884 | MSM_PIN_FUNCTION(audio_ref), |
885 | MSM_PIN_FUNCTION(btfm_slimbus), |
886 | MSM_PIN_FUNCTION(cam_mclk), |
887 | MSM_PIN_FUNCTION(cci_async), |
888 | MSM_PIN_FUNCTION(cci_i2c), |
889 | MSM_PIN_FUNCTION(cci_timer0), |
890 | MSM_PIN_FUNCTION(cci_timer1), |
891 | MSM_PIN_FUNCTION(cci_timer2), |
892 | MSM_PIN_FUNCTION(cci_timer3), |
893 | MSM_PIN_FUNCTION(cci_timer4), |
894 | MSM_PIN_FUNCTION(cri_trng), |
895 | MSM_PIN_FUNCTION(dbg_out), |
896 | MSM_PIN_FUNCTION(ddr_bist), |
897 | MSM_PIN_FUNCTION(ddr_pxi0), |
898 | MSM_PIN_FUNCTION(ddr_pxi1), |
899 | MSM_PIN_FUNCTION(ddr_pxi2), |
900 | MSM_PIN_FUNCTION(ddr_pxi3), |
901 | MSM_PIN_FUNCTION(dp_hot), |
902 | MSM_PIN_FUNCTION(edp_lcd), |
903 | MSM_PIN_FUNCTION(gcc_gp1), |
904 | MSM_PIN_FUNCTION(gcc_gp2), |
905 | MSM_PIN_FUNCTION(gcc_gp3), |
906 | MSM_PIN_FUNCTION(gpio), |
907 | MSM_PIN_FUNCTION(gp_pdm0), |
908 | MSM_PIN_FUNCTION(gp_pdm1), |
909 | MSM_PIN_FUNCTION(gp_pdm2), |
910 | MSM_PIN_FUNCTION(gps_tx), |
911 | MSM_PIN_FUNCTION(jitter_bist), |
912 | MSM_PIN_FUNCTION(ldo_en), |
913 | MSM_PIN_FUNCTION(ldo_update), |
914 | MSM_PIN_FUNCTION(lpass_ext), |
915 | MSM_PIN_FUNCTION(mdp_vsync), |
916 | MSM_PIN_FUNCTION(mdp_vsync0), |
917 | MSM_PIN_FUNCTION(mdp_vsync1), |
918 | MSM_PIN_FUNCTION(mdp_vsync2), |
919 | MSM_PIN_FUNCTION(mdp_vsync3), |
920 | MSM_PIN_FUNCTION(mi2s_0), |
921 | MSM_PIN_FUNCTION(mi2s_1), |
922 | MSM_PIN_FUNCTION(mi2s_2), |
923 | MSM_PIN_FUNCTION(mss_lte), |
924 | MSM_PIN_FUNCTION(m_voc), |
925 | MSM_PIN_FUNCTION(pa_indicator), |
926 | MSM_PIN_FUNCTION(phase_flag), |
927 | MSM_PIN_FUNCTION(PLL_BIST), |
928 | MSM_PIN_FUNCTION(pll_bypassnl), |
929 | MSM_PIN_FUNCTION(pll_reset), |
930 | MSM_PIN_FUNCTION(prng_rosc), |
931 | MSM_PIN_FUNCTION(qdss), |
932 | MSM_PIN_FUNCTION(qdss_cti), |
933 | MSM_PIN_FUNCTION(qlink_enable), |
934 | MSM_PIN_FUNCTION(qlink_request), |
935 | MSM_PIN_FUNCTION(qspi_clk), |
936 | MSM_PIN_FUNCTION(qspi_cs), |
937 | MSM_PIN_FUNCTION(qspi_data), |
938 | MSM_PIN_FUNCTION(qup00), |
939 | MSM_PIN_FUNCTION(qup01), |
940 | MSM_PIN_FUNCTION(qup02_i2c), |
941 | MSM_PIN_FUNCTION(qup02_uart), |
942 | MSM_PIN_FUNCTION(qup03), |
943 | MSM_PIN_FUNCTION(qup04_i2c), |
944 | MSM_PIN_FUNCTION(qup04_uart), |
945 | MSM_PIN_FUNCTION(qup05), |
946 | MSM_PIN_FUNCTION(qup10), |
947 | MSM_PIN_FUNCTION(qup11_i2c), |
948 | MSM_PIN_FUNCTION(qup11_uart), |
949 | MSM_PIN_FUNCTION(qup12), |
950 | MSM_PIN_FUNCTION(qup13_i2c), |
951 | MSM_PIN_FUNCTION(qup13_uart), |
952 | MSM_PIN_FUNCTION(qup14), |
953 | MSM_PIN_FUNCTION(qup15), |
954 | MSM_PIN_FUNCTION(sdc1_tb), |
955 | MSM_PIN_FUNCTION(sdc2_tb), |
956 | MSM_PIN_FUNCTION(sd_write), |
957 | MSM_PIN_FUNCTION(sp_cmu), |
958 | MSM_PIN_FUNCTION(tgu_ch0), |
959 | MSM_PIN_FUNCTION(tgu_ch1), |
960 | MSM_PIN_FUNCTION(tgu_ch2), |
961 | MSM_PIN_FUNCTION(tgu_ch3), |
962 | MSM_PIN_FUNCTION(tsense_pwm1), |
963 | MSM_PIN_FUNCTION(tsense_pwm2), |
964 | MSM_PIN_FUNCTION(uim1), |
965 | MSM_PIN_FUNCTION(uim2), |
966 | MSM_PIN_FUNCTION(uim_batt), |
967 | MSM_PIN_FUNCTION(usb_phy), |
968 | MSM_PIN_FUNCTION(vfr_1), |
969 | MSM_PIN_FUNCTION(_V_GPIO), |
970 | MSM_PIN_FUNCTION(_V_PPS_IN), |
971 | MSM_PIN_FUNCTION(_V_PPS_OUT), |
972 | MSM_PIN_FUNCTION(vsense_trigger), |
973 | MSM_PIN_FUNCTION(wlan1_adc0), |
974 | MSM_PIN_FUNCTION(wlan1_adc1), |
975 | MSM_PIN_FUNCTION(wlan2_adc0), |
976 | MSM_PIN_FUNCTION(wlan2_adc1), |
977 | }; |
978 | |
979 | /* Every pin is maintained as a single group, and missing or non-existing pin |
980 | * would be maintained as dummy group to synchronize pin group index with |
981 | * pin descriptor registered with pinctrl core. |
982 | * Clients would not be able to request these dummy pin groups. |
983 | */ |
984 | static const struct msm_pingroup sc7180_groups[] = { |
985 | [0] = PINGROUP(0, SOUTH, qup01, cri_trng, _, phase_flag, _, _, _, _, _), |
986 | [1] = PINGROUP(1, SOUTH, qup01, cri_trng, _, phase_flag, _, _, _, _, _), |
987 | [2] = PINGROUP(2, SOUTH, qup01, cri_trng, _, phase_flag, _, _, _, _, _), |
988 | [3] = PINGROUP(3, SOUTH, qup01, sp_cmu, dbg_out, qdss_cti, _, _, _, _, _), |
989 | [4] = PINGROUP(4, NORTH, sdc1_tb, _, qdss_cti, _, _, _, _, _, _), |
990 | [5] = PINGROUP(5, NORTH, sdc2_tb, _, _, _, _, _, _, _, _), |
991 | [6] = PINGROUP(6, NORTH, qup11_i2c, qup11_uart, _, _, _, _, _, _, _), |
992 | [7] = PINGROUP(7, NORTH, qup11_i2c, qup11_uart, ddr_bist, _, _, _, _, _, _), |
993 | [8] = PINGROUP(8, NORTH, gp_pdm1, ddr_bist, _, phase_flag, qdss_cti, _, _, _, _), |
994 | [9] = PINGROUP(9, NORTH, ddr_bist, _, phase_flag, qdss_cti, _, _, _, _, _), |
995 | [10] = PINGROUP(10, NORTH, mdp_vsync, ddr_bist, _, _, _, _, _, _, _), |
996 | [11] = PINGROUP(11, NORTH, mdp_vsync, edp_lcd, _, phase_flag, ddr_pxi2, _, _, _, _), |
997 | [12] = PINGROUP(12, SOUTH, mdp_vsync, m_voc, qup01, _, phase_flag, wlan2_adc0, atest_usb10, ddr_pxi3, _), |
998 | [13] = PINGROUP(13, SOUTH, cam_mclk, pll_bypassnl, qdss, _, _, _, _, _, _), |
999 | [14] = PINGROUP(14, SOUTH, cam_mclk, pll_reset, qdss, _, _, _, _, _, _), |
1000 | [15] = PINGROUP(15, SOUTH, cam_mclk, qup02_i2c, qup02_uart, qdss, _, _, _, _, _), |
1001 | [16] = PINGROUP(16, SOUTH, cam_mclk, qup02_i2c, qup02_uart, qdss, _, _, _, _, _), |
1002 | [17] = PINGROUP(17, SOUTH, cci_i2c, _, phase_flag, qdss, _, wlan1_adc0, atest_usb12, ddr_pxi1, atest_char), |
1003 | [18] = PINGROUP(18, SOUTH, cci_i2c, agera_pll, _, phase_flag, qdss, vsense_trigger, ddr_pxi0, atest_char3, _), |
1004 | [19] = PINGROUP(19, SOUTH, cci_i2c, _, phase_flag, qdss, atest_char2, _, _, _, _), |
1005 | [20] = PINGROUP(20, SOUTH, cci_i2c, _, phase_flag, qdss, atest_char1, _, _, _, _), |
1006 | [21] = PINGROUP(21, NORTH, cci_timer0, gcc_gp2, _, qdss, atest_char0, _, _, _, _), |
1007 | [22] = PINGROUP(22, NORTH, cci_timer1, gcc_gp3, _, qdss, _, _, _, _, _), |
1008 | [23] = PINGROUP(23, SOUTH, cci_timer2, cam_mclk, qdss, _, _, _, _, _, _), |
1009 | [24] = PINGROUP(24, SOUTH, cci_timer3, cci_async, qdss, _, _, _, _, _, _), |
1010 | [25] = PINGROUP(25, SOUTH, cci_timer4, cci_async, qup05, _, phase_flag, qdss, _, _, _), |
1011 | [26] = PINGROUP(26, SOUTH, cci_async, qup05, _, phase_flag, qdss, atest_tsens, atest_usb11, ddr_pxi2, _), |
1012 | [27] = PINGROUP(27, SOUTH, cci_i2c, qup05, PLL_BIST, _, phase_flag, qdss, ddr_pxi0, _, _), |
1013 | [28] = PINGROUP(28, SOUTH, cci_i2c, qup05, _, phase_flag, qdss, _, _, _, _), |
1014 | [29] = PINGROUP(29, NORTH, _, qdss, _, _, _, _, _, _, _), |
1015 | [30] = PINGROUP(30, SOUTH, qdss, _, _, _, _, _, _, _, _), |
1016 | [31] = PINGROUP(31, NORTH, _, qdss, _, _, _, _, _, _, _), |
1017 | [32] = PINGROUP(32, NORTH, _, phase_flag, _, _, _, _, _, _, _), |
1018 | [33] = PINGROUP(33, NORTH, sd_write, _, phase_flag, qdss_cti, _, _, _, _, _), |
1019 | [34] = PINGROUP(34, SOUTH, qup00, _, phase_flag, qdss, _, _, _, _, _), |
1020 | [35] = PINGROUP(35, SOUTH, qup00, _, phase_flag, qdss, _, _, _, _, _), |
1021 | [36] = PINGROUP(36, SOUTH, qup00, _, phase_flag, qdss, _, _, _, _, _), |
1022 | [37] = PINGROUP(37, SOUTH, qup00, gp_pdm0, _, phase_flag, qdss, _, _, _, _), |
1023 | [38] = PINGROUP(38, SOUTH, qup03, _, phase_flag, _, _, _, _, _, _), |
1024 | [39] = PINGROUP(39, SOUTH, qup03, _, phase_flag, atest_tsens2, wlan2_adc1, atest_usb1, _, _, _), |
1025 | [40] = PINGROUP(40, SOUTH, qup03, _, _, _, _, _, _, _, _), |
1026 | [41] = PINGROUP(41, SOUTH, qup03, _, _, _, _, _, _, _, _), |
1027 | [42] = PINGROUP(42, NORTH, qup12, _, phase_flag, _, _, _, _, _, _), |
1028 | [43] = PINGROUP(43, NORTH, qup12, _, _, _, _, _, _, _, _), |
1029 | [44] = PINGROUP(44, NORTH, qup12, _, phase_flag, qdss_cti, wlan1_adc1, atest_usb13, ddr_pxi1, _, _), |
1030 | [45] = PINGROUP(45, NORTH, qup12, qdss_cti, _, _, _, _, _, _, _), |
1031 | [46] = PINGROUP(46, NORTH, qup13_i2c, qup13_uart, _, _, _, _, _, _, _), |
1032 | [47] = PINGROUP(47, NORTH, qup13_i2c, qup13_uart, _, _, _, _, _, _, _), |
1033 | [48] = PINGROUP(48, NORTH, gcc_gp1, _, _, _, _, _, _, _, _), |
1034 | [49] = PINGROUP(49, WEST, mi2s_1, btfm_slimbus, _, _, _, _, _, _, _), |
1035 | [50] = PINGROUP(50, WEST, mi2s_1, btfm_slimbus, gp_pdm1, _, _, _, _, _, _), |
1036 | [51] = PINGROUP(51, WEST, mi2s_1, btfm_slimbus, atest_usb2, _, _, _, _, _, _), |
1037 | [52] = PINGROUP(52, WEST, mi2s_1, btfm_slimbus, atest_usb23, _, _, _, _, _, _), |
1038 | [53] = PINGROUP(53, WEST, mi2s_0, qup15, qdss, atest_usb22, _, _, _, _, _), |
1039 | [54] = PINGROUP(54, WEST, mi2s_0, qup15, qdss, atest_usb21, _, _, _, _, _), |
1040 | [55] = PINGROUP(55, WEST, mi2s_0, qup15, qdss, atest_usb20, _, _, _, _, _), |
1041 | [56] = PINGROUP(56, WEST, mi2s_0, qup15, gcc_gp1, _, phase_flag, qdss, _, _, _), |
1042 | [57] = PINGROUP(57, WEST, lpass_ext, audio_ref, jitter_bist, gp_pdm2, _, phase_flag, qdss, _, _), |
1043 | [58] = PINGROUP(58, WEST, lpass_ext, _, phase_flag, _, _, _, _, _, _), |
1044 | [59] = PINGROUP(59, NORTH, qup10, _, _, _, _, _, _, _, _), |
1045 | [60] = PINGROUP(60, NORTH, qup10, _, _, _, _, _, _, _, _), |
1046 | [61] = PINGROUP(61, NORTH, qup10, _, _, _, _, _, _, _, _), |
1047 | [62] = PINGROUP(62, NORTH, qup10, tgu_ch3, _, _, _, _, _, _, _), |
1048 | [63] = PINGROUP(63, NORTH, qspi_clk, mdp_vsync0, mi2s_2, mdp_vsync1, mdp_vsync2, mdp_vsync3, tgu_ch0, _, phase_flag), |
1049 | [64] = PINGROUP(64, NORTH, qspi_data, mi2s_2, tgu_ch1, _, phase_flag, _, _, _, _), |
1050 | [65] = PINGROUP(65, NORTH, qspi_data, mi2s_2, vfr_1, tgu_ch2, _, _, _, _, _), |
1051 | [66] = PINGROUP(66, NORTH, qspi_data, mi2s_2, _, _, _, _, _, _, _), |
1052 | [67] = PINGROUP(67, NORTH, qspi_data, _, _, _, _, _, _, _, _), |
1053 | [68] = PINGROUP(68, NORTH, qspi_cs, qup10, gp_pdm0, _, _, _, _, _, _), |
1054 | [69] = PINGROUP(69, WEST, _, _, _, _, _, _, _, _, _), |
1055 | [70] = PINGROUP(70, NORTH, _, _, mdp_vsync, ldo_en, _, _, _, _, _), |
1056 | [71] = PINGROUP(71, NORTH, _, mdp_vsync, ldo_update, _, _, _, _, _, _), |
1057 | [72] = PINGROUP(72, NORTH, qspi_cs, qup10, prng_rosc, _, qdss_cti, _, _, _, _), |
1058 | [73] = PINGROUP(73, WEST, _, _, _, _, _, _, _, _, _), |
1059 | [74] = PINGROUP(74, WEST, _, _, _, _, _, _, _, _, _), |
1060 | [75] = PINGROUP(75, WEST, uim2, _, _, _, _, _, _, _, _), |
1061 | [76] = PINGROUP(76, WEST, uim2, _, _, _, _, _, _, _, _), |
1062 | [77] = PINGROUP(77, WEST, uim2, _, _, _, _, _, _, _, _), |
1063 | [78] = PINGROUP(78, WEST, uim2, _, _, _, _, _, _, _, _), |
1064 | [79] = PINGROUP(79, WEST, uim1, _, _, _, _, _, _, _, _), |
1065 | [80] = PINGROUP(80, WEST, uim1, _, _, _, _, _, _, _, _), |
1066 | [81] = PINGROUP(81, WEST, uim1, _, _, _, _, _, _, _, _), |
1067 | [82] = PINGROUP(82, WEST, uim1, _, _, _, _, _, _, _, _), |
1068 | [83] = PINGROUP(83, WEST, _, _V_GPIO, _V_PPS_IN, _V_PPS_OUT, gps_tx, _, _, _, _), |
1069 | [84] = PINGROUP(84, WEST, _, _V_GPIO, _V_PPS_IN, _V_PPS_OUT, gps_tx, _, _, _, _), |
1070 | [85] = PINGROUP(85, WEST, uim_batt, dp_hot, aoss_cti, _, _, _, _, _, _), |
1071 | [86] = PINGROUP(86, NORTH, qup14, qdss, _, _, _, _, _, _, _), |
1072 | [87] = PINGROUP(87, NORTH, qup14, adsp_ext, qdss, _, _, _, _, _, _), |
1073 | [88] = PINGROUP(88, NORTH, qup14, qdss, tsense_pwm1, tsense_pwm2, _, _, _, _, _), |
1074 | [89] = PINGROUP(89, NORTH, qup14, qdss, _, _, _, _, _, _, _), |
1075 | [90] = PINGROUP(90, NORTH, qup14, qdss, _, _, _, _, _, _, _), |
1076 | [91] = PINGROUP(91, NORTH, qup14, qdss, _, _, _, _, _, _, _), |
1077 | [92] = PINGROUP(92, NORTH, _, _, _, _, _, _, _, _, _), |
1078 | [93] = PINGROUP(93, NORTH, qdss, _, _, _, _, _, _, _, _), |
1079 | [94] = PINGROUP(94, SOUTH, qup01, _, _, _, _, _, _, _, _), |
1080 | [95] = PINGROUP(95, WEST, _, _, _, _, _, _, _, _, _), |
1081 | [96] = PINGROUP(96, WEST, qlink_request, _, _, _, _, _, _, _, _), |
1082 | [97] = PINGROUP(97, WEST, qlink_enable, _, _, _, _, _, _, _, _), |
1083 | [98] = PINGROUP(98, WEST, _, _, _, _, _, _, _, _, _), |
1084 | [99] = PINGROUP(99, WEST, _, pa_indicator, _, _, _, _, _, _, _), |
1085 | [100] = PINGROUP(100, WEST, _, _, _, _, _, _, _, _, _), |
1086 | [101] = PINGROUP(101, NORTH, _, _, _, _, _, _, _, _, _), |
1087 | [102] = PINGROUP(102, NORTH, _, _, _, _, _, _, _, _, _), |
1088 | [103] = PINGROUP(103, NORTH, _, _, _, _, _, _, _, _, _), |
1089 | [104] = PINGROUP(104, WEST, usb_phy, _, qdss, _, _, _, _, _, _), |
1090 | [105] = PINGROUP(105, NORTH, _, _, _, _, _, _, _, _, _), |
1091 | [106] = PINGROUP(106, NORTH, _, _, _, _, _, _, _, _, _), |
1092 | [107] = PINGROUP(107, WEST, _, _V_GPIO, _V_PPS_IN, _V_PPS_OUT, gps_tx, _, _, _, _), |
1093 | [108] = PINGROUP(108, SOUTH, mss_lte, _, phase_flag, ddr_pxi3, _, _, _, _, _), |
1094 | [109] = PINGROUP(109, SOUTH, mss_lte, gps_tx, _, phase_flag, _, _, _, _, _), |
1095 | [110] = PINGROUP(110, NORTH, _, _, _, _, _, _, _, _, _), |
1096 | [111] = PINGROUP(111, NORTH, _, _, _, _, _, _, _, _, _), |
1097 | [112] = PINGROUP(112, NORTH, _, _, _, _, _, _, _, _, _), |
1098 | [113] = PINGROUP(113, NORTH, _, _, _, _, _, _, _, _, _), |
1099 | [114] = PINGROUP(114, NORTH, _, _, _, _, _, _, _, _, _), |
1100 | [115] = PINGROUP(115, WEST, qup04_i2c, qup04_uart, _, _, _, _, _, _, _), |
1101 | [116] = PINGROUP(116, WEST, qup04_i2c, qup04_uart, _, _, _, _, _, _, _), |
1102 | [117] = PINGROUP(117, WEST, dp_hot, _, _, _, _, _, _, _, _), |
1103 | [118] = PINGROUP(118, WEST, _, _, _, _, _, _, _, _, _), |
1104 | [119] = UFS_RESET(ufs_reset, 0x7f000), |
1105 | [120] = SDC_QDSD_PINGROUP(sdc1_rclk, 0x7a000, 15, 0), |
1106 | [121] = SDC_QDSD_PINGROUP(sdc1_clk, 0x7a000, 13, 6), |
1107 | [122] = SDC_QDSD_PINGROUP(sdc1_cmd, 0x7a000, 11, 3), |
1108 | [123] = SDC_QDSD_PINGROUP(sdc1_data, 0x7a000, 9, 0), |
1109 | [124] = SDC_QDSD_PINGROUP(sdc2_clk, 0x7b000, 14, 6), |
1110 | [125] = SDC_QDSD_PINGROUP(sdc2_cmd, 0x7b000, 11, 3), |
1111 | [126] = SDC_QDSD_PINGROUP(sdc2_data, 0x7b000, 9, 0), |
1112 | }; |
1113 | |
1114 | static const struct msm_gpio_wakeirq_map sc7180_pdc_map[] = { |
1115 | {0, 40}, {3, 50}, {4, 42}, {5, 70}, {6, 41}, {9, 35}, |
1116 | {10, 80}, {11, 51}, {16, 20}, {21, 55}, {22, 90}, {23, 21}, |
1117 | {24, 61}, {26, 52}, {28, 36}, {30, 100}, {31, 33}, {32, 81}, |
1118 | {33, 62}, {34, 43}, {36, 91}, {37, 53}, {38, 63}, {39, 72}, |
1119 | {41, 101}, {42, 7}, {43, 34}, {45, 73}, {47, 82}, {49, 17}, |
1120 | {52, 109}, {53, 102}, {55, 92}, {56, 56}, {57, 57}, {58, 83}, |
1121 | {59, 37}, {62, 110}, {63, 111}, {64, 74}, {65, 44}, {66, 93}, |
1122 | {67, 58}, {68, 112}, {69, 32}, {70, 54}, {72, 59}, {73, 64}, |
1123 | {74, 71}, {78, 31}, {82, 30}, {85, 103}, {86, 38}, {87, 39}, |
1124 | {88, 45}, {89, 46}, {90, 47}, {91, 48}, {92, 60}, {93, 49}, |
1125 | {94, 84}, {95, 94}, {98, 65}, {101, 66}, {104, 67}, {109, 104}, |
1126 | {110, 68}, {113, 69}, {114, 113}, {115, 108}, {116, 121}, |
1127 | {117, 114}, {118, 119}, |
1128 | }; |
1129 | |
1130 | static const struct msm_pinctrl_soc_data sc7180_pinctrl = { |
1131 | .pins = sc7180_pins, |
1132 | .npins = ARRAY_SIZE(sc7180_pins), |
1133 | .functions = sc7180_functions, |
1134 | .nfunctions = ARRAY_SIZE(sc7180_functions), |
1135 | .groups = sc7180_groups, |
1136 | .ngroups = ARRAY_SIZE(sc7180_groups), |
1137 | .ngpios = 120, |
1138 | .tiles = sc7180_tiles, |
1139 | .ntiles = ARRAY_SIZE(sc7180_tiles), |
1140 | .wakeirq_map = sc7180_pdc_map, |
1141 | .nwakeirq_map = ARRAY_SIZE(sc7180_pdc_map), |
1142 | .wakeirq_dual_edge_errata = true, |
1143 | }; |
1144 | |
1145 | static int sc7180_pinctrl_probe(struct platform_device *pdev) |
1146 | { |
1147 | return msm_pinctrl_probe(pdev, soc_data: &sc7180_pinctrl); |
1148 | } |
1149 | |
1150 | static const struct of_device_id sc7180_pinctrl_of_match[] = { |
1151 | { .compatible = "qcom,sc7180-pinctrl" , }, |
1152 | { }, |
1153 | }; |
1154 | |
1155 | static struct platform_driver sc7180_pinctrl_driver = { |
1156 | .driver = { |
1157 | .name = "sc7180-pinctrl" , |
1158 | .pm = &msm_pinctrl_dev_pm_ops, |
1159 | .of_match_table = sc7180_pinctrl_of_match, |
1160 | }, |
1161 | .probe = sc7180_pinctrl_probe, |
1162 | .remove_new = msm_pinctrl_remove, |
1163 | }; |
1164 | |
1165 | static int __init sc7180_pinctrl_init(void) |
1166 | { |
1167 | return platform_driver_register(&sc7180_pinctrl_driver); |
1168 | } |
1169 | arch_initcall(sc7180_pinctrl_init); |
1170 | |
1171 | static void __exit sc7180_pinctrl_exit(void) |
1172 | { |
1173 | platform_driver_unregister(&sc7180_pinctrl_driver); |
1174 | } |
1175 | module_exit(sc7180_pinctrl_exit); |
1176 | |
1177 | MODULE_DESCRIPTION("QTI sc7180 pinctrl driver" ); |
1178 | MODULE_LICENSE("GPL v2" ); |
1179 | MODULE_DEVICE_TABLE(of, sc7180_pinctrl_of_match); |
1180 | |