| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * Driver header file for pin controller driver |
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| 4 | * Copyright (C) 2017 Spreadtrum - http://www.spreadtrum.com |
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| 5 | */ |
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| 6 | |
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| 7 | #ifndef __PINCTRL_SPRD_H__ |
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| 8 | #define __PINCTRL_SPRD_H__ |
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| 9 | |
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| 10 | struct platform_device; |
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| 11 | |
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| 12 | #define NUM_OFFSET (20) |
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| 13 | #define TYPE_OFFSET (16) |
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| 14 | #define BIT_OFFSET (8) |
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| 15 | #define WIDTH_OFFSET (4) |
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| 16 | |
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| 17 | #define SPRD_PIN_INFO(num, type, offset, width, reg) \ |
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| 18 | (((num) & 0xFFF) << NUM_OFFSET | \ |
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| 19 | ((type) & 0xF) << TYPE_OFFSET | \ |
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| 20 | ((offset) & 0xFF) << BIT_OFFSET | \ |
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| 21 | ((width) & 0xF) << WIDTH_OFFSET | \ |
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| 22 | ((reg) & 0xF)) |
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| 23 | |
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| 24 | #define SPRD_PINCTRL_PIN(pin) SPRD_PINCTRL_PIN_DATA(pin, #pin) |
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| 25 | |
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| 26 | #define SPRD_PINCTRL_PIN_DATA(a, b) \ |
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| 27 | { \ |
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| 28 | .name = b, \ |
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| 29 | .num = (((a) >> NUM_OFFSET) & 0xfff), \ |
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| 30 | .type = (((a) >> TYPE_OFFSET) & 0xf), \ |
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| 31 | .bit_offset = (((a) >> BIT_OFFSET) & 0xff), \ |
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| 32 | .bit_width = ((a) >> WIDTH_OFFSET & 0xf), \ |
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| 33 | .reg = ((a) & 0xf) \ |
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| 34 | } |
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| 35 | |
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| 36 | enum pin_type { |
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| 37 | GLOBAL_CTRL_PIN, |
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| 38 | COMMON_PIN, |
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| 39 | MISC_PIN, |
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| 40 | }; |
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| 41 | |
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| 42 | struct sprd_pins_info { |
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| 43 | const char *name; |
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| 44 | unsigned int num; |
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| 45 | enum pin_type type; |
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| 46 | |
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| 47 | /* for global control pins configuration */ |
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| 48 | unsigned long bit_offset; |
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| 49 | unsigned long bit_width; |
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| 50 | unsigned int reg; |
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| 51 | }; |
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| 52 | |
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| 53 | int sprd_pinctrl_core_probe(struct platform_device *pdev, |
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| 54 | struct sprd_pins_info *sprd_soc_pin_info, |
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| 55 | int pins_cnt); |
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| 56 | void sprd_pinctrl_remove(struct platform_device *pdev); |
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| 57 | void sprd_pinctrl_shutdown(struct platform_device *pdev); |
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| 58 | |
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| 59 | #endif /* __PINCTRL_SPRD_H__ */ |
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| 60 | |
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