1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * Allwinner D1 SoC pinctrl driver. |
4 | * |
5 | * Copyright (c) 2020 wuyan@allwinnertech.com |
6 | * Copyright (c) 2021-2022 Samuel Holland <samuel@sholland.org> |
7 | */ |
8 | |
9 | #include <linux/module.h> |
10 | #include <linux/platform_device.h> |
11 | #include <linux/of.h> |
12 | #include <linux/pinctrl/pinctrl.h> |
13 | |
14 | #include "pinctrl-sunxi.h" |
15 | |
16 | static const struct sunxi_desc_pin d1_pins[] = { |
17 | /* PB */ |
18 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0), |
19 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
20 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
21 | SUNXI_FUNCTION(0x2, "pwm3" ), |
22 | SUNXI_FUNCTION(0x3, "ir" ), /* TX */ |
23 | SUNXI_FUNCTION(0x4, "i2c2" ), /* SCK */ |
24 | SUNXI_FUNCTION(0x5, "spi1" ), /* WP */ |
25 | SUNXI_FUNCTION(0x6, "uart0" ), /* TX */ |
26 | SUNXI_FUNCTION(0x7, "uart2" ), /* TX */ |
27 | SUNXI_FUNCTION(0x8, "spdif" ), /* OUT */ |
28 | SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 0)), |
29 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1), |
30 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
31 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
32 | SUNXI_FUNCTION(0x2, "pwm4" ), |
33 | SUNXI_FUNCTION(0x3, "i2s2_dout" ), /* DOUT3 */ |
34 | SUNXI_FUNCTION(0x4, "i2c2" ), /* SDA */ |
35 | SUNXI_FUNCTION(0x5, "i2s2_din" ), /* DIN3 */ |
36 | SUNXI_FUNCTION(0x6, "uart0" ), /* RX */ |
37 | SUNXI_FUNCTION(0x7, "uart2" ), /* RX */ |
38 | SUNXI_FUNCTION(0x8, "ir" ), /* RX */ |
39 | SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 1)), |
40 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2), |
41 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
42 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
43 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D0 */ |
44 | SUNXI_FUNCTION(0x3, "i2s2_dout" ), /* DOUT2 */ |
45 | SUNXI_FUNCTION(0x4, "i2c0" ), /* SDA */ |
46 | SUNXI_FUNCTION(0x5, "i2s2_din" ), /* DIN2 */ |
47 | SUNXI_FUNCTION(0x6, "lcd0" ), /* D18 */ |
48 | SUNXI_FUNCTION(0x7, "uart4" ), /* TX */ |
49 | SUNXI_FUNCTION(0x8, "can0" ), /* TX */ |
50 | SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 2)), |
51 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3), |
52 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
53 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
54 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D1 */ |
55 | SUNXI_FUNCTION(0x3, "i2s2_dout" ), /* DOUT1 */ |
56 | SUNXI_FUNCTION(0x4, "i2c0" ), /* SCK */ |
57 | SUNXI_FUNCTION(0x5, "i2s2_din" ), /* DIN0 */ |
58 | SUNXI_FUNCTION(0x6, "lcd0" ), /* D19 */ |
59 | SUNXI_FUNCTION(0x7, "uart4" ), /* RX */ |
60 | SUNXI_FUNCTION(0x8, "can0" ), /* RX */ |
61 | SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 3)), |
62 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4), |
63 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
64 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
65 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D8 */ |
66 | SUNXI_FUNCTION(0x3, "i2s2_dout" ), /* DOUT0 */ |
67 | SUNXI_FUNCTION(0x4, "i2c1" ), /* SCK */ |
68 | SUNXI_FUNCTION(0x5, "i2s2_din" ), /* DIN1 */ |
69 | SUNXI_FUNCTION(0x6, "lcd0" ), /* D20 */ |
70 | SUNXI_FUNCTION(0x7, "uart5" ), /* TX */ |
71 | SUNXI_FUNCTION(0x8, "can1" ), /* TX */ |
72 | SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 4)), |
73 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5), |
74 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
75 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
76 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D9 */ |
77 | SUNXI_FUNCTION(0x3, "i2s2" ), /* BCLK */ |
78 | SUNXI_FUNCTION(0x4, "i2c1" ), /* SDA */ |
79 | SUNXI_FUNCTION(0x5, "pwm0" ), |
80 | SUNXI_FUNCTION(0x6, "lcd0" ), /* D21 */ |
81 | SUNXI_FUNCTION(0x7, "uart5" ), /* RX */ |
82 | SUNXI_FUNCTION(0x8, "can1" ), /* RX */ |
83 | SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 5)), |
84 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6), |
85 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
86 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
87 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D16 */ |
88 | SUNXI_FUNCTION(0x3, "i2s2" ), /* LRCK */ |
89 | SUNXI_FUNCTION(0x4, "i2c3" ), /* SCK */ |
90 | SUNXI_FUNCTION(0x5, "pwm1" ), |
91 | SUNXI_FUNCTION(0x6, "lcd0" ), /* D22 */ |
92 | SUNXI_FUNCTION(0x7, "uart3" ), /* TX */ |
93 | SUNXI_FUNCTION(0x8, "bist0" ), /* BIST_RESULT0 */ |
94 | SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 6)), |
95 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7), |
96 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
97 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
98 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D17 */ |
99 | SUNXI_FUNCTION(0x3, "i2s2" ), /* MCLK */ |
100 | SUNXI_FUNCTION(0x4, "i2c3" ), /* SDA */ |
101 | SUNXI_FUNCTION(0x5, "ir" ), /* RX */ |
102 | SUNXI_FUNCTION(0x6, "lcd0" ), /* D23 */ |
103 | SUNXI_FUNCTION(0x7, "uart3" ), /* RX */ |
104 | SUNXI_FUNCTION(0x8, "bist1" ), /* BIST_RESULT1 */ |
105 | SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 7)), |
106 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8), |
107 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
108 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
109 | SUNXI_FUNCTION(0x2, "dmic" ), /* DATA3 */ |
110 | SUNXI_FUNCTION(0x3, "pwm5" ), |
111 | SUNXI_FUNCTION(0x4, "i2c2" ), /* SCK */ |
112 | SUNXI_FUNCTION(0x5, "spi1" ), /* HOLD */ |
113 | SUNXI_FUNCTION(0x6, "uart0" ), /* TX */ |
114 | SUNXI_FUNCTION(0x7, "uart1" ), /* TX */ |
115 | SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 8)), |
116 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9), |
117 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
118 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
119 | SUNXI_FUNCTION(0x2, "dmic" ), /* DATA2 */ |
120 | SUNXI_FUNCTION(0x3, "pwm6" ), |
121 | SUNXI_FUNCTION(0x4, "i2c2" ), /* SDA */ |
122 | SUNXI_FUNCTION(0x5, "spi1" ), /* MISO */ |
123 | SUNXI_FUNCTION(0x6, "uart0" ), /* RX */ |
124 | SUNXI_FUNCTION(0x7, "uart1" ), /* RX */ |
125 | SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 9)), |
126 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10), |
127 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
128 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
129 | SUNXI_FUNCTION(0x2, "dmic" ), /* DATA1 */ |
130 | SUNXI_FUNCTION(0x3, "pwm7" ), |
131 | SUNXI_FUNCTION(0x4, "i2c0" ), /* SCK */ |
132 | SUNXI_FUNCTION(0x5, "spi1" ), /* MOSI */ |
133 | SUNXI_FUNCTION(0x6, "clk" ), /* FANOUT0 */ |
134 | SUNXI_FUNCTION(0x7, "uart1" ), /* RTS */ |
135 | SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 10)), |
136 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11), |
137 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
138 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
139 | SUNXI_FUNCTION(0x2, "dmic" ), /* DATA0 */ |
140 | SUNXI_FUNCTION(0x3, "pwm2" ), |
141 | SUNXI_FUNCTION(0x4, "i2c0" ), /* SDA */ |
142 | SUNXI_FUNCTION(0x5, "spi1" ), /* CLK */ |
143 | SUNXI_FUNCTION(0x6, "clk" ), /* FANOUT1 */ |
144 | SUNXI_FUNCTION(0x7, "uart1" ), /* CTS */ |
145 | SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 11)), |
146 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12), |
147 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
148 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
149 | SUNXI_FUNCTION(0x2, "dmic" ), /* CLK */ |
150 | SUNXI_FUNCTION(0x3, "pwm0" ), |
151 | SUNXI_FUNCTION(0x4, "spdif" ), /* IN */ |
152 | SUNXI_FUNCTION(0x5, "spi1" ), /* CS0 */ |
153 | SUNXI_FUNCTION(0x6, "clk" ), /* FANOUT2 */ |
154 | SUNXI_FUNCTION(0x7, "ir" ), /* RX */ |
155 | SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 12)), |
156 | /* PC */ |
157 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0), |
158 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
159 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
160 | SUNXI_FUNCTION(0x2, "uart2" ), /* TX */ |
161 | SUNXI_FUNCTION(0x3, "i2c2" ), /* SCK */ |
162 | SUNXI_FUNCTION(0x4, "ledc" ), |
163 | SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 0)), |
164 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1), |
165 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
166 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
167 | SUNXI_FUNCTION(0x2, "uart2" ), /* RX */ |
168 | SUNXI_FUNCTION(0x3, "i2c2" ), /* SDA */ |
169 | SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 1)), |
170 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2), |
171 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
172 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
173 | SUNXI_FUNCTION(0x2, "spi0" ), /* CLK */ |
174 | SUNXI_FUNCTION(0x3, "mmc2" ), /* CLK */ |
175 | SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 2)), |
176 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3), |
177 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
178 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
179 | SUNXI_FUNCTION(0x2, "spi0" ), /* CS0 */ |
180 | SUNXI_FUNCTION(0x3, "mmc2" ), /* CMD */ |
181 | SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 3)), |
182 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4), |
183 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
184 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
185 | SUNXI_FUNCTION(0x2, "spi0" ), /* MOSI */ |
186 | SUNXI_FUNCTION(0x3, "mmc2" ), /* D2 */ |
187 | SUNXI_FUNCTION(0x4, "boot" ), /* SEL0 */ |
188 | SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 4)), |
189 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5), |
190 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
191 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
192 | SUNXI_FUNCTION(0x2, "spi0" ), /* MISO */ |
193 | SUNXI_FUNCTION(0x3, "mmc2" ), /* D1 */ |
194 | SUNXI_FUNCTION(0x4, "boot" ), /* SEL1 */ |
195 | SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 5)), |
196 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6), |
197 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
198 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
199 | SUNXI_FUNCTION(0x2, "spi0" ), /* WP */ |
200 | SUNXI_FUNCTION(0x3, "mmc2" ), /* D0 */ |
201 | SUNXI_FUNCTION(0x4, "uart3" ), /* TX */ |
202 | SUNXI_FUNCTION(0x5, "i2c3" ), /* SCK */ |
203 | SUNXI_FUNCTION(0x6, "pll" ), /* DBG-CLK */ |
204 | SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 6)), |
205 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7), |
206 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
207 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
208 | SUNXI_FUNCTION(0x2, "spi0" ), /* HOLD */ |
209 | SUNXI_FUNCTION(0x3, "mmc2" ), /* D3 */ |
210 | SUNXI_FUNCTION(0x4, "uart3" ), /* RX */ |
211 | SUNXI_FUNCTION(0x5, "i2c3" ), /* SDA */ |
212 | SUNXI_FUNCTION(0x6, "tcon" ), /* TRIG0 */ |
213 | SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 7)), |
214 | /* PD */ |
215 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0), |
216 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
217 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
218 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D2 */ |
219 | SUNXI_FUNCTION(0x3, "lvds0" ), /* V0P */ |
220 | SUNXI_FUNCTION(0x4, "dsi" ), /* D0P */ |
221 | SUNXI_FUNCTION(0x5, "i2c0" ), /* SCK */ |
222 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 0)), |
223 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1), |
224 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
225 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
226 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D3 */ |
227 | SUNXI_FUNCTION(0x3, "lvds0" ), /* V0N */ |
228 | SUNXI_FUNCTION(0x4, "dsi" ), /* D0N */ |
229 | SUNXI_FUNCTION(0x5, "uart2" ), /* TX */ |
230 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 1)), |
231 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2), |
232 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
233 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
234 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D4 */ |
235 | SUNXI_FUNCTION(0x3, "lvds0" ), /* V1P */ |
236 | SUNXI_FUNCTION(0x4, "dsi" ), /* D1P */ |
237 | SUNXI_FUNCTION(0x5, "uart2" ), /* RX */ |
238 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 2)), |
239 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3), |
240 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
241 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
242 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D5 */ |
243 | SUNXI_FUNCTION(0x3, "lvds0" ), /* V1N */ |
244 | SUNXI_FUNCTION(0x4, "dsi" ), /* D1N */ |
245 | SUNXI_FUNCTION(0x5, "uart2" ), /* RTS */ |
246 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 3)), |
247 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4), |
248 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
249 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
250 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D6 */ |
251 | SUNXI_FUNCTION(0x3, "lvds0" ), /* V2P */ |
252 | SUNXI_FUNCTION(0x4, "dsi" ), /* CKP */ |
253 | SUNXI_FUNCTION(0x5, "uart2" ), /* CTS */ |
254 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 4)), |
255 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5), |
256 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
257 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
258 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D7 */ |
259 | SUNXI_FUNCTION(0x3, "lvds0" ), /* V2N */ |
260 | SUNXI_FUNCTION(0x4, "dsi" ), /* CKN */ |
261 | SUNXI_FUNCTION(0x5, "uart5" ), /* TX */ |
262 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 5)), |
263 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6), |
264 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
265 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
266 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D10 */ |
267 | SUNXI_FUNCTION(0x3, "lvds0" ), /* CKP */ |
268 | SUNXI_FUNCTION(0x4, "dsi" ), /* D2P */ |
269 | SUNXI_FUNCTION(0x5, "uart5" ), /* RX */ |
270 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 6)), |
271 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7), |
272 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
273 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
274 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D11 */ |
275 | SUNXI_FUNCTION(0x3, "lvds0" ), /* CKN */ |
276 | SUNXI_FUNCTION(0x4, "dsi" ), /* D2N */ |
277 | SUNXI_FUNCTION(0x5, "uart4" ), /* TX */ |
278 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 7)), |
279 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8), |
280 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
281 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
282 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D12 */ |
283 | SUNXI_FUNCTION(0x3, "lvds0" ), /* V3P */ |
284 | SUNXI_FUNCTION(0x4, "dsi" ), /* D3P */ |
285 | SUNXI_FUNCTION(0x5, "uart4" ), /* RX */ |
286 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 8)), |
287 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9), |
288 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
289 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
290 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D13 */ |
291 | SUNXI_FUNCTION(0x3, "lvds0" ), /* V3N */ |
292 | SUNXI_FUNCTION(0x4, "dsi" ), /* D3N */ |
293 | SUNXI_FUNCTION(0x5, "pwm6" ), |
294 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 9)), |
295 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10), |
296 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
297 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
298 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D14 */ |
299 | SUNXI_FUNCTION(0x3, "lvds1" ), /* V0P */ |
300 | SUNXI_FUNCTION(0x4, "spi1" ), /* CS0 */ |
301 | SUNXI_FUNCTION(0x5, "uart3" ), /* TX */ |
302 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 10)), |
303 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11), |
304 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
305 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
306 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D15 */ |
307 | SUNXI_FUNCTION(0x3, "lvds1" ), /* V0N */ |
308 | SUNXI_FUNCTION(0x4, "spi1" ), /* CLK */ |
309 | SUNXI_FUNCTION(0x5, "uart3" ), /* RX */ |
310 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 11)), |
311 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12), |
312 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
313 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
314 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D18 */ |
315 | SUNXI_FUNCTION(0x3, "lvds1" ), /* V1P */ |
316 | SUNXI_FUNCTION(0x4, "spi1" ), /* MOSI */ |
317 | SUNXI_FUNCTION(0x5, "i2c0" ), /* SDA */ |
318 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 12)), |
319 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13), |
320 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
321 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
322 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D19 */ |
323 | SUNXI_FUNCTION(0x3, "lvds1" ), /* V1N */ |
324 | SUNXI_FUNCTION(0x4, "spi1" ), /* MISO */ |
325 | SUNXI_FUNCTION(0x5, "uart3" ), /* RTS */ |
326 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 13)), |
327 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14), |
328 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
329 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
330 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D20 */ |
331 | SUNXI_FUNCTION(0x3, "lvds1" ), /* V2P */ |
332 | SUNXI_FUNCTION(0x4, "spi1" ), /* HOLD */ |
333 | SUNXI_FUNCTION(0x5, "uart3" ), /* CTS */ |
334 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 14)), |
335 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15), |
336 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
337 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
338 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D21 */ |
339 | SUNXI_FUNCTION(0x3, "lvds1" ), /* V2N */ |
340 | SUNXI_FUNCTION(0x4, "spi1" ), /* WP */ |
341 | SUNXI_FUNCTION(0x5, "ir" ), /* RX */ |
342 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 15)), |
343 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16), |
344 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
345 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
346 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D22 */ |
347 | SUNXI_FUNCTION(0x3, "lvds1" ), /* CKP */ |
348 | SUNXI_FUNCTION(0x4, "dmic" ), /* DATA3 */ |
349 | SUNXI_FUNCTION(0x5, "pwm0" ), |
350 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 16)), |
351 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17), |
352 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
353 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
354 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D23 */ |
355 | SUNXI_FUNCTION(0x3, "lvds1" ), /* CKN */ |
356 | SUNXI_FUNCTION(0x4, "dmic" ), /* DATA2 */ |
357 | SUNXI_FUNCTION(0x5, "pwm1" ), |
358 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 17)), |
359 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18), |
360 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
361 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
362 | SUNXI_FUNCTION(0x2, "lcd0" ), /* CLK */ |
363 | SUNXI_FUNCTION(0x3, "lvds1" ), /* V3P */ |
364 | SUNXI_FUNCTION(0x4, "dmic" ), /* DATA1 */ |
365 | SUNXI_FUNCTION(0x5, "pwm2" ), |
366 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 18)), |
367 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19), |
368 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
369 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
370 | SUNXI_FUNCTION(0x2, "lcd0" ), /* DE */ |
371 | SUNXI_FUNCTION(0x3, "lvds1" ), /* V3N */ |
372 | SUNXI_FUNCTION(0x4, "dmic" ), /* DATA0 */ |
373 | SUNXI_FUNCTION(0x5, "pwm3" ), |
374 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 19)), |
375 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20), |
376 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
377 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
378 | SUNXI_FUNCTION(0x2, "lcd0" ), /* HSYNC */ |
379 | SUNXI_FUNCTION(0x3, "i2c2" ), /* SCK */ |
380 | SUNXI_FUNCTION(0x4, "dmic" ), /* CLK */ |
381 | SUNXI_FUNCTION(0x5, "pwm4" ), |
382 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 20)), |
383 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21), |
384 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
385 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
386 | SUNXI_FUNCTION(0x2, "lcd0" ), /* VSYNC */ |
387 | SUNXI_FUNCTION(0x3, "i2c2" ), /* SDA */ |
388 | SUNXI_FUNCTION(0x4, "uart1" ), /* TX */ |
389 | SUNXI_FUNCTION(0x5, "pwm5" ), |
390 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 21)), |
391 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22), |
392 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
393 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
394 | SUNXI_FUNCTION(0x2, "spdif" ), /* OUT */ |
395 | SUNXI_FUNCTION(0x3, "ir" ), /* RX */ |
396 | SUNXI_FUNCTION(0x4, "uart1" ), /* RX */ |
397 | SUNXI_FUNCTION(0x5, "pwm7" ), |
398 | SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 22)), |
399 | /* PE */ |
400 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0), |
401 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
402 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
403 | SUNXI_FUNCTION(0x2, "ncsi0" ), /* HSYNC */ |
404 | SUNXI_FUNCTION(0x3, "uart2" ), /* RTS */ |
405 | SUNXI_FUNCTION(0x4, "i2c1" ), /* SCK */ |
406 | SUNXI_FUNCTION(0x5, "lcd0" ), /* HSYNC */ |
407 | SUNXI_FUNCTION(0x8, "emac" ), /* RXCTL/CRS_DV */ |
408 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 0)), |
409 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1), |
410 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
411 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
412 | SUNXI_FUNCTION(0x2, "ncsi0" ), /* VSYNC */ |
413 | SUNXI_FUNCTION(0x3, "uart2" ), /* CTS */ |
414 | SUNXI_FUNCTION(0x4, "i2c1" ), /* SDA */ |
415 | SUNXI_FUNCTION(0x5, "lcd0" ), /* VSYNC */ |
416 | SUNXI_FUNCTION(0x8, "emac" ), /* RXD0 */ |
417 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 1)), |
418 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2), |
419 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
420 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
421 | SUNXI_FUNCTION(0x2, "ncsi0" ), /* PCLK */ |
422 | SUNXI_FUNCTION(0x3, "uart2" ), /* TX */ |
423 | SUNXI_FUNCTION(0x4, "i2c0" ), /* SCK */ |
424 | SUNXI_FUNCTION(0x5, "clk" ), /* FANOUT0 */ |
425 | SUNXI_FUNCTION(0x6, "uart0" ), /* TX */ |
426 | SUNXI_FUNCTION(0x8, "emac" ), /* RXD1 */ |
427 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 2)), |
428 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3), |
429 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
430 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
431 | SUNXI_FUNCTION(0x2, "ncsi0" ), /* MCLK */ |
432 | SUNXI_FUNCTION(0x3, "uart2" ), /* RX */ |
433 | SUNXI_FUNCTION(0x4, "i2c0" ), /* SDA */ |
434 | SUNXI_FUNCTION(0x5, "clk" ), /* FANOUT1 */ |
435 | SUNXI_FUNCTION(0x6, "uart0" ), /* RX */ |
436 | SUNXI_FUNCTION(0x8, "emac" ), /* TXCK */ |
437 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 3)), |
438 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4), |
439 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
440 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
441 | SUNXI_FUNCTION(0x2, "ncsi0" ), /* D0 */ |
442 | SUNXI_FUNCTION(0x3, "uart4" ), /* TX */ |
443 | SUNXI_FUNCTION(0x4, "i2c2" ), /* SCK */ |
444 | SUNXI_FUNCTION(0x5, "clk" ), /* FANOUT2 */ |
445 | SUNXI_FUNCTION(0x6, "d_jtag" ), /* MS */ |
446 | SUNXI_FUNCTION(0x7, "r_jtag" ), /* MS */ |
447 | SUNXI_FUNCTION(0x8, "emac" ), /* TXD0 */ |
448 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 4)), |
449 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5), |
450 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
451 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
452 | SUNXI_FUNCTION(0x2, "ncsi0" ), /* D1 */ |
453 | SUNXI_FUNCTION(0x3, "uart4" ), /* RX */ |
454 | SUNXI_FUNCTION(0x4, "i2c2" ), /* SDA */ |
455 | SUNXI_FUNCTION(0x5, "ledc" ), |
456 | SUNXI_FUNCTION(0x6, "d_jtag" ), /* DI */ |
457 | SUNXI_FUNCTION(0x7, "r_jtag" ), /* DI */ |
458 | SUNXI_FUNCTION(0x8, "emac" ), /* TXD1 */ |
459 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 5)), |
460 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6), |
461 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
462 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
463 | SUNXI_FUNCTION(0x2, "ncsi0" ), /* D2 */ |
464 | SUNXI_FUNCTION(0x3, "uart5" ), /* TX */ |
465 | SUNXI_FUNCTION(0x4, "i2c3" ), /* SCK */ |
466 | SUNXI_FUNCTION(0x5, "spdif" ), /* IN */ |
467 | SUNXI_FUNCTION(0x6, "d_jtag" ), /* DO */ |
468 | SUNXI_FUNCTION(0x7, "r_jtag" ), /* DO */ |
469 | SUNXI_FUNCTION(0x8, "emac" ), /* TXCTL/TXEN */ |
470 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 6)), |
471 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7), |
472 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
473 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
474 | SUNXI_FUNCTION(0x2, "ncsi0" ), /* D3 */ |
475 | SUNXI_FUNCTION(0x3, "uart5" ), /* RX */ |
476 | SUNXI_FUNCTION(0x4, "i2c3" ), /* SDA */ |
477 | SUNXI_FUNCTION(0x5, "spdif" ), /* OUT */ |
478 | SUNXI_FUNCTION(0x6, "d_jtag" ), /* CK */ |
479 | SUNXI_FUNCTION(0x7, "r_jtag" ), /* CK */ |
480 | SUNXI_FUNCTION(0x8, "emac" ), /* CK */ |
481 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 7)), |
482 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8), |
483 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
484 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
485 | SUNXI_FUNCTION(0x2, "ncsi0" ), /* D4 */ |
486 | SUNXI_FUNCTION(0x3, "uart1" ), /* RTS */ |
487 | SUNXI_FUNCTION(0x4, "pwm2" ), |
488 | SUNXI_FUNCTION(0x5, "uart3" ), /* TX */ |
489 | SUNXI_FUNCTION(0x6, "jtag" ), /* MS */ |
490 | SUNXI_FUNCTION(0x8, "emac" ), /* MDC */ |
491 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 8)), |
492 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9), |
493 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
494 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
495 | SUNXI_FUNCTION(0x2, "ncsi0" ), /* D5 */ |
496 | SUNXI_FUNCTION(0x3, "uart1" ), /* CTS */ |
497 | SUNXI_FUNCTION(0x4, "pwm3" ), |
498 | SUNXI_FUNCTION(0x5, "uart3" ), /* RX */ |
499 | SUNXI_FUNCTION(0x6, "jtag" ), /* DI */ |
500 | SUNXI_FUNCTION(0x8, "emac" ), /* MDIO */ |
501 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 9)), |
502 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10), |
503 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
504 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
505 | SUNXI_FUNCTION(0x2, "ncsi0" ), /* D6 */ |
506 | SUNXI_FUNCTION(0x3, "uart1" ), /* TX */ |
507 | SUNXI_FUNCTION(0x4, "pwm4" ), |
508 | SUNXI_FUNCTION(0x5, "ir" ), /* RX */ |
509 | SUNXI_FUNCTION(0x6, "jtag" ), /* DO */ |
510 | SUNXI_FUNCTION(0x8, "emac" ), /* EPHY-25M */ |
511 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 10)), |
512 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11), |
513 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
514 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
515 | SUNXI_FUNCTION(0x2, "ncsi0" ), /* D7 */ |
516 | SUNXI_FUNCTION(0x3, "uart1" ), /* RX */ |
517 | SUNXI_FUNCTION(0x4, "i2s0_dout" ), /* DOUT3 */ |
518 | SUNXI_FUNCTION(0x5, "i2s0_din" ), /* DIN3 */ |
519 | SUNXI_FUNCTION(0x6, "jtag" ), /* CK */ |
520 | SUNXI_FUNCTION(0x8, "emac" ), /* TXD2 */ |
521 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 11)), |
522 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12), |
523 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
524 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
525 | SUNXI_FUNCTION(0x2, "i2c2" ), /* SCK */ |
526 | SUNXI_FUNCTION(0x3, "ncsi0" ), /* FIELD */ |
527 | SUNXI_FUNCTION(0x4, "i2s0_dout" ), /* DOUT2 */ |
528 | SUNXI_FUNCTION(0x5, "i2s0_din" ), /* DIN2 */ |
529 | SUNXI_FUNCTION(0x8, "emac" ), /* TXD3 */ |
530 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 12)), |
531 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13), |
532 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
533 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
534 | SUNXI_FUNCTION(0x2, "i2c2" ), /* SDA */ |
535 | SUNXI_FUNCTION(0x3, "pwm5" ), |
536 | SUNXI_FUNCTION(0x4, "i2s0_dout" ), /* DOUT0 */ |
537 | SUNXI_FUNCTION(0x5, "i2s0_din" ), /* DIN1 */ |
538 | SUNXI_FUNCTION(0x6, "dmic" ), /* DATA3 */ |
539 | SUNXI_FUNCTION(0x8, "emac" ), /* RXD2 */ |
540 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 13)), |
541 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14), |
542 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
543 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
544 | SUNXI_FUNCTION(0x2, "i2c1" ), /* SCK */ |
545 | SUNXI_FUNCTION(0x3, "d_jtag" ), /* MS */ |
546 | SUNXI_FUNCTION(0x4, "i2s0_dout" ), /* DOUT1 */ |
547 | SUNXI_FUNCTION(0x5, "i2s0_din" ), /* DIN0 */ |
548 | SUNXI_FUNCTION(0x6, "dmic" ), /* DATA2 */ |
549 | SUNXI_FUNCTION(0x8, "emac" ), /* RXD3 */ |
550 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 14)), |
551 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15), |
552 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
553 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
554 | SUNXI_FUNCTION(0x2, "i2c1" ), /* SDA */ |
555 | SUNXI_FUNCTION(0x3, "d_jtag" ), /* DI */ |
556 | SUNXI_FUNCTION(0x4, "pwm6" ), |
557 | SUNXI_FUNCTION(0x5, "i2s0" ), /* LRCK */ |
558 | SUNXI_FUNCTION(0x6, "dmic" ), /* DATA1 */ |
559 | SUNXI_FUNCTION(0x8, "emac" ), /* RXCK */ |
560 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 15)), |
561 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16), |
562 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
563 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
564 | SUNXI_FUNCTION(0x2, "i2c3" ), /* SCK */ |
565 | SUNXI_FUNCTION(0x3, "d_jtag" ), /* DO */ |
566 | SUNXI_FUNCTION(0x4, "pwm7" ), |
567 | SUNXI_FUNCTION(0x5, "i2s0" ), /* BCLK */ |
568 | SUNXI_FUNCTION(0x6, "dmic" ), /* DATA0 */ |
569 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 16)), |
570 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17), |
571 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
572 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
573 | SUNXI_FUNCTION(0x2, "i2c3" ), /* SDA */ |
574 | SUNXI_FUNCTION(0x3, "d_jtag" ), /* CK */ |
575 | SUNXI_FUNCTION(0x4, "ir" ), /* TX */ |
576 | SUNXI_FUNCTION(0x5, "i2s0" ), /* MCLK */ |
577 | SUNXI_FUNCTION(0x6, "dmic" ), /* CLK */ |
578 | SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 17)), |
579 | /* PF */ |
580 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0), |
581 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
582 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
583 | SUNXI_FUNCTION(0x2, "mmc0" ), /* D1 */ |
584 | SUNXI_FUNCTION(0x3, "jtag" ), /* MS */ |
585 | SUNXI_FUNCTION(0x4, "r_jtag" ), /* MS */ |
586 | SUNXI_FUNCTION(0x5, "i2s2_dout" ), /* DOUT1 */ |
587 | SUNXI_FUNCTION(0x6, "i2s2_din" ), /* DIN0 */ |
588 | SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 0)), |
589 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1), |
590 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
591 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
592 | SUNXI_FUNCTION(0x2, "mmc0" ), /* D0 */ |
593 | SUNXI_FUNCTION(0x3, "jtag" ), /* DI */ |
594 | SUNXI_FUNCTION(0x4, "r_jtag" ), /* DI */ |
595 | SUNXI_FUNCTION(0x5, "i2s2_dout" ), /* DOUT0 */ |
596 | SUNXI_FUNCTION(0x6, "i2s2_din" ), /* DIN1 */ |
597 | SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 1)), |
598 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2), |
599 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
600 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
601 | SUNXI_FUNCTION(0x2, "mmc0" ), /* CLK */ |
602 | SUNXI_FUNCTION(0x3, "uart0" ), /* TX */ |
603 | SUNXI_FUNCTION(0x4, "i2c0" ), /* SCK */ |
604 | SUNXI_FUNCTION(0x5, "ledc" ), |
605 | SUNXI_FUNCTION(0x6, "spdif" ), /* IN */ |
606 | SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 2)), |
607 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3), |
608 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
609 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
610 | SUNXI_FUNCTION(0x2, "mmc0" ), /* CMD */ |
611 | SUNXI_FUNCTION(0x3, "jtag" ), /* DO */ |
612 | SUNXI_FUNCTION(0x4, "r_jtag" ), /* DO */ |
613 | SUNXI_FUNCTION(0x5, "i2s2" ), /* BCLK */ |
614 | SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 3)), |
615 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4), |
616 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
617 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
618 | SUNXI_FUNCTION(0x2, "mmc0" ), /* D3 */ |
619 | SUNXI_FUNCTION(0x3, "uart0" ), /* RX */ |
620 | SUNXI_FUNCTION(0x4, "i2c0" ), /* SDA */ |
621 | SUNXI_FUNCTION(0x5, "pwm6" ), |
622 | SUNXI_FUNCTION(0x6, "ir" ), /* TX */ |
623 | SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 4)), |
624 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5), |
625 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
626 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
627 | SUNXI_FUNCTION(0x2, "mmc0" ), /* D2 */ |
628 | SUNXI_FUNCTION(0x3, "jtag" ), /* CK */ |
629 | SUNXI_FUNCTION(0x4, "r_jtag" ), /* CK */ |
630 | SUNXI_FUNCTION(0x5, "i2s2" ), /* LRCK */ |
631 | SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 5)), |
632 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6), |
633 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
634 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
635 | SUNXI_FUNCTION(0x3, "spdif" ), /* OUT */ |
636 | SUNXI_FUNCTION(0x4, "ir" ), /* RX */ |
637 | SUNXI_FUNCTION(0x5, "i2s2" ), /* MCLK */ |
638 | SUNXI_FUNCTION(0x6, "pwm5" ), |
639 | SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 6)), |
640 | /* PG */ |
641 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0), |
642 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
643 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
644 | SUNXI_FUNCTION(0x2, "mmc1" ), /* CLK */ |
645 | SUNXI_FUNCTION(0x3, "uart3" ), /* TX */ |
646 | SUNXI_FUNCTION(0x4, "emac" ), /* RXCTRL/CRS_DV */ |
647 | SUNXI_FUNCTION(0x5, "pwm7" ), |
648 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 0)), |
649 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1), |
650 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
651 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
652 | SUNXI_FUNCTION(0x2, "mmc1" ), /* CMD */ |
653 | SUNXI_FUNCTION(0x3, "uart3" ), /* RX */ |
654 | SUNXI_FUNCTION(0x4, "emac" ), /* RXD0 */ |
655 | SUNXI_FUNCTION(0x5, "pwm6" ), |
656 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 1)), |
657 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2), |
658 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
659 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
660 | SUNXI_FUNCTION(0x2, "mmc1" ), /* D0 */ |
661 | SUNXI_FUNCTION(0x3, "uart3" ), /* RTS */ |
662 | SUNXI_FUNCTION(0x4, "emac" ), /* RXD1 */ |
663 | SUNXI_FUNCTION(0x5, "uart4" ), /* TX */ |
664 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 2)), |
665 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3), |
666 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
667 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
668 | SUNXI_FUNCTION(0x2, "mmc1" ), /* D1 */ |
669 | SUNXI_FUNCTION(0x3, "uart3" ), /* CTS */ |
670 | SUNXI_FUNCTION(0x4, "emac" ), /* TXCK */ |
671 | SUNXI_FUNCTION(0x5, "uart4" ), /* RX */ |
672 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 3)), |
673 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4), |
674 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
675 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
676 | SUNXI_FUNCTION(0x2, "mmc1" ), /* D2 */ |
677 | SUNXI_FUNCTION(0x3, "uart5" ), /* TX */ |
678 | SUNXI_FUNCTION(0x4, "emac" ), /* TXD0 */ |
679 | SUNXI_FUNCTION(0x5, "pwm5" ), |
680 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 4)), |
681 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5), |
682 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
683 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
684 | SUNXI_FUNCTION(0x2, "mmc1" ), /* D3 */ |
685 | SUNXI_FUNCTION(0x3, "uart5" ), /* RX */ |
686 | SUNXI_FUNCTION(0x4, "emac" ), /* TXD1 */ |
687 | SUNXI_FUNCTION(0x5, "pwm4" ), |
688 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 5)), |
689 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6), |
690 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
691 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
692 | SUNXI_FUNCTION(0x2, "uart1" ), /* TX */ |
693 | SUNXI_FUNCTION(0x3, "i2c2" ), /* SCK */ |
694 | SUNXI_FUNCTION(0x4, "emac" ), /* TXD2 */ |
695 | SUNXI_FUNCTION(0x5, "pwm1" ), |
696 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 6)), |
697 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7), |
698 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
699 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
700 | SUNXI_FUNCTION(0x2, "uart1" ), /* RX */ |
701 | SUNXI_FUNCTION(0x3, "i2c2" ), /* SDA */ |
702 | SUNXI_FUNCTION(0x4, "emac" ), /* TXD3 */ |
703 | SUNXI_FUNCTION(0x5, "spdif" ), /* IN */ |
704 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 7)), |
705 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8), |
706 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
707 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
708 | SUNXI_FUNCTION(0x2, "uart1" ), /* RTS */ |
709 | SUNXI_FUNCTION(0x3, "i2c1" ), /* SCK */ |
710 | SUNXI_FUNCTION(0x4, "emac" ), /* RXD2 */ |
711 | SUNXI_FUNCTION(0x5, "uart3" ), /* TX */ |
712 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 8)), |
713 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9), |
714 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
715 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
716 | SUNXI_FUNCTION(0x2, "uart1" ), /* CTS */ |
717 | SUNXI_FUNCTION(0x3, "i2c1" ), /* SDA */ |
718 | SUNXI_FUNCTION(0x4, "emac" ), /* RXD3 */ |
719 | SUNXI_FUNCTION(0x5, "uart3" ), /* RX */ |
720 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 9)), |
721 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10), |
722 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
723 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
724 | SUNXI_FUNCTION(0x2, "pwm3" ), |
725 | SUNXI_FUNCTION(0x3, "i2c3" ), /* SCK */ |
726 | SUNXI_FUNCTION(0x4, "emac" ), /* RXCK */ |
727 | SUNXI_FUNCTION(0x5, "clk" ), /* FANOUT0 */ |
728 | SUNXI_FUNCTION(0x6, "ir" ), /* RX */ |
729 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 10)), |
730 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11), |
731 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
732 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
733 | SUNXI_FUNCTION(0x2, "i2s1" ), /* MCLK */ |
734 | SUNXI_FUNCTION(0x3, "i2c3" ), /* SDA */ |
735 | SUNXI_FUNCTION(0x4, "emac" ), /* EPHY-25M */ |
736 | SUNXI_FUNCTION(0x5, "clk" ), /* FANOUT1 */ |
737 | SUNXI_FUNCTION(0x6, "tcon" ), /* TRIG0 */ |
738 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 11)), |
739 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12), |
740 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
741 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
742 | SUNXI_FUNCTION(0x2, "i2s1" ), /* LRCK */ |
743 | SUNXI_FUNCTION(0x3, "i2c0" ), /* SCK */ |
744 | SUNXI_FUNCTION(0x4, "emac" ), /* TXCTL/TXEN */ |
745 | SUNXI_FUNCTION(0x5, "clk" ), /* FANOUT2 */ |
746 | SUNXI_FUNCTION(0x6, "pwm0" ), |
747 | SUNXI_FUNCTION(0x7, "uart1" ), /* TX */ |
748 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 12)), |
749 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13), |
750 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
751 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
752 | SUNXI_FUNCTION(0x2, "i2s1" ), /* BCLK */ |
753 | SUNXI_FUNCTION(0x3, "i2c0" ), /* SDA */ |
754 | SUNXI_FUNCTION(0x4, "emac" ), /* CLKIN/RXER */ |
755 | SUNXI_FUNCTION(0x5, "pwm2" ), |
756 | SUNXI_FUNCTION(0x6, "ledc" ), |
757 | SUNXI_FUNCTION(0x7, "uart1" ), /* RX */ |
758 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 13)), |
759 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 14), |
760 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
761 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
762 | SUNXI_FUNCTION(0x2, "i2s1_din" ), /* DIN0 */ |
763 | SUNXI_FUNCTION(0x3, "i2c2" ), /* SCK */ |
764 | SUNXI_FUNCTION(0x4, "emac" ), /* MDC */ |
765 | SUNXI_FUNCTION(0x5, "i2s1_dout" ), /* DOUT1 */ |
766 | SUNXI_FUNCTION(0x6, "spi0" ), /* WP */ |
767 | SUNXI_FUNCTION(0x7, "uart1" ), /* RTS */ |
768 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 14)), |
769 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 15), |
770 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
771 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
772 | SUNXI_FUNCTION(0x2, "i2s1_dout" ), /* DOUT0 */ |
773 | SUNXI_FUNCTION(0x3, "i2c2" ), /* SDA */ |
774 | SUNXI_FUNCTION(0x4, "emac" ), /* MDIO */ |
775 | SUNXI_FUNCTION(0x5, "i2s1_din" ), /* DIN1 */ |
776 | SUNXI_FUNCTION(0x6, "spi0" ), /* HOLD */ |
777 | SUNXI_FUNCTION(0x7, "uart1" ), /* CTS */ |
778 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 15)), |
779 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 16), |
780 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
781 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
782 | SUNXI_FUNCTION(0x2, "ir" ), /* RX */ |
783 | SUNXI_FUNCTION(0x3, "tcon" ), /* TRIG0 */ |
784 | SUNXI_FUNCTION(0x4, "pwm5" ), |
785 | SUNXI_FUNCTION(0x5, "clk" ), /* FANOUT2 */ |
786 | SUNXI_FUNCTION(0x6, "spdif" ), /* IN */ |
787 | SUNXI_FUNCTION(0x7, "ledc" ), |
788 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 16)), |
789 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 17), |
790 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
791 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
792 | SUNXI_FUNCTION(0x2, "uart2" ), /* TX */ |
793 | SUNXI_FUNCTION(0x3, "i2c3" ), /* SCK */ |
794 | SUNXI_FUNCTION(0x4, "pwm7" ), |
795 | SUNXI_FUNCTION(0x5, "clk" ), /* FANOUT0 */ |
796 | SUNXI_FUNCTION(0x6, "ir" ), /* TX */ |
797 | SUNXI_FUNCTION(0x7, "uart0" ), /* TX */ |
798 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 17)), |
799 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 18), |
800 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
801 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
802 | SUNXI_FUNCTION(0x2, "uart2" ), /* RX */ |
803 | SUNXI_FUNCTION(0x3, "i2c3" ), /* SDA */ |
804 | SUNXI_FUNCTION(0x4, "pwm6" ), |
805 | SUNXI_FUNCTION(0x5, "clk" ), /* FANOUT1 */ |
806 | SUNXI_FUNCTION(0x6, "spdif" ), /* OUT */ |
807 | SUNXI_FUNCTION(0x7, "uart0" ), /* RX */ |
808 | SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 18)), |
809 | }; |
810 | |
811 | static const unsigned int d1_irq_bank_map[] = { 1, 2, 3, 4, 5, 6 }; |
812 | |
813 | static const struct sunxi_pinctrl_desc d1_pinctrl_data = { |
814 | .pins = d1_pins, |
815 | .npins = ARRAY_SIZE(d1_pins), |
816 | .irq_banks = ARRAY_SIZE(d1_irq_bank_map), |
817 | .irq_bank_map = d1_irq_bank_map, |
818 | .io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_CTL, |
819 | }; |
820 | |
821 | static int d1_pinctrl_probe(struct platform_device *pdev) |
822 | { |
823 | unsigned long variant = (unsigned long)of_device_get_match_data(dev: &pdev->dev); |
824 | |
825 | return sunxi_pinctrl_init_with_variant(pdev, desc: &d1_pinctrl_data, variant); |
826 | } |
827 | |
828 | static const struct of_device_id d1_pinctrl_match[] = { |
829 | { |
830 | .compatible = "allwinner,sun20i-d1-pinctrl" , |
831 | .data = (void *)PINCTRL_SUN20I_D1 |
832 | }, |
833 | {} |
834 | }; |
835 | |
836 | static struct platform_driver d1_pinctrl_driver = { |
837 | .probe = d1_pinctrl_probe, |
838 | .driver = { |
839 | .name = "sun20i-d1-pinctrl" , |
840 | .of_match_table = d1_pinctrl_match, |
841 | }, |
842 | }; |
843 | builtin_platform_driver(d1_pinctrl_driver); |
844 | |