1 | /* |
2 | * Allwinner A64 SoCs special pins pinctrl driver. |
3 | * |
4 | * Based on pinctrl-sun8i-a23-r.c |
5 | * |
6 | * Copyright (C) 2016 Icenowy Zheng |
7 | * Icenowy Zheng <icenowy@aosc.xyz> |
8 | * |
9 | * Copyright (C) 2014 Chen-Yu Tsai |
10 | * Chen-Yu Tsai <wens@csie.org> |
11 | * |
12 | * Copyright (C) 2014 Boris Brezillon |
13 | * Boris Brezillon <boris.brezillon@free-electrons.com> |
14 | * |
15 | * Copyright (C) 2014 Maxime Ripard |
16 | * Maxime Ripard <maxime.ripard@free-electrons.com> |
17 | * |
18 | * This file is licensed under the terms of the GNU General Public |
19 | * License version 2. This program is licensed "as is" without any |
20 | * warranty of any kind, whether express or implied. |
21 | */ |
22 | |
23 | #include <linux/of.h> |
24 | #include <linux/pinctrl/pinctrl.h> |
25 | #include <linux/platform_device.h> |
26 | |
27 | #include "pinctrl-sunxi.h" |
28 | |
29 | static const struct sunxi_desc_pin sun50i_a64_r_pins[] = { |
30 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0), |
31 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
32 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
33 | SUNXI_FUNCTION(0x2, "s_rsb" ), /* SCK */ |
34 | SUNXI_FUNCTION(0x3, "s_i2c" ), /* SCK */ |
35 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PL_EINT0 */ |
36 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1), |
37 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
38 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
39 | SUNXI_FUNCTION(0x2, "s_rsb" ), /* SDA */ |
40 | SUNXI_FUNCTION(0x3, "s_i2c" ), /* SDA */ |
41 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PL_EINT1 */ |
42 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2), |
43 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
44 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
45 | SUNXI_FUNCTION(0x2, "s_uart" ), /* TX */ |
46 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PL_EINT2 */ |
47 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3), |
48 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
49 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
50 | SUNXI_FUNCTION(0x2, "s_uart" ), /* RX */ |
51 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PL_EINT3 */ |
52 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4), |
53 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
54 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
55 | SUNXI_FUNCTION(0x2, "s_jtag" ), /* MS */ |
56 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PL_EINT4 */ |
57 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5), |
58 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
59 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
60 | SUNXI_FUNCTION(0x2, "s_jtag" ), /* CK */ |
61 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PL_EINT5 */ |
62 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6), |
63 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
64 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
65 | SUNXI_FUNCTION(0x2, "s_jtag" ), /* DO */ |
66 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PL_EINT6 */ |
67 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7), |
68 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
69 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
70 | SUNXI_FUNCTION(0x2, "s_jtag" ), /* DI */ |
71 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PL_EINT7 */ |
72 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8), |
73 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
74 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
75 | SUNXI_FUNCTION(0x2, "s_i2c" ), /* SCK */ |
76 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PL_EINT8 */ |
77 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9), |
78 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
79 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
80 | SUNXI_FUNCTION(0x2, "s_i2c" ), /* SDA */ |
81 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PL_EINT9 */ |
82 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10), |
83 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
84 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
85 | SUNXI_FUNCTION(0x2, "s_pwm" ), |
86 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PL_EINT10 */ |
87 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11), |
88 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
89 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
90 | SUNXI_FUNCTION(0x2, "s_cir_rx" ), |
91 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PL_EINT11 */ |
92 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 12), |
93 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
94 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
95 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)), /* PL_EINT12 */ |
96 | }; |
97 | |
98 | static const struct sunxi_pinctrl_desc sun50i_a64_r_pinctrl_data = { |
99 | .pins = sun50i_a64_r_pins, |
100 | .npins = ARRAY_SIZE(sun50i_a64_r_pins), |
101 | .pin_base = PL_BASE, |
102 | .irq_banks = 1, |
103 | }; |
104 | |
105 | static int sun50i_a64_r_pinctrl_probe(struct platform_device *pdev) |
106 | { |
107 | return sunxi_pinctrl_init(pdev, |
108 | &sun50i_a64_r_pinctrl_data); |
109 | } |
110 | |
111 | static const struct of_device_id sun50i_a64_r_pinctrl_match[] = { |
112 | { .compatible = "allwinner,sun50i-a64-r-pinctrl" , }, |
113 | {} |
114 | }; |
115 | |
116 | static struct platform_driver sun50i_a64_r_pinctrl_driver = { |
117 | .probe = sun50i_a64_r_pinctrl_probe, |
118 | .driver = { |
119 | .name = "sun50i-a64-r-pinctrl" , |
120 | .of_match_table = sun50i_a64_r_pinctrl_match, |
121 | }, |
122 | }; |
123 | builtin_platform_driver(sun50i_a64_r_pinctrl_driver); |
124 | |