1 | /* |
2 | * Allwinner A23 SoCs pinctrl driver. |
3 | * |
4 | * Copyright (C) 2014 Chen-Yu Tsai |
5 | * |
6 | * Chen-Yu Tsai <wens@csie.org> |
7 | * |
8 | * Copyright (C) 2014 Maxime Ripard |
9 | * |
10 | * Maxime Ripard <maxime.ripard@free-electrons.com> |
11 | * |
12 | * This file is licensed under the terms of the GNU General Public |
13 | * License version 2. This program is licensed "as is" without any |
14 | * warranty of any kind, whether express or implied. |
15 | */ |
16 | |
17 | #include <linux/init.h> |
18 | #include <linux/platform_device.h> |
19 | #include <linux/of.h> |
20 | #include <linux/pinctrl/pinctrl.h> |
21 | |
22 | #include "pinctrl-sunxi.h" |
23 | |
24 | static const struct sunxi_desc_pin sun8i_a23_pins[] = { |
25 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0), |
26 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
27 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
28 | SUNXI_FUNCTION(0x2, "spi1" ), /* CS */ |
29 | SUNXI_FUNCTION(0x3, "jtag" ), /* MS0 */ |
30 | SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 0)), /* PA_EINT0 */ |
31 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1), |
32 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
33 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
34 | SUNXI_FUNCTION(0x2, "spi1" ), /* CLK */ |
35 | SUNXI_FUNCTION(0x3, "jtag" ), /* CKO */ |
36 | SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 1)), /* PA_EINT1 */ |
37 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2), |
38 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
39 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
40 | SUNXI_FUNCTION(0x2, "spi1" ), /* MOSI */ |
41 | SUNXI_FUNCTION(0x3, "jtag" ), /* DOO */ |
42 | SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 2)), /* PA_EINT2 */ |
43 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3), |
44 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
45 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
46 | SUNXI_FUNCTION(0x2, "spi1" ), /* MISO */ |
47 | SUNXI_FUNCTION(0x3, "jtag" ), /* DIO */ |
48 | SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 3)), /* PA_EINT3 */ |
49 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4), |
50 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
51 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
52 | SUNXI_FUNCTION(0x2, "uart4" ), /* TX */ |
53 | SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 4)), /* PA_EINT4 */ |
54 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5), |
55 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
56 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
57 | SUNXI_FUNCTION(0x2, "uart4" ), /* RX */ |
58 | SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 5)), /* PA_EINT5 */ |
59 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6), |
60 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
61 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
62 | SUNXI_FUNCTION(0x2, "uart4" ), /* RTS */ |
63 | SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 6)), /* PA_EINT6 */ |
64 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7), |
65 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
66 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
67 | SUNXI_FUNCTION(0x2, "uart4" ), /* CTS */ |
68 | SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 7)), /* PA_EINT7 */ |
69 | /* Hole */ |
70 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0), |
71 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
72 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
73 | SUNXI_FUNCTION(0x2, "uart2" ), /* TX */ |
74 | SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 0)), /* PB_EINT0 */ |
75 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1), |
76 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
77 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
78 | SUNXI_FUNCTION(0x2, "uart2" ), /* RX */ |
79 | SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 1)), /* PB_EINT1 */ |
80 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2), |
81 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
82 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
83 | SUNXI_FUNCTION(0x2, "uart2" ), /* RTS */ |
84 | SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 2)), /* PB_EINT2 */ |
85 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3), |
86 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
87 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
88 | SUNXI_FUNCTION(0x2, "uart2" ), /* CTS */ |
89 | SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 3)), /* PB_EINT3 */ |
90 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4), |
91 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
92 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
93 | SUNXI_FUNCTION(0x2, "i2s0" ), /* SYNC */ |
94 | SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 4)), /* PB_EINT4 */ |
95 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5), |
96 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
97 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
98 | SUNXI_FUNCTION(0x2, "i2s0" ), /* DOUT */ |
99 | SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 5)), /* PB_EINT5 */ |
100 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6), |
101 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
102 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
103 | SUNXI_FUNCTION(0x2, "i2s0" ), /* DIN */ |
104 | SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 6)), /* PB_EINT6 */ |
105 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7), |
106 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
107 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
108 | SUNXI_FUNCTION(0x3, "i2s0" ), /* DI */ |
109 | SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 7)), /* PB_EINT7 */ |
110 | /* Hole */ |
111 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0), |
112 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
113 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
114 | SUNXI_FUNCTION(0x2, "nand0" ), /* WE */ |
115 | SUNXI_FUNCTION(0x3, "spi0" )), /* MOSI */ |
116 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1), |
117 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
118 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
119 | SUNXI_FUNCTION(0x2, "nand0" ), /* ALE */ |
120 | SUNXI_FUNCTION(0x3, "spi0" )), /* MISO */ |
121 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2), |
122 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
123 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
124 | SUNXI_FUNCTION(0x2, "nand0" ), /* CLE */ |
125 | SUNXI_FUNCTION(0x3, "spi0" )), /* CLK */ |
126 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3), |
127 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
128 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
129 | SUNXI_FUNCTION(0x2, "nand0" ), /* CE1 */ |
130 | SUNXI_FUNCTION(0x3, "spi0" )), /* CS */ |
131 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4), |
132 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
133 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
134 | SUNXI_FUNCTION(0x2, "nand0" )), /* CE0 */ |
135 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5), |
136 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
137 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
138 | SUNXI_FUNCTION(0x2, "nand0" ), /* RE */ |
139 | SUNXI_FUNCTION(0x3, "mmc2" )), /* CLK */ |
140 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6), |
141 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
142 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
143 | SUNXI_FUNCTION(0x2, "nand0" ), /* RB0 */ |
144 | SUNXI_FUNCTION(0x3, "mmc2" )), /* CMD */ |
145 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7), |
146 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
147 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
148 | SUNXI_FUNCTION(0x2, "nand0" )), /* RB1 */ |
149 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8), |
150 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
151 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
152 | SUNXI_FUNCTION(0x2, "nand0" ), /* DQ0 */ |
153 | SUNXI_FUNCTION(0x3, "mmc2" )), /* D0 */ |
154 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9), |
155 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
156 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
157 | SUNXI_FUNCTION(0x2, "nand0" ), /* DQ1 */ |
158 | SUNXI_FUNCTION(0x3, "mmc2" )), /* D1 */ |
159 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10), |
160 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
161 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
162 | SUNXI_FUNCTION(0x2, "nand0" ), /* DQ2 */ |
163 | SUNXI_FUNCTION(0x3, "mmc2" )), /* D2 */ |
164 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11), |
165 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
166 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
167 | SUNXI_FUNCTION(0x2, "nand0" ), /* DQ3 */ |
168 | SUNXI_FUNCTION(0x3, "mmc2" )), /* D3 */ |
169 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12), |
170 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
171 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
172 | SUNXI_FUNCTION(0x2, "nand0" ), /* DQ4 */ |
173 | SUNXI_FUNCTION(0x3, "mmc2" )), /* D4 */ |
174 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13), |
175 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
176 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
177 | SUNXI_FUNCTION(0x2, "nand0" ), /* DQ5 */ |
178 | SUNXI_FUNCTION(0x3, "mmc2" )), /* D5 */ |
179 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14), |
180 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
181 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
182 | SUNXI_FUNCTION(0x2, "nand0" ), /* DQ6 */ |
183 | SUNXI_FUNCTION(0x3, "mmc2" )), /* D6 */ |
184 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15), |
185 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
186 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
187 | SUNXI_FUNCTION(0x2, "nand0" ), /* DQ7 */ |
188 | SUNXI_FUNCTION(0x3, "mmc2" )), /* D7 */ |
189 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16), |
190 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
191 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
192 | SUNXI_FUNCTION(0x2, "nand0" ), /* DQS */ |
193 | SUNXI_FUNCTION(0x3, "mmc2" )), /* RST */ |
194 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17), |
195 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
196 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
197 | SUNXI_FUNCTION(0x2, "nand0" )), /* CE2 */ |
198 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18), |
199 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
200 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
201 | SUNXI_FUNCTION(0x2, "nand0" )), /* CE3 */ |
202 | /* Hole */ |
203 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0), |
204 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
205 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
206 | SUNXI_FUNCTION(0x2, "lcd0" )), /* D0 */ |
207 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1), |
208 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
209 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
210 | SUNXI_FUNCTION(0x2, "lcd0" )), /* D1 */ |
211 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2), |
212 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
213 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
214 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D2 */ |
215 | SUNXI_FUNCTION(0x3, "mmc1" )), /* CLK */ |
216 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3), |
217 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
218 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
219 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D3 */ |
220 | SUNXI_FUNCTION(0x3, "mmc1" )), /* CMD */ |
221 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4), |
222 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
223 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
224 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D4 */ |
225 | SUNXI_FUNCTION(0x3, "mmc1" )), /* D0 */ |
226 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5), |
227 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
228 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
229 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D5 */ |
230 | SUNXI_FUNCTION(0x3, "mmc1" )), /* D1 */ |
231 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6), |
232 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
233 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
234 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D6 */ |
235 | SUNXI_FUNCTION(0x3, "mmc1" )), /* D2 */ |
236 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7), |
237 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
238 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
239 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D7 */ |
240 | SUNXI_FUNCTION(0x3, "mmc1" )), /* D3 */ |
241 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8), |
242 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
243 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
244 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D8 */ |
245 | SUNXI_FUNCTION(0x3, "uart3" )), /* TX */ |
246 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9), |
247 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
248 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
249 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D9 */ |
250 | SUNXI_FUNCTION(0x3, "uart3" )), /* RX */ |
251 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10), |
252 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
253 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
254 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D10 */ |
255 | SUNXI_FUNCTION(0x3, "uart1" )), /* TX */ |
256 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11), |
257 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
258 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
259 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D11 */ |
260 | SUNXI_FUNCTION(0x3, "uart1" )), /* RX */ |
261 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12), |
262 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
263 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
264 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D12 */ |
265 | SUNXI_FUNCTION(0x3, "uart1" )), /* RTS */ |
266 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13), |
267 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
268 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
269 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D13 */ |
270 | SUNXI_FUNCTION(0x3, "uart1" )), /* CTS */ |
271 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14), |
272 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
273 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
274 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D14 */ |
275 | SUNXI_FUNCTION(0x3, "i2s1" )), /* SYNC */ |
276 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15), |
277 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
278 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
279 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D15 */ |
280 | SUNXI_FUNCTION(0x3, "i2s1" )), /* CLK */ |
281 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16), |
282 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
283 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
284 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D16 */ |
285 | SUNXI_FUNCTION(0x3, "i2s1" )), /* DOUT */ |
286 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17), |
287 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
288 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
289 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D17 */ |
290 | SUNXI_FUNCTION(0x3, "i2s1" )), /* DIN */ |
291 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18), |
292 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
293 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
294 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D18 */ |
295 | SUNXI_FUNCTION(0x3, "lvds0" )), /* VN0 */ |
296 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19), |
297 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
298 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
299 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D19 */ |
300 | SUNXI_FUNCTION(0x3, "lvds0" )), /* VP0 */ |
301 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20), |
302 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
303 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
304 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D20 */ |
305 | SUNXI_FUNCTION(0x3, "lvds0" )), /* VP1 */ |
306 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21), |
307 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
308 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
309 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D21 */ |
310 | SUNXI_FUNCTION(0x3, "lvds0" )), /* VN1 */ |
311 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22), |
312 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
313 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
314 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D22 */ |
315 | SUNXI_FUNCTION(0x3, "lvds0" )), /* VP2 */ |
316 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23), |
317 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
318 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
319 | SUNXI_FUNCTION(0x2, "lcd0" ), /* D23 */ |
320 | SUNXI_FUNCTION(0x3, "lvds0" )), /* VN2 */ |
321 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24), |
322 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
323 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
324 | SUNXI_FUNCTION(0x2, "lcd0" ), /* CLK */ |
325 | SUNXI_FUNCTION(0x3, "lvds0" )), /* VPC */ |
326 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25), |
327 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
328 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
329 | SUNXI_FUNCTION(0x2, "lcd0" ), /* DE */ |
330 | SUNXI_FUNCTION(0x3, "lvds0" )), /* VNC */ |
331 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26), |
332 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
333 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
334 | SUNXI_FUNCTION(0x2, "lcd0" ), /* HSYNC */ |
335 | SUNXI_FUNCTION(0x3, "lvds0" )), /* VP3 */ |
336 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27), |
337 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
338 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
339 | SUNXI_FUNCTION(0x2, "lcd0" ), /* VSYNC */ |
340 | SUNXI_FUNCTION(0x3, "lvds0" )), /* VN3 */ |
341 | /* Hole */ |
342 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0), |
343 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
344 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
345 | SUNXI_FUNCTION(0x2, "csi" )), /* PCLK */ |
346 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1), |
347 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
348 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
349 | SUNXI_FUNCTION(0x2, "csi" )), /* MCLK */ |
350 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2), |
351 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
352 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
353 | SUNXI_FUNCTION(0x2, "csi" )), /* HSYNC */ |
354 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3), |
355 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
356 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
357 | SUNXI_FUNCTION(0x2, "csi" )), /* VSYNC */ |
358 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4), |
359 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
360 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
361 | SUNXI_FUNCTION(0x2, "csi" )), /* D0 */ |
362 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5), |
363 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
364 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
365 | SUNXI_FUNCTION(0x2, "csi" )), /* D1 */ |
366 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6), |
367 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
368 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
369 | SUNXI_FUNCTION(0x2, "csi" )), /* D2 */ |
370 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7), |
371 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
372 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
373 | SUNXI_FUNCTION(0x2, "csi" )), /* D3 */ |
374 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8), |
375 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
376 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
377 | SUNXI_FUNCTION(0x2, "csi" )), /* D4 */ |
378 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9), |
379 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
380 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
381 | SUNXI_FUNCTION(0x2, "csi" )), /* D5 */ |
382 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10), |
383 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
384 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
385 | SUNXI_FUNCTION(0x2, "csi" )), /* D6 */ |
386 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11), |
387 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
388 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
389 | SUNXI_FUNCTION(0x2, "csi" )), /* D7 */ |
390 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12), |
391 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
392 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
393 | SUNXI_FUNCTION(0x2, "csi" ), /* SCK */ |
394 | SUNXI_FUNCTION(0x3, "i2c2" )), /* SCK */ |
395 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13), |
396 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
397 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
398 | SUNXI_FUNCTION(0x2, "csi" ), /* SDA */ |
399 | SUNXI_FUNCTION(0x3, "i2c2" )), /* SDA */ |
400 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14), |
401 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
402 | SUNXI_FUNCTION(0x1, "gpio_out" )), |
403 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15), |
404 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
405 | SUNXI_FUNCTION(0x1, "gpio_out" )), |
406 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16), |
407 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
408 | SUNXI_FUNCTION(0x1, "gpio_out" )), |
409 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17), |
410 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
411 | SUNXI_FUNCTION(0x1, "gpio_out" )), |
412 | /* Hole */ |
413 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0), |
414 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
415 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
416 | SUNXI_FUNCTION(0x2, "mmc0" ), /* D1 */ |
417 | SUNXI_FUNCTION(0x3, "jtag" )), /* MS1 */ |
418 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1), |
419 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
420 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
421 | SUNXI_FUNCTION(0x2, "mmc0" ), /* D0 */ |
422 | SUNXI_FUNCTION(0x3, "jtag" )), /* DI1 */ |
423 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2), |
424 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
425 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
426 | SUNXI_FUNCTION(0x2, "mmc0" ), /* CLK */ |
427 | SUNXI_FUNCTION(0x3, "uart0" )), /* TX */ |
428 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3), |
429 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
430 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
431 | SUNXI_FUNCTION(0x2, "mmc0" ), /* CMD */ |
432 | SUNXI_FUNCTION(0x3, "jtag" )), /* DO1 */ |
433 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4), |
434 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
435 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
436 | SUNXI_FUNCTION(0x2, "mmc0" ), /* D3 */ |
437 | SUNXI_FUNCTION(0x3, "uart0" )), /* RX */ |
438 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5), |
439 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
440 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
441 | SUNXI_FUNCTION(0x2, "mmc0" ), /* D2 */ |
442 | SUNXI_FUNCTION(0x3, "jtag" )), /* CK1 */ |
443 | /* Hole */ |
444 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0), |
445 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
446 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
447 | SUNXI_FUNCTION(0x2, "mmc1" ), /* CLK */ |
448 | SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 0)), /* PG_EINT0 */ |
449 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1), |
450 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
451 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
452 | SUNXI_FUNCTION(0x2, "mmc1" ), /* CMD */ |
453 | SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 1)), /* PG_EINT1 */ |
454 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2), |
455 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
456 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
457 | SUNXI_FUNCTION(0x2, "mmc1" ), /* D0 */ |
458 | SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 2)), /* PG_EINT2 */ |
459 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3), |
460 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
461 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
462 | SUNXI_FUNCTION(0x2, "mmc1" ), /* D1 */ |
463 | SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 3)), /* PG_EINT3 */ |
464 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4), |
465 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
466 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
467 | SUNXI_FUNCTION(0x2, "mmc1" ), /* D2 */ |
468 | SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 4)), /* PG_EINT4 */ |
469 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5), |
470 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
471 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
472 | SUNXI_FUNCTION(0x2, "mmc1" ), /* D3 */ |
473 | SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 5)), /* PG_EINT5 */ |
474 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6), |
475 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
476 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
477 | SUNXI_FUNCTION(0x2, "uart1" ), /* TX */ |
478 | SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 6)), /* PG_EINT6 */ |
479 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7), |
480 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
481 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
482 | SUNXI_FUNCTION(0x2, "uart1" ), /* RX */ |
483 | SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 7)), /* PG_EINT7 */ |
484 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8), |
485 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
486 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
487 | SUNXI_FUNCTION(0x2, "uart1" ), /* RTS */ |
488 | SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 8)), /* PG_EINT8 */ |
489 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9), |
490 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
491 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
492 | SUNXI_FUNCTION(0x2, "uart1" ), /* CTS */ |
493 | SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 9)), /* PG_EINT9 */ |
494 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10), |
495 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
496 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
497 | SUNXI_FUNCTION(0x2, "i2s1" ), /* SYNC */ |
498 | SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 10)), /* PG_EINT10 */ |
499 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11), |
500 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
501 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
502 | SUNXI_FUNCTION(0x2, "i2s1" ), /* CLK */ |
503 | SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 11)), /* PG_EINT11 */ |
504 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12), |
505 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
506 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
507 | SUNXI_FUNCTION(0x2, "i2s1" ), /* DOUT */ |
508 | SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 12)), /* PG_EINT12 */ |
509 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13), |
510 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
511 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
512 | SUNXI_FUNCTION(0x2, "i2s1" ), /* DIN */ |
513 | SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 13)), /* PG_EINT13 */ |
514 | /* Hole */ |
515 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0), |
516 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
517 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
518 | SUNXI_FUNCTION(0x2, "pwm0" )), |
519 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1), |
520 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
521 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
522 | SUNXI_FUNCTION(0x2, "pwm1" )), |
523 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2), |
524 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
525 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
526 | SUNXI_FUNCTION(0x2, "i2c0" )), /* SCK */ |
527 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3), |
528 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
529 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
530 | SUNXI_FUNCTION(0x2, "i2c0" )), /* SDA */ |
531 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4), |
532 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
533 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
534 | SUNXI_FUNCTION(0x2, "i2c1" )), /* SCK */ |
535 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5), |
536 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
537 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
538 | SUNXI_FUNCTION(0x2, "i2c1" )), /* SDA */ |
539 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6), |
540 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
541 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
542 | SUNXI_FUNCTION(0x2, "spi0" ), /* CS */ |
543 | SUNXI_FUNCTION(0x3, "uart3" )), /* TX */ |
544 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7), |
545 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
546 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
547 | SUNXI_FUNCTION(0x2, "spi0" ), /* CLK */ |
548 | SUNXI_FUNCTION(0x3, "uart3" )), /* RX */ |
549 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8), |
550 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
551 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
552 | SUNXI_FUNCTION(0x2, "spi0" ), /* DOUT */ |
553 | SUNXI_FUNCTION(0x3, "uart3" )), /* RTS */ |
554 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9), |
555 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
556 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
557 | SUNXI_FUNCTION(0x2, "spi0" ), /* DIN */ |
558 | SUNXI_FUNCTION(0x3, "uart3" )), /* CTS */ |
559 | }; |
560 | |
561 | static const struct sunxi_pinctrl_desc sun8i_a23_pinctrl_data = { |
562 | .pins = sun8i_a23_pins, |
563 | .npins = ARRAY_SIZE(sun8i_a23_pins), |
564 | .irq_banks = 3, |
565 | .disable_strict_mode = true, |
566 | }; |
567 | |
568 | static int sun8i_a23_pinctrl_probe(struct platform_device *pdev) |
569 | { |
570 | return sunxi_pinctrl_init(pdev, |
571 | &sun8i_a23_pinctrl_data); |
572 | } |
573 | |
574 | static const struct of_device_id sun8i_a23_pinctrl_match[] = { |
575 | { .compatible = "allwinner,sun8i-a23-pinctrl" , }, |
576 | {} |
577 | }; |
578 | |
579 | static struct platform_driver sun8i_a23_pinctrl_driver = { |
580 | .probe = sun8i_a23_pinctrl_probe, |
581 | .driver = { |
582 | .name = "sun8i-a23-pinctrl" , |
583 | .of_match_table = sun8i_a23_pinctrl_match, |
584 | }, |
585 | }; |
586 | builtin_platform_driver(sun8i_a23_pinctrl_driver); |
587 | |