1 | /* |
2 | * Allwinner V3/V3s SoCs pinctrl driver. |
3 | * |
4 | * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz> |
5 | * |
6 | * Based on pinctrl-sun8i-h3.c, which is: |
7 | * Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com> |
8 | * |
9 | * Based on pinctrl-sun8i-a23.c, which is: |
10 | * Copyright (C) 2014 Chen-Yu Tsai <wens@csie.org> |
11 | * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com> |
12 | * |
13 | * This file is licensed under the terms of the GNU General Public |
14 | * License version 2. This program is licensed "as is" without any |
15 | * warranty of any kind, whether express or implied. |
16 | */ |
17 | |
18 | #include <linux/module.h> |
19 | #include <linux/platform_device.h> |
20 | #include <linux/of.h> |
21 | #include <linux/pinctrl/pinctrl.h> |
22 | |
23 | #include "pinctrl-sunxi.h" |
24 | |
25 | static const struct sunxi_desc_pin sun8i_v3s_pins[] = { |
26 | /* Hole */ |
27 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0), |
28 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
29 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
30 | SUNXI_FUNCTION(0x2, "uart2" ), /* TX */ |
31 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PB_EINT0 */ |
32 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1), |
33 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
34 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
35 | SUNXI_FUNCTION(0x2, "uart2" ), /* RX */ |
36 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PB_EINT1 */ |
37 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2), |
38 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
39 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
40 | SUNXI_FUNCTION(0x2, "uart2" ), /* RTS */ |
41 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PB_EINT2 */ |
42 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3), |
43 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
44 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
45 | SUNXI_FUNCTION(0x2, "uart2" ), /* D1 */ |
46 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PB_EINT3 */ |
47 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4), |
48 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
49 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
50 | SUNXI_FUNCTION(0x2, "pwm0" ), |
51 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PB_EINT4 */ |
52 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5), |
53 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
54 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
55 | SUNXI_FUNCTION(0x2, "pwm1" ), |
56 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PB_EINT5 */ |
57 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6), |
58 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
59 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
60 | SUNXI_FUNCTION(0x2, "i2c0" ), /* SCK */ |
61 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PB_EINT6 */ |
62 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7), |
63 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
64 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
65 | SUNXI_FUNCTION(0x2, "i2c0" ), /* SDA */ |
66 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PB_EINT7 */ |
67 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8), |
68 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
69 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
70 | SUNXI_FUNCTION(0x2, "i2c1" ), /* SDA */ |
71 | SUNXI_FUNCTION(0x3, "uart0" ), /* TX */ |
72 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PB_EINT8 */ |
73 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9), |
74 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
75 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
76 | SUNXI_FUNCTION(0x2, "i2c1" ), /* SCK */ |
77 | SUNXI_FUNCTION(0x3, "uart0" ), /* RX */ |
78 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PB_EINT9 */ |
79 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 10), |
80 | PINCTRL_SUN8I_V3, |
81 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
82 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
83 | SUNXI_FUNCTION(0x2, "jtag" ), /* MS */ |
84 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PB_EINT10 */ |
85 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 11), |
86 | PINCTRL_SUN8I_V3, |
87 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
88 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
89 | SUNXI_FUNCTION(0x2, "jtag" ), /* CK */ |
90 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PB_EINT11 */ |
91 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 12), |
92 | PINCTRL_SUN8I_V3, |
93 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
94 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
95 | SUNXI_FUNCTION(0x2, "jtag" ), /* DO */ |
96 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)), /* PB_EINT12 */ |
97 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 13), |
98 | PINCTRL_SUN8I_V3, |
99 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
100 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
101 | SUNXI_FUNCTION(0x2, "jtag" ), /* DI */ |
102 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 13)), /* PB_EINT13 */ |
103 | /* Hole */ |
104 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0), |
105 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
106 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
107 | SUNXI_FUNCTION(0x2, "mmc2" ), /* CLK */ |
108 | SUNXI_FUNCTION(0x3, "spi0" )), /* MISO */ |
109 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1), |
110 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
111 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
112 | SUNXI_FUNCTION(0x2, "mmc2" ), /* CMD */ |
113 | SUNXI_FUNCTION(0x3, "spi0" )), /* CLK */ |
114 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2), |
115 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
116 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
117 | SUNXI_FUNCTION(0x2, "mmc2" ), /* RST */ |
118 | SUNXI_FUNCTION(0x3, "spi0" )), /* CS */ |
119 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3), |
120 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
121 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
122 | SUNXI_FUNCTION(0x2, "mmc2" ), /* D0 */ |
123 | SUNXI_FUNCTION(0x3, "spi0" )), /* MOSI */ |
124 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 4), |
125 | PINCTRL_SUN8I_V3, |
126 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
127 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
128 | SUNXI_FUNCTION(0x2, "mmc2" )), /* D1 */ |
129 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 5), |
130 | PINCTRL_SUN8I_V3, |
131 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
132 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
133 | SUNXI_FUNCTION(0x2, "mmc2" )), /* D2 */ |
134 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 6), |
135 | PINCTRL_SUN8I_V3, |
136 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
137 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
138 | SUNXI_FUNCTION(0x2, "mmc2" )), /* D3 */ |
139 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 7), |
140 | PINCTRL_SUN8I_V3, |
141 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
142 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
143 | SUNXI_FUNCTION(0x2, "mmc2" )), /* D4 */ |
144 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 8), |
145 | PINCTRL_SUN8I_V3, |
146 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
147 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
148 | SUNXI_FUNCTION(0x2, "mmc2" )), /* D5 */ |
149 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 9), |
150 | PINCTRL_SUN8I_V3, |
151 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
152 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
153 | SUNXI_FUNCTION(0x2, "mmc2" )), /* D6 */ |
154 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 10), |
155 | PINCTRL_SUN8I_V3, |
156 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
157 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
158 | SUNXI_FUNCTION(0x2, "mmc2" )), /* D7 */ |
159 | /* Hole */ |
160 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 0), |
161 | PINCTRL_SUN8I_V3, |
162 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
163 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
164 | SUNXI_FUNCTION(0x2, "lcd" ), /* D2 */ |
165 | SUNXI_FUNCTION(0x4, "emac" )), /* RXD3 */ |
166 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 1), |
167 | PINCTRL_SUN8I_V3, |
168 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
169 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
170 | SUNXI_FUNCTION(0x2, "lcd" ), /* D3 */ |
171 | SUNXI_FUNCTION(0x4, "emac" )), /* RXD2 */ |
172 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 2), |
173 | PINCTRL_SUN8I_V3, |
174 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
175 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
176 | SUNXI_FUNCTION(0x2, "lcd" ), /* D4 */ |
177 | SUNXI_FUNCTION(0x4, "emac" )), /* RXD1 */ |
178 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 3), |
179 | PINCTRL_SUN8I_V3, |
180 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
181 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
182 | SUNXI_FUNCTION(0x2, "lcd" ), /* D5 */ |
183 | SUNXI_FUNCTION(0x4, "emac" )), /* RXD0 */ |
184 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 4), |
185 | PINCTRL_SUN8I_V3, |
186 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
187 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
188 | SUNXI_FUNCTION(0x2, "lcd" ), /* D6 */ |
189 | SUNXI_FUNCTION(0x4, "emac" )), /* RXCK */ |
190 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 5), |
191 | PINCTRL_SUN8I_V3, |
192 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
193 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
194 | SUNXI_FUNCTION(0x2, "lcd" ), /* D7 */ |
195 | SUNXI_FUNCTION(0x4, "emac" )), /* RXCTL/RXDV */ |
196 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 6), |
197 | PINCTRL_SUN8I_V3, |
198 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
199 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
200 | SUNXI_FUNCTION(0x2, "lcd" ), /* D10 */ |
201 | SUNXI_FUNCTION(0x4, "emac" )), /* RXERR */ |
202 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 7), |
203 | PINCTRL_SUN8I_V3, |
204 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
205 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
206 | SUNXI_FUNCTION(0x2, "lcd" ), /* D11 */ |
207 | SUNXI_FUNCTION(0x4, "emac" )), /* TXD3 */ |
208 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 8), |
209 | PINCTRL_SUN8I_V3, |
210 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
211 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
212 | SUNXI_FUNCTION(0x2, "lcd" ), /* D12 */ |
213 | SUNXI_FUNCTION(0x4, "emac" )), /* TXD2 */ |
214 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 9), |
215 | PINCTRL_SUN8I_V3, |
216 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
217 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
218 | SUNXI_FUNCTION(0x2, "lcd" ), /* D13 */ |
219 | SUNXI_FUNCTION(0x4, "emac" )), /* TXD1 */ |
220 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 10), |
221 | PINCTRL_SUN8I_V3, |
222 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
223 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
224 | SUNXI_FUNCTION(0x2, "lcd" ), /* D14 */ |
225 | SUNXI_FUNCTION(0x4, "emac" )), /* TXD0 */ |
226 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 11), |
227 | PINCTRL_SUN8I_V3, |
228 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
229 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
230 | SUNXI_FUNCTION(0x2, "lcd" ), /* D15 */ |
231 | SUNXI_FUNCTION(0x4, "emac" )), /* CRS */ |
232 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 12), |
233 | PINCTRL_SUN8I_V3, |
234 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
235 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
236 | SUNXI_FUNCTION(0x2, "lcd" ), /* D18 */ |
237 | SUNXI_FUNCTION(0x3, "lvds" ), /* VP0 */ |
238 | SUNXI_FUNCTION(0x4, "emac" )), /* TXCK */ |
239 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 13), |
240 | PINCTRL_SUN8I_V3, |
241 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
242 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
243 | SUNXI_FUNCTION(0x2, "lcd" ), /* D19 */ |
244 | SUNXI_FUNCTION(0x3, "lvds" ), /* VN0 */ |
245 | SUNXI_FUNCTION(0x4, "emac" )), /* TXCTL/TXEN */ |
246 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 14), |
247 | PINCTRL_SUN8I_V3, |
248 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
249 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
250 | SUNXI_FUNCTION(0x2, "lcd" ), /* D20 */ |
251 | SUNXI_FUNCTION(0x3, "lvds" ), /* VP1 */ |
252 | SUNXI_FUNCTION(0x4, "emac" )), /* TXERR */ |
253 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 15), |
254 | PINCTRL_SUN8I_V3, |
255 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
256 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
257 | SUNXI_FUNCTION(0x2, "lcd" ), /* D21 */ |
258 | SUNXI_FUNCTION(0x3, "lvds" ), /* VN1 */ |
259 | SUNXI_FUNCTION(0x4, "emac" )), /* CLKIN/COL */ |
260 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 16), |
261 | PINCTRL_SUN8I_V3, |
262 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
263 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
264 | SUNXI_FUNCTION(0x2, "lcd" ), /* D22 */ |
265 | SUNXI_FUNCTION(0x3, "lvds" ), /* VP2 */ |
266 | SUNXI_FUNCTION(0x4, "emac" )), /* MDC */ |
267 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 17), |
268 | PINCTRL_SUN8I_V3, |
269 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
270 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
271 | SUNXI_FUNCTION(0x2, "lcd" ), /* D23 */ |
272 | SUNXI_FUNCTION(0x3, "lvds" ), /* VN2 */ |
273 | SUNXI_FUNCTION(0x4, "emac" )), /* MDIO */ |
274 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 18), |
275 | PINCTRL_SUN8I_V3, |
276 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
277 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
278 | SUNXI_FUNCTION(0x2, "lcd" ), /* CLK */ |
279 | SUNXI_FUNCTION(0x3, "lvds" )), /* VPC */ |
280 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 19), |
281 | PINCTRL_SUN8I_V3, |
282 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
283 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
284 | SUNXI_FUNCTION(0x2, "lcd" ), /* DE */ |
285 | SUNXI_FUNCTION(0x3, "lvds" )), /* VNC */ |
286 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 20), |
287 | PINCTRL_SUN8I_V3, |
288 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
289 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
290 | SUNXI_FUNCTION(0x2, "lcd" ), /* HSYNC */ |
291 | SUNXI_FUNCTION(0x3, "lvds" )), /* VP3 */ |
292 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 21), |
293 | PINCTRL_SUN8I_V3, |
294 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
295 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
296 | SUNXI_FUNCTION(0x2, "lcd" ), /* VSYNC */ |
297 | SUNXI_FUNCTION(0x3, "lvds" )), /* VN3 */ |
298 | /* Hole */ |
299 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0), |
300 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
301 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
302 | SUNXI_FUNCTION(0x2, "csi" ), /* PCLK */ |
303 | SUNXI_FUNCTION(0x3, "lcd" )), /* CLK */ |
304 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1), |
305 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
306 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
307 | SUNXI_FUNCTION(0x2, "csi" ), /* MCLK */ |
308 | SUNXI_FUNCTION(0x3, "lcd" )), /* DE */ |
309 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2), |
310 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
311 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
312 | SUNXI_FUNCTION(0x2, "csi" ), /* HSYNC */ |
313 | SUNXI_FUNCTION(0x3, "lcd" )), /* HSYNC */ |
314 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3), |
315 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
316 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
317 | SUNXI_FUNCTION(0x2, "csi" ), /* VSYNC */ |
318 | SUNXI_FUNCTION(0x3, "lcd" )), /* VSYNC */ |
319 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4), |
320 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
321 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
322 | SUNXI_FUNCTION(0x2, "csi" ), /* D0 */ |
323 | SUNXI_FUNCTION(0x3, "lcd" )), /* D2 */ |
324 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5), |
325 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
326 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
327 | SUNXI_FUNCTION(0x2, "csi" ), /* D1 */ |
328 | SUNXI_FUNCTION(0x3, "lcd" )), /* D3 */ |
329 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6), |
330 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
331 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
332 | SUNXI_FUNCTION(0x2, "csi" ), /* D2 */ |
333 | SUNXI_FUNCTION(0x3, "lcd" )), /* D4 */ |
334 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7), |
335 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
336 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
337 | SUNXI_FUNCTION(0x2, "csi" ), /* D3 */ |
338 | SUNXI_FUNCTION(0x3, "lcd" )), /* D5 */ |
339 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8), |
340 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
341 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
342 | SUNXI_FUNCTION(0x2, "csi" ), /* D4 */ |
343 | SUNXI_FUNCTION(0x3, "lcd" )), /* D6 */ |
344 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9), |
345 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
346 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
347 | SUNXI_FUNCTION(0x2, "csi" ), /* D5 */ |
348 | SUNXI_FUNCTION(0x3, "lcd" )), /* D7 */ |
349 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10), |
350 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
351 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
352 | SUNXI_FUNCTION(0x2, "csi" ), /* D6 */ |
353 | SUNXI_FUNCTION(0x3, "lcd" )), /* D10 */ |
354 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11), |
355 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
356 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
357 | SUNXI_FUNCTION(0x2, "csi" ), /* D7 */ |
358 | SUNXI_FUNCTION(0x3, "lcd" )), /* D11 */ |
359 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12), |
360 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
361 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
362 | SUNXI_FUNCTION(0x2, "csi" ), /* D8 */ |
363 | SUNXI_FUNCTION(0x3, "lcd" )), /* D12 */ |
364 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13), |
365 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
366 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
367 | SUNXI_FUNCTION(0x2, "csi" ), /* D9 */ |
368 | SUNXI_FUNCTION(0x3, "lcd" )), /* D13 */ |
369 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14), |
370 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
371 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
372 | SUNXI_FUNCTION(0x2, "csi" ), /* D10 */ |
373 | SUNXI_FUNCTION(0x3, "lcd" )), /* D14 */ |
374 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15), |
375 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
376 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
377 | SUNXI_FUNCTION(0x2, "csi" ), /* D11 */ |
378 | SUNXI_FUNCTION(0x3, "lcd" )), /* D15 */ |
379 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16), |
380 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
381 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
382 | SUNXI_FUNCTION(0x2, "csi" ), /* D12 */ |
383 | SUNXI_FUNCTION(0x3, "lcd" )), /* D18 */ |
384 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17), |
385 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
386 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
387 | SUNXI_FUNCTION(0x2, "csi" ), /* D13 */ |
388 | SUNXI_FUNCTION(0x3, "lcd" )), /* D19 */ |
389 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 18), |
390 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
391 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
392 | SUNXI_FUNCTION(0x2, "csi" ), /* D14 */ |
393 | SUNXI_FUNCTION(0x3, "lcd" )), /* D20 */ |
394 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 19), |
395 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
396 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
397 | SUNXI_FUNCTION(0x2, "csi" ), /* D15 */ |
398 | SUNXI_FUNCTION(0x3, "lcd" )), /* D21 */ |
399 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 20), |
400 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
401 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
402 | SUNXI_FUNCTION(0x2, "csi" ), /* FIELD */ |
403 | SUNXI_FUNCTION(0x3, "csi_mipi" )), /* MCLK */ |
404 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 21), |
405 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
406 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
407 | SUNXI_FUNCTION(0x2, "csi" ), /* SCK */ |
408 | SUNXI_FUNCTION(0x3, "i2c1" ), /* SCK */ |
409 | SUNXI_FUNCTION(0x4, "uart1" )), /* TX */ |
410 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 22), |
411 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
412 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
413 | SUNXI_FUNCTION(0x2, "csi" ), /* SDA */ |
414 | SUNXI_FUNCTION(0x3, "i2c1" ), /* SDA */ |
415 | SUNXI_FUNCTION(0x4, "uart1" )), /* RX */ |
416 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 23), |
417 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
418 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
419 | SUNXI_FUNCTION(0x3, "lcd" ), /* D22 */ |
420 | SUNXI_FUNCTION(0x4, "uart1" )), /* RTS */ |
421 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 24), |
422 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
423 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
424 | SUNXI_FUNCTION(0x3, "lcd" ), /* D23 */ |
425 | SUNXI_FUNCTION(0x4, "uart1" )), /* CTS */ |
426 | /* Hole */ |
427 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0), |
428 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
429 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
430 | SUNXI_FUNCTION(0x2, "mmc0" ), /* D1 */ |
431 | SUNXI_FUNCTION(0x3, "jtag" )), /* MS */ |
432 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1), |
433 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
434 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
435 | SUNXI_FUNCTION(0x2, "mmc0" ), /* D0 */ |
436 | SUNXI_FUNCTION(0x3, "jtag" )), /* DI */ |
437 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2), |
438 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
439 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
440 | SUNXI_FUNCTION(0x2, "mmc0" ), /* CLK */ |
441 | SUNXI_FUNCTION(0x3, "uart0" )), /* TX */ |
442 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3), |
443 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
444 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
445 | SUNXI_FUNCTION(0x2, "mmc0" ), /* CMD */ |
446 | SUNXI_FUNCTION(0x3, "jtag" )), /* DO */ |
447 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4), |
448 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
449 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
450 | SUNXI_FUNCTION(0x2, "mmc0" ), /* D3 */ |
451 | SUNXI_FUNCTION(0x3, "uart0" )), /* RX */ |
452 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5), |
453 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
454 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
455 | SUNXI_FUNCTION(0x2, "mmc0" ), /* D2 */ |
456 | SUNXI_FUNCTION(0x3, "jtag" )), /* CK */ |
457 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6), |
458 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
459 | SUNXI_FUNCTION(0x1, "gpio_out" )), |
460 | /* Hole */ |
461 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0), |
462 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
463 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
464 | SUNXI_FUNCTION(0x2, "mmc1" ), /* CLK */ |
465 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), /* PG_EINT0 */ |
466 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1), |
467 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
468 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
469 | SUNXI_FUNCTION(0x2, "mmc1" ), /* CMD */ |
470 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), /* PG_EINT1 */ |
471 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2), |
472 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
473 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
474 | SUNXI_FUNCTION(0x2, "mmc1" ), /* D0 */ |
475 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)), /* PG_EINT2 */ |
476 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3), |
477 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
478 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
479 | SUNXI_FUNCTION(0x2, "mmc1" ), /* D1 */ |
480 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), /* PG_EINT3 */ |
481 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4), |
482 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
483 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
484 | SUNXI_FUNCTION(0x2, "mmc1" ), /* D2 */ |
485 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* PG_EINT4 */ |
486 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5), |
487 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
488 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
489 | SUNXI_FUNCTION(0x2, "mmc1" ), /* D3 */ |
490 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)), /* PG_EINT5 */ |
491 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 6), |
492 | PINCTRL_SUN8I_V3, |
493 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
494 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
495 | SUNXI_FUNCTION(0x2, "uart1" ), /* TX */ |
496 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)), /* PG_EINT6 */ |
497 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 7), |
498 | PINCTRL_SUN8I_V3, |
499 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
500 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
501 | SUNXI_FUNCTION(0x2, "uart1" ), /* RX */ |
502 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)), /* PG_EINT7 */ |
503 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 8), |
504 | PINCTRL_SUN8I_V3, |
505 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
506 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
507 | SUNXI_FUNCTION(0x2, "uart1" ), /* RTS */ |
508 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)), /* PG_EINT8 */ |
509 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 9), |
510 | PINCTRL_SUN8I_V3, |
511 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
512 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
513 | SUNXI_FUNCTION(0x2, "uart1" ), /* CTS */ |
514 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)), /* PG_EINT9 */ |
515 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 10), |
516 | PINCTRL_SUN8I_V3, |
517 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
518 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
519 | SUNXI_FUNCTION(0x2, "i2s" ), /* SYNC */ |
520 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)), /* PG_EINT10 */ |
521 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 11), |
522 | PINCTRL_SUN8I_V3, |
523 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
524 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
525 | SUNXI_FUNCTION(0x2, "i2s" ), /* BCLK */ |
526 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)), /* PG_EINT11 */ |
527 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 12), |
528 | PINCTRL_SUN8I_V3, |
529 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
530 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
531 | SUNXI_FUNCTION(0x2, "i2s" ), /* DOUT */ |
532 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)), /* PG_EINT12 */ |
533 | SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 13), |
534 | PINCTRL_SUN8I_V3, |
535 | SUNXI_FUNCTION(0x0, "gpio_in" ), |
536 | SUNXI_FUNCTION(0x1, "gpio_out" ), |
537 | SUNXI_FUNCTION(0x2, "i2s" ), /* DIN */ |
538 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 13)), /* PG_EINT13 */ |
539 | }; |
540 | |
541 | static const unsigned int sun8i_v3s_pinctrl_irq_bank_map[] = { 1, 2 }; |
542 | |
543 | static const struct sunxi_pinctrl_desc sun8i_v3s_pinctrl_data = { |
544 | .pins = sun8i_v3s_pins, |
545 | .npins = ARRAY_SIZE(sun8i_v3s_pins), |
546 | .irq_banks = 2, |
547 | .irq_bank_map = sun8i_v3s_pinctrl_irq_bank_map, |
548 | .irq_read_needs_mux = true |
549 | }; |
550 | |
551 | static int sun8i_v3s_pinctrl_probe(struct platform_device *pdev) |
552 | { |
553 | unsigned long variant = (unsigned long)of_device_get_match_data(dev: &pdev->dev); |
554 | |
555 | return sunxi_pinctrl_init_with_variant(pdev, desc: &sun8i_v3s_pinctrl_data, |
556 | variant); |
557 | } |
558 | |
559 | static const struct of_device_id sun8i_v3s_pinctrl_match[] = { |
560 | { |
561 | .compatible = "allwinner,sun8i-v3-pinctrl" , |
562 | .data = (void *)PINCTRL_SUN8I_V3 |
563 | }, |
564 | { |
565 | .compatible = "allwinner,sun8i-v3s-pinctrl" , |
566 | .data = (void *)PINCTRL_SUN8I_V3S |
567 | }, |
568 | { }, |
569 | }; |
570 | |
571 | static struct platform_driver sun8i_v3s_pinctrl_driver = { |
572 | .probe = sun8i_v3s_pinctrl_probe, |
573 | .driver = { |
574 | .name = "sun8i-v3s-pinctrl" , |
575 | .of_match_table = sun8i_v3s_pinctrl_match, |
576 | }, |
577 | }; |
578 | builtin_platform_driver(sun8i_v3s_pinctrl_driver); |
579 | |