| 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
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| 2 | /* |
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| 3 | * pv88080-regulator.h - Regulator definitions for PV88080 |
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| 4 | * Copyright (C) 2016 Powerventure Semiconductor Ltd. |
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| 5 | */ |
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| 6 | |
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| 7 | #ifndef __PV88080_REGISTERS_H__ |
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| 8 | #define __PV88080_REGISTERS_H__ |
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| 9 | |
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| 10 | /* System Control and Event Registers */ |
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| 11 | #define PV88080_REG_EVENT_A 0x04 |
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| 12 | #define PV88080_REG_MASK_A 0x09 |
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| 13 | #define PV88080_REG_MASK_B 0x0A |
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| 14 | #define PV88080_REG_MASK_C 0x0B |
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| 15 | |
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| 16 | /* Regulator Registers - rev. AA */ |
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| 17 | #define PV88080AA_REG_HVBUCK_CONF1 0x2D |
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| 18 | #define PV88080AA_REG_HVBUCK_CONF2 0x2E |
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| 19 | #define PV88080AA_REG_BUCK1_CONF0 0x27 |
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| 20 | #define PV88080AA_REG_BUCK1_CONF1 0x28 |
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| 21 | #define PV88080AA_REG_BUCK1_CONF2 0x59 |
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| 22 | #define PV88080AA_REG_BUCK1_CONF5 0x5C |
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| 23 | #define PV88080AA_REG_BUCK2_CONF0 0x29 |
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| 24 | #define PV88080AA_REG_BUCK2_CONF1 0x2A |
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| 25 | #define PV88080AA_REG_BUCK2_CONF2 0x61 |
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| 26 | #define PV88080AA_REG_BUCK2_CONF5 0x64 |
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| 27 | #define PV88080AA_REG_BUCK3_CONF0 0x2B |
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| 28 | #define PV88080AA_REG_BUCK3_CONF1 0x2C |
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| 29 | #define PV88080AA_REG_BUCK3_CONF2 0x69 |
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| 30 | #define PV88080AA_REG_BUCK3_CONF5 0x6C |
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| 31 | |
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| 32 | /* Regulator Registers - rev. BA */ |
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| 33 | #define PV88080BA_REG_HVBUCK_CONF1 0x33 |
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| 34 | #define PV88080BA_REG_HVBUCK_CONF2 0x34 |
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| 35 | #define PV88080BA_REG_BUCK1_CONF0 0x2A |
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| 36 | #define PV88080BA_REG_BUCK1_CONF1 0x2C |
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| 37 | #define PV88080BA_REG_BUCK1_CONF2 0x5A |
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| 38 | #define PV88080BA_REG_BUCK1_CONF5 0x5D |
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| 39 | #define PV88080BA_REG_BUCK2_CONF0 0x2D |
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| 40 | #define PV88080BA_REG_BUCK2_CONF1 0x2F |
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| 41 | #define PV88080BA_REG_BUCK2_CONF2 0x63 |
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| 42 | #define PV88080BA_REG_BUCK2_CONF5 0x66 |
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| 43 | #define PV88080BA_REG_BUCK3_CONF0 0x30 |
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| 44 | #define PV88080BA_REG_BUCK3_CONF1 0x32 |
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| 45 | #define PV88080BA_REG_BUCK3_CONF2 0x6C |
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| 46 | #define PV88080BA_REG_BUCK3_CONF5 0x6F |
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| 47 | |
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| 48 | /* PV88080_REG_EVENT_A (addr=0x04) */ |
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| 49 | #define PV88080_E_VDD_FLT 0x01 |
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| 50 | #define PV88080_E_OVER_TEMP 0x02 |
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| 51 | |
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| 52 | /* PV88080_REG_MASK_A (addr=0x09) */ |
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| 53 | #define PV88080_M_VDD_FLT 0x01 |
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| 54 | #define PV88080_M_OVER_TEMP 0x02 |
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| 55 | |
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| 56 | /* PV88080_REG_BUCK1_CONF0 (addr=0x27|0x2A) */ |
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| 57 | #define PV88080_BUCK1_EN 0x80 |
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| 58 | #define PV88080_VBUCK1_MASK 0x7F |
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| 59 | |
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| 60 | /* PV88080_REG_BUCK2_CONF0 (addr=0x29|0x2D) */ |
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| 61 | #define PV88080_BUCK2_EN 0x80 |
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| 62 | #define PV88080_VBUCK2_MASK 0x7F |
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| 63 | |
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| 64 | /* PV88080_REG_BUCK3_CONF0 (addr=0x2B|0x30) */ |
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| 65 | #define PV88080_BUCK3_EN 0x80 |
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| 66 | #define PV88080_VBUCK3_MASK 0x7F |
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| 67 | |
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| 68 | /* PV88080_REG_BUCK1_CONF1 (addr=0x28|0x2C) */ |
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| 69 | #define PV88080_BUCK1_ILIM_SHIFT 2 |
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| 70 | #define PV88080_BUCK1_ILIM_MASK 0x0C |
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| 71 | #define PV88080_BUCK1_MODE_MASK 0x03 |
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| 72 | |
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| 73 | /* PV88080_REG_BUCK2_CONF1 (addr=0x2A|0x2F) */ |
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| 74 | #define PV88080_BUCK2_ILIM_SHIFT 2 |
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| 75 | #define PV88080_BUCK2_ILIM_MASK 0x0C |
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| 76 | #define PV88080_BUCK2_MODE_MASK 0x03 |
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| 77 | |
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| 78 | /* PV88080_REG_BUCK3_CONF1 (addr=0x2C|0x32) */ |
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| 79 | #define PV88080_BUCK3_ILIM_SHIFT 2 |
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| 80 | #define PV88080_BUCK3_ILIM_MASK 0x0C |
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| 81 | #define PV88080_BUCK3_MODE_MASK 0x03 |
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| 82 | |
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| 83 | #define PV88080_BUCK_MODE_SLEEP 0x00 |
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| 84 | #define PV88080_BUCK_MODE_AUTO 0x01 |
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| 85 | #define PV88080_BUCK_MODE_SYNC 0x02 |
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| 86 | |
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| 87 | /* PV88080_REG_HVBUCK_CONF1 (addr=0x2D|0x33) */ |
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| 88 | #define PV88080_VHVBUCK_MASK 0xFF |
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| 89 | |
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| 90 | /* PV88080_REG_HVBUCK_CONF1 (addr=0x2E|0x34) */ |
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| 91 | #define PV88080_HVBUCK_EN 0x01 |
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| 92 | |
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| 93 | /* PV88080_REG_BUCK2_CONF2 (addr=0x61|0x63) */ |
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| 94 | /* PV88080_REG_BUCK3_CONF2 (addr=0x69|0x6C) */ |
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| 95 | #define PV88080_BUCK_VDAC_RANGE_SHIFT 7 |
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| 96 | #define PV88080_BUCK_VDAC_RANGE_MASK 0x01 |
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| 97 | |
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| 98 | #define PV88080_BUCK_VDAC_RANGE_1 0x00 |
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| 99 | #define PV88080_BUCK_VDAC_RANGE_2 0x01 |
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| 100 | |
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| 101 | /* PV88080_REG_BUCK2_CONF5 (addr=0x64|0x66) */ |
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| 102 | /* PV88080_REG_BUCK3_CONF5 (addr=0x6C|0x6F) */ |
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| 103 | #define PV88080_BUCK_VRANGE_GAIN_SHIFT 0 |
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| 104 | #define PV88080_BUCK_VRANGE_GAIN_MASK 0x01 |
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| 105 | |
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| 106 | #define PV88080_BUCK_VRANGE_GAIN_1 0x00 |
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| 107 | #define PV88080_BUCK_VRANGE_GAIN_2 0x01 |
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| 108 | |
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| 109 | #endif /* __PV88080_REGISTERS_H__ */ |
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| 110 | |
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