1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright 2008 Cisco Systems, Inc. All rights reserved.
4 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
5 */
6#ifndef _CQ_ENET_DESC_H_
7#define _CQ_ENET_DESC_H_
8
9#include "cq_desc.h"
10
11/* Ethernet completion queue descriptor: 16B */
12struct cq_enet_wq_desc {
13 __le16 completed_index;
14 __le16 q_number;
15 u8 reserved[11];
16 u8 type_color;
17};
18
19static inline void cq_enet_wq_desc_dec(struct cq_enet_wq_desc *desc,
20 u8 *type, u8 *color, u16 *q_number, u16 *completed_index)
21{
22 cq_desc_dec(desc_arg: (struct cq_desc *)desc, type,
23 color, q_number, completed_index);
24}
25
26/* Completion queue descriptor: Ethernet receive queue, 16B */
27struct cq_enet_rq_desc {
28 __le16 completed_index_flags;
29 __le16 q_number_rss_type_flags;
30 __le32 rss_hash;
31 __le16 bytes_written_flags;
32 __le16 vlan;
33 __le16 checksum_fcoe;
34 u8 flags;
35 u8 type_color;
36};
37
38#define CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT (0x1 << 12)
39#define CQ_ENET_RQ_DESC_FLAGS_FCOE (0x1 << 13)
40#define CQ_ENET_RQ_DESC_FLAGS_EOP (0x1 << 14)
41#define CQ_ENET_RQ_DESC_FLAGS_SOP (0x1 << 15)
42
43#define CQ_ENET_RQ_DESC_RSS_TYPE_BITS 4
44#define CQ_ENET_RQ_DESC_RSS_TYPE_MASK \
45 ((1 << CQ_ENET_RQ_DESC_RSS_TYPE_BITS) - 1)
46#define CQ_ENET_RQ_DESC_RSS_TYPE_NONE 0
47#define CQ_ENET_RQ_DESC_RSS_TYPE_IPv4 1
48#define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4 2
49#define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6 3
50#define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6 4
51#define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX 5
52#define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX 6
53
54#define CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC (0x1 << 14)
55
56#define CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS 14
57#define CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK \
58 ((1 << CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS) - 1)
59#define CQ_ENET_RQ_DESC_FLAGS_TRUNCATED (0x1 << 14)
60#define CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED (0x1 << 15)
61
62#define CQ_ENET_RQ_DESC_FCOE_SOF_BITS 4
63#define CQ_ENET_RQ_DESC_FCOE_SOF_MASK \
64 ((1 << CQ_ENET_RQ_DESC_FCOE_SOF_BITS) - 1)
65#define CQ_ENET_RQ_DESC_FCOE_EOF_BITS 8
66#define CQ_ENET_RQ_DESC_FCOE_EOF_MASK \
67 ((1 << CQ_ENET_RQ_DESC_FCOE_EOF_BITS) - 1)
68#define CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT 8
69
70#define CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK (0x1 << 0)
71#define CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK (0x1 << 0)
72#define CQ_ENET_RQ_DESC_FLAGS_UDP (0x1 << 1)
73#define CQ_ENET_RQ_DESC_FCOE_ENC_ERROR (0x1 << 1)
74#define CQ_ENET_RQ_DESC_FLAGS_TCP (0x1 << 2)
75#define CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK (0x1 << 3)
76#define CQ_ENET_RQ_DESC_FLAGS_IPV6 (0x1 << 4)
77#define CQ_ENET_RQ_DESC_FLAGS_IPV4 (0x1 << 5)
78#define CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT (0x1 << 6)
79#define CQ_ENET_RQ_DESC_FLAGS_FCS_OK (0x1 << 7)
80
81static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc,
82 u8 *type, u8 *color, u16 *q_number, u16 *completed_index,
83 u8 *ingress_port, u8 *fcoe, u8 *eop, u8 *sop, u8 *rss_type,
84 u8 *csum_not_calc, u32 *rss_hash, u16 *bytes_written, u8 *packet_error,
85 u8 *vlan_stripped, u16 *vlan, u16 *checksum, u8 *fcoe_sof,
86 u8 *fcoe_fc_crc_ok, u8 *fcoe_enc_error, u8 *fcoe_eof,
87 u8 *tcp_udp_csum_ok, u8 *udp, u8 *tcp, u8 *ipv4_csum_ok,
88 u8 *ipv6, u8 *ipv4, u8 *ipv4_fragment, u8 *fcs_ok)
89{
90 u16 completed_index_flags = le16_to_cpu(desc->completed_index_flags);
91 u16 q_number_rss_type_flags =
92 le16_to_cpu(desc->q_number_rss_type_flags);
93 u16 bytes_written_flags = le16_to_cpu(desc->bytes_written_flags);
94
95 cq_desc_dec(desc_arg: (struct cq_desc *)desc, type,
96 color, q_number, completed_index);
97
98 *ingress_port = (completed_index_flags &
99 CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT) ? 1 : 0;
100 *fcoe = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_FCOE) ?
101 1 : 0;
102 *eop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_EOP) ?
103 1 : 0;
104 *sop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_SOP) ?
105 1 : 0;
106
107 *rss_type = (u8)((q_number_rss_type_flags >> CQ_DESC_Q_NUM_BITS) &
108 CQ_ENET_RQ_DESC_RSS_TYPE_MASK);
109 *csum_not_calc = (q_number_rss_type_flags &
110 CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC) ? 1 : 0;
111
112 *rss_hash = le32_to_cpu(desc->rss_hash);
113
114 *bytes_written = bytes_written_flags &
115 CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;
116 *packet_error = (bytes_written_flags &
117 CQ_ENET_RQ_DESC_FLAGS_TRUNCATED) ? 1 : 0;
118 *vlan_stripped = (bytes_written_flags &
119 CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED) ? 1 : 0;
120
121 *vlan = le16_to_cpu(desc->vlan);
122
123 if (*fcoe) {
124 *fcoe_sof = (u8)(le16_to_cpu(desc->checksum_fcoe) &
125 CQ_ENET_RQ_DESC_FCOE_SOF_MASK);
126 *fcoe_fc_crc_ok = (desc->flags &
127 CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK) ? 1 : 0;
128 *fcoe_enc_error = (desc->flags &
129 CQ_ENET_RQ_DESC_FCOE_ENC_ERROR) ? 1 : 0;
130 *fcoe_eof = (u8)((desc->checksum_fcoe >>
131 CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT) &
132 CQ_ENET_RQ_DESC_FCOE_EOF_MASK);
133 *checksum = 0;
134 } else {
135 *fcoe_sof = 0;
136 *fcoe_fc_crc_ok = 0;
137 *fcoe_enc_error = 0;
138 *fcoe_eof = 0;
139 *checksum = le16_to_cpu(desc->checksum_fcoe);
140 }
141
142 *tcp_udp_csum_ok =
143 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK) ? 1 : 0;
144 *udp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_UDP) ? 1 : 0;
145 *tcp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP) ? 1 : 0;
146 *ipv4_csum_ok =
147 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK) ? 1 : 0;
148 *ipv6 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV6) ? 1 : 0;
149 *ipv4 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4) ? 1 : 0;
150 *ipv4_fragment =
151 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT) ? 1 : 0;
152 *fcs_ok = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_FCS_OK) ? 1 : 0;
153}
154
155#endif /* _CQ_ENET_DESC_H_ */
156

source code of linux/drivers/scsi/fnic/cq_enet_desc.h