1/* SPDX-License-Identifier: GPL-2.0 */
2
3/* Driver for the Iomega MatchMaker parallel port SCSI HBA embedded in
4 * the Iomega ZIP Plus drive
5 *
6 * (c) 1998 David Campbell
7 *
8 * Please note that I live in Perth, Western Australia. GMT+0800
9 */
10
11#ifndef _IMM_H
12#define _IMM_H
13
14#define IMM_VERSION "2.05 (for Linux 2.4.0)"
15
16/*
17 * 10 Apr 1998 (Good Friday) - Received EN144302 by email from Iomega.
18 * Scarry thing is the level of support from one of their managers.
19 * The onus is now on us (the developers) to shut up and start coding.
20 * 11Apr98 [ 0.10 ]
21 *
22 * --- SNIP ---
23 *
24 * It manages to find the drive which is a good start. Writing data during
25 * data phase is known to be broken (due to requirements of two byte writes).
26 * Removing "Phase" debug messages.
27 *
28 * PS: Took four hours of coding after I bought a drive.
29 * ANZAC Day (Aus "War Veterans Holiday") 25Apr98 [ 0.14 ]
30 *
31 * Ten minutes later after a few fixes.... (LITERALLY!!!)
32 * Have mounted disk, copied file, dismounted disk, remount disk, diff file
33 * ----- It actually works!!! -----
34 * 25Apr98 [ 0.15 ]
35 *
36 * Twenty minutes of mucking around, rearanged the IEEE negotiate mechanism.
37 * Now have byte mode working (only EPP and ECP to go now... :=)
38 * 26Apr98 [ 0.16 ]
39 *
40 * Thirty minutes of further coding results in EPP working on my machine.
41 * 27Apr98 [ 0.17 ]
42 *
43 * Due to work commitments and inability to get a "true" ECP mode functioning
44 * I have decided to code the parport support into imm.
45 * 09Jun98 [ 0.18 ]
46 *
47 * Driver is now out of beta testing.
48 * Support for parport has been added.
49 * Now distributed with the ppa driver.
50 * 12Jun98 [ 2.00 ]
51 *
52 * Err.. It appears that imm-2.00 was broken....
53 * 18Jun98 [ 2.01 ]
54 *
55 * Patch applied to sync this against the Linux 2.1.x kernel code
56 * Included qboot_zip.sh
57 * 21Jun98 [ 2.02 ]
58 *
59 * Other clean ups include the follow changes:
60 * CONFIG_SCSI_PPA_HAVE_PEDANTIC => CONFIG_SCSI_IZIP_EPP16
61 * added CONFIG_SCSI_IZIP_SLOW_CTR option
62 * [2.03]
63 * Fix kernel panic on scsi timeout. 20Aug00 [2.04]
64 *
65 * Avoid io_request_lock problems.
66 * John Cavan <johncavan@home.com> 16Nov00 [2.05]
67 */
68/* ------ END OF USER CONFIGURABLE PARAMETERS ----- */
69
70#include <linux/stddef.h>
71#include <linux/module.h>
72#include <linux/kernel.h>
73#include <linux/ioport.h>
74#include <linux/delay.h>
75#include <linux/proc_fs.h>
76#include <linux/stat.h>
77#include <linux/blkdev.h>
78#include <linux/sched.h>
79#include <linux/interrupt.h>
80
81#include <asm/io.h>
82#include <scsi/scsi_host.h>
83/* batteries not included :-) */
84
85/*
86 * modes in which the driver can operate
87 */
88#define IMM_AUTODETECT 0 /* Autodetect mode */
89#define IMM_NIBBLE 1 /* work in standard 4 bit mode */
90#define IMM_PS2 2 /* PS/2 byte mode */
91#define IMM_EPP_8 3 /* EPP mode, 8 bit */
92#define IMM_EPP_16 4 /* EPP mode, 16 bit */
93#define IMM_EPP_32 5 /* EPP mode, 32 bit */
94#define IMM_UNKNOWN 6 /* Just in case... */
95
96static char *IMM_MODE_STRING[] =
97{
98 [IMM_AUTODETECT] = "Autodetect",
99 [IMM_NIBBLE] = "SPP",
100 [IMM_PS2] = "PS/2",
101 [IMM_EPP_8] = "EPP 8 bit",
102 [IMM_EPP_16] = "EPP 16 bit",
103#ifdef CONFIG_SCSI_IZIP_EPP16
104 [IMM_EPP_32] = "EPP 16 bit",
105#else
106 [IMM_EPP_32] = "EPP 32 bit",
107#endif
108 [IMM_UNKNOWN] = "Unknown",
109};
110
111/* other options */
112#define IMM_BURST_SIZE 512 /* data burst size */
113#define IMM_SELECT_TMO 500 /* 500 how long to wait for target ? */
114#define IMM_SPIN_TMO 5000 /* 50000 imm_wait loop limiter */
115#define IMM_DEBUG 0 /* debugging option */
116#define IN_EPP_MODE(x) (x == IMM_EPP_8 || x == IMM_EPP_16 || x == IMM_EPP_32)
117
118/* args to imm_connect */
119#define CONNECT_EPP_MAYBE 1
120#define CONNECT_NORMAL 0
121
122#define r_dtr(x) (unsigned char)inb((x))
123#define r_str(x) (unsigned char)inb((x)+1)
124#define r_ctr(x) (unsigned char)inb((x)+2)
125#define r_epp(x) (unsigned char)inb((x)+4)
126#define r_fifo(x) (unsigned char)inb((x)) /* x must be base_hi */
127 /* On PCI is: base+0x400 != base_hi */
128#define r_ecr(x) (unsigned char)inb((x)+2) /* x must be base_hi */
129
130#define w_dtr(x,y) outb(y, (x))
131#define w_str(x,y) outb(y, (x)+1)
132#define w_epp(x,y) outb(y, (x)+4)
133#define w_fifo(x,y) outb(y, (x)) /* x must be base_hi */
134#define w_ecr(x,y) outb(y, (x)+0x2) /* x must be base_hi */
135
136#ifdef CONFIG_SCSI_IZIP_SLOW_CTR
137#define w_ctr(x,y) outb_p(y, (x)+2)
138#else
139#define w_ctr(x,y) outb(y, (x)+2)
140#endif
141
142static int imm_engine(imm_struct *, struct scsi_cmnd *);
143
144#endif /* _IMM_H */
145