| 1 | /* |
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| 2 | * Copyright 2000-2020 Broadcom Inc. All rights reserved. |
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| 3 | * |
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| 4 | * |
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| 5 | * Name: mpi2_pci.h |
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| 6 | * Title: MPI PCIe Attached Devices structures and definitions. |
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| 7 | * Creation Date: October 9, 2012 |
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| 8 | * |
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| 9 | * mpi2_pci.h Version: 02.00.04 |
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| 10 | * |
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| 11 | * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25 |
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| 12 | * prefix are for use only on MPI v2.5 products, and must not be used |
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| 13 | * with MPI v2.0 products. Unless otherwise noted, names beginning with |
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| 14 | * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products. |
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| 15 | * |
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| 16 | * Version History |
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| 17 | * --------------- |
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| 18 | * |
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| 19 | * Date Version Description |
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| 20 | * -------- -------- ------------------------------------------------------ |
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| 21 | * 03-16-15 02.00.00 Initial version. |
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| 22 | * 02-17-16 02.00.01 Removed AHCI support. |
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| 23 | * Removed SOP support. |
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| 24 | * 07-01-16 02.00.02 Added MPI26_NVME_FLAGS_FORCE_ADMIN_ERR_RESP to |
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| 25 | * NVME Encapsulated Request. |
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| 26 | * 07-22-18 02.00.03 Updted flags field for NVME Encapsulated req |
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| 27 | * 12-17-18 02.00.04 Added MPI26_PCIE_DEVINFO_SCSI |
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| 28 | * Shortten some defines to be compatible with DOS |
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| 29 | * -------------------------------------------------------------------------- |
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| 30 | */ |
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| 31 | |
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| 32 | #ifndef MPI2_PCI_H |
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| 33 | #define MPI2_PCI_H |
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| 34 | |
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| 35 | |
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| 36 | /* |
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| 37 | *Values for the PCIe DeviceInfo field used in PCIe Device Status Change Event |
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| 38 | *data and PCIe Configuration pages. |
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| 39 | */ |
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| 40 | #define MPI26_PCIE_DEVINFO_DIRECT_ATTACH (0x00000010) |
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| 41 | |
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| 42 | #define MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE (0x0000000F) |
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| 43 | #define MPI26_PCIE_DEVINFO_NO_DEVICE (0x00000000) |
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| 44 | #define MPI26_PCIE_DEVINFO_PCI_SWITCH (0x00000001) |
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| 45 | #define MPI26_PCIE_DEVINFO_NVME (0x00000003) |
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| 46 | #define MPI26_PCIE_DEVINFO_SCSI (0x00000004) |
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| 47 | |
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| 48 | /**************************************************************************** |
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| 49 | * NVMe Encapsulated message |
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| 50 | ****************************************************************************/ |
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| 51 | |
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| 52 | /*NVME Encapsulated Request Message */ |
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| 53 | typedef struct _MPI26_NVME_ENCAPSULATED_REQUEST { |
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| 54 | U16 DevHandle; /*0x00 */ |
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| 55 | U8 ChainOffset; /*0x02 */ |
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| 56 | U8 Function; /*0x03 */ |
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| 57 | U16 EncapsulatedCommandLength; /*0x04 */ |
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| 58 | U8 Reserved1; /*0x06 */ |
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| 59 | U8 MsgFlags; /*0x07 */ |
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| 60 | U8 VP_ID; /*0x08 */ |
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| 61 | U8 VF_ID; /*0x09 */ |
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| 62 | U16 Reserved2; /*0x0A */ |
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| 63 | U32 Reserved3; /*0x0C */ |
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| 64 | U64 ErrorResponseBaseAddress; /*0x10 */ |
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| 65 | U16 ErrorResponseAllocationLength; /*0x18 */ |
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| 66 | U16 Flags; /*0x1A */ |
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| 67 | U32 DataLength; /*0x1C */ |
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| 68 | U8 NVMe_Command[4]; /*0x20 */ |
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| 69 | |
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| 70 | } MPI26_NVME_ENCAPSULATED_REQUEST, *PTR_MPI26_NVME_ENCAPSULATED_REQUEST, |
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| 71 | Mpi26NVMeEncapsulatedRequest_t, *pMpi26NVMeEncapsulatedRequest_t; |
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| 72 | |
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| 73 | /*defines for the Flags field */ |
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| 74 | #define MPI26_NVME_FLAGS_FORCE_ADMIN_ERR_RESP (0x0020) |
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| 75 | /*Submission Queue Type*/ |
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| 76 | #define MPI26_NVME_FLAGS_SUBMISSIONQ_MASK (0x0010) |
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| 77 | #define MPI26_NVME_FLAGS_SUBMISSIONQ_IO (0x0000) |
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| 78 | #define MPI26_NVME_FLAGS_SUBMISSIONQ_ADMIN (0x0010) |
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| 79 | /*Error Response Address Space */ |
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| 80 | #define MPI26_NVME_FLAGS_ERR_RSP_ADDR_MASK (0x000C) |
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| 81 | #define MPI26_NVME_FLAGS_ERR_RSP_ADDR_SYSTEM (0x0000) |
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| 82 | #define MPI26_NVME_FLAGS_ERR_RSP_ADDR_IOCTL (0x0008) |
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| 83 | /* Data Direction*/ |
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| 84 | #define MPI26_NVME_FLAGS_DATADIRECTION_MASK (0x0003) |
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| 85 | #define MPI26_NVME_FLAGS_NODATATRANSFER (0x0000) |
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| 86 | #define MPI26_NVME_FLAGS_WRITE (0x0001) |
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| 87 | #define MPI26_NVME_FLAGS_READ (0x0002) |
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| 88 | #define MPI26_NVME_FLAGS_BIDIRECTIONAL (0x0003) |
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| 89 | |
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| 90 | |
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| 91 | /*NVMe Encapuslated Reply Message */ |
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| 92 | typedef struct _MPI26_NVME_ENCAPSULATED_ERROR_REPLY { |
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| 93 | U16 DevHandle; /*0x00 */ |
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| 94 | U8 MsgLength; /*0x02 */ |
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| 95 | U8 Function; /*0x03 */ |
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| 96 | U16 EncapsulatedCommandLength; /*0x04 */ |
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| 97 | U8 Reserved1; /*0x06 */ |
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| 98 | U8 MsgFlags; /*0x07 */ |
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| 99 | U8 VP_ID; /*0x08 */ |
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| 100 | U8 VF_ID; /*0x09 */ |
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| 101 | U16 Reserved2; /*0x0A */ |
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| 102 | U16 Reserved3; /*0x0C */ |
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| 103 | U16 IOCStatus; /*0x0E */ |
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| 104 | U32 IOCLogInfo; /*0x10 */ |
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| 105 | U16 ErrorResponseCount; /*0x14 */ |
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| 106 | U16 Reserved4; /*0x16 */ |
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| 107 | } MPI26_NVME_ENCAPSULATED_ERROR_REPLY, |
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| 108 | *PTR_MPI26_NVME_ENCAPSULATED_ERROR_REPLY, |
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| 109 | Mpi26NVMeEncapsulatedErrorReply_t, |
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| 110 | *pMpi26NVMeEncapsulatedErrorReply_t; |
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| 111 | |
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| 112 | |
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| 113 | #endif |
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| 114 | |
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