| 1 | /* Copyright 2008 - 2016 Freescale Semiconductor, Inc. |
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| 2 | * |
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| 3 | * Redistribution and use in source and binary forms, with or without |
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| 4 | * modification, are permitted provided that the following conditions are met: |
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| 5 | * * Redistributions of source code must retain the above copyright |
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| 6 | * notice, this list of conditions and the following disclaimer. |
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| 7 | * * Redistributions in binary form must reproduce the above copyright |
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| 8 | * notice, this list of conditions and the following disclaimer in the |
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| 9 | * documentation and/or other materials provided with the distribution. |
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| 10 | * * Neither the name of Freescale Semiconductor nor the |
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| 11 | * names of its contributors may be used to endorse or promote products |
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| 12 | * derived from this software without specific prior written permission. |
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| 13 | * |
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| 14 | * ALTERNATIVELY, this software may be distributed under the terms of the |
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| 15 | * GNU General Public License ("GPL") as published by the Free Software |
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| 16 | * Foundation, either version 2 of that License or (at your option) any |
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| 17 | * later version. |
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| 18 | * |
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| 19 | * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY |
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| 20 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
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| 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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| 22 | * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY |
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| 23 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
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| 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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| 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
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| 26 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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| 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 29 | */ |
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| 30 | |
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| 31 | #ifndef __DPAA_SYS_H |
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| 32 | #define __DPAA_SYS_H |
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| 33 | |
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| 34 | #include <linux/cpu.h> |
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| 35 | #include <linux/slab.h> |
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| 36 | #include <linux/module.h> |
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| 37 | #include <linux/interrupt.h> |
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| 38 | #include <linux/kthread.h> |
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| 39 | #include <linux/sched/signal.h> |
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| 40 | #include <linux/vmalloc.h> |
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| 41 | #include <linux/platform_device.h> |
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| 42 | #include <linux/of.h> |
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| 43 | #include <linux/of_reserved_mem.h> |
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| 44 | #include <linux/prefetch.h> |
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| 45 | #include <linux/genalloc.h> |
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| 46 | #include <asm/cacheflush.h> |
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| 47 | #include <linux/io.h> |
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| 48 | #include <linux/delay.h> |
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| 49 | |
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| 50 | /* For 2-element tables related to cache-inhibited and cache-enabled mappings */ |
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| 51 | #define DPAA_PORTAL_CE 0 |
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| 52 | #define DPAA_PORTAL_CI 1 |
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| 53 | |
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| 54 | static inline void dpaa_flush(void *p) |
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| 55 | { |
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| 56 | /* |
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| 57 | * Only PPC needs to flush the cache currently - on ARM the mapping |
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| 58 | * is non cacheable |
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| 59 | */ |
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| 60 | #ifdef CONFIG_PPC |
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| 61 | flush_dcache_range((unsigned long)p, (unsigned long)p+64); |
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| 62 | #endif |
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| 63 | } |
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| 64 | |
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| 65 | #define dpaa_invalidate(p) dpaa_flush(p) |
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| 66 | |
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| 67 | #define dpaa_zero(p) memset(p, 0, 64) |
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| 68 | |
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| 69 | static inline void dpaa_touch_ro(void *p) |
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| 70 | { |
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| 71 | #if (L1_CACHE_BYTES == 32) |
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| 72 | prefetch(p+32); |
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| 73 | #endif |
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| 74 | prefetch(p); |
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| 75 | } |
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| 76 | |
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| 77 | /* Commonly used combo */ |
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| 78 | static inline void dpaa_invalidate_touch_ro(void *p) |
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| 79 | { |
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| 80 | dpaa_invalidate(p); |
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| 81 | dpaa_touch_ro(p); |
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| 82 | } |
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| 83 | |
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| 84 | |
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| 85 | #ifdef CONFIG_FSL_DPAA_CHECKING |
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| 86 | #define DPAA_ASSERT(x) WARN_ON(!(x)) |
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| 87 | #else |
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| 88 | #define DPAA_ASSERT(x) |
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| 89 | #endif |
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| 90 | |
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| 91 | /* cyclic helper for rings */ |
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| 92 | static inline u8 dpaa_cyc_diff(u8 ringsize, u8 first, u8 last) |
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| 93 | { |
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| 94 | /* 'first' is included, 'last' is excluded */ |
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| 95 | if (first <= last) |
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| 96 | return last - first; |
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| 97 | return ringsize + last - first; |
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| 98 | } |
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| 99 | |
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| 100 | /* Offset applied to genalloc pools due to zero being an error return */ |
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| 101 | #define DPAA_GENALLOC_OFF 0x80000000 |
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| 102 | |
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| 103 | /* Initialize the devices private memory region */ |
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| 104 | int qbman_init_private_mem(struct device *dev, int idx, const char *compat, |
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| 105 | dma_addr_t *addr, size_t *size); |
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| 106 | |
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| 107 | /* memremap() attributes for different platforms */ |
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| 108 | #ifdef CONFIG_PPC |
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| 109 | #define QBMAN_MEMREMAP_ATTR MEMREMAP_WB |
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| 110 | #else |
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| 111 | #define QBMAN_MEMREMAP_ATTR MEMREMAP_WC |
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| 112 | #endif |
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| 113 | |
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| 114 | static inline int dpaa_set_portal_irq_affinity(struct device *dev, |
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| 115 | int irq, int cpu) |
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| 116 | { |
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| 117 | int ret = 0; |
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| 118 | |
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| 119 | if (!irq_can_set_affinity(irq)) { |
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| 120 | dev_err(dev, "unable to set IRQ affinity\n" ); |
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| 121 | return -EINVAL; |
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| 122 | } |
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| 123 | |
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| 124 | if (cpu == -1 || !cpu_online(cpu)) |
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| 125 | cpu = cpumask_any(cpu_online_mask); |
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| 126 | |
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| 127 | ret = irq_set_affinity(irq, cpumask_of(cpu)); |
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| 128 | if (ret) |
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| 129 | dev_err(dev, "irq_set_affinity() on CPU %d failed\n" , cpu); |
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| 130 | |
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| 131 | return ret; |
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| 132 | } |
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| 133 | |
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| 134 | #endif /* __DPAA_SYS_H */ |
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| 135 | |
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