1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * AD5933 AD5934 Impedance Converter, Network Analyzer |
4 | * |
5 | * Copyright 2011 Analog Devices Inc. |
6 | */ |
7 | |
8 | #include <linux/clk.h> |
9 | #include <linux/delay.h> |
10 | #include <linux/device.h> |
11 | #include <linux/err.h> |
12 | #include <linux/i2c.h> |
13 | #include <linux/interrupt.h> |
14 | #include <linux/kernel.h> |
15 | #include <linux/module.h> |
16 | #include <linux/regulator/consumer.h> |
17 | #include <linux/sysfs.h> |
18 | #include <linux/types.h> |
19 | |
20 | #include <linux/iio/buffer.h> |
21 | #include <linux/iio/iio.h> |
22 | #include <linux/iio/kfifo_buf.h> |
23 | #include <linux/iio/sysfs.h> |
24 | |
25 | /* AD5933/AD5934 Registers */ |
26 | #define AD5933_REG_CONTROL_HB 0x80 /* R/W, 1 byte */ |
27 | #define AD5933_REG_CONTROL_LB 0x81 /* R/W, 1 byte */ |
28 | #define AD5933_REG_FREQ_START 0x82 /* R/W, 3 bytes */ |
29 | #define AD5933_REG_FREQ_INC 0x85 /* R/W, 3 bytes */ |
30 | #define AD5933_REG_INC_NUM 0x88 /* R/W, 2 bytes, 9 bit */ |
31 | #define AD5933_REG_SETTLING_CYCLES 0x8A /* R/W, 2 bytes */ |
32 | #define AD5933_REG_STATUS 0x8F /* R, 1 byte */ |
33 | #define AD5933_REG_TEMP_DATA 0x92 /* R, 2 bytes*/ |
34 | #define AD5933_REG_REAL_DATA 0x94 /* R, 2 bytes*/ |
35 | #define AD5933_REG_IMAG_DATA 0x96 /* R, 2 bytes*/ |
36 | |
37 | /* AD5933_REG_CONTROL_HB Bits */ |
38 | #define AD5933_CTRL_INIT_START_FREQ (0x1 << 4) |
39 | #define AD5933_CTRL_START_SWEEP (0x2 << 4) |
40 | #define AD5933_CTRL_INC_FREQ (0x3 << 4) |
41 | #define AD5933_CTRL_REPEAT_FREQ (0x4 << 4) |
42 | #define AD5933_CTRL_MEASURE_TEMP (0x9 << 4) |
43 | #define AD5933_CTRL_POWER_DOWN (0xA << 4) |
44 | #define AD5933_CTRL_STANDBY (0xB << 4) |
45 | |
46 | #define AD5933_CTRL_RANGE_2000mVpp (0x0 << 1) |
47 | #define AD5933_CTRL_RANGE_200mVpp (0x1 << 1) |
48 | #define AD5933_CTRL_RANGE_400mVpp (0x2 << 1) |
49 | #define AD5933_CTRL_RANGE_1000mVpp (0x3 << 1) |
50 | #define AD5933_CTRL_RANGE(x) ((x) << 1) |
51 | |
52 | #define AD5933_CTRL_PGA_GAIN_1 (0x1 << 0) |
53 | #define AD5933_CTRL_PGA_GAIN_5 (0x0 << 0) |
54 | |
55 | /* AD5933_REG_CONTROL_LB Bits */ |
56 | #define AD5933_CTRL_RESET (0x1 << 4) |
57 | #define AD5933_CTRL_INT_SYSCLK (0x0 << 3) |
58 | #define AD5933_CTRL_EXT_SYSCLK (0x1 << 3) |
59 | |
60 | /* AD5933_REG_STATUS Bits */ |
61 | #define AD5933_STAT_TEMP_VALID (0x1 << 0) |
62 | #define AD5933_STAT_DATA_VALID (0x1 << 1) |
63 | #define AD5933_STAT_SWEEP_DONE (0x1 << 2) |
64 | |
65 | /* I2C Block Commands */ |
66 | #define AD5933_I2C_BLOCK_WRITE 0xA0 |
67 | #define AD5933_I2C_BLOCK_READ 0xA1 |
68 | #define AD5933_I2C_ADDR_POINTER 0xB0 |
69 | |
70 | /* Device Specs */ |
71 | #define AD5933_INT_OSC_FREQ_Hz 16776000 |
72 | #define AD5933_MAX_OUTPUT_FREQ_Hz 100000 |
73 | #define AD5933_MAX_RETRIES 100 |
74 | |
75 | #define AD5933_OUT_RANGE 1 |
76 | #define AD5933_OUT_RANGE_AVAIL 2 |
77 | #define AD5933_OUT_SETTLING_CYCLES 3 |
78 | #define AD5933_IN_PGA_GAIN 4 |
79 | #define AD5933_IN_PGA_GAIN_AVAIL 5 |
80 | #define AD5933_FREQ_POINTS 6 |
81 | |
82 | #define AD5933_POLL_TIME_ms 10 |
83 | #define AD5933_INIT_EXCITATION_TIME_ms 100 |
84 | |
85 | struct ad5933_state { |
86 | struct i2c_client *client; |
87 | struct regulator *reg; |
88 | struct clk *mclk; |
89 | struct delayed_work work; |
90 | struct mutex lock; /* Protect sensor state */ |
91 | unsigned long mclk_hz; |
92 | unsigned char ctrl_hb; |
93 | unsigned char ctrl_lb; |
94 | unsigned int range_avail[4]; |
95 | unsigned short vref_mv; |
96 | unsigned short settling_cycles; |
97 | unsigned short freq_points; |
98 | unsigned int freq_start; |
99 | unsigned int freq_inc; |
100 | unsigned int state; |
101 | unsigned int poll_time_jiffies; |
102 | }; |
103 | |
104 | #define AD5933_CHANNEL(_type, _extend_name, _info_mask_separate, _address, \ |
105 | _scan_index, _realbits) { \ |
106 | .type = (_type), \ |
107 | .extend_name = (_extend_name), \ |
108 | .info_mask_separate = (_info_mask_separate), \ |
109 | .address = (_address), \ |
110 | .scan_index = (_scan_index), \ |
111 | .scan_type = { \ |
112 | .sign = 's', \ |
113 | .realbits = (_realbits), \ |
114 | .storagebits = 16, \ |
115 | }, \ |
116 | } |
117 | |
118 | static const struct iio_chan_spec ad5933_channels[] = { |
119 | AD5933_CHANNEL(IIO_TEMP, NULL, BIT(IIO_CHAN_INFO_RAW) | |
120 | BIT(IIO_CHAN_INFO_SCALE), AD5933_REG_TEMP_DATA, -1, 14), |
121 | /* Ring Channels */ |
122 | AD5933_CHANNEL(IIO_VOLTAGE, "real" , 0, AD5933_REG_REAL_DATA, 0, 16), |
123 | AD5933_CHANNEL(IIO_VOLTAGE, "imag" , 0, AD5933_REG_IMAG_DATA, 1, 16), |
124 | }; |
125 | |
126 | static int ad5933_i2c_write(struct i2c_client *client, u8 reg, u8 len, u8 *data) |
127 | { |
128 | int ret; |
129 | |
130 | while (len--) { |
131 | ret = i2c_smbus_write_byte_data(client, command: reg++, value: *data++); |
132 | if (ret < 0) { |
133 | dev_err(&client->dev, "I2C write error\n" ); |
134 | return ret; |
135 | } |
136 | } |
137 | return 0; |
138 | } |
139 | |
140 | static int ad5933_i2c_read(struct i2c_client *client, u8 reg, u8 len, u8 *data) |
141 | { |
142 | int ret; |
143 | |
144 | while (len--) { |
145 | ret = i2c_smbus_read_byte_data(client, command: reg++); |
146 | if (ret < 0) { |
147 | dev_err(&client->dev, "I2C read error\n" ); |
148 | return ret; |
149 | } |
150 | *data++ = ret; |
151 | } |
152 | return 0; |
153 | } |
154 | |
155 | static int ad5933_cmd(struct ad5933_state *st, unsigned char cmd) |
156 | { |
157 | unsigned char dat = st->ctrl_hb | cmd; |
158 | |
159 | return ad5933_i2c_write(client: st->client, |
160 | AD5933_REG_CONTROL_HB, len: 1, data: &dat); |
161 | } |
162 | |
163 | static int ad5933_reset(struct ad5933_state *st) |
164 | { |
165 | unsigned char dat = st->ctrl_lb | AD5933_CTRL_RESET; |
166 | |
167 | return ad5933_i2c_write(client: st->client, |
168 | AD5933_REG_CONTROL_LB, len: 1, data: &dat); |
169 | } |
170 | |
171 | static int ad5933_wait_busy(struct ad5933_state *st, unsigned char event) |
172 | { |
173 | unsigned char val, timeout = AD5933_MAX_RETRIES; |
174 | int ret; |
175 | |
176 | while (timeout--) { |
177 | ret = ad5933_i2c_read(client: st->client, AD5933_REG_STATUS, len: 1, data: &val); |
178 | if (ret < 0) |
179 | return ret; |
180 | if (val & event) |
181 | return val; |
182 | cpu_relax(); |
183 | mdelay(1); |
184 | } |
185 | |
186 | return -EAGAIN; |
187 | } |
188 | |
189 | static int ad5933_set_freq(struct ad5933_state *st, |
190 | unsigned int reg, unsigned long freq) |
191 | { |
192 | unsigned long long freqreg; |
193 | union { |
194 | __be32 d32; |
195 | u8 d8[4]; |
196 | } dat; |
197 | |
198 | freqreg = (u64)freq * (u64)(1 << 27); |
199 | do_div(freqreg, st->mclk_hz / 4); |
200 | |
201 | switch (reg) { |
202 | case AD5933_REG_FREQ_START: |
203 | st->freq_start = freq; |
204 | break; |
205 | case AD5933_REG_FREQ_INC: |
206 | st->freq_inc = freq; |
207 | break; |
208 | default: |
209 | return -EINVAL; |
210 | } |
211 | |
212 | dat.d32 = cpu_to_be32(freqreg); |
213 | return ad5933_i2c_write(client: st->client, reg, len: 3, data: &dat.d8[1]); |
214 | } |
215 | |
216 | static int ad5933_setup(struct ad5933_state *st) |
217 | { |
218 | __be16 dat; |
219 | int ret; |
220 | |
221 | ret = ad5933_reset(st); |
222 | if (ret < 0) |
223 | return ret; |
224 | |
225 | ret = ad5933_set_freq(st, AD5933_REG_FREQ_START, freq: 10000); |
226 | if (ret < 0) |
227 | return ret; |
228 | |
229 | ret = ad5933_set_freq(st, AD5933_REG_FREQ_INC, freq: 200); |
230 | if (ret < 0) |
231 | return ret; |
232 | |
233 | st->settling_cycles = 10; |
234 | dat = cpu_to_be16(st->settling_cycles); |
235 | |
236 | ret = ad5933_i2c_write(client: st->client, |
237 | AD5933_REG_SETTLING_CYCLES, |
238 | len: 2, data: (u8 *)&dat); |
239 | if (ret < 0) |
240 | return ret; |
241 | |
242 | st->freq_points = 100; |
243 | dat = cpu_to_be16(st->freq_points); |
244 | |
245 | return ad5933_i2c_write(client: st->client, AD5933_REG_INC_NUM, len: 2, data: (u8 *)&dat); |
246 | } |
247 | |
248 | static void ad5933_calc_out_ranges(struct ad5933_state *st) |
249 | { |
250 | int i; |
251 | unsigned int normalized_3v3[4] = {1980, 198, 383, 970}; |
252 | |
253 | for (i = 0; i < 4; i++) |
254 | st->range_avail[i] = normalized_3v3[i] * st->vref_mv / 3300; |
255 | } |
256 | |
257 | /* |
258 | * handles: AD5933_REG_FREQ_START and AD5933_REG_FREQ_INC |
259 | */ |
260 | |
261 | static ssize_t ad5933_show_frequency(struct device *dev, |
262 | struct device_attribute *attr, |
263 | char *buf) |
264 | { |
265 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
266 | struct ad5933_state *st = iio_priv(indio_dev); |
267 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
268 | int ret; |
269 | unsigned long long freqreg; |
270 | union { |
271 | __be32 d32; |
272 | u8 d8[4]; |
273 | } dat; |
274 | |
275 | ret = iio_device_claim_direct_mode(indio_dev); |
276 | if (ret) |
277 | return ret; |
278 | ret = ad5933_i2c_read(client: st->client, reg: this_attr->address, len: 3, data: &dat.d8[1]); |
279 | iio_device_release_direct_mode(indio_dev); |
280 | if (ret < 0) |
281 | return ret; |
282 | |
283 | freqreg = be32_to_cpu(dat.d32) & 0xFFFFFF; |
284 | |
285 | freqreg = (u64)freqreg * (u64)(st->mclk_hz / 4); |
286 | do_div(freqreg, BIT(27)); |
287 | |
288 | return sprintf(buf, fmt: "%d\n" , (int)freqreg); |
289 | } |
290 | |
291 | static ssize_t ad5933_store_frequency(struct device *dev, |
292 | struct device_attribute *attr, |
293 | const char *buf, |
294 | size_t len) |
295 | { |
296 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
297 | struct ad5933_state *st = iio_priv(indio_dev); |
298 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
299 | unsigned long val; |
300 | int ret; |
301 | |
302 | ret = kstrtoul(s: buf, base: 10, res: &val); |
303 | if (ret) |
304 | return ret; |
305 | |
306 | if (val > AD5933_MAX_OUTPUT_FREQ_Hz) |
307 | return -EINVAL; |
308 | |
309 | ret = iio_device_claim_direct_mode(indio_dev); |
310 | if (ret) |
311 | return ret; |
312 | ret = ad5933_set_freq(st, reg: this_attr->address, freq: val); |
313 | iio_device_release_direct_mode(indio_dev); |
314 | |
315 | return ret ? ret : len; |
316 | } |
317 | |
318 | static IIO_DEVICE_ATTR(out_altvoltage0_frequency_start, 0644, |
319 | ad5933_show_frequency, |
320 | ad5933_store_frequency, |
321 | AD5933_REG_FREQ_START); |
322 | |
323 | static IIO_DEVICE_ATTR(out_altvoltage0_frequency_increment, 0644, |
324 | ad5933_show_frequency, |
325 | ad5933_store_frequency, |
326 | AD5933_REG_FREQ_INC); |
327 | |
328 | static ssize_t ad5933_show(struct device *dev, |
329 | struct device_attribute *attr, |
330 | char *buf) |
331 | { |
332 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
333 | struct ad5933_state *st = iio_priv(indio_dev); |
334 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
335 | int ret = 0, len = 0; |
336 | |
337 | mutex_lock(&st->lock); |
338 | switch ((u32)this_attr->address) { |
339 | case AD5933_OUT_RANGE: |
340 | len = sprintf(buf, fmt: "%u\n" , |
341 | st->range_avail[(st->ctrl_hb >> 1) & 0x3]); |
342 | break; |
343 | case AD5933_OUT_RANGE_AVAIL: |
344 | len = sprintf(buf, fmt: "%u %u %u %u\n" , st->range_avail[0], |
345 | st->range_avail[3], st->range_avail[2], |
346 | st->range_avail[1]); |
347 | break; |
348 | case AD5933_OUT_SETTLING_CYCLES: |
349 | len = sprintf(buf, fmt: "%d\n" , st->settling_cycles); |
350 | break; |
351 | case AD5933_IN_PGA_GAIN: |
352 | len = sprintf(buf, fmt: "%s\n" , |
353 | (st->ctrl_hb & AD5933_CTRL_PGA_GAIN_1) ? |
354 | "1" : "0.2" ); |
355 | break; |
356 | case AD5933_IN_PGA_GAIN_AVAIL: |
357 | len = sprintf(buf, fmt: "1 0.2\n" ); |
358 | break; |
359 | case AD5933_FREQ_POINTS: |
360 | len = sprintf(buf, fmt: "%d\n" , st->freq_points); |
361 | break; |
362 | default: |
363 | ret = -EINVAL; |
364 | } |
365 | |
366 | mutex_unlock(lock: &st->lock); |
367 | return ret ? ret : len; |
368 | } |
369 | |
370 | static ssize_t ad5933_store(struct device *dev, |
371 | struct device_attribute *attr, |
372 | const char *buf, |
373 | size_t len) |
374 | { |
375 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
376 | struct ad5933_state *st = iio_priv(indio_dev); |
377 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
378 | u16 val; |
379 | int i, ret = 0; |
380 | __be16 dat; |
381 | |
382 | if (this_attr->address != AD5933_IN_PGA_GAIN) { |
383 | ret = kstrtou16(s: buf, base: 10, res: &val); |
384 | if (ret) |
385 | return ret; |
386 | } |
387 | |
388 | ret = iio_device_claim_direct_mode(indio_dev); |
389 | if (ret) |
390 | return ret; |
391 | mutex_lock(&st->lock); |
392 | switch ((u32)this_attr->address) { |
393 | case AD5933_OUT_RANGE: |
394 | ret = -EINVAL; |
395 | for (i = 0; i < 4; i++) |
396 | if (val == st->range_avail[i]) { |
397 | st->ctrl_hb &= ~AD5933_CTRL_RANGE(0x3); |
398 | st->ctrl_hb |= AD5933_CTRL_RANGE(i); |
399 | ret = ad5933_cmd(st, cmd: 0); |
400 | break; |
401 | } |
402 | break; |
403 | case AD5933_IN_PGA_GAIN: |
404 | if (sysfs_streq(s1: buf, s2: "1" )) { |
405 | st->ctrl_hb |= AD5933_CTRL_PGA_GAIN_1; |
406 | } else if (sysfs_streq(s1: buf, s2: "0.2" )) { |
407 | st->ctrl_hb &= ~AD5933_CTRL_PGA_GAIN_1; |
408 | } else { |
409 | ret = -EINVAL; |
410 | break; |
411 | } |
412 | ret = ad5933_cmd(st, cmd: 0); |
413 | break; |
414 | case AD5933_OUT_SETTLING_CYCLES: |
415 | val = clamp(val, (u16)0, (u16)0x7FF); |
416 | st->settling_cycles = val; |
417 | |
418 | /* 2x, 4x handling, see datasheet */ |
419 | if (val > 1022) |
420 | val = (val >> 2) | (3 << 9); |
421 | else if (val > 511) |
422 | val = (val >> 1) | BIT(9); |
423 | |
424 | dat = cpu_to_be16(val); |
425 | ret = ad5933_i2c_write(client: st->client, |
426 | AD5933_REG_SETTLING_CYCLES, |
427 | len: 2, data: (u8 *)&dat); |
428 | break; |
429 | case AD5933_FREQ_POINTS: |
430 | val = clamp(val, (u16)0, (u16)511); |
431 | st->freq_points = val; |
432 | |
433 | dat = cpu_to_be16(val); |
434 | ret = ad5933_i2c_write(client: st->client, AD5933_REG_INC_NUM, len: 2, |
435 | data: (u8 *)&dat); |
436 | break; |
437 | default: |
438 | ret = -EINVAL; |
439 | } |
440 | |
441 | mutex_unlock(lock: &st->lock); |
442 | iio_device_release_direct_mode(indio_dev); |
443 | return ret ? ret : len; |
444 | } |
445 | |
446 | static IIO_DEVICE_ATTR(out_altvoltage0_raw, 0644, |
447 | ad5933_show, |
448 | ad5933_store, |
449 | AD5933_OUT_RANGE); |
450 | |
451 | static IIO_DEVICE_ATTR(out_altvoltage0_scale_available, 0444, |
452 | ad5933_show, |
453 | NULL, |
454 | AD5933_OUT_RANGE_AVAIL); |
455 | |
456 | static IIO_DEVICE_ATTR(in_voltage0_scale, 0644, |
457 | ad5933_show, |
458 | ad5933_store, |
459 | AD5933_IN_PGA_GAIN); |
460 | |
461 | static IIO_DEVICE_ATTR(in_voltage0_scale_available, 0444, |
462 | ad5933_show, |
463 | NULL, |
464 | AD5933_IN_PGA_GAIN_AVAIL); |
465 | |
466 | static IIO_DEVICE_ATTR(out_altvoltage0_frequency_points, 0644, |
467 | ad5933_show, |
468 | ad5933_store, |
469 | AD5933_FREQ_POINTS); |
470 | |
471 | static IIO_DEVICE_ATTR(out_altvoltage0_settling_cycles, 0644, |
472 | ad5933_show, |
473 | ad5933_store, |
474 | AD5933_OUT_SETTLING_CYCLES); |
475 | |
476 | /* |
477 | * note: |
478 | * ideally we would handle the scale attributes via the iio_info |
479 | * (read|write)_raw methods, however this part is a untypical since we |
480 | * don't create dedicated sysfs channel attributes for out0 and in0. |
481 | */ |
482 | static struct attribute *ad5933_attributes[] = { |
483 | &iio_dev_attr_out_altvoltage0_raw.dev_attr.attr, |
484 | &iio_dev_attr_out_altvoltage0_scale_available.dev_attr.attr, |
485 | &iio_dev_attr_out_altvoltage0_frequency_start.dev_attr.attr, |
486 | &iio_dev_attr_out_altvoltage0_frequency_increment.dev_attr.attr, |
487 | &iio_dev_attr_out_altvoltage0_frequency_points.dev_attr.attr, |
488 | &iio_dev_attr_out_altvoltage0_settling_cycles.dev_attr.attr, |
489 | &iio_dev_attr_in_voltage0_scale.dev_attr.attr, |
490 | &iio_dev_attr_in_voltage0_scale_available.dev_attr.attr, |
491 | NULL |
492 | }; |
493 | |
494 | static const struct attribute_group ad5933_attribute_group = { |
495 | .attrs = ad5933_attributes, |
496 | }; |
497 | |
498 | static int ad5933_read_raw(struct iio_dev *indio_dev, |
499 | struct iio_chan_spec const *chan, |
500 | int *val, |
501 | int *val2, |
502 | long m) |
503 | { |
504 | struct ad5933_state *st = iio_priv(indio_dev); |
505 | __be16 dat; |
506 | int ret; |
507 | |
508 | switch (m) { |
509 | case IIO_CHAN_INFO_RAW: |
510 | ret = iio_device_claim_direct_mode(indio_dev); |
511 | if (ret) |
512 | return ret; |
513 | ret = ad5933_cmd(st, AD5933_CTRL_MEASURE_TEMP); |
514 | if (ret < 0) |
515 | goto out; |
516 | ret = ad5933_wait_busy(st, AD5933_STAT_TEMP_VALID); |
517 | if (ret < 0) |
518 | goto out; |
519 | |
520 | ret = ad5933_i2c_read(client: st->client, |
521 | AD5933_REG_TEMP_DATA, |
522 | len: 2, data: (u8 *)&dat); |
523 | if (ret < 0) |
524 | goto out; |
525 | iio_device_release_direct_mode(indio_dev); |
526 | *val = sign_extend32(be16_to_cpu(dat), index: 13); |
527 | |
528 | return IIO_VAL_INT; |
529 | case IIO_CHAN_INFO_SCALE: |
530 | *val = 1000; |
531 | *val2 = 5; |
532 | return IIO_VAL_FRACTIONAL_LOG2; |
533 | } |
534 | |
535 | return -EINVAL; |
536 | out: |
537 | iio_device_release_direct_mode(indio_dev); |
538 | return ret; |
539 | } |
540 | |
541 | static const struct iio_info ad5933_info = { |
542 | .read_raw = ad5933_read_raw, |
543 | .attrs = &ad5933_attribute_group, |
544 | }; |
545 | |
546 | static int ad5933_ring_preenable(struct iio_dev *indio_dev) |
547 | { |
548 | struct ad5933_state *st = iio_priv(indio_dev); |
549 | int ret; |
550 | |
551 | if (bitmap_empty(src: indio_dev->active_scan_mask, nbits: indio_dev->masklength)) |
552 | return -EINVAL; |
553 | |
554 | ret = ad5933_reset(st); |
555 | if (ret < 0) |
556 | return ret; |
557 | |
558 | ret = ad5933_cmd(st, AD5933_CTRL_STANDBY); |
559 | if (ret < 0) |
560 | return ret; |
561 | |
562 | ret = ad5933_cmd(st, AD5933_CTRL_INIT_START_FREQ); |
563 | if (ret < 0) |
564 | return ret; |
565 | |
566 | st->state = AD5933_CTRL_INIT_START_FREQ; |
567 | |
568 | return 0; |
569 | } |
570 | |
571 | static int ad5933_ring_postenable(struct iio_dev *indio_dev) |
572 | { |
573 | struct ad5933_state *st = iio_priv(indio_dev); |
574 | |
575 | /* |
576 | * AD5933_CTRL_INIT_START_FREQ: |
577 | * High Q complex circuits require a long time to reach steady state. |
578 | * To facilitate the measurement of such impedances, this mode allows |
579 | * the user full control of the settling time requirement before |
580 | * entering start frequency sweep mode where the impedance measurement |
581 | * takes place. In this mode the impedance is excited with the |
582 | * programmed start frequency (ad5933_ring_preenable), |
583 | * but no measurement takes place. |
584 | */ |
585 | |
586 | schedule_delayed_work(dwork: &st->work, |
587 | delay: msecs_to_jiffies(AD5933_INIT_EXCITATION_TIME_ms)); |
588 | return 0; |
589 | } |
590 | |
591 | static int ad5933_ring_postdisable(struct iio_dev *indio_dev) |
592 | { |
593 | struct ad5933_state *st = iio_priv(indio_dev); |
594 | |
595 | cancel_delayed_work_sync(dwork: &st->work); |
596 | return ad5933_cmd(st, AD5933_CTRL_POWER_DOWN); |
597 | } |
598 | |
599 | static const struct iio_buffer_setup_ops ad5933_ring_setup_ops = { |
600 | .preenable = ad5933_ring_preenable, |
601 | .postenable = ad5933_ring_postenable, |
602 | .postdisable = ad5933_ring_postdisable, |
603 | }; |
604 | |
605 | static void ad5933_work(struct work_struct *work) |
606 | { |
607 | struct ad5933_state *st = container_of(work, |
608 | struct ad5933_state, work.work); |
609 | struct iio_dev *indio_dev = i2c_get_clientdata(client: st->client); |
610 | __be16 buf[2]; |
611 | u16 val[2]; |
612 | unsigned char status; |
613 | int ret; |
614 | |
615 | if (st->state == AD5933_CTRL_INIT_START_FREQ) { |
616 | /* start sweep */ |
617 | ad5933_cmd(st, AD5933_CTRL_START_SWEEP); |
618 | st->state = AD5933_CTRL_START_SWEEP; |
619 | schedule_delayed_work(dwork: &st->work, delay: st->poll_time_jiffies); |
620 | return; |
621 | } |
622 | |
623 | ret = ad5933_i2c_read(client: st->client, AD5933_REG_STATUS, len: 1, data: &status); |
624 | if (ret) |
625 | return; |
626 | |
627 | if (status & AD5933_STAT_DATA_VALID) { |
628 | int scan_count = bitmap_weight(src: indio_dev->active_scan_mask, |
629 | nbits: indio_dev->masklength); |
630 | ret = ad5933_i2c_read(client: st->client, |
631 | test_bit(1, indio_dev->active_scan_mask) ? |
632 | AD5933_REG_REAL_DATA : AD5933_REG_IMAG_DATA, |
633 | len: scan_count * 2, data: (u8 *)buf); |
634 | if (ret) |
635 | return; |
636 | |
637 | if (scan_count == 2) { |
638 | val[0] = be16_to_cpu(buf[0]); |
639 | val[1] = be16_to_cpu(buf[1]); |
640 | } else { |
641 | val[0] = be16_to_cpu(buf[0]); |
642 | } |
643 | iio_push_to_buffers(indio_dev, data: val); |
644 | } else { |
645 | /* no data available - try again later */ |
646 | schedule_delayed_work(dwork: &st->work, delay: st->poll_time_jiffies); |
647 | return; |
648 | } |
649 | |
650 | if (status & AD5933_STAT_SWEEP_DONE) { |
651 | /* |
652 | * last sample received - power down do |
653 | * nothing until the ring enable is toggled |
654 | */ |
655 | ad5933_cmd(st, AD5933_CTRL_POWER_DOWN); |
656 | } else { |
657 | /* we just received a valid datum, move on to the next */ |
658 | ad5933_cmd(st, AD5933_CTRL_INC_FREQ); |
659 | schedule_delayed_work(dwork: &st->work, delay: st->poll_time_jiffies); |
660 | } |
661 | } |
662 | |
663 | static void ad5933_reg_disable(void *data) |
664 | { |
665 | struct ad5933_state *st = data; |
666 | |
667 | regulator_disable(regulator: st->reg); |
668 | } |
669 | |
670 | static int ad5933_probe(struct i2c_client *client) |
671 | { |
672 | const struct i2c_device_id *id = i2c_client_get_device_id(client); |
673 | int ret; |
674 | struct ad5933_state *st; |
675 | struct iio_dev *indio_dev; |
676 | unsigned long ext_clk_hz = 0; |
677 | |
678 | indio_dev = devm_iio_device_alloc(parent: &client->dev, sizeof_priv: sizeof(*st)); |
679 | if (!indio_dev) |
680 | return -ENOMEM; |
681 | |
682 | st = iio_priv(indio_dev); |
683 | i2c_set_clientdata(client, data: indio_dev); |
684 | st->client = client; |
685 | |
686 | mutex_init(&st->lock); |
687 | |
688 | st->reg = devm_regulator_get(dev: &client->dev, id: "vdd" ); |
689 | if (IS_ERR(ptr: st->reg)) |
690 | return PTR_ERR(ptr: st->reg); |
691 | |
692 | ret = regulator_enable(regulator: st->reg); |
693 | if (ret) { |
694 | dev_err(&client->dev, "Failed to enable specified VDD supply\n" ); |
695 | return ret; |
696 | } |
697 | |
698 | ret = devm_add_action_or_reset(&client->dev, ad5933_reg_disable, st); |
699 | if (ret) |
700 | return ret; |
701 | |
702 | ret = regulator_get_voltage(regulator: st->reg); |
703 | if (ret < 0) |
704 | return ret; |
705 | |
706 | st->vref_mv = ret / 1000; |
707 | |
708 | st->mclk = devm_clk_get_enabled(dev: &client->dev, id: "mclk" ); |
709 | if (IS_ERR(ptr: st->mclk) && PTR_ERR(ptr: st->mclk) != -ENOENT) |
710 | return PTR_ERR(ptr: st->mclk); |
711 | |
712 | if (!IS_ERR(ptr: st->mclk)) |
713 | ext_clk_hz = clk_get_rate(clk: st->mclk); |
714 | |
715 | if (ext_clk_hz) { |
716 | st->mclk_hz = ext_clk_hz; |
717 | st->ctrl_lb = AD5933_CTRL_EXT_SYSCLK; |
718 | } else { |
719 | st->mclk_hz = AD5933_INT_OSC_FREQ_Hz; |
720 | st->ctrl_lb = AD5933_CTRL_INT_SYSCLK; |
721 | } |
722 | |
723 | ad5933_calc_out_ranges(st); |
724 | INIT_DELAYED_WORK(&st->work, ad5933_work); |
725 | st->poll_time_jiffies = msecs_to_jiffies(AD5933_POLL_TIME_ms); |
726 | |
727 | indio_dev->info = &ad5933_info; |
728 | indio_dev->name = id->name; |
729 | indio_dev->modes = INDIO_DIRECT_MODE; |
730 | indio_dev->channels = ad5933_channels; |
731 | indio_dev->num_channels = ARRAY_SIZE(ad5933_channels); |
732 | |
733 | ret = devm_iio_kfifo_buffer_setup(&client->dev, indio_dev, |
734 | &ad5933_ring_setup_ops); |
735 | if (ret) |
736 | return ret; |
737 | |
738 | ret = ad5933_setup(st); |
739 | if (ret) |
740 | return ret; |
741 | |
742 | return devm_iio_device_register(&client->dev, indio_dev); |
743 | } |
744 | |
745 | static const struct i2c_device_id ad5933_id[] = { |
746 | { "ad5933" , 0 }, |
747 | { "ad5934" , 0 }, |
748 | {} |
749 | }; |
750 | |
751 | MODULE_DEVICE_TABLE(i2c, ad5933_id); |
752 | |
753 | static const struct of_device_id ad5933_of_match[] = { |
754 | { .compatible = "adi,ad5933" }, |
755 | { .compatible = "adi,ad5934" }, |
756 | { }, |
757 | }; |
758 | |
759 | MODULE_DEVICE_TABLE(of, ad5933_of_match); |
760 | |
761 | static struct i2c_driver ad5933_driver = { |
762 | .driver = { |
763 | .name = "ad5933" , |
764 | .of_match_table = ad5933_of_match, |
765 | }, |
766 | .probe = ad5933_probe, |
767 | .id_table = ad5933_id, |
768 | }; |
769 | module_i2c_driver(ad5933_driver); |
770 | |
771 | MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>" ); |
772 | MODULE_DESCRIPTION("Analog Devices AD5933 Impedance Conv. Network Analyzer" ); |
773 | MODULE_LICENSE("GPL v2" ); |
774 | |