1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* |
3 | * budget-patch.c: driver for Budget Patch, |
4 | * hardware modification of DVB-S cards enabling full TS |
5 | * |
6 | * Written by Emard <emard@softhome.net> |
7 | * |
8 | * Original idea by Roberto Deza <rdeza@unav.es> |
9 | * |
10 | * Special thanks to Holger Waechtler, Michael Hunold, Marian Durkovic |
11 | * and Metzlerbros |
12 | * |
13 | * the project's page is at https://linuxtv.org |
14 | */ |
15 | |
16 | #include "av7110.h" |
17 | #include "av7110_hw.h" |
18 | #include "budget.h" |
19 | #include "stv0299.h" |
20 | #include "ves1x93.h" |
21 | #include "tda8083.h" |
22 | |
23 | #include "bsru6.h" |
24 | |
25 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
26 | |
27 | #define budget_patch budget |
28 | |
29 | static struct saa7146_extension budget_extension; |
30 | |
31 | MAKE_BUDGET_INFO(ttbp, "TT-Budget/Patch DVB-S 1.x PCI" , BUDGET_PATCH); |
32 | //MAKE_BUDGET_INFO(satel,"TT-Budget/Patch SATELCO PCI", BUDGET_TT_HW_DISEQC); |
33 | |
34 | static const struct pci_device_id pci_tbl[] = { |
35 | MAKE_EXTENSION_PCI(ttbp,0x13c2, 0x0000), |
36 | // MAKE_EXTENSION_PCI(satel, 0x13c2, 0x1013), |
37 | { |
38 | .vendor = 0, |
39 | } |
40 | }; |
41 | |
42 | /* those lines are for budget-patch to be tried |
43 | ** on a true budget card and observe the |
44 | ** behaviour of VSYNC generated by rps1. |
45 | ** this code was shamelessly copy/pasted from budget.c |
46 | */ |
47 | static void gpio_Set22K (struct budget *budget, int state) |
48 | { |
49 | struct saa7146_dev *dev=budget->dev; |
50 | dprintk(2, "budget: %p\n" , budget); |
51 | saa7146_setgpio(dev, port: 3, data: (state ? SAA7146_GPIO_OUTHI : SAA7146_GPIO_OUTLO)); |
52 | } |
53 | |
54 | /* Diseqc functions only for TT Budget card */ |
55 | /* taken from the Skyvision DVB driver by |
56 | Ralph Metzler <rjkm@metzlerbros.de> */ |
57 | |
58 | static void DiseqcSendBit (struct budget *budget, int data) |
59 | { |
60 | struct saa7146_dev *dev=budget->dev; |
61 | dprintk(2, "budget: %p\n" , budget); |
62 | |
63 | saa7146_setgpio(dev, port: 3, SAA7146_GPIO_OUTHI); |
64 | udelay(data ? 500 : 1000); |
65 | saa7146_setgpio(dev, port: 3, SAA7146_GPIO_OUTLO); |
66 | udelay(data ? 1000 : 500); |
67 | } |
68 | |
69 | static void DiseqcSendByte (struct budget *budget, int data) |
70 | { |
71 | int i, par=1, d; |
72 | |
73 | dprintk(2, "budget: %p\n" , budget); |
74 | |
75 | for (i=7; i>=0; i--) { |
76 | d = (data>>i)&1; |
77 | par ^= d; |
78 | DiseqcSendBit(budget, data: d); |
79 | } |
80 | |
81 | DiseqcSendBit(budget, data: par); |
82 | } |
83 | |
84 | static int SendDiSEqCMsg (struct budget *budget, int len, u8 *msg, unsigned long burst) |
85 | { |
86 | struct saa7146_dev *dev=budget->dev; |
87 | int i; |
88 | |
89 | dprintk(2, "budget: %p\n" , budget); |
90 | |
91 | saa7146_setgpio(dev, port: 3, SAA7146_GPIO_OUTLO); |
92 | mdelay(16); |
93 | |
94 | for (i=0; i<len; i++) |
95 | DiseqcSendByte(budget, data: msg[i]); |
96 | |
97 | mdelay(16); |
98 | |
99 | if (burst!=-1) { |
100 | if (burst) |
101 | DiseqcSendByte(budget, data: 0xff); |
102 | else { |
103 | saa7146_setgpio(dev, port: 3, SAA7146_GPIO_OUTHI); |
104 | mdelay(12); |
105 | udelay(500); |
106 | saa7146_setgpio(dev, port: 3, SAA7146_GPIO_OUTLO); |
107 | } |
108 | msleep(msecs: 20); |
109 | } |
110 | |
111 | return 0; |
112 | } |
113 | |
114 | /* shamelessly copy/pasted from budget.c */ |
115 | static int budget_set_tone(struct dvb_frontend *fe, |
116 | enum fe_sec_tone_mode tone) |
117 | { |
118 | struct budget* budget = (struct budget*) fe->dvb->priv; |
119 | |
120 | switch (tone) { |
121 | case SEC_TONE_ON: |
122 | gpio_Set22K (budget, state: 1); |
123 | break; |
124 | |
125 | case SEC_TONE_OFF: |
126 | gpio_Set22K (budget, state: 0); |
127 | break; |
128 | |
129 | default: |
130 | return -EINVAL; |
131 | } |
132 | |
133 | return 0; |
134 | } |
135 | |
136 | static int budget_diseqc_send_master_cmd(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd) |
137 | { |
138 | struct budget* budget = (struct budget*) fe->dvb->priv; |
139 | |
140 | SendDiSEqCMsg (budget, len: cmd->msg_len, msg: cmd->msg, burst: 0); |
141 | |
142 | return 0; |
143 | } |
144 | |
145 | static int budget_diseqc_send_burst(struct dvb_frontend *fe, |
146 | enum fe_sec_mini_cmd minicmd) |
147 | { |
148 | struct budget* budget = (struct budget*) fe->dvb->priv; |
149 | |
150 | SendDiSEqCMsg (budget, len: 0, NULL, burst: minicmd); |
151 | |
152 | return 0; |
153 | } |
154 | |
155 | static int budget_av7110_send_fw_cmd(struct budget_patch *budget, u16* buf, int length) |
156 | { |
157 | int i; |
158 | |
159 | dprintk(2, "budget: %p\n" , budget); |
160 | |
161 | for (i = 2; i < length; i++) |
162 | { |
163 | ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2*i, 2, (u32) buf[i], 0,0); |
164 | msleep(msecs: 5); |
165 | } |
166 | if (length) |
167 | ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, (u32) buf[1], 0,0); |
168 | else |
169 | ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, 0, 0,0); |
170 | msleep(msecs: 5); |
171 | ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND, 2, (u32) buf[0], 0,0); |
172 | msleep(msecs: 5); |
173 | return 0; |
174 | } |
175 | |
176 | static void av7110_set22k(struct budget_patch *budget, int state) |
177 | { |
178 | u16 buf[2] = {( COMTYPE_AUDIODAC << 8) | (state ? ON22K : OFF22K), 0}; |
179 | |
180 | dprintk(2, "budget: %p\n" , budget); |
181 | budget_av7110_send_fw_cmd(budget, buf, length: 2); |
182 | } |
183 | |
184 | static int av7110_send_diseqc_msg(struct budget_patch *budget, int len, u8 *msg, int burst) |
185 | { |
186 | int i; |
187 | u16 buf[18] = { ((COMTYPE_AUDIODAC << 8) | SendDiSEqC), |
188 | 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; |
189 | |
190 | dprintk(2, "budget: %p\n" , budget); |
191 | |
192 | if (len>10) |
193 | len=10; |
194 | |
195 | buf[1] = len+2; |
196 | buf[2] = len; |
197 | |
198 | if (burst != -1) |
199 | buf[3]=burst ? 0x01 : 0x00; |
200 | else |
201 | buf[3]=0xffff; |
202 | |
203 | for (i=0; i<len; i++) |
204 | buf[i+4]=msg[i]; |
205 | |
206 | budget_av7110_send_fw_cmd(budget, buf, length: 18); |
207 | return 0; |
208 | } |
209 | |
210 | static int budget_patch_set_tone(struct dvb_frontend *fe, |
211 | enum fe_sec_tone_mode tone) |
212 | { |
213 | struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; |
214 | |
215 | switch (tone) { |
216 | case SEC_TONE_ON: |
217 | av7110_set22k (budget, state: 1); |
218 | break; |
219 | |
220 | case SEC_TONE_OFF: |
221 | av7110_set22k (budget, state: 0); |
222 | break; |
223 | |
224 | default: |
225 | return -EINVAL; |
226 | } |
227 | |
228 | return 0; |
229 | } |
230 | |
231 | static int budget_patch_diseqc_send_master_cmd(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd) |
232 | { |
233 | struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; |
234 | |
235 | av7110_send_diseqc_msg (budget, len: cmd->msg_len, msg: cmd->msg, burst: 0); |
236 | |
237 | return 0; |
238 | } |
239 | |
240 | static int budget_patch_diseqc_send_burst(struct dvb_frontend *fe, |
241 | enum fe_sec_mini_cmd minicmd) |
242 | { |
243 | struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; |
244 | |
245 | av7110_send_diseqc_msg (budget, len: 0, NULL, burst: minicmd); |
246 | |
247 | return 0; |
248 | } |
249 | |
250 | static int alps_bsrv2_tuner_set_params(struct dvb_frontend *fe) |
251 | { |
252 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
253 | struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; |
254 | u8 pwr = 0; |
255 | u8 buf[4]; |
256 | struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) }; |
257 | u32 div = (p->frequency + 479500) / 125; |
258 | |
259 | if (p->frequency > 2000000) |
260 | pwr = 3; |
261 | else if (p->frequency > 1800000) |
262 | pwr = 2; |
263 | else if (p->frequency > 1600000) |
264 | pwr = 1; |
265 | else if (p->frequency > 1200000) |
266 | pwr = 0; |
267 | else if (p->frequency >= 1100000) |
268 | pwr = 1; |
269 | else pwr = 2; |
270 | |
271 | buf[0] = (div >> 8) & 0x7f; |
272 | buf[1] = div & 0xff; |
273 | buf[2] = ((div & 0x18000) >> 10) | 0x95; |
274 | buf[3] = (pwr << 6) | 0x30; |
275 | |
276 | // NOTE: since we're using a prescaler of 2, we set the |
277 | // divisor frequency to 62.5kHz and divide by 125 above |
278 | |
279 | if (fe->ops.i2c_gate_ctrl) |
280 | fe->ops.i2c_gate_ctrl(fe, 1); |
281 | if (i2c_transfer (adap: &budget->i2c_adap, msgs: &msg, num: 1) != 1) |
282 | return -EIO; |
283 | return 0; |
284 | } |
285 | |
286 | static struct ves1x93_config alps_bsrv2_config = { |
287 | .demod_address = 0x08, |
288 | .xin = 90100000UL, |
289 | .invert_pwm = 0, |
290 | }; |
291 | |
292 | static int grundig_29504_451_tuner_set_params(struct dvb_frontend *fe) |
293 | { |
294 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
295 | struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; |
296 | u32 div; |
297 | u8 data[4]; |
298 | struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) }; |
299 | |
300 | div = p->frequency / 125; |
301 | data[0] = (div >> 8) & 0x7f; |
302 | data[1] = div & 0xff; |
303 | data[2] = 0x8e; |
304 | data[3] = 0x00; |
305 | |
306 | if (fe->ops.i2c_gate_ctrl) |
307 | fe->ops.i2c_gate_ctrl(fe, 1); |
308 | if (i2c_transfer (adap: &budget->i2c_adap, msgs: &msg, num: 1) != 1) |
309 | return -EIO; |
310 | return 0; |
311 | } |
312 | |
313 | static struct tda8083_config grundig_29504_451_config = { |
314 | .demod_address = 0x68, |
315 | }; |
316 | |
317 | static void frontend_init(struct budget_patch* budget) |
318 | { |
319 | switch(budget->dev->pci->subsystem_device) { |
320 | case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X |
321 | case 0x1013: // SATELCO Multimedia PCI |
322 | |
323 | // try the ALPS BSRV2 first of all |
324 | budget->dvb_frontend = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &budget->i2c_adap); |
325 | if (budget->dvb_frontend) { |
326 | budget->dvb_frontend->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params; |
327 | budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_patch_diseqc_send_master_cmd; |
328 | budget->dvb_frontend->ops.diseqc_send_burst = budget_patch_diseqc_send_burst; |
329 | budget->dvb_frontend->ops.set_tone = budget_patch_set_tone; |
330 | break; |
331 | } |
332 | |
333 | // try the ALPS BSRU6 now |
334 | budget->dvb_frontend = dvb_attach(stv0299_attach, &alps_bsru6_config, &budget->i2c_adap); |
335 | if (budget->dvb_frontend) { |
336 | budget->dvb_frontend->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params; |
337 | budget->dvb_frontend->tuner_priv = &budget->i2c_adap; |
338 | |
339 | budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_diseqc_send_master_cmd; |
340 | budget->dvb_frontend->ops.diseqc_send_burst = budget_diseqc_send_burst; |
341 | budget->dvb_frontend->ops.set_tone = budget_set_tone; |
342 | break; |
343 | } |
344 | |
345 | // Try the grundig 29504-451 |
346 | budget->dvb_frontend = dvb_attach(tda8083_attach, &grundig_29504_451_config, &budget->i2c_adap); |
347 | if (budget->dvb_frontend) { |
348 | budget->dvb_frontend->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params; |
349 | budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_diseqc_send_master_cmd; |
350 | budget->dvb_frontend->ops.diseqc_send_burst = budget_diseqc_send_burst; |
351 | budget->dvb_frontend->ops.set_tone = budget_set_tone; |
352 | break; |
353 | } |
354 | break; |
355 | } |
356 | |
357 | if (budget->dvb_frontend == NULL) { |
358 | printk("dvb-ttpci: A frontend driver was not found for device [%04x:%04x] subsystem [%04x:%04x]\n" , |
359 | budget->dev->pci->vendor, |
360 | budget->dev->pci->device, |
361 | budget->dev->pci->subsystem_vendor, |
362 | budget->dev->pci->subsystem_device); |
363 | } else { |
364 | if (dvb_register_frontend(dvb: &budget->dvb_adapter, fe: budget->dvb_frontend)) { |
365 | printk("budget-av: Frontend registration failed!\n" ); |
366 | dvb_frontend_detach(fe: budget->dvb_frontend); |
367 | budget->dvb_frontend = NULL; |
368 | } |
369 | } |
370 | } |
371 | |
372 | /* written by Emard */ |
373 | static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_extension_data *info) |
374 | { |
375 | struct budget_patch *budget; |
376 | int err; |
377 | int count = 0; |
378 | int detected = 0; |
379 | |
380 | #define PATCH_RESET 0 |
381 | #define RPS_IRQ 0 |
382 | #define HPS_SETUP 0 |
383 | #if PATCH_RESET |
384 | saa7146_write(dev, MC1, MASK_31); |
385 | msleep(40); |
386 | #endif |
387 | #if HPS_SETUP |
388 | // initialize registers. Better to have it like this |
389 | // than leaving something unconfigured |
390 | saa7146_write(dev, DD1_STREAM_B, 0); |
391 | // port B VSYNC at rising edge |
392 | saa7146_write(dev, DD1_INIT, 0x00000200); // have this in budget-core too! |
393 | saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI |
394 | |
395 | // debi config |
396 | // saa7146_write(dev, DEBI_CONFIG, MASK_30|MASK_28|MASK_18); |
397 | |
398 | // zero all HPS registers |
399 | saa7146_write(dev, HPS_H_PRESCALE, 0); // r68 |
400 | saa7146_write(dev, HPS_H_SCALE, 0); // r6c |
401 | saa7146_write(dev, BCS_CTRL, 0); // r70 |
402 | saa7146_write(dev, HPS_V_SCALE, 0); // r60 |
403 | saa7146_write(dev, HPS_V_GAIN, 0); // r64 |
404 | saa7146_write(dev, CHROMA_KEY_RANGE, 0); // r74 |
405 | saa7146_write(dev, CLIP_FORMAT_CTRL, 0); // r78 |
406 | // Set HPS prescaler for port B input |
407 | saa7146_write(dev, HPS_CTRL, (1<<30) | (0<<29) | (1<<28) | (0<<12) ); |
408 | saa7146_write(dev, MC2, |
409 | 0 * (MASK_08 | MASK_24) | // BRS control |
410 | 0 * (MASK_09 | MASK_25) | // a |
411 | 0 * (MASK_10 | MASK_26) | // b |
412 | 1 * (MASK_06 | MASK_22) | // HPS_CTRL1 |
413 | 1 * (MASK_05 | MASK_21) | // HPS_CTRL2 |
414 | 0 * (MASK_01 | MASK_15) // DEBI |
415 | ); |
416 | #endif |
417 | // Disable RPS1 and RPS0 |
418 | saa7146_write(dev, MC1, ( MASK_29 | MASK_28)); |
419 | // RPS1 timeout disable |
420 | saa7146_write(dev, RPS_TOV1, 0); |
421 | |
422 | // code for autodetection |
423 | // will wait for VBI_B event (vertical blank at port B) |
424 | // and will reset GPIO3 after VBI_B is detected. |
425 | // (GPIO3 should be raised high by CPU to |
426 | // test if GPIO3 will generate vertical blank signal |
427 | // in budget patch GPIO3 is connected to VSYNC_B |
428 | count = 0; |
429 | #if 0 |
430 | WRITE_RPS1(CMD_UPLOAD | |
431 | MASK_10 | MASK_09 | MASK_08 | MASK_06 | MASK_05 | MASK_04 | MASK_03 | MASK_02 ); |
432 | #endif |
433 | WRITE_RPS1(CMD_PAUSE | EVT_VBI_B); |
434 | WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2)); |
435 | WRITE_RPS1(GPIO3_MSK); |
436 | WRITE_RPS1(SAA7146_GPIO_OUTLO<<24); |
437 | #if RPS_IRQ |
438 | // issue RPS1 interrupt to increment counter |
439 | WRITE_RPS1(CMD_INTERRUPT); |
440 | // at least a NOP is neede between two interrupts |
441 | WRITE_RPS1(CMD_NOP); |
442 | // interrupt again |
443 | WRITE_RPS1(CMD_INTERRUPT); |
444 | #endif |
445 | WRITE_RPS1(CMD_STOP); |
446 | |
447 | #if RPS_IRQ |
448 | // set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53) |
449 | // use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled |
450 | // use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called |
451 | saa7146_write(dev, EC1SSR, (0x03<<2) | 3 ); |
452 | // set event counter 1 threshold to maximum allowed value (rEC p55) |
453 | saa7146_write(dev, ECT1R, 0x3fff ); |
454 | #endif |
455 | // Fix VSYNC level |
456 | saa7146_setgpio(dev, port: 3, SAA7146_GPIO_OUTLO); |
457 | // Set RPS1 Address register to point to RPS code (r108 p42) |
458 | saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle); |
459 | // Enable RPS1, (rFC p33) |
460 | saa7146_write(dev, MC1, (MASK_13 | MASK_29 )); |
461 | |
462 | |
463 | mdelay(50); |
464 | saa7146_setgpio(dev, port: 3, SAA7146_GPIO_OUTHI); |
465 | mdelay(150); |
466 | |
467 | |
468 | if( (saa7146_read(dev, GPIO_CTRL) & 0x10000000) == 0) |
469 | detected = 1; |
470 | |
471 | #if RPS_IRQ |
472 | printk("Event Counter 1 0x%04x\n" , saa7146_read(dev, EC1R) & 0x3fff ); |
473 | #endif |
474 | // Disable RPS1 |
475 | saa7146_write(dev, MC1, ( MASK_29 )); |
476 | |
477 | if(detected == 0) |
478 | printk("budget-patch not detected or saa7146 in non-default state.\n" |
479 | "try enabling resetting of 7146 with MASK_31 in MC1 register\n" ); |
480 | |
481 | else |
482 | printk("BUDGET-PATCH DETECTED.\n" ); |
483 | |
484 | |
485 | /* OLD (Original design by Roberto Deza): |
486 | ** This code will setup the SAA7146_RPS1 to generate a square |
487 | ** wave on GPIO3, changing when a field (TS_HEIGHT/2 "lines" of |
488 | ** TS_WIDTH packets) has been acquired on SAA7146_D1B video port; |
489 | ** then, this GPIO3 output which is connected to the D1B_VSYNC |
490 | ** input, will trigger the acquisition of the alternate field |
491 | ** and so on. |
492 | ** Currently, the TT_budget / WinTV_Nova cards have two ICs |
493 | ** (74HCT4040, LVC74) for the generation of this VSYNC signal, |
494 | ** which seems that can be done perfectly without this :-)). |
495 | */ |
496 | |
497 | /* New design (By Emard) |
498 | ** this rps1 code will copy internal HS event to GPIO3 pin. |
499 | ** GPIO3 is in budget-patch hardware connected to port B VSYNC |
500 | |
501 | ** HS is an internal event of 7146, accessible with RPS |
502 | ** and temporarily raised high every n lines |
503 | ** (n in defined in the RPS_THRESH1 counter threshold) |
504 | ** I think HS is raised high on the beginning of the n-th line |
505 | ** and remains high until this n-th line that triggered |
506 | ** it is completely received. When the reception of n-th line |
507 | ** ends, HS is lowered. |
508 | |
509 | ** To transmit data over DMA, 7146 needs changing state at |
510 | ** port B VSYNC pin. Any changing of port B VSYNC will |
511 | ** cause some DMA data transfer, with more or less packets loss. |
512 | ** It depends on the phase and frequency of VSYNC and |
513 | ** the way of 7146 is instructed to trigger on port B (defined |
514 | ** in DD1_INIT register, 3rd nibble from the right valid |
515 | ** numbers are 0-7, see datasheet) |
516 | ** |
517 | ** The correct triggering can minimize packet loss, |
518 | ** dvbtraffic should give this stable bandwidths: |
519 | ** 22k transponder = 33814 kbit/s |
520 | ** 27.5k transponder = 38045 kbit/s |
521 | ** by experiment it is found that the best results |
522 | ** (stable bandwidths and almost no packet loss) |
523 | ** are obtained using DD1_INIT triggering number 2 |
524 | ** (Va at rising edge of VS Fa = HS x VS-failing forced toggle) |
525 | ** and a VSYNC phase that occurs in the middle of DMA transfer |
526 | ** (about byte 188*512=96256 in the DMA window). |
527 | ** |
528 | ** Phase of HS is still not clear to me how to control, |
529 | ** It just happens to be so. It can be seen if one enables |
530 | ** RPS_IRQ and print Event Counter 1 in vpeirq(). Every |
531 | ** time RPS_INTERRUPT is called, the Event Counter 1 will |
532 | ** increment. That's how the 7146 is programmed to do event |
533 | ** counting in this budget-patch.c |
534 | ** I *think* HPS setting has something to do with the phase |
535 | ** of HS but I can't be 100% sure in that. |
536 | |
537 | ** hardware debug note: a working budget card (including budget patch) |
538 | ** with vpeirq() interrupt setup in mode "0x90" (every 64K) will |
539 | ** generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes |
540 | ** and that means 3*25=75 Hz of interrupt frequency, as seen by |
541 | ** watch cat /proc/interrupts |
542 | ** |
543 | ** If this frequency is 3x lower (and data received in the DMA |
544 | ** buffer don't start with 0x47, but in the middle of packets, |
545 | ** whose lengths appear to be like 188 292 188 104 etc. |
546 | ** this means VSYNC line is not connected in the hardware. |
547 | ** (check soldering pcb and pins) |
548 | ** The same behaviour of missing VSYNC can be duplicated on budget |
549 | ** cards, by setting DD1_INIT trigger mode 7 in 3rd nibble. |
550 | */ |
551 | |
552 | // Setup RPS1 "program" (p35) |
553 | count = 0; |
554 | |
555 | |
556 | // Wait Source Line Counter Threshold (p36) |
557 | WRITE_RPS1(CMD_PAUSE | EVT_HS); |
558 | // Set GPIO3=1 (p42) |
559 | WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2)); |
560 | WRITE_RPS1(GPIO3_MSK); |
561 | WRITE_RPS1(SAA7146_GPIO_OUTHI<<24); |
562 | #if RPS_IRQ |
563 | // issue RPS1 interrupt |
564 | WRITE_RPS1(CMD_INTERRUPT); |
565 | #endif |
566 | // Wait reset Source Line Counter Threshold (p36) |
567 | WRITE_RPS1(CMD_PAUSE | RPS_INV | EVT_HS); |
568 | // Set GPIO3=0 (p42) |
569 | WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2)); |
570 | WRITE_RPS1(GPIO3_MSK); |
571 | WRITE_RPS1(SAA7146_GPIO_OUTLO<<24); |
572 | #if RPS_IRQ |
573 | // issue RPS1 interrupt |
574 | WRITE_RPS1(CMD_INTERRUPT); |
575 | #endif |
576 | // Jump to begin of RPS program (p37) |
577 | WRITE_RPS1(CMD_JUMP); |
578 | WRITE_RPS1(dev->d_rps1.dma_handle); |
579 | |
580 | // Fix VSYNC level |
581 | saa7146_setgpio(dev, port: 3, SAA7146_GPIO_OUTLO); |
582 | // Set RPS1 Address register to point to RPS code (r108 p42) |
583 | saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle); |
584 | |
585 | if (!(budget = kmalloc (sizeof(struct budget_patch), GFP_KERNEL))) |
586 | return -ENOMEM; |
587 | |
588 | dprintk(2, "budget: %p\n" , budget); |
589 | |
590 | err = ttpci_budget_init(budget, dev, info, THIS_MODULE, adapter_nr); |
591 | if (err) { |
592 | kfree(objp: budget); |
593 | return err; |
594 | } |
595 | |
596 | // Set Source Line Counter Threshold, using BRS (rCC p43) |
597 | // It generates HS event every TS_HEIGHT lines |
598 | // this is related to TS_WIDTH set in register |
599 | // NUM_LINE_BYTE3 in budget-core.c. If NUM_LINE_BYTE |
600 | // low 16 bits are set to TS_WIDTH bytes (TS_WIDTH=2*188 |
601 | //,then RPS_THRESH1 |
602 | // should be set to trigger every TS_HEIGHT (512) lines. |
603 | // |
604 | saa7146_write(dev, RPS_THRESH1, budget->buffer_height | MASK_12 ); |
605 | |
606 | // saa7146_write(dev, RPS_THRESH0, ((TS_HEIGHT/2)<<16) |MASK_28| (TS_HEIGHT/2) |MASK_12 ); |
607 | // Enable RPS1 (rFC p33) |
608 | saa7146_write(dev, MC1, (MASK_13 | MASK_29)); |
609 | |
610 | |
611 | dev->ext_priv = budget; |
612 | |
613 | budget->dvb_adapter.priv = budget; |
614 | frontend_init(budget); |
615 | |
616 | ttpci_budget_init_hooks(budget); |
617 | |
618 | return 0; |
619 | } |
620 | |
621 | static int budget_patch_detach (struct saa7146_dev* dev) |
622 | { |
623 | struct budget_patch *budget = (struct budget_patch*) dev->ext_priv; |
624 | int err; |
625 | |
626 | if (budget->dvb_frontend) { |
627 | dvb_unregister_frontend(fe: budget->dvb_frontend); |
628 | dvb_frontend_detach(fe: budget->dvb_frontend); |
629 | } |
630 | err = ttpci_budget_deinit (budget); |
631 | |
632 | kfree (objp: budget); |
633 | |
634 | return err; |
635 | } |
636 | |
637 | static int __init budget_patch_init(void) |
638 | { |
639 | return saa7146_register_extension(&budget_extension); |
640 | } |
641 | |
642 | static void __exit budget_patch_exit(void) |
643 | { |
644 | saa7146_unregister_extension(&budget_extension); |
645 | } |
646 | |
647 | static struct saa7146_extension budget_extension = { |
648 | .name = "budget_patch dvb" , |
649 | .flags = 0, |
650 | |
651 | .module = THIS_MODULE, |
652 | .pci_tbl = pci_tbl, |
653 | .attach = budget_patch_attach, |
654 | .detach = budget_patch_detach, |
655 | |
656 | .irq_mask = MASK_10, |
657 | .irq_func = ttpci_budget_irq10_handler, |
658 | }; |
659 | |
660 | module_init(budget_patch_init); |
661 | module_exit(budget_patch_exit); |
662 | |
663 | MODULE_LICENSE("GPL" ); |
664 | MODULE_AUTHOR("Emard, Roberto Deza, Holger Waechtler, Michael Hunold, others" ); |
665 | MODULE_DESCRIPTION("Driver for full TS modified DVB-S SAA7146+AV7110 based so-called Budget Patch cards" ); |
666 | |