1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* |
3 | * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved. |
4 | * |
5 | * Contact Information: wlanfae <wlanfae@realtek.com> |
6 | */ |
7 | #ifndef __R8192UDM_H__ |
8 | #define __R8192UDM_H__ |
9 | |
10 | /*--------------------------Define Parameters-------------------------------*/ |
11 | #define OFDM_TABLE_LEN 19 |
12 | #define CCK_TABLE_LEN 12 |
13 | |
14 | #define DM_DIG_THRESH_HIGH 40 |
15 | #define DM_DIG_THRESH_LOW 35 |
16 | |
17 | #define DM_DIG_HIGH_PWR_THRESH_HIGH 75 |
18 | #define DM_DIG_HIGH_PWR_THRESH_LOW 70 |
19 | |
20 | #define BW_AUTO_SWITCH_HIGH_LOW 25 |
21 | #define BW_AUTO_SWITCH_LOW_HIGH 30 |
22 | |
23 | #define DM_DIG_BACKOFF 12 |
24 | #define DM_DIG_MAX 0x36 |
25 | #define DM_DIG_MIN 0x1c |
26 | #define DM_DIG_MIN_Netcore 0x12 |
27 | |
28 | #define RX_PATH_SEL_SS_TH_LOW 30 |
29 | #define RX_PATH_SEL_DIFF_TH 18 |
30 | |
31 | #define RATE_ADAPTIVE_TH_HIGH 50 |
32 | #define RATE_ADAPTIVE_TH_LOW_20M 30 |
33 | #define RATE_ADAPTIVE_TH_LOW_40M 10 |
34 | #define 15 |
35 | |
36 | #define WA_IOT_TH_VAL 25 |
37 | |
38 | #define E_FOR_TX_POWER_TRACK 300 |
39 | #define TX_POWER_NEAR_FIELD_THRESH_HIGH 68 |
40 | #define TX_POWER_NEAR_FIELD_THRESH_LOW 62 |
41 | #define TX_POWER_ATHEROAP_THRESH_HIGH 78 |
42 | #define TX_POWER_ATHEROAP_THRESH_LOW 72 |
43 | |
44 | #define CURRENT_TX_RATE_REG 0x1e0 |
45 | #define INITIAL_TX_RATE_REG 0x1e1 |
46 | #define TX_RETRY_COUNT_REG 0x1ac |
47 | #define RegC38_TH 20 |
48 | |
49 | /*--------------------------Define Parameters-------------------------------*/ |
50 | |
51 | /*------------------------------Define structure----------------------------*/ |
52 | struct dig_t { |
53 | long ; |
54 | long ; |
55 | |
56 | long ; |
57 | long ; |
58 | |
59 | u8 cur_sta_connect_state; |
60 | u8 pre_sta_connect_state; |
61 | |
62 | u8 curpd_thstate; |
63 | u8 prepd_thstate; |
64 | u8 curcs_ratio_state; |
65 | u8 precs_ratio_state; |
66 | |
67 | u32 pre_ig_value; |
68 | u32 cur_ig_value; |
69 | |
70 | u8 backoff_val; |
71 | u8 rx_gain_range_max; |
72 | u8 rx_gain_range_min; |
73 | |
74 | long ; |
75 | }; |
76 | |
77 | enum dm_ratr_sta { |
78 | DM_RATR_STA_HIGH = 0, |
79 | DM_RATR_STA_MIDDLE = 1, |
80 | DM_RATR_STA_LOW = 2, |
81 | DM_RATR_STA_MAX |
82 | }; |
83 | |
84 | enum dm_dig_connect { |
85 | DIG_STA_DISCONNECT = 0, |
86 | DIG_STA_CONNECT = 1, |
87 | }; |
88 | |
89 | enum dm_dig_pd_th { |
90 | DIG_PD_AT_LOW_POWER = 0, |
91 | DIG_PD_AT_NORMAL_POWER = 1, |
92 | DIG_PD_AT_HIGH_POWER = 2, |
93 | DIG_PD_MAX |
94 | }; |
95 | |
96 | enum dm_dig_cs_ratio { |
97 | DIG_CS_RATIO_LOWER = 0, |
98 | DIG_CS_RATIO_HIGHER = 1, |
99 | DIG_CS_MAX |
100 | }; |
101 | |
102 | struct drx_path_sel { |
103 | u8 enable; |
104 | u8 cck_method; |
105 | u8 cck_rx_path; |
106 | |
107 | u8 ss_th_low; |
108 | u8 diff_th; |
109 | u8 disabled_rf; |
110 | u8 reserved; |
111 | |
112 | u8 [4]; |
113 | u8 [4]; |
114 | long cck_pwdb_sta[4]; |
115 | }; |
116 | |
117 | enum dm_cck_rx_path_method { |
118 | CCK_Rx_Version_1 = 0, |
119 | CCK_Rx_Version_2 = 1, |
120 | CCK_Rx_Version_MAX |
121 | }; |
122 | |
123 | struct dcmd_txcmd { |
124 | u32 op; |
125 | u32 length; |
126 | u32 value; |
127 | }; |
128 | |
129 | /*------------------------------Define structure----------------------------*/ |
130 | |
131 | /*------------------------Export global variable----------------------------*/ |
132 | extern struct dig_t dm_digtable; |
133 | |
134 | /* Pre-calculated gain tables */ |
135 | extern const u32 dm_tx_bb_gain[TX_BB_GAIN_TABLE_LEN]; |
136 | extern const u8 dm_cck_tx_bb_gain[CCK_TX_BB_GAIN_TABLE_LEN][8]; |
137 | extern const u8 dm_cck_tx_bb_gain_ch14[CCK_TX_BB_GAIN_TABLE_LEN][8]; |
138 | /* Maps table index to iq amplify gain (dB, 12 to -24dB) */ |
139 | #define dm_tx_bb_gain_idx_to_amplify(idx) (-idx + 12) |
140 | |
141 | /*------------------------Export global variable----------------------------*/ |
142 | |
143 | /*--------------------------Exported Function prototype---------------------*/ |
144 | /*--------------------------Exported Function prototype---------------------*/ |
145 | |
146 | void rtl92e_dm_init(struct net_device *dev); |
147 | void rtl92e_dm_deinit(struct net_device *dev); |
148 | |
149 | void rtl92e_dm_watchdog(struct net_device *dev); |
150 | |
151 | void rtl92e_init_adaptive_rate(struct net_device *dev); |
152 | void rtl92e_dm_txpower_tracking_wq(void *data); |
153 | |
154 | void rtl92e_dm_cck_txpower_adjust(struct net_device *dev, bool binch14); |
155 | |
156 | void rtl92e_dm_init_edca_turbo(struct net_device *dev); |
157 | void rtl92e_dm_rf_pathcheck_wq(void *data); |
158 | void rtl92e_dm_init_txpower_tracking(struct net_device *dev); |
159 | #endif /*__R8192UDM_H__ */ |
160 | |