1/* SPDX-License-Identifier: GPL-2.0 */
2/******************************************************************************
3 *
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 *
6 ******************************************************************************/
7#ifndef __HAL_COMMON_H__
8#define __HAL_COMMON_H__
9
10#include "HalVerDef.h"
11#include "hal_pg.h"
12#include "hal_phy.h"
13#include "hal_phy_reg.h"
14#include "hal_com_reg.h"
15#include "hal_com_phycfg.h"
16
17/*------------------------------ Tx Desc definition Macro ------------------------*/
18/* pragma mark -- Tx Desc related definition. -- */
19/* */
20/* */
21/* Rate */
22/* */
23/* CCK Rates, TxHT = 0 */
24#define DESC_RATE1M 0x00
25#define DESC_RATE2M 0x01
26#define DESC_RATE5_5M 0x02
27#define DESC_RATE11M 0x03
28
29/* OFDM Rates, TxHT = 0 */
30#define DESC_RATE6M 0x04
31#define DESC_RATE9M 0x05
32#define DESC_RATE12M 0x06
33#define DESC_RATE18M 0x07
34#define DESC_RATE24M 0x08
35#define DESC_RATE36M 0x09
36#define DESC_RATE48M 0x0a
37#define DESC_RATE54M 0x0b
38
39/* MCS Rates, TxHT = 1 */
40#define DESC_RATEMCS0 0x0c
41#define DESC_RATEMCS1 0x0d
42#define DESC_RATEMCS2 0x0e
43#define DESC_RATEMCS3 0x0f
44#define DESC_RATEMCS4 0x10
45#define DESC_RATEMCS5 0x11
46#define DESC_RATEMCS6 0x12
47#define DESC_RATEMCS7 0x13
48
49#define HDATA_RATE(rate)\
50(rate == DESC_RATE1M) ? "CCK_1M" : \
51(rate == DESC_RATE2M) ? "CCK_2M" : \
52(rate == DESC_RATE5_5M) ? "CCK5_5M" : \
53(rate == DESC_RATE11M) ? "CCK_11M" : \
54(rate == DESC_RATE6M) ? "OFDM_6M" : \
55(rate == DESC_RATE9M) ? "OFDM_9M" : \
56(rate == DESC_RATE12M) ? "OFDM_12M" : \
57(rate == DESC_RATE18M) ? "OFDM_18M" : \
58(rate == DESC_RATE24M) ? "OFDM_24M" : \
59(rate == DESC_RATE36M) ? "OFDM_36M" : \
60(rate == DESC_RATE48M) ? "OFDM_48M" : \
61(rate == DESC_RATE54M) ? "OFDM_54M" : \
62(rate == DESC_RATEMCS0) ? "MCS0" : \
63(rate == DESC_RATEMCS1) ? "MCS1" : \
64(rate == DESC_RATEMCS2) ? "MCS2" : \
65(rate == DESC_RATEMCS3) ? "MCS3" : \
66(rate == DESC_RATEMCS4) ? "MCS4" : \
67(rate == DESC_RATEMCS5) ? "MCS5" : \
68(rate == DESC_RATEMCS6) ? "MCS6" : \
69(rate == DESC_RATEMCS7) ? "MCS7" : "UNKNOWN"
70
71enum{
72 UP_LINK,
73 DOWN_LINK,
74};
75enum rt_media_status {
76 RT_MEDIA_DISCONNECT = 0,
77 RT_MEDIA_CONNECT = 1
78};
79
80#define MAX_DLFW_PAGE_SIZE 4096 /* @ page : 4k bytes */
81
82/* BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON. */
83/* define MAX_TX_QUEUE 9 */
84
85#define TX_SELE_HQ BIT(0) /* High Queue */
86#define TX_SELE_LQ BIT(1) /* Low Queue */
87#define TX_SELE_NQ BIT(2) /* Normal Queue */
88#define TX_SELE_EQ BIT(3) /* Extern Queue */
89
90#define PageNum_128(_Len) ((u32)(((_Len) >> 7) + ((_Len) & 0x7F ? 1 : 0)))
91
92u8 rtw_hal_data_init(struct adapter *padapter);
93void rtw_hal_data_deinit(struct adapter *padapter);
94
95void dump_chip_info(struct hal_version ChipVersion);
96
97u8 /* return the final channel plan decision */
98hal_com_config_channel_plan(
99struct adapter *padapter,
100u8 hw_channel_plan, /* channel plan from HW (efuse/eeprom) */
101u8 sw_channel_plan, /* channel plan from SW (registry/module param) */
102u8 def_channel_plan, /* channel plan used when the former two is invalid */
103bool AutoLoadFail
104 );
105
106bool
107HAL_IsLegalChannel(
108struct adapter *Adapter,
109u32 Channel
110 );
111
112u8 MRateToHwRate(u8 rate);
113
114u8 HwRateToMRate(u8 rate);
115
116void HalSetBrateCfg(
117 struct adapter *Adapter,
118 u8 *mBratesOS,
119 u16 *pBrateCfg);
120
121bool
122Hal_MappingOutPipe(
123struct adapter *padapter,
124u8 NumOutPipe
125 );
126
127void hal_init_macaddr(struct adapter *adapter);
128
129void rtw_init_hal_com_default_value(struct adapter *Adapter);
130
131void c2h_evt_clear(struct adapter *adapter);
132s32 c2h_evt_read_88xx(struct adapter *adapter, u8 *buf);
133
134u8 rtw_get_mgntframe_raid(struct adapter *adapter, unsigned char network_type);
135void rtw_hal_update_sta_rate_mask(struct adapter *padapter, struct sta_info *psta);
136
137void hw_var_port_switch(struct adapter *adapter);
138
139void SetHwReg(struct adapter *padapter, u8 variable, u8 *val);
140void GetHwReg(struct adapter *padapter, u8 variable, u8 *val);
141void rtw_hal_check_rxfifo_full(struct adapter *adapter);
142
143u8 SetHalDefVar(struct adapter *adapter, enum hal_def_variable variable,
144 void *value);
145u8 GetHalDefVar(struct adapter *adapter, enum hal_def_variable variable,
146 void *value);
147
148bool eqNByte(u8 *str1, u8 *str2, u32 num);
149
150bool GetU1ByteIntegerFromStringInDecimal(char *str, u8 *in);
151
152#ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
153void rtw_store_phy_info(struct adapter *padapter, union recv_frame *prframe);
154void rtw_dump_raw_rssi_info(struct adapter *padapter);
155#endif
156
157#define HWSET_MAX_SIZE 512
158
159void rtw_bb_rf_gain_offset(struct adapter *padapter);
160
161void GetHalODMVar(struct adapter *Adapter,
162 enum hal_odm_variable eVariable,
163 void *pValue1,
164 void *pValue2);
165void SetHalODMVar(
166 struct adapter *Adapter,
167 enum hal_odm_variable eVariable,
168 void *pValue1,
169 bool bSet);
170#endif /* __HAL_COMMON_H__ */
171

source code of linux/drivers/staging/rtl8723bs/include/hal_com.h