1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* |
3 | * Cadence USB3 and USBSSP DRD header file. |
4 | * |
5 | * Copyright (C) 2018-2020 Cadence. |
6 | * |
7 | * Author: Pawel Laszczak <pawell@cadence.com> |
8 | */ |
9 | #ifndef __LINUX_CDNS3_DRD |
10 | #define __LINUX_CDNS3_DRD |
11 | |
12 | #include <linux/usb/otg.h> |
13 | #include "core.h" |
14 | |
15 | /* DRD register interface for version v1 of cdns3 driver. */ |
16 | struct cdns3_otg_regs { |
17 | __le32 did; |
18 | __le32 rid; |
19 | __le32 capabilities; |
20 | __le32 reserved1; |
21 | __le32 cmd; |
22 | __le32 sts; |
23 | __le32 state; |
24 | __le32 reserved2; |
25 | __le32 ien; |
26 | __le32 ivect; |
27 | __le32 refclk; |
28 | __le32 tmr; |
29 | __le32 reserved3[4]; |
30 | __le32 simulate; |
31 | __le32 override; |
32 | __le32 susp_ctrl; |
33 | __le32 phyrst_cfg; |
34 | __le32 anasts; |
35 | __le32 adp_ramp_time; |
36 | __le32 ctrl1; |
37 | __le32 ctrl2; |
38 | }; |
39 | |
40 | /* DRD register interface for version v0 of cdns3 driver. */ |
41 | struct cdns3_otg_legacy_regs { |
42 | __le32 cmd; |
43 | __le32 sts; |
44 | __le32 state; |
45 | __le32 refclk; |
46 | __le32 ien; |
47 | __le32 ivect; |
48 | __le32 reserved1[3]; |
49 | __le32 tmr; |
50 | __le32 reserved2[2]; |
51 | __le32 version; |
52 | __le32 capabilities; |
53 | __le32 reserved3[2]; |
54 | __le32 simulate; |
55 | __le32 reserved4[5]; |
56 | __le32 ctrl1; |
57 | }; |
58 | |
59 | /* DRD register interface for cdnsp driver */ |
60 | struct cdnsp_otg_regs { |
61 | __le32 did; |
62 | __le32 rid; |
63 | __le32 cfgs1; |
64 | __le32 cfgs2; |
65 | __le32 cmd; |
66 | __le32 sts; |
67 | __le32 state; |
68 | __le32 ien; |
69 | __le32 ivect; |
70 | __le32 tmr; |
71 | __le32 simulate; |
72 | __le32 adpbc_sts; |
73 | __le32 adp_ramp_time; |
74 | __le32 adpbc_ctrl1; |
75 | __le32 adpbc_ctrl2; |
76 | __le32 override; |
77 | __le32 vbusvalid_dbnc_cfg; |
78 | __le32 sessvalid_dbnc_cfg; |
79 | __le32 susp_timing_ctrl; |
80 | }; |
81 | |
82 | /* CDNSP driver supports 0x000403xx Cadence USB controller family. */ |
83 | #define OTG_CDNSP_CHECK_DID(did) (((did) & GENMASK(31, 8)) == 0x00040300) |
84 | |
85 | /* CDNS3 driver supports 0x000402xx Cadence USB controller family. */ |
86 | #define OTG_CDNS3_CHECK_DID(did) (((did) & GENMASK(31, 8)) == 0x00040200) |
87 | |
88 | /* |
89 | * Common registers interface for both CDNS3 and CDNSP version of DRD. |
90 | */ |
91 | struct cdns_otg_common_regs { |
92 | __le32 cmd; |
93 | __le32 sts; |
94 | __le32 state; |
95 | }; |
96 | |
97 | /* |
98 | * Interrupt related registers. This registers are mapped in different |
99 | * location for CDNSP controller. |
100 | */ |
101 | struct cdns_otg_irq_regs { |
102 | __le32 ien; |
103 | __le32 ivect; |
104 | }; |
105 | |
106 | /* CDNS_RID - bitmasks */ |
107 | #define CDNS_RID(p) ((p) & GENMASK(15, 0)) |
108 | |
109 | /* CDNS_VID - bitmasks */ |
110 | #define CDNS_DID(p) ((p) & GENMASK(31, 0)) |
111 | |
112 | /* OTGCMD - bitmasks */ |
113 | /* "Request the bus for Device mode. */ |
114 | #define OTGCMD_DEV_BUS_REQ BIT(0) |
115 | /* Request the bus for Host mode */ |
116 | #define OTGCMD_HOST_BUS_REQ BIT(1) |
117 | /* Enable OTG mode. */ |
118 | #define OTGCMD_OTG_EN BIT(2) |
119 | /* Disable OTG mode */ |
120 | #define OTGCMD_OTG_DIS BIT(3) |
121 | /*"Configure OTG as A-Device. */ |
122 | #define OTGCMD_A_DEV_EN BIT(4) |
123 | /*"Configure OTG as A-Device. */ |
124 | #define OTGCMD_A_DEV_DIS BIT(5) |
125 | /* Drop the bus for Device mod e. */ |
126 | #define OTGCMD_DEV_BUS_DROP BIT(8) |
127 | /* Drop the bus for Host mode*/ |
128 | #define OTGCMD_HOST_BUS_DROP BIT(9) |
129 | /* Power Down USBSS-DEV - only for CDNS3.*/ |
130 | #define OTGCMD_DEV_POWER_OFF BIT(11) |
131 | /* Power Down CDNSXHCI - only for CDNS3. */ |
132 | #define OTGCMD_HOST_POWER_OFF BIT(12) |
133 | |
134 | /* OTGIEN - bitmasks */ |
135 | /* ID change interrupt enable */ |
136 | #define OTGIEN_ID_CHANGE_INT BIT(0) |
137 | /* Vbusvalid fall detected interrupt enable.*/ |
138 | #define OTGIEN_VBUSVALID_RISE_INT BIT(4) |
139 | /* Vbusvalid fall detected interrupt enable */ |
140 | #define OTGIEN_VBUSVALID_FALL_INT BIT(5) |
141 | |
142 | /* OTGSTS - bitmasks */ |
143 | /* |
144 | * Current value of the ID pin. It is only valid when idpullup in |
145 | * OTGCTRL1_TYPE register is set to '1'. |
146 | */ |
147 | #define OTGSTS_ID_VALUE BIT(0) |
148 | /* Current value of the vbus_valid */ |
149 | #define OTGSTS_VBUS_VALID BIT(1) |
150 | /* Current value of the b_sess_vld */ |
151 | #define OTGSTS_SESSION_VALID BIT(2) |
152 | /*Device mode is active*/ |
153 | #define OTGSTS_DEV_ACTIVE BIT(3) |
154 | /* Host mode is active. */ |
155 | #define OTGSTS_HOST_ACTIVE BIT(4) |
156 | /* OTG Controller not ready. */ |
157 | #define OTGSTS_OTG_NRDY_MASK BIT(11) |
158 | #define OTGSTS_OTG_NRDY(p) ((p) & OTGSTS_OTG_NRDY_MASK) |
159 | /* |
160 | * Value of the strap pins for: |
161 | * CDNS3: |
162 | * 000 - no default configuration |
163 | * 010 - Controller initiall configured as Host |
164 | * 100 - Controller initially configured as Device |
165 | * CDNSP: |
166 | * 000 - No default configuration. |
167 | * 010 - Controller initiall configured as Host. |
168 | * 100 - Controller initially configured as Device. |
169 | */ |
170 | #define OTGSTS_STRAP(p) (((p) & GENMASK(14, 12)) >> 12) |
171 | #define OTGSTS_STRAP_NO_DEFAULT_CFG 0x00 |
172 | #define OTGSTS_STRAP_HOST_OTG 0x01 |
173 | #define OTGSTS_STRAP_HOST 0x02 |
174 | #define OTGSTS_STRAP_GADGET 0x04 |
175 | #define OTGSTS_CDNSP_STRAP_HOST 0x01 |
176 | #define OTGSTS_CDNSP_STRAP_GADGET 0x02 |
177 | |
178 | /* Host mode is turned on. */ |
179 | #define OTGSTS_CDNS3_XHCI_READY BIT(26) |
180 | #define OTGSTS_CDNSP_XHCI_READY BIT(27) |
181 | |
182 | /* "Device mode is turned on .*/ |
183 | #define OTGSTS_CDNS3_DEV_READY BIT(27) |
184 | #define OTGSTS_CDNSP_DEV_READY BIT(26) |
185 | |
186 | /* OTGSTATE- bitmasks */ |
187 | #define OTGSTATE_DEV_STATE_MASK GENMASK(2, 0) |
188 | #define OTGSTATE_HOST_STATE_MASK GENMASK(5, 3) |
189 | #define OTGSTATE_HOST_STATE_IDLE 0x0 |
190 | #define OTGSTATE_HOST_STATE_VBUS_FALL 0x7 |
191 | #define OTGSTATE_HOST_STATE(p) (((p) & OTGSTATE_HOST_STATE_MASK) >> 3) |
192 | |
193 | /* OTGREFCLK - bitmasks */ |
194 | #define OTGREFCLK_STB_CLK_SWITCH_EN BIT(31) |
195 | |
196 | /* OVERRIDE - bitmasks */ |
197 | #define OVERRIDE_IDPULLUP BIT(0) |
198 | /* Only for CDNS3_CONTROLLER_V0 version */ |
199 | #define OVERRIDE_IDPULLUP_V0 BIT(24) |
200 | /* Vbusvalid/Sesvalid override select. */ |
201 | #define OVERRIDE_SESS_VLD_SEL BIT(10) |
202 | |
203 | /* PHYRST_CFG - bitmasks */ |
204 | #define PHYRST_CFG_PHYRST_A_ENABLE BIT(0) |
205 | |
206 | #define CDNS3_ID_PERIPHERAL 1 |
207 | #define CDNS3_ID_HOST 0 |
208 | |
209 | bool cdns_is_host(struct cdns *cdns); |
210 | bool cdns_is_device(struct cdns *cdns); |
211 | int cdns_get_id(struct cdns *cdns); |
212 | int cdns_get_vbus(struct cdns *cdns); |
213 | void cdns_clear_vbus(struct cdns *cdns); |
214 | void cdns_set_vbus(struct cdns *cdns); |
215 | int cdns_drd_init(struct cdns *cdns); |
216 | int cdns_drd_exit(struct cdns *cdns); |
217 | int cdns_drd_update_mode(struct cdns *cdns); |
218 | int cdns_drd_gadget_on(struct cdns *cdns); |
219 | void cdns_drd_gadget_off(struct cdns *cdns); |
220 | int cdns_drd_host_on(struct cdns *cdns); |
221 | void cdns_drd_host_off(struct cdns *cdns); |
222 | bool cdns_power_is_lost(struct cdns *cdns); |
223 | #endif /* __LINUX_CDNS3_DRD */ |
224 | |