1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* |
3 | * Copyright 2015-2017 Google, Inc |
4 | * |
5 | * USB Type-C Port Controller Interface. |
6 | */ |
7 | |
8 | #include <linux/delay.h> |
9 | #include <linux/kernel.h> |
10 | #include <linux/module.h> |
11 | #include <linux/i2c.h> |
12 | #include <linux/interrupt.h> |
13 | #include <linux/property.h> |
14 | #include <linux/regmap.h> |
15 | #include <linux/usb/pd.h> |
16 | #include <linux/usb/tcpci.h> |
17 | #include <linux/usb/tcpm.h> |
18 | #include <linux/usb/typec.h> |
19 | |
20 | #define PD_RETRY_COUNT_DEFAULT 3 |
21 | #define PD_RETRY_COUNT_3_0_OR_HIGHER 2 |
22 | #define AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV 3500 |
23 | #define VSINKPD_MIN_IR_DROP_MV 750 |
24 | #define VSRC_NEW_MIN_PERCENT 95 |
25 | #define VSRC_VALID_MIN_MV 500 |
26 | #define VPPS_NEW_MIN_PERCENT 95 |
27 | #define VPPS_VALID_MIN_MV 100 |
28 | #define VSINKDISCONNECT_PD_MIN_PERCENT 90 |
29 | |
30 | struct tcpci { |
31 | struct device *dev; |
32 | |
33 | struct tcpm_port *port; |
34 | |
35 | struct regmap *regmap; |
36 | unsigned int alert_mask; |
37 | |
38 | bool controls_vbus; |
39 | |
40 | struct tcpc_dev tcpc; |
41 | struct tcpci_data *data; |
42 | }; |
43 | |
44 | struct tcpci_chip { |
45 | struct tcpci *tcpci; |
46 | struct tcpci_data data; |
47 | }; |
48 | |
49 | struct tcpm_port *tcpci_get_tcpm_port(struct tcpci *tcpci) |
50 | { |
51 | return tcpci->port; |
52 | } |
53 | EXPORT_SYMBOL_GPL(tcpci_get_tcpm_port); |
54 | |
55 | static inline struct tcpci *tcpc_to_tcpci(struct tcpc_dev *tcpc) |
56 | { |
57 | return container_of(tcpc, struct tcpci, tcpc); |
58 | } |
59 | |
60 | static int tcpci_read16(struct tcpci *tcpci, unsigned int reg, u16 *val) |
61 | { |
62 | return regmap_raw_read(map: tcpci->regmap, reg, val, val_len: sizeof(u16)); |
63 | } |
64 | |
65 | static int tcpci_write16(struct tcpci *tcpci, unsigned int reg, u16 val) |
66 | { |
67 | return regmap_raw_write(map: tcpci->regmap, reg, val: &val, val_len: sizeof(u16)); |
68 | } |
69 | |
70 | static int tcpci_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc) |
71 | { |
72 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
73 | bool vconn_pres; |
74 | enum typec_cc_polarity polarity = TYPEC_POLARITY_CC1; |
75 | unsigned int reg; |
76 | int ret; |
77 | |
78 | ret = regmap_read(map: tcpci->regmap, TCPC_POWER_STATUS, val: ®); |
79 | if (ret < 0) |
80 | return ret; |
81 | |
82 | vconn_pres = !!(reg & TCPC_POWER_STATUS_VCONN_PRES); |
83 | if (vconn_pres) { |
84 | ret = regmap_read(map: tcpci->regmap, TCPC_TCPC_CTRL, val: ®); |
85 | if (ret < 0) |
86 | return ret; |
87 | |
88 | if (reg & TCPC_TCPC_CTRL_ORIENTATION) |
89 | polarity = TYPEC_POLARITY_CC2; |
90 | } |
91 | |
92 | switch (cc) { |
93 | case TYPEC_CC_RA: |
94 | reg = (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC1_SHIFT) | |
95 | (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC2_SHIFT); |
96 | break; |
97 | case TYPEC_CC_RD: |
98 | reg = (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) | |
99 | (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT); |
100 | break; |
101 | case TYPEC_CC_RP_DEF: |
102 | reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) | |
103 | (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) | |
104 | (TCPC_ROLE_CTRL_RP_VAL_DEF << |
105 | TCPC_ROLE_CTRL_RP_VAL_SHIFT); |
106 | break; |
107 | case TYPEC_CC_RP_1_5: |
108 | reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) | |
109 | (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) | |
110 | (TCPC_ROLE_CTRL_RP_VAL_1_5 << |
111 | TCPC_ROLE_CTRL_RP_VAL_SHIFT); |
112 | break; |
113 | case TYPEC_CC_RP_3_0: |
114 | reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) | |
115 | (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) | |
116 | (TCPC_ROLE_CTRL_RP_VAL_3_0 << |
117 | TCPC_ROLE_CTRL_RP_VAL_SHIFT); |
118 | break; |
119 | case TYPEC_CC_OPEN: |
120 | default: |
121 | reg = (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT) | |
122 | (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT); |
123 | break; |
124 | } |
125 | |
126 | if (vconn_pres) { |
127 | if (polarity == TYPEC_POLARITY_CC2) { |
128 | reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT); |
129 | reg |= (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT); |
130 | } else { |
131 | reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT); |
132 | reg |= (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT); |
133 | } |
134 | } |
135 | |
136 | ret = regmap_write(map: tcpci->regmap, TCPC_ROLE_CTRL, val: reg); |
137 | if (ret < 0) |
138 | return ret; |
139 | |
140 | return 0; |
141 | } |
142 | |
143 | static int tcpci_apply_rc(struct tcpc_dev *tcpc, enum typec_cc_status cc, |
144 | enum typec_cc_polarity polarity) |
145 | { |
146 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
147 | unsigned int reg; |
148 | int ret; |
149 | |
150 | ret = regmap_read(map: tcpci->regmap, TCPC_ROLE_CTRL, val: ®); |
151 | if (ret < 0) |
152 | return ret; |
153 | |
154 | /* |
155 | * APPLY_RC state is when ROLE_CONTROL.CC1 != ROLE_CONTROL.CC2 and vbus autodischarge on |
156 | * disconnect is disabled. Bail out when ROLE_CONTROL.CC1 != ROLE_CONTROL.CC2. |
157 | */ |
158 | if (((reg & (TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT)) >> |
159 | TCPC_ROLE_CTRL_CC2_SHIFT) != |
160 | ((reg & (TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT)) >> |
161 | TCPC_ROLE_CTRL_CC1_SHIFT)) |
162 | return 0; |
163 | |
164 | return regmap_update_bits(map: tcpci->regmap, TCPC_ROLE_CTRL, mask: polarity == TYPEC_POLARITY_CC1 ? |
165 | TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT : |
166 | TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT, |
167 | TCPC_ROLE_CTRL_CC_OPEN); |
168 | } |
169 | |
170 | static int tcpci_start_toggling(struct tcpc_dev *tcpc, |
171 | enum typec_port_type port_type, |
172 | enum typec_cc_status cc) |
173 | { |
174 | int ret; |
175 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
176 | unsigned int reg = TCPC_ROLE_CTRL_DRP; |
177 | |
178 | if (port_type != TYPEC_PORT_DRP) |
179 | return -EOPNOTSUPP; |
180 | |
181 | /* Handle vendor drp toggling */ |
182 | if (tcpci->data->start_drp_toggling) { |
183 | ret = tcpci->data->start_drp_toggling(tcpci, tcpci->data, cc); |
184 | if (ret < 0) |
185 | return ret; |
186 | } |
187 | |
188 | switch (cc) { |
189 | default: |
190 | case TYPEC_CC_RP_DEF: |
191 | reg |= (TCPC_ROLE_CTRL_RP_VAL_DEF << |
192 | TCPC_ROLE_CTRL_RP_VAL_SHIFT); |
193 | break; |
194 | case TYPEC_CC_RP_1_5: |
195 | reg |= (TCPC_ROLE_CTRL_RP_VAL_1_5 << |
196 | TCPC_ROLE_CTRL_RP_VAL_SHIFT); |
197 | break; |
198 | case TYPEC_CC_RP_3_0: |
199 | reg |= (TCPC_ROLE_CTRL_RP_VAL_3_0 << |
200 | TCPC_ROLE_CTRL_RP_VAL_SHIFT); |
201 | break; |
202 | } |
203 | |
204 | if (cc == TYPEC_CC_RD) |
205 | reg |= (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) | |
206 | (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT); |
207 | else |
208 | reg |= (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) | |
209 | (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT); |
210 | ret = regmap_write(map: tcpci->regmap, TCPC_ROLE_CTRL, val: reg); |
211 | if (ret < 0) |
212 | return ret; |
213 | return regmap_write(map: tcpci->regmap, TCPC_COMMAND, |
214 | TCPC_CMD_LOOK4CONNECTION); |
215 | } |
216 | |
217 | static int tcpci_get_cc(struct tcpc_dev *tcpc, |
218 | enum typec_cc_status *cc1, enum typec_cc_status *cc2) |
219 | { |
220 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
221 | unsigned int reg, role_control; |
222 | int ret; |
223 | |
224 | ret = regmap_read(map: tcpci->regmap, TCPC_ROLE_CTRL, val: &role_control); |
225 | if (ret < 0) |
226 | return ret; |
227 | |
228 | ret = regmap_read(map: tcpci->regmap, TCPC_CC_STATUS, val: ®); |
229 | if (ret < 0) |
230 | return ret; |
231 | |
232 | *cc1 = tcpci_to_typec_cc(cc: (reg >> TCPC_CC_STATUS_CC1_SHIFT) & |
233 | TCPC_CC_STATUS_CC1_MASK, |
234 | sink: reg & TCPC_CC_STATUS_TERM || |
235 | tcpc_presenting_rd(role_control, CC1)); |
236 | *cc2 = tcpci_to_typec_cc(cc: (reg >> TCPC_CC_STATUS_CC2_SHIFT) & |
237 | TCPC_CC_STATUS_CC2_MASK, |
238 | sink: reg & TCPC_CC_STATUS_TERM || |
239 | tcpc_presenting_rd(role_control, CC2)); |
240 | |
241 | return 0; |
242 | } |
243 | |
244 | static int tcpci_set_polarity(struct tcpc_dev *tcpc, |
245 | enum typec_cc_polarity polarity) |
246 | { |
247 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
248 | unsigned int reg; |
249 | int ret; |
250 | enum typec_cc_status cc1, cc2; |
251 | |
252 | /* Obtain Rp setting from role control */ |
253 | ret = regmap_read(map: tcpci->regmap, TCPC_ROLE_CTRL, val: ®); |
254 | if (ret < 0) |
255 | return ret; |
256 | |
257 | ret = tcpci_get_cc(tcpc, cc1: &cc1, cc2: &cc2); |
258 | if (ret < 0) |
259 | return ret; |
260 | |
261 | /* |
262 | * When port has drp toggling enabled, ROLE_CONTROL would only have the initial |
263 | * terminations for the toggling and does not indicate the final cc |
264 | * terminations when ConnectionResult is 0 i.e. drp toggling stops and |
265 | * the connection is resolved. Infer port role from TCPC_CC_STATUS based on the |
266 | * terminations seen. The port role is then used to set the cc terminations. |
267 | */ |
268 | if (reg & TCPC_ROLE_CTRL_DRP) { |
269 | /* Disable DRP for the OPEN setting to take effect */ |
270 | reg = reg & ~TCPC_ROLE_CTRL_DRP; |
271 | |
272 | if (polarity == TYPEC_POLARITY_CC2) { |
273 | reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT); |
274 | /* Local port is source */ |
275 | if (cc2 == TYPEC_CC_RD) |
276 | /* Role control would have the Rp setting when DRP was enabled */ |
277 | reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT; |
278 | else |
279 | reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT; |
280 | } else { |
281 | reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT); |
282 | /* Local port is source */ |
283 | if (cc1 == TYPEC_CC_RD) |
284 | /* Role control would have the Rp setting when DRP was enabled */ |
285 | reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT; |
286 | else |
287 | reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT; |
288 | } |
289 | } |
290 | |
291 | if (polarity == TYPEC_POLARITY_CC2) |
292 | reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT; |
293 | else |
294 | reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT; |
295 | ret = regmap_write(map: tcpci->regmap, TCPC_ROLE_CTRL, val: reg); |
296 | if (ret < 0) |
297 | return ret; |
298 | |
299 | return regmap_write(map: tcpci->regmap, TCPC_TCPC_CTRL, |
300 | val: (polarity == TYPEC_POLARITY_CC2) ? |
301 | TCPC_TCPC_CTRL_ORIENTATION : 0); |
302 | } |
303 | |
304 | static void tcpci_set_partner_usb_comm_capable(struct tcpc_dev *tcpc, bool capable) |
305 | { |
306 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
307 | |
308 | if (tcpci->data->set_partner_usb_comm_capable) |
309 | tcpci->data->set_partner_usb_comm_capable(tcpci, tcpci->data, capable); |
310 | } |
311 | |
312 | static int tcpci_set_vconn(struct tcpc_dev *tcpc, bool enable) |
313 | { |
314 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
315 | int ret; |
316 | |
317 | /* Handle vendor set vconn */ |
318 | if (tcpci->data->set_vconn) { |
319 | ret = tcpci->data->set_vconn(tcpci, tcpci->data, enable); |
320 | if (ret < 0) |
321 | return ret; |
322 | } |
323 | |
324 | return regmap_update_bits(map: tcpci->regmap, TCPC_POWER_CTRL, |
325 | TCPC_POWER_CTRL_VCONN_ENABLE, |
326 | val: enable ? TCPC_POWER_CTRL_VCONN_ENABLE : 0); |
327 | } |
328 | |
329 | static int tcpci_enable_auto_vbus_discharge(struct tcpc_dev *dev, bool enable) |
330 | { |
331 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc: dev); |
332 | int ret; |
333 | |
334 | ret = regmap_update_bits(map: tcpci->regmap, TCPC_POWER_CTRL, TCPC_POWER_CTRL_AUTO_DISCHARGE, |
335 | val: enable ? TCPC_POWER_CTRL_AUTO_DISCHARGE : 0); |
336 | return ret; |
337 | } |
338 | |
339 | static int tcpci_set_auto_vbus_discharge_threshold(struct tcpc_dev *dev, enum typec_pwr_opmode mode, |
340 | bool pps_active, u32 requested_vbus_voltage_mv) |
341 | { |
342 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc: dev); |
343 | unsigned int pwr_ctrl, threshold = 0; |
344 | int ret; |
345 | |
346 | /* |
347 | * Indicates that vbus is going to go away due PR_SWAP, hard reset etc. |
348 | * Do not discharge vbus here. |
349 | */ |
350 | if (requested_vbus_voltage_mv == 0) |
351 | goto write_thresh; |
352 | |
353 | ret = regmap_read(map: tcpci->regmap, TCPC_POWER_CTRL, val: &pwr_ctrl); |
354 | if (ret < 0) |
355 | return ret; |
356 | |
357 | if (pwr_ctrl & TCPC_FAST_ROLE_SWAP_EN) { |
358 | /* To prevent disconnect when the source is fast role swap is capable. */ |
359 | threshold = AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV; |
360 | } else if (mode == TYPEC_PWR_MODE_PD) { |
361 | if (pps_active) |
362 | threshold = ((VPPS_NEW_MIN_PERCENT * requested_vbus_voltage_mv / 100) - |
363 | VSINKPD_MIN_IR_DROP_MV - VPPS_VALID_MIN_MV) * |
364 | VSINKDISCONNECT_PD_MIN_PERCENT / 100; |
365 | else |
366 | threshold = ((VSRC_NEW_MIN_PERCENT * requested_vbus_voltage_mv / 100) - |
367 | VSINKPD_MIN_IR_DROP_MV - VSRC_VALID_MIN_MV) * |
368 | VSINKDISCONNECT_PD_MIN_PERCENT / 100; |
369 | } else { |
370 | /* 3.5V for non-pd sink */ |
371 | threshold = AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV; |
372 | } |
373 | |
374 | threshold = threshold / TCPC_VBUS_SINK_DISCONNECT_THRESH_LSB_MV; |
375 | |
376 | if (threshold > TCPC_VBUS_SINK_DISCONNECT_THRESH_MAX) |
377 | return -EINVAL; |
378 | |
379 | write_thresh: |
380 | return tcpci_write16(tcpci, TCPC_VBUS_SINK_DISCONNECT_THRESH, val: threshold); |
381 | } |
382 | |
383 | static int tcpci_enable_frs(struct tcpc_dev *dev, bool enable) |
384 | { |
385 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc: dev); |
386 | int ret; |
387 | |
388 | /* To prevent disconnect during FRS, set disconnect threshold to 3.5V */ |
389 | ret = tcpci_write16(tcpci, TCPC_VBUS_SINK_DISCONNECT_THRESH, val: enable ? 0 : 0x8c); |
390 | if (ret < 0) |
391 | return ret; |
392 | |
393 | ret = regmap_update_bits(map: tcpci->regmap, TCPC_POWER_CTRL, TCPC_FAST_ROLE_SWAP_EN, val: enable ? |
394 | TCPC_FAST_ROLE_SWAP_EN : 0); |
395 | |
396 | return ret; |
397 | } |
398 | |
399 | static void tcpci_frs_sourcing_vbus(struct tcpc_dev *dev) |
400 | { |
401 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc: dev); |
402 | |
403 | if (tcpci->data->frs_sourcing_vbus) |
404 | tcpci->data->frs_sourcing_vbus(tcpci, tcpci->data); |
405 | } |
406 | |
407 | static void tcpci_check_contaminant(struct tcpc_dev *dev) |
408 | { |
409 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc: dev); |
410 | |
411 | if (tcpci->data->check_contaminant) |
412 | tcpci->data->check_contaminant(tcpci, tcpci->data); |
413 | } |
414 | |
415 | static int tcpci_set_bist_data(struct tcpc_dev *tcpc, bool enable) |
416 | { |
417 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
418 | |
419 | return regmap_update_bits(map: tcpci->regmap, TCPC_TCPC_CTRL, TCPC_TCPC_CTRL_BIST_TM, |
420 | val: enable ? TCPC_TCPC_CTRL_BIST_TM : 0); |
421 | } |
422 | |
423 | static int tcpci_set_roles(struct tcpc_dev *tcpc, bool attached, |
424 | enum typec_role role, enum typec_data_role data) |
425 | { |
426 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
427 | unsigned int reg; |
428 | int ret; |
429 | |
430 | reg = PD_REV20 << TCPC_MSG_HDR_INFO_REV_SHIFT; |
431 | if (role == TYPEC_SOURCE) |
432 | reg |= TCPC_MSG_HDR_INFO_PWR_ROLE; |
433 | if (data == TYPEC_HOST) |
434 | reg |= TCPC_MSG_HDR_INFO_DATA_ROLE; |
435 | ret = regmap_write(map: tcpci->regmap, TCPC_MSG_HDR_INFO, val: reg); |
436 | if (ret < 0) |
437 | return ret; |
438 | |
439 | return 0; |
440 | } |
441 | |
442 | static int tcpci_set_pd_rx(struct tcpc_dev *tcpc, bool enable) |
443 | { |
444 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
445 | unsigned int reg = 0; |
446 | int ret; |
447 | |
448 | if (enable) { |
449 | reg = TCPC_RX_DETECT_SOP | TCPC_RX_DETECT_HARD_RESET; |
450 | if (tcpci->data->cable_comm_capable) |
451 | reg |= TCPC_RX_DETECT_SOP1; |
452 | } |
453 | ret = regmap_write(map: tcpci->regmap, TCPC_RX_DETECT, val: reg); |
454 | if (ret < 0) |
455 | return ret; |
456 | |
457 | return 0; |
458 | } |
459 | |
460 | static int tcpci_get_vbus(struct tcpc_dev *tcpc) |
461 | { |
462 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
463 | unsigned int reg; |
464 | int ret; |
465 | |
466 | ret = regmap_read(map: tcpci->regmap, TCPC_POWER_STATUS, val: ®); |
467 | if (ret < 0) |
468 | return ret; |
469 | |
470 | return !!(reg & TCPC_POWER_STATUS_VBUS_PRES); |
471 | } |
472 | |
473 | static bool tcpci_is_vbus_vsafe0v(struct tcpc_dev *tcpc) |
474 | { |
475 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
476 | unsigned int reg; |
477 | int ret; |
478 | |
479 | ret = regmap_read(map: tcpci->regmap, TCPC_EXTENDED_STATUS, val: ®); |
480 | if (ret < 0) |
481 | return false; |
482 | |
483 | return !!(reg & TCPC_EXTENDED_STATUS_VSAFE0V); |
484 | } |
485 | |
486 | static int tcpci_set_vbus(struct tcpc_dev *tcpc, bool source, bool sink) |
487 | { |
488 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
489 | int ret; |
490 | |
491 | if (tcpci->data->set_vbus) { |
492 | ret = tcpci->data->set_vbus(tcpci, tcpci->data, source, sink); |
493 | /* Bypass when ret > 0 */ |
494 | if (ret != 0) |
495 | return ret < 0 ? ret : 0; |
496 | } |
497 | |
498 | /* Disable both source and sink first before enabling anything */ |
499 | |
500 | if (!source) { |
501 | ret = regmap_write(map: tcpci->regmap, TCPC_COMMAND, |
502 | TCPC_CMD_DISABLE_SRC_VBUS); |
503 | if (ret < 0) |
504 | return ret; |
505 | } |
506 | |
507 | if (!sink) { |
508 | ret = regmap_write(map: tcpci->regmap, TCPC_COMMAND, |
509 | TCPC_CMD_DISABLE_SINK_VBUS); |
510 | if (ret < 0) |
511 | return ret; |
512 | } |
513 | |
514 | if (source) { |
515 | ret = regmap_write(map: tcpci->regmap, TCPC_COMMAND, |
516 | TCPC_CMD_SRC_VBUS_DEFAULT); |
517 | if (ret < 0) |
518 | return ret; |
519 | } |
520 | |
521 | if (sink) { |
522 | ret = regmap_write(map: tcpci->regmap, TCPC_COMMAND, |
523 | TCPC_CMD_SINK_VBUS); |
524 | if (ret < 0) |
525 | return ret; |
526 | } |
527 | |
528 | return 0; |
529 | } |
530 | |
531 | static int tcpci_pd_transmit(struct tcpc_dev *tcpc, enum tcpm_transmit_type type, |
532 | const struct pd_message *msg, unsigned int negotiated_rev) |
533 | { |
534 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
535 | u16 = msg ? le16_to_cpu(msg->header) : 0; |
536 | unsigned int reg, cnt; |
537 | int ret; |
538 | |
539 | cnt = msg ? pd_header_cnt(header) * 4 : 0; |
540 | /** |
541 | * TCPCI spec forbids direct access of TCPC_TX_DATA. |
542 | * But, since some of the chipsets offer this capability, |
543 | * it's fair to support both. |
544 | */ |
545 | if (tcpci->data->TX_BUF_BYTE_x_hidden) { |
546 | u8 buf[TCPC_TRANSMIT_BUFFER_MAX_LEN] = {0,}; |
547 | u8 pos = 0; |
548 | |
549 | /* Payload + header + TCPC_TX_BYTE_CNT */ |
550 | buf[pos++] = cnt + 2; |
551 | |
552 | if (msg) |
553 | memcpy(&buf[pos], &msg->header, sizeof(msg->header)); |
554 | |
555 | pos += sizeof(header); |
556 | |
557 | if (cnt > 0) |
558 | memcpy(&buf[pos], msg->payload, cnt); |
559 | |
560 | pos += cnt; |
561 | ret = regmap_raw_write(map: tcpci->regmap, TCPC_TX_BYTE_CNT, val: buf, val_len: pos); |
562 | if (ret < 0) |
563 | return ret; |
564 | } else { |
565 | ret = regmap_write(map: tcpci->regmap, TCPC_TX_BYTE_CNT, val: cnt + 2); |
566 | if (ret < 0) |
567 | return ret; |
568 | |
569 | ret = tcpci_write16(tcpci, TCPC_TX_HDR, val: header); |
570 | if (ret < 0) |
571 | return ret; |
572 | |
573 | if (cnt > 0) { |
574 | ret = regmap_raw_write(map: tcpci->regmap, TCPC_TX_DATA, val: &msg->payload, val_len: cnt); |
575 | if (ret < 0) |
576 | return ret; |
577 | } |
578 | } |
579 | |
580 | /* nRetryCount is 3 in PD2.0 spec where 2 in PD3.0 spec */ |
581 | reg = ((negotiated_rev > PD_REV20 ? PD_RETRY_COUNT_3_0_OR_HIGHER : PD_RETRY_COUNT_DEFAULT) |
582 | << TCPC_TRANSMIT_RETRY_SHIFT) | (type << TCPC_TRANSMIT_TYPE_SHIFT); |
583 | ret = regmap_write(map: tcpci->regmap, TCPC_TRANSMIT, val: reg); |
584 | if (ret < 0) |
585 | return ret; |
586 | |
587 | return 0; |
588 | } |
589 | |
590 | static bool tcpci_cable_comm_capable(struct tcpc_dev *tcpc) |
591 | { |
592 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
593 | |
594 | return tcpci->data->cable_comm_capable; |
595 | } |
596 | |
597 | static bool tcpci_attempt_vconn_swap_discovery(struct tcpc_dev *tcpc) |
598 | { |
599 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
600 | |
601 | if (tcpci->data->attempt_vconn_swap_discovery) |
602 | return tcpci->data->attempt_vconn_swap_discovery(tcpci, tcpci->data); |
603 | |
604 | return false; |
605 | } |
606 | |
607 | static int tcpci_init(struct tcpc_dev *tcpc) |
608 | { |
609 | struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
610 | unsigned long timeout = jiffies + msecs_to_jiffies(m: 2000); /* XXX */ |
611 | unsigned int reg; |
612 | int ret; |
613 | |
614 | while (time_before_eq(jiffies, timeout)) { |
615 | ret = regmap_read(map: tcpci->regmap, TCPC_POWER_STATUS, val: ®); |
616 | if (ret < 0) |
617 | return ret; |
618 | if (!(reg & TCPC_POWER_STATUS_UNINIT)) |
619 | break; |
620 | usleep_range(min: 10000, max: 20000); |
621 | } |
622 | if (time_after(jiffies, timeout)) |
623 | return -ETIMEDOUT; |
624 | |
625 | ret = tcpci_write16(tcpci, TCPC_FAULT_STATUS, TCPC_FAULT_STATUS_ALL_REG_RST_TO_DEFAULT); |
626 | if (ret < 0) |
627 | return ret; |
628 | |
629 | /* Handle vendor init */ |
630 | if (tcpci->data->init) { |
631 | ret = tcpci->data->init(tcpci, tcpci->data); |
632 | if (ret < 0) |
633 | return ret; |
634 | } |
635 | |
636 | /* Clear all events */ |
637 | ret = tcpci_write16(tcpci, TCPC_ALERT, val: 0xffff); |
638 | if (ret < 0) |
639 | return ret; |
640 | |
641 | if (tcpci->controls_vbus) |
642 | reg = TCPC_POWER_STATUS_VBUS_PRES; |
643 | else |
644 | reg = 0; |
645 | ret = regmap_write(map: tcpci->regmap, TCPC_POWER_STATUS_MASK, val: reg); |
646 | if (ret < 0) |
647 | return ret; |
648 | |
649 | /* Enable Vbus detection */ |
650 | ret = regmap_write(map: tcpci->regmap, TCPC_COMMAND, |
651 | TCPC_CMD_ENABLE_VBUS_DETECT); |
652 | if (ret < 0) |
653 | return ret; |
654 | |
655 | reg = TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_FAILED | |
656 | TCPC_ALERT_TX_DISCARDED | TCPC_ALERT_RX_STATUS | |
657 | TCPC_ALERT_RX_HARD_RST | TCPC_ALERT_CC_STATUS; |
658 | if (tcpci->controls_vbus) |
659 | reg |= TCPC_ALERT_POWER_STATUS; |
660 | /* Enable VSAFE0V status interrupt when detecting VSAFE0V is supported */ |
661 | if (tcpci->data->vbus_vsafe0v) { |
662 | reg |= TCPC_ALERT_EXTENDED_STATUS; |
663 | ret = regmap_write(map: tcpci->regmap, TCPC_EXTENDED_STATUS_MASK, |
664 | TCPC_EXTENDED_STATUS_VSAFE0V); |
665 | if (ret < 0) |
666 | return ret; |
667 | } |
668 | |
669 | tcpci->alert_mask = reg; |
670 | |
671 | return tcpci_write16(tcpci, TCPC_ALERT_MASK, val: reg); |
672 | } |
673 | |
674 | irqreturn_t tcpci_irq(struct tcpci *tcpci) |
675 | { |
676 | u16 status; |
677 | int ret; |
678 | unsigned int raw; |
679 | |
680 | tcpci_read16(tcpci, TCPC_ALERT, val: &status); |
681 | |
682 | /* |
683 | * Clear alert status for everything except RX_STATUS, which shouldn't |
684 | * be cleared until we have successfully retrieved message. |
685 | */ |
686 | if (status & ~TCPC_ALERT_RX_STATUS) |
687 | tcpci_write16(tcpci, TCPC_ALERT, |
688 | val: status & ~TCPC_ALERT_RX_STATUS); |
689 | |
690 | if (status & TCPC_ALERT_CC_STATUS) |
691 | tcpm_cc_change(port: tcpci->port); |
692 | |
693 | if (status & TCPC_ALERT_POWER_STATUS) { |
694 | regmap_read(map: tcpci->regmap, TCPC_POWER_STATUS_MASK, val: &raw); |
695 | /* |
696 | * If power status mask has been reset, then the TCPC |
697 | * has reset. |
698 | */ |
699 | if (raw == 0xff) |
700 | tcpm_tcpc_reset(port: tcpci->port); |
701 | else |
702 | tcpm_vbus_change(port: tcpci->port); |
703 | } |
704 | |
705 | if (status & TCPC_ALERT_RX_STATUS) { |
706 | struct pd_message msg; |
707 | unsigned int cnt, payload_cnt; |
708 | u16 ; |
709 | |
710 | regmap_read(map: tcpci->regmap, TCPC_RX_BYTE_CNT, val: &cnt); |
711 | /* |
712 | * 'cnt' corresponds to READABLE_BYTE_COUNT in section 4.4.14 |
713 | * of the TCPCI spec [Rev 2.0 Ver 1.0 October 2017] and is |
714 | * defined in table 4-36 as one greater than the number of |
715 | * bytes received. And that number includes the header. So: |
716 | */ |
717 | if (cnt > 3) |
718 | payload_cnt = cnt - (1 + sizeof(msg.header)); |
719 | else |
720 | payload_cnt = 0; |
721 | |
722 | tcpci_read16(tcpci, TCPC_RX_HDR, val: &header); |
723 | msg.header = cpu_to_le16(header); |
724 | |
725 | if (WARN_ON(payload_cnt > sizeof(msg.payload))) |
726 | payload_cnt = sizeof(msg.payload); |
727 | |
728 | if (payload_cnt > 0) |
729 | regmap_raw_read(map: tcpci->regmap, TCPC_RX_DATA, |
730 | val: &msg.payload, val_len: payload_cnt); |
731 | |
732 | /* Read complete, clear RX status alert bit */ |
733 | tcpci_write16(tcpci, TCPC_ALERT, TCPC_ALERT_RX_STATUS); |
734 | |
735 | tcpm_pd_receive(port: tcpci->port, msg: &msg, rx_sop_type: TCPC_TX_SOP); |
736 | } |
737 | |
738 | if (tcpci->data->vbus_vsafe0v && (status & TCPC_ALERT_EXTENDED_STATUS)) { |
739 | ret = regmap_read(map: tcpci->regmap, TCPC_EXTENDED_STATUS, val: &raw); |
740 | if (!ret && (raw & TCPC_EXTENDED_STATUS_VSAFE0V)) |
741 | tcpm_vbus_change(port: tcpci->port); |
742 | } |
743 | |
744 | if (status & TCPC_ALERT_RX_HARD_RST) |
745 | tcpm_pd_hard_reset(port: tcpci->port); |
746 | |
747 | if (status & TCPC_ALERT_TX_SUCCESS) |
748 | tcpm_pd_transmit_complete(port: tcpci->port, status: TCPC_TX_SUCCESS); |
749 | else if (status & TCPC_ALERT_TX_DISCARDED) |
750 | tcpm_pd_transmit_complete(port: tcpci->port, status: TCPC_TX_DISCARDED); |
751 | else if (status & TCPC_ALERT_TX_FAILED) |
752 | tcpm_pd_transmit_complete(port: tcpci->port, status: TCPC_TX_FAILED); |
753 | |
754 | return IRQ_RETVAL(status & tcpci->alert_mask); |
755 | } |
756 | EXPORT_SYMBOL_GPL(tcpci_irq); |
757 | |
758 | static irqreturn_t _tcpci_irq(int irq, void *dev_id) |
759 | { |
760 | struct tcpci_chip *chip = dev_id; |
761 | |
762 | return tcpci_irq(chip->tcpci); |
763 | } |
764 | |
765 | static const struct regmap_config tcpci_regmap_config = { |
766 | .reg_bits = 8, |
767 | .val_bits = 8, |
768 | |
769 | .max_register = 0x7F, /* 0x80 .. 0xFF are vendor defined */ |
770 | }; |
771 | |
772 | static int tcpci_parse_config(struct tcpci *tcpci) |
773 | { |
774 | tcpci->controls_vbus = true; /* XXX */ |
775 | |
776 | tcpci->tcpc.fwnode = device_get_named_child_node(dev: tcpci->dev, |
777 | childname: "connector" ); |
778 | if (!tcpci->tcpc.fwnode) { |
779 | dev_err(tcpci->dev, "Can't find connector node.\n" ); |
780 | return -EINVAL; |
781 | } |
782 | |
783 | return 0; |
784 | } |
785 | |
786 | struct tcpci *tcpci_register_port(struct device *dev, struct tcpci_data *data) |
787 | { |
788 | struct tcpci *tcpci; |
789 | int err; |
790 | |
791 | tcpci = devm_kzalloc(dev, size: sizeof(*tcpci), GFP_KERNEL); |
792 | if (!tcpci) |
793 | return ERR_PTR(error: -ENOMEM); |
794 | |
795 | tcpci->dev = dev; |
796 | tcpci->data = data; |
797 | tcpci->regmap = data->regmap; |
798 | |
799 | tcpci->tcpc.init = tcpci_init; |
800 | tcpci->tcpc.get_vbus = tcpci_get_vbus; |
801 | tcpci->tcpc.set_vbus = tcpci_set_vbus; |
802 | tcpci->tcpc.set_cc = tcpci_set_cc; |
803 | tcpci->tcpc.apply_rc = tcpci_apply_rc; |
804 | tcpci->tcpc.get_cc = tcpci_get_cc; |
805 | tcpci->tcpc.set_polarity = tcpci_set_polarity; |
806 | tcpci->tcpc.set_vconn = tcpci_set_vconn; |
807 | tcpci->tcpc.start_toggling = tcpci_start_toggling; |
808 | |
809 | tcpci->tcpc.set_pd_rx = tcpci_set_pd_rx; |
810 | tcpci->tcpc.set_roles = tcpci_set_roles; |
811 | tcpci->tcpc.pd_transmit = tcpci_pd_transmit; |
812 | tcpci->tcpc.set_bist_data = tcpci_set_bist_data; |
813 | tcpci->tcpc.enable_frs = tcpci_enable_frs; |
814 | tcpci->tcpc.frs_sourcing_vbus = tcpci_frs_sourcing_vbus; |
815 | tcpci->tcpc.set_partner_usb_comm_capable = tcpci_set_partner_usb_comm_capable; |
816 | tcpci->tcpc.cable_comm_capable = tcpci_cable_comm_capable; |
817 | tcpci->tcpc.attempt_vconn_swap_discovery = tcpci_attempt_vconn_swap_discovery; |
818 | |
819 | if (tcpci->data->check_contaminant) |
820 | tcpci->tcpc.check_contaminant = tcpci_check_contaminant; |
821 | |
822 | if (tcpci->data->auto_discharge_disconnect) { |
823 | tcpci->tcpc.enable_auto_vbus_discharge = tcpci_enable_auto_vbus_discharge; |
824 | tcpci->tcpc.set_auto_vbus_discharge_threshold = |
825 | tcpci_set_auto_vbus_discharge_threshold; |
826 | regmap_update_bits(map: tcpci->regmap, TCPC_POWER_CTRL, TCPC_POWER_CTRL_BLEED_DISCHARGE, |
827 | TCPC_POWER_CTRL_BLEED_DISCHARGE); |
828 | } |
829 | |
830 | if (tcpci->data->vbus_vsafe0v) |
831 | tcpci->tcpc.is_vbus_vsafe0v = tcpci_is_vbus_vsafe0v; |
832 | |
833 | err = tcpci_parse_config(tcpci); |
834 | if (err < 0) |
835 | return ERR_PTR(error: err); |
836 | |
837 | tcpci->port = tcpm_register_port(dev: tcpci->dev, tcpc: &tcpci->tcpc); |
838 | if (IS_ERR(ptr: tcpci->port)) { |
839 | fwnode_handle_put(fwnode: tcpci->tcpc.fwnode); |
840 | return ERR_CAST(ptr: tcpci->port); |
841 | } |
842 | |
843 | return tcpci; |
844 | } |
845 | EXPORT_SYMBOL_GPL(tcpci_register_port); |
846 | |
847 | void tcpci_unregister_port(struct tcpci *tcpci) |
848 | { |
849 | tcpm_unregister_port(port: tcpci->port); |
850 | fwnode_handle_put(fwnode: tcpci->tcpc.fwnode); |
851 | } |
852 | EXPORT_SYMBOL_GPL(tcpci_unregister_port); |
853 | |
854 | static int tcpci_probe(struct i2c_client *client) |
855 | { |
856 | struct tcpci_chip *chip; |
857 | int err; |
858 | u16 val = 0; |
859 | |
860 | chip = devm_kzalloc(dev: &client->dev, size: sizeof(*chip), GFP_KERNEL); |
861 | if (!chip) |
862 | return -ENOMEM; |
863 | |
864 | chip->data.regmap = devm_regmap_init_i2c(client, &tcpci_regmap_config); |
865 | if (IS_ERR(ptr: chip->data.regmap)) |
866 | return PTR_ERR(ptr: chip->data.regmap); |
867 | |
868 | i2c_set_clientdata(client, data: chip); |
869 | |
870 | /* Disable chip interrupts before requesting irq */ |
871 | err = regmap_raw_write(map: chip->data.regmap, TCPC_ALERT_MASK, val: &val, |
872 | val_len: sizeof(u16)); |
873 | if (err < 0) |
874 | return err; |
875 | |
876 | chip->tcpci = tcpci_register_port(&client->dev, &chip->data); |
877 | if (IS_ERR(ptr: chip->tcpci)) |
878 | return PTR_ERR(ptr: chip->tcpci); |
879 | |
880 | err = devm_request_threaded_irq(dev: &client->dev, irq: client->irq, NULL, |
881 | thread_fn: _tcpci_irq, |
882 | IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_LOW, |
883 | devname: dev_name(dev: &client->dev), dev_id: chip); |
884 | if (err < 0) { |
885 | tcpci_unregister_port(chip->tcpci); |
886 | return err; |
887 | } |
888 | |
889 | return 0; |
890 | } |
891 | |
892 | static void tcpci_remove(struct i2c_client *client) |
893 | { |
894 | struct tcpci_chip *chip = i2c_get_clientdata(client); |
895 | int err; |
896 | |
897 | /* Disable chip interrupts before unregistering port */ |
898 | err = tcpci_write16(tcpci: chip->tcpci, TCPC_ALERT_MASK, val: 0); |
899 | if (err < 0) |
900 | dev_warn(&client->dev, "Failed to disable irqs (%pe)\n" , ERR_PTR(err)); |
901 | |
902 | tcpci_unregister_port(chip->tcpci); |
903 | } |
904 | |
905 | static const struct i2c_device_id tcpci_id[] = { |
906 | { "tcpci" , 0 }, |
907 | { } |
908 | }; |
909 | MODULE_DEVICE_TABLE(i2c, tcpci_id); |
910 | |
911 | #ifdef CONFIG_OF |
912 | static const struct of_device_id tcpci_of_match[] = { |
913 | { .compatible = "nxp,ptn5110" , }, |
914 | { .compatible = "tcpci" , }, |
915 | {}, |
916 | }; |
917 | MODULE_DEVICE_TABLE(of, tcpci_of_match); |
918 | #endif |
919 | |
920 | static struct i2c_driver tcpci_i2c_driver = { |
921 | .driver = { |
922 | .name = "tcpci" , |
923 | .of_match_table = of_match_ptr(tcpci_of_match), |
924 | }, |
925 | .probe = tcpci_probe, |
926 | .remove = tcpci_remove, |
927 | .id_table = tcpci_id, |
928 | }; |
929 | module_i2c_driver(tcpci_i2c_driver); |
930 | |
931 | MODULE_DESCRIPTION("USB Type-C Port Controller Interface driver" ); |
932 | MODULE_LICENSE("GPL" ); |
933 | |