1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* |
3 | * Copyright 2022 Google, Inc |
4 | * |
5 | * MAXIM TCPC header file. |
6 | */ |
7 | #ifndef TCPCI_MAXIM_H_ |
8 | #define TCPCI_MAXIM_H_ |
9 | |
10 | #define VENDOR_CC_STATUS2 0x85 |
11 | #define CC1_VUFP_RD0P5 BIT(1) |
12 | #define CC2_VUFP_RD0P5 BIT(5) |
13 | #define TCPC_VENDOR_FLADC_STATUS 0x89 |
14 | |
15 | #define TCPC_VENDOR_CC_CTRL1 0x8c |
16 | #define CCCONNDRY BIT(7) |
17 | #define CCCOMPEN BIT(5) |
18 | |
19 | #define TCPC_VENDOR_CC_CTRL2 0x8d |
20 | #define SBUOVPDIS BIT(7) |
21 | #define CCOVPDIS BIT(6) |
22 | #define SBURPCTRL BIT(5) |
23 | #define CCLPMODESEL_MASK GENMASK(4, 3) |
24 | #define ULTRA_LOW_POWER_MODE BIT(3) |
25 | #define CCRPCTRL_MASK GENMASK(2, 0) |
26 | #define UA_1_SRC 1 |
27 | #define UA_80_SRC 3 |
28 | |
29 | #define TCPC_VENDOR_CC_CTRL3 0x8e |
30 | #define CCWTRDEB_MASK GENMASK(7, 6) |
31 | #define CCWTRDEB_SHIFT 6 |
32 | #define CCWTRDEB_1MS 1 |
33 | #define CCWTRSEL_MASK GENMASK(5, 3) |
34 | #define CCWTRSEL_SHIFT 3 |
35 | #define CCWTRSEL_1V 0x4 |
36 | #define CCLADDERDIS BIT(2) |
37 | #define WTRCYCLE_MASK BIT(0) |
38 | #define WTRCYCLE_SHIFT 0 |
39 | #define WTRCYCLE_2_4_S 0 |
40 | #define WTRCYCLE_4_8_S 1 |
41 | |
42 | #define TCPC_VENDOR_ADC_CTRL1 0x91 |
43 | #define ADCINSEL_MASK GENMASK(7, 5) |
44 | #define ADC_CHANNEL_OFFSET 5 |
45 | #define ADCEN BIT(0) |
46 | |
47 | enum contamiant_state { |
48 | NOT_DETECTED, |
49 | DETECTED, |
50 | SINK, |
51 | }; |
52 | |
53 | /* |
54 | * @potential_contaminant: |
55 | * Last returned result to tcpm indicating whether the TCPM port |
56 | * has potential contaminant. |
57 | */ |
58 | struct max_tcpci_chip { |
59 | struct tcpci_data data; |
60 | struct tcpci *tcpci; |
61 | struct device *dev; |
62 | struct i2c_client *client; |
63 | struct tcpm_port *port; |
64 | enum contamiant_state contaminant_state; |
65 | bool veto_vconn_swap; |
66 | }; |
67 | |
68 | static inline int max_tcpci_read16(struct max_tcpci_chip *chip, unsigned int reg, u16 *val) |
69 | { |
70 | return regmap_raw_read(map: chip->data.regmap, reg, val, val_len: sizeof(u16)); |
71 | } |
72 | |
73 | static inline int max_tcpci_write16(struct max_tcpci_chip *chip, unsigned int reg, u16 val) |
74 | { |
75 | return regmap_raw_write(map: chip->data.regmap, reg, val: &val, val_len: sizeof(u16)); |
76 | } |
77 | |
78 | static inline int max_tcpci_read8(struct max_tcpci_chip *chip, unsigned int reg, u8 *val) |
79 | { |
80 | return regmap_raw_read(map: chip->data.regmap, reg, val, val_len: sizeof(u8)); |
81 | } |
82 | |
83 | static inline int max_tcpci_write8(struct max_tcpci_chip *chip, unsigned int reg, u8 val) |
84 | { |
85 | return regmap_raw_write(map: chip->data.regmap, reg, val: &val, val_len: sizeof(u8)); |
86 | } |
87 | |
88 | bool max_contaminant_is_contaminant(struct max_tcpci_chip *chip, bool disconnect_while_debounce); |
89 | |
90 | #endif // TCPCI_MAXIM_H_ |
91 | |